TW200729439A - Bond pad structure and method of forming the same - Google Patents
Bond pad structure and method of forming the sameInfo
- Publication number
- TW200729439A TW200729439A TW095120775A TW95120775A TW200729439A TW 200729439 A TW200729439 A TW 200729439A TW 095120775 A TW095120775 A TW 095120775A TW 95120775 A TW95120775 A TW 95120775A TW 200729439 A TW200729439 A TW 200729439A
- Authority
- TW
- Taiwan
- Prior art keywords
- passivation layer
- bonding pad
- pad structure
- forming
- same
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/019—Manufacture or treatment of bond pads
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/075—Connecting or disconnecting of bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/221—Structures or relative sizes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/241—Dispositions, e.g. layouts
- H10W72/242—Dispositions, e.g. layouts relative to the surface, e.g. recessed, protruding
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/251—Materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/251—Materials
- H10W72/252—Materials comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/29—Bond pads specially adapted therefor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/531—Shapes of wire connectors
- H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/59—Bond pads specially adapted therefor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/921—Structures or relative sizes of bond pads
- H10W72/923—Bond pads having multiple stacked layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/941—Dispositions of bond pads
- H10W72/9415—Dispositions of bond pads relative to the surface, e.g. recessed, protruding
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/951—Materials of bond pads
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/951—Materials of bond pads
- H10W72/952—Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/981—Auxiliary members, e.g. spacers
- H10W72/983—Reinforcing structures, e.g. collars
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
- H10W74/131—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed
- H10W74/147—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed the encapsulations being multilayered
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Wire Bonding (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/340,721 US20070176292A1 (en) | 2006-01-27 | 2006-01-27 | Bonding pad structure |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW200729439A true TW200729439A (en) | 2007-08-01 |
| TWI319228B TWI319228B (en) | 2010-01-01 |
Family
ID=38321245
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW095120775A TWI319228B (en) | 2006-01-27 | 2006-06-12 | Bond pad structure and method of forming the same |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US20070176292A1 (zh) |
| TW (1) | TWI319228B (zh) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI552297B (zh) * | 2013-03-06 | 2016-10-01 | 台灣積體電路製造股份有限公司 | 半導體裝置及其製造方法 |
| TWI722965B (zh) * | 2019-11-19 | 2021-03-21 | 南亞科技股份有限公司 | 具有應力釋放特徵的半導體元件及其製備方法 |
Families Citing this family (21)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7262121B2 (en) * | 2004-07-29 | 2007-08-28 | Micron Technology, Inc. | Integrated circuit and methods of redistributing bondpad locations |
| US7906424B2 (en) | 2007-08-01 | 2011-03-15 | Advanced Micro Devices, Inc. | Conductor bump method and apparatus |
| US20090032941A1 (en) * | 2007-08-01 | 2009-02-05 | Mclellan Neil | Under Bump Routing Layer Method and Apparatus |
| US7821038B2 (en) | 2008-03-21 | 2010-10-26 | Mediatek Inc. | Power and ground routing of integrated circuit devices with improved IR drop and chip performance |
| US9379059B2 (en) | 2008-03-21 | 2016-06-28 | Mediatek Inc. | Power and ground routing of integrated circuit devices with improved IR drop and chip performance |
| US8314474B2 (en) * | 2008-07-25 | 2012-11-20 | Ati Technologies Ulc | Under bump metallization for on-die capacitor |
| WO2010024932A2 (en) * | 2008-08-29 | 2010-03-04 | Globalfoundries Inc. | Enhanced wire bond stability on reactive metal surfaces of a semiconductor device by encapsulation of the bond structure |
| DE102008045033A1 (de) * | 2008-08-29 | 2010-03-04 | Advanced Micro Devices, Inc., Sunnyvale | Erhöhte Drahtverbindungsstabilität auf reaktiven Metalloberflächen eines Halbleiterbauelements durch Einkapselung der Verbindungsstruktur |
| US20110012239A1 (en) * | 2009-07-17 | 2011-01-20 | Qualcomm Incorporated | Barrier Layer On Polymer Passivation For Integrated Circuit Packaging |
| DE102009035437B4 (de) | 2009-07-31 | 2012-09-27 | Globalfoundries Dresden Module One Llc & Co. Kg | Halbleiterbauelement mit einem Verspannungspuffermaterial, das über einem Metallisierungssystem mit kleinem ε gebildet ist |
| US20110210443A1 (en) * | 2010-02-26 | 2011-09-01 | Xilinx, Inc. | Semiconductor device having bucket-shaped under-bump metallization and method of forming same |
| US20120326299A1 (en) * | 2011-06-24 | 2012-12-27 | Topacio Roden R | Semiconductor chip with dual polymer film interconnect structures |
| US8952530B2 (en) | 2012-09-14 | 2015-02-10 | Taiwan Semiconductor Manufacturing Company, Ltd. | Post passivation interconnect structures and methods for forming the same |
| US9337154B2 (en) * | 2014-08-28 | 2016-05-10 | Taiwan Semiconductor Manufacturing Company Ltd. | Semiconductor device and method of manufacturing the same |
| CN105633043A (zh) * | 2014-11-03 | 2016-06-01 | 中芯国际集成电路制造(上海)有限公司 | 一种半导体器件及其制造方法、电子装置 |
| JP2017112225A (ja) * | 2015-12-16 | 2017-06-22 | シャープ株式会社 | 半導体装置 |
| JP2020074352A (ja) * | 2017-03-13 | 2020-05-14 | 三菱電機株式会社 | 半導体装置 |
| US11031358B2 (en) * | 2018-03-01 | 2021-06-08 | Marvell Asia Pte, Ltd. | Overhang model for reducing passivation stress and method for producing the same |
| WO2021208066A1 (zh) * | 2020-04-17 | 2021-10-21 | 华为技术有限公司 | 电子设备、半导体晶片、芯片封装结构及其制作方法 |
| KR102945976B1 (ko) * | 2021-08-27 | 2026-03-30 | 삼성전자주식회사 | 반도체 패키지 및 그 제조 방법 |
| CN121487611A (zh) * | 2024-08-02 | 2026-02-06 | 华为技术有限公司 | 一种芯片、芯片封装结构及电子设备 |
Family Cites Families (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6441487B2 (en) * | 1997-10-20 | 2002-08-27 | Flip Chip Technologies, L.L.C. | Chip scale package using large ductile solder balls |
| US6586323B1 (en) * | 2000-09-18 | 2003-07-01 | Taiwan Semiconductor Manufacturing Company | Method for dual-layer polyimide processing on bumping technology |
| JP4068801B2 (ja) * | 2000-11-30 | 2008-03-26 | 株式会社ルネサステクノロジ | 半導体装置 |
| US6506681B2 (en) * | 2000-12-06 | 2003-01-14 | Micron Technology, Inc. | Thin flip—chip method |
| US6387795B1 (en) * | 2001-03-22 | 2002-05-14 | Apack Technologies Inc. | Wafer-level packaging |
| US20030020163A1 (en) * | 2001-07-25 | 2003-01-30 | Cheng-Yu Hung | Bonding pad structure for copper/low-k dielectric material BEOL process |
| US6614091B1 (en) * | 2002-03-13 | 2003-09-02 | Motorola, Inc. | Semiconductor device having a wire bond pad and method therefor |
| US6846899B2 (en) * | 2002-10-01 | 2005-01-25 | Chartered Semiconductor Manufacturing Ltd. | Poly(arylene ether) dielectrics |
| TWI229436B (en) * | 2003-07-10 | 2005-03-11 | Advanced Semiconductor Eng | Wafer structure and bumping process |
| US20050048772A1 (en) * | 2003-09-02 | 2005-03-03 | Applied Materials, Inc. | Bond pad techniques for integrated circuits |
| US7357977B2 (en) * | 2005-01-13 | 2008-04-15 | International Business Machines Corporation | Ultralow dielectric constant layer with controlled biaxial stress |
| US20060244156A1 (en) * | 2005-04-18 | 2006-11-02 | Tao Cheng | Bond pad structures and semiconductor devices using the same |
| US7518211B2 (en) * | 2005-11-11 | 2009-04-14 | United Microelectronics Corp. | Chip and package structure |
-
2006
- 2006-01-27 US US11/340,721 patent/US20070176292A1/en not_active Abandoned
- 2006-06-12 TW TW095120775A patent/TWI319228B/zh active
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI552297B (zh) * | 2013-03-06 | 2016-10-01 | 台灣積體電路製造股份有限公司 | 半導體裝置及其製造方法 |
| US9773732B2 (en) | 2013-03-06 | 2017-09-26 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method and apparatus for packaging pad structure |
| US10276496B2 (en) | 2013-03-06 | 2019-04-30 | Taiwan Semiconductor Manufacturing Company, Ltd. | Plurality of different size metal layers for a pad structure |
| US10658290B2 (en) | 2013-03-06 | 2020-05-19 | Taiwan Semiconductor Manufacturing Company, Ltd. | Plurality of different size metal layers for a pad structure |
| US11417599B2 (en) | 2013-03-06 | 2022-08-16 | Taiwan Semiconductor Manufacturing Company, Ltd. | Plurality of different size metal layers for a pad structure |
| US11784124B2 (en) | 2013-03-06 | 2023-10-10 | Taiwan Semiconductor Manufacturing Company, Ltd. | Plurality of different size metal layers for a pad structure |
| TWI722965B (zh) * | 2019-11-19 | 2021-03-21 | 南亞科技股份有限公司 | 具有應力釋放特徵的半導體元件及其製備方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| TWI319228B (en) | 2010-01-01 |
| US20070176292A1 (en) | 2007-08-02 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| TW200729439A (en) | Bond pad structure and method of forming the same | |
| TW200639914A (en) | Semiconductor device and fabrication method thereof | |
| TW200802646A (en) | Semiconductor chip having solder bump and method of frabricating the same | |
| TW200713549A (en) | Semiconductor element with conductive bumps and fabrication method thereof | |
| WO2008153128A1 (ja) | 半導体装置 | |
| TW200729366A (en) | Bump with multiple vias for semiconductor package, method of fabrication method thereof, and semiconductor package using the same | |
| JP2006521703A5 (zh) | ||
| WO2010080275A3 (en) | Bump stress mitigation layer for integrated circuits | |
| GB2438788B (en) | Structure and method for fabricating flip chip devices | |
| TW200731435A (en) | Solder bump and method of fabricating the same | |
| TWI265582B (en) | Various structure/height bumps for wafer level-chip scale package | |
| TW200639954A (en) | Contact structure on chip and package thereof | |
| TW200705528A (en) | Semiconductor device and fabrication method thereof | |
| SG115593A1 (en) | Bond pad scheme for cu process | |
| TW200725851A (en) | Packing structure and method forming the same | |
| TW200627652A (en) | Electronic package and method of manufacturing same | |
| TW200644132A (en) | Packaging method and structure thereof | |
| TWI267152B (en) | Semiconductor element with enhanced under bump metallurgy structure and fabrication method thereof | |
| SG124339A1 (en) | Under bump metallurgy in integrated circuits | |
| TW200634949A (en) | Using bump package structure and method thereof | |
| SG158048A1 (en) | Copper on organic solderability preservative (osp) interconnect and enhanced wire bonding process | |
| TW200727422A (en) | Package structure and manufacturing method thereof | |
| TWI256120B (en) | Driver IC package with multi-layer bumps | |
| SG139533A1 (en) | Method for manufacturing semiconductor wafer | |
| TW200709458A (en) | Method for bump manufacturing and chip package structure |