TW200802402A - Non-volatile memory device and methods using the same - Google Patents
Non-volatile memory device and methods using the sameInfo
- Publication number
- TW200802402A TW200802402A TW095123754A TW95123754A TW200802402A TW 200802402 A TW200802402 A TW 200802402A TW 095123754 A TW095123754 A TW 095123754A TW 95123754 A TW95123754 A TW 95123754A TW 200802402 A TW200802402 A TW 200802402A
- Authority
- TW
- Taiwan
- Prior art keywords
- register
- programming
- data line
- memory device
- cell array
- Prior art date
Links
- 230000009977 dual effect Effects 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/10—Decoders
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
- G11C16/102—External programming circuits, e.g. EPROM programmers; In-circuit programming or reprogramming; EPROM emulators
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
- G11C16/102—External programming circuits, e.g. EPROM programmers; In-circuit programming or reprogramming; EPROM emulators
- G11C16/105—Circuits or methods for updating contents of nonvolatile memory, especially with 'security' features to ensure reliable replacement, i.e. preventing that old data is lost before new data is reliably written
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/26—Sensing or reading circuits; Data output circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1015—Read-write modes for single port memories, i.e. having either a random port or a serial port
- G11C7/1042—Read-write modes for single port memories, i.e. having either a random port or a serial port using interleaving techniques, i.e. read-write of one part of the memory while preparing another part
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2216/00—Indexing scheme relating to G11C16/00 and subgroups, for features not directly covered by these groups
- G11C2216/12—Reading and writing aspects of erasable programmable read-only memories
- G11C2216/14—Circuits or methods to write a page or sector of information simultaneously into a nonvolatile memory, typically a complete row or word line in flash memory
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Security & Cryptography (AREA)
- Read Only Memory (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/358,767 US7336543B2 (en) | 2006-02-21 | 2006-02-21 | Non-volatile memory device with page buffer having dual registers and methods using the same |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW200802402A true TW200802402A (en) | 2008-01-01 |
| TWI308765B TWI308765B (en) | 2009-04-11 |
Family
ID=38428039
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW095123754A TWI308765B (en) | 2006-02-21 | 2006-06-30 | Non-volatile memory device and methods using the same |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US7336543B2 (zh) |
| TW (1) | TWI308765B (zh) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111243648A (zh) * | 2018-11-28 | 2020-06-05 | 北京知存科技有限公司 | 闪存单元、闪存模块以及闪存芯片 |
Families Citing this family (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100472726B1 (ko) * | 2002-10-29 | 2005-03-10 | 주식회사 하이닉스반도체 | 고속 데이터억세스를 위한 반도체 메모리장치 및 그구동방법 |
| KR100634457B1 (ko) * | 2005-07-04 | 2006-10-16 | 삼성전자주식회사 | 단일의 페이지 버퍼 구조로 멀티-비트 및 단일-비트프로그램 동작을 수행하는 플래시 메모리 장치 |
| KR100713983B1 (ko) * | 2005-09-22 | 2007-05-04 | 주식회사 하이닉스반도체 | 플래시 메모리 장치의 페이지 버퍼 및 그것을 이용한프로그램 방법 |
| US7345916B2 (en) * | 2006-06-12 | 2008-03-18 | Spansion Llc | Method and apparatus for high voltage operation for a high performance semiconductor memory device |
| US7848141B2 (en) * | 2006-10-31 | 2010-12-07 | Hynix Semiconductor Inc. | Multi-level cell copyback program method in a non-volatile memory device |
| US7944749B2 (en) * | 2006-12-21 | 2011-05-17 | Sandisk Corporation | Method of low voltage programming of non-volatile memory cells |
| KR100823175B1 (ko) * | 2007-02-27 | 2008-04-18 | 삼성전자주식회사 | 프로그램 성능을 향상시킬 수 있는 플래시 메모리 장치 및그것을 포함한 메모리 시스템 |
| US7961512B2 (en) * | 2008-03-19 | 2011-06-14 | Sandisk Corporation | Adaptive algorithm in cache operation with dynamic data latch requirements |
| KR101099911B1 (ko) * | 2009-12-17 | 2011-12-28 | 주식회사 하이닉스반도체 | 반도체 메모리 장치 및 그 동작 방법 |
| KR101082614B1 (ko) * | 2010-07-09 | 2011-11-10 | 주식회사 하이닉스반도체 | 반도체 메모리 장치 |
| US8681569B2 (en) * | 2012-02-22 | 2014-03-25 | Silicon Motion, Inc. | Method for reading data stored in a flash memory according to a threshold voltage distribution and memory controller and system thereof |
| CN103730160B (zh) * | 2014-01-07 | 2016-08-24 | 上海华虹宏力半导体制造有限公司 | 一种存储器及其读取方法、读取电路 |
| KR20220039203A (ko) * | 2020-09-22 | 2022-03-29 | 에스케이하이닉스 주식회사 | 메모리 장치 및 그 동작 방법 |
| KR102854443B1 (ko) * | 2021-05-17 | 2025-09-03 | 삼성전자주식회사 | 페이지 버퍼 회로 및 이를 포함하는 메모리 장치 |
| CN119580803B (zh) * | 2023-09-06 | 2026-01-23 | 长江存储科技有限责任公司 | 存储器、存储器的操作方法、系统及存储介质 |
Family Cites Families (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6671204B2 (en) * | 2001-07-23 | 2003-12-30 | Samsung Electronics Co., Ltd. | Nonvolatile memory device with page buffer having dual registers and methods of using the same |
| US7042770B2 (en) * | 2001-07-23 | 2006-05-09 | Samsung Electronics Co., Ltd. | Memory devices with page buffer having dual registers and method of using the same |
| KR100454119B1 (ko) * | 2001-10-24 | 2004-10-26 | 삼성전자주식회사 | 캐쉬 기능을 갖는 불 휘발성 반도체 메모리 장치 및 그것의 프로그램, 읽기, 그리고 페이지 카피백 방법들 |
| KR100514415B1 (ko) * | 2003-01-22 | 2005-09-09 | 주식회사 하이닉스반도체 | 낸드 플래시 메모리의 페이지 버퍼 |
| DE602004007886T2 (de) * | 2004-03-30 | 2008-04-24 | Stmicroelectronics S.R.L., Agrate Brianza | Sequenzielles Schreib-Prüfverfahren mit Ergebnisspeicherung |
| KR100575336B1 (ko) * | 2004-04-20 | 2006-05-02 | 에스티마이크로일렉트로닉스 엔.브이. | 듀얼 레지스터를 갖는 페이지 버퍼, 이를 구비한 반도체메모리 장치 및 그의 프로그램 방법 |
| KR100567912B1 (ko) * | 2004-05-28 | 2006-04-05 | 주식회사 하이닉스반도체 | 플래시 메모리 장치의 페이지 버퍼 및 이를 이용한 데이터프로그램 방법 |
| DE602004010795T2 (de) * | 2004-06-24 | 2008-12-11 | Stmicroelectronics S.R.L., Agrate Brianza | Verbesserter Seitenspeicher für eine programmierbare Speichervorrichtung |
| KR100672148B1 (ko) * | 2005-02-17 | 2007-01-19 | 주식회사 하이닉스반도체 | 불휘발성 메모리 장치 및 그것의 페이지 버퍼 동작 방법 |
| KR100672150B1 (ko) * | 2005-02-23 | 2007-01-19 | 주식회사 하이닉스반도체 | 불휘발성 메모리 장치 및 그것의 페이지 버퍼 동작 방법 |
| KR100672122B1 (ko) * | 2005-03-10 | 2007-01-19 | 주식회사 하이닉스반도체 | 소비 전력이 감소된 플래시 메모리 장치의 페이지 버퍼 회로 |
| KR100672147B1 (ko) * | 2005-03-15 | 2007-01-19 | 주식회사 하이닉스반도체 | 불휘발성 메모리 장치의 체크 보드 프로그램 시에 프로그램페일을 방지하기 위한 페이지 버퍼 |
| KR100600301B1 (ko) * | 2005-05-25 | 2006-07-13 | 주식회사 하이닉스반도체 | 면적이 감소된 페이지 버퍼 회로와, 이를 포함하는 플래시메모리 장치 및 그 프로그램 동작 방법 |
-
2006
- 2006-02-21 US US11/358,767 patent/US7336543B2/en not_active Expired - Fee Related
- 2006-06-30 TW TW095123754A patent/TWI308765B/zh not_active IP Right Cessation
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111243648A (zh) * | 2018-11-28 | 2020-06-05 | 北京知存科技有限公司 | 闪存单元、闪存模块以及闪存芯片 |
Also Published As
| Publication number | Publication date |
|---|---|
| TWI308765B (en) | 2009-04-11 |
| US20070195635A1 (en) | 2007-08-23 |
| US7336543B2 (en) | 2008-02-26 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MM4A | Annulment or lapse of patent due to non-payment of fees |