TW200802403A - Multi-port memory device having variable port speeds - Google Patents

Multi-port memory device having variable port speeds

Info

Publication number
TW200802403A
TW200802403A TW096111507A TW96111507A TW200802403A TW 200802403 A TW200802403 A TW 200802403A TW 096111507 A TW096111507 A TW 096111507A TW 96111507 A TW96111507 A TW 96111507A TW 200802403 A TW200802403 A TW 200802403A
Authority
TW
Taiwan
Prior art keywords
port
memory device
clock
ports
operate
Prior art date
Application number
TW096111507A
Other languages
English (en)
Other versions
TWI340982B (en
Inventor
Dong-Yun Lee
Myung-Rai Cho
Sung-Joon Kim
Original Assignee
Silicon Image Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Silicon Image Inc filed Critical Silicon Image Inc
Publication of TW200802403A publication Critical patent/TW200802403A/zh
Application granted granted Critical
Publication of TWI340982B publication Critical patent/TWI340982B/zh

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/16—Multiple access memory array, e.g. addressing one storage element via at least two independent addressing line groups
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4027—Coupling between buses using bus bridges
    • G06F13/405—Coupling between buses using bus bridges where the bridge performs a synchronising function
    • G06F13/4054—Coupling between buses using bus bridges where the bridge performs a synchronising function where the function is bus cycle extension, e.g. to meet the timing requirements of the target bus
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4234—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus
    • G06F13/4243—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus with synchronous protocol
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1075—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers for multiport memories each having random access ports and serial ports, e.g. video RAM
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/10—Aspects relating to interfaces of memory device to external buses
    • G11C2207/108—Wide data ports

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Multimedia (AREA)
  • Multi Processors (AREA)
  • Static Random-Access Memory (AREA)
  • Dram (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Stored Programmes (AREA)
  • Computer And Data Communications (AREA)
TW096111507A 2006-03-30 2007-03-30 Multi-port memory device having variable port speeds TWI340982B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US78840106P 2006-03-30 2006-03-30

Publications (2)

Publication Number Publication Date
TW200802403A true TW200802403A (en) 2008-01-01
TWI340982B TWI340982B (en) 2011-04-21

Family

ID=38421761

Family Applications (3)

Application Number Title Priority Date Filing Date
TW096111504A TWI353124B (en) 2006-03-30 2007-03-30 Inter-port communication in a multi-port memory de
TW096111507A TWI340982B (en) 2006-03-30 2007-03-30 Multi-port memory device having variable port speeds
TW096111501A TWI386846B (zh) 2006-03-30 2007-03-30 利用共享式非揮發性記憶體初始化多個處理元件之方法、系統及快閃記憶體元件

Family Applications Before (1)

Application Number Title Priority Date Filing Date
TW096111504A TWI353124B (en) 2006-03-30 2007-03-30 Inter-port communication in a multi-port memory de

Family Applications After (1)

Application Number Title Priority Date Filing Date
TW096111501A TWI386846B (zh) 2006-03-30 2007-03-30 利用共享式非揮發性記憶體初始化多個處理元件之方法、系統及快閃記憶體元件

Country Status (7)

Country Link
US (2) US7949863B2 (zh)
EP (2) EP2008164A2 (zh)
JP (2) JP5197571B2 (zh)
KR (2) KR101323400B1 (zh)
CN (3) CN101449334B (zh)
TW (3) TWI353124B (zh)
WO (2) WO2007115226A2 (zh)

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Also Published As

Publication number Publication date
KR20090007378A (ko) 2009-01-16
US7949863B2 (en) 2011-05-24
WO2007115226A3 (en) 2008-10-30
KR101341286B1 (ko) 2013-12-12
US7639561B2 (en) 2009-12-29
CN101449262B (zh) 2012-07-04
JP5188493B2 (ja) 2013-04-24
EP2008164A2 (en) 2008-12-31
CN101449334B (zh) 2012-04-25
WO2007115227A3 (en) 2007-11-29
TW200802082A (en) 2008-01-01
JP5197571B2 (ja) 2013-05-15
CN101449262A (zh) 2009-06-03
KR20080104388A (ko) 2008-12-02
JP2009532815A (ja) 2009-09-10
WO2007115226A2 (en) 2007-10-11
CN101438242A (zh) 2009-05-20
JP2009532782A (ja) 2009-09-10
EP2008281B1 (en) 2012-01-25
CN101438242B (zh) 2013-09-18
WO2007115227A2 (en) 2007-10-11
US20070234021A1 (en) 2007-10-04
EP2008281A2 (en) 2008-12-31
TW200818734A (en) 2008-04-16
TWI353124B (en) 2011-11-21
TWI340982B (en) 2011-04-21
KR101323400B1 (ko) 2013-10-29
TWI386846B (zh) 2013-02-21
US20070245094A1 (en) 2007-10-18
CN101449334A (zh) 2009-06-03

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