TW201612743A - Bit group interleave processors, methods, systems, and instructions - Google Patents

Bit group interleave processors, methods, systems, and instructions

Info

Publication number
TW201612743A
TW201612743A TW104127009A TW104127009A TW201612743A TW 201612743 A TW201612743 A TW 201612743A TW 104127009 A TW104127009 A TW 104127009A TW 104127009 A TW104127009 A TW 104127009A TW 201612743 A TW201612743 A TW 201612743A
Authority
TW
Taiwan
Prior art keywords
bit group
operand
data
processors
instructions
Prior art date
Application number
TW104127009A
Other languages
English (en)
Other versions
TWI567645B (zh
Inventor
Roger Espasa
David Guillen
Guillem Sole
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of TW201612743A publication Critical patent/TW201612743A/zh
Application granted granted Critical
Publication of TWI567645B publication Critical patent/TWI567645B/zh

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G06F9/30038—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations using a mask
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30018—Bit or string instructions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30032—Movement instructions, e.g. MOVE, SHIFT, ROTATE, SHUFFLE
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Executing Machine-Instructions (AREA)
  • Advance Control (AREA)
  • Complex Calculations (AREA)
TW104127009A 2014-09-25 2015-08-19 位元群組交錯處理器、方法、系統及指令 TWI567645B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP14382360.7A EP3001306A1 (en) 2014-09-25 2014-09-25 Bit group interleave processors, methods, systems, and instructions

Publications (2)

Publication Number Publication Date
TW201612743A true TW201612743A (en) 2016-04-01
TWI567645B TWI567645B (zh) 2017-01-21

Family

ID=51730475

Family Applications (1)

Application Number Title Priority Date Filing Date
TW104127009A TWI567645B (zh) 2014-09-25 2015-08-19 位元群組交錯處理器、方法、系統及指令

Country Status (7)

Country Link
US (1) US20170308383A1 (zh)
EP (1) EP3001306A1 (zh)
JP (1) JP6508850B2 (zh)
KR (1) KR20170036022A (zh)
CN (1) CN106605206A (zh)
TW (1) TWI567645B (zh)
WO (1) WO2016048630A1 (zh)

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TWI771373B (zh) * 2017-05-25 2022-07-21 南韓商三星電子股份有限公司 向量處理器的序列對齊方法

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WO2018154273A1 (en) * 2017-02-23 2018-08-30 Arm Limited Element by vector operations in a data processing apparatus
US10191740B2 (en) * 2017-02-28 2019-01-29 Intel Corporation Deinterleave strided data elements processors, methods, systems, and instructions
CN110825312B (zh) * 2018-08-10 2023-06-23 昆仑芯(北京)科技有限公司 数据处理装置、人工智能芯片及电子设备
US10990396B2 (en) 2018-09-27 2021-04-27 Intel Corporation Systems for performing instructions to quickly convert and use tiles as 1D vectors
EP4009183B1 (en) * 2018-10-18 2026-05-06 Shanghai Cambricon Information Technology Co., Ltd Network-on-chip data processing method and device
CN109947391B (zh) * 2019-03-11 2023-08-01 合芯科技(苏州)有限公司 一种数据处理方法和装置
US20190220278A1 (en) * 2019-03-27 2019-07-18 Menachem Adelman Apparatus and method for down-converting and interleaving multiple floating point values
US11327761B2 (en) * 2019-05-24 2022-05-10 Texas Instruments Incorporated Processing device with vector transformation execution
US11567555B2 (en) * 2019-08-30 2023-01-31 Intel Corporation Software assisted power management
CN114586002A (zh) * 2019-11-07 2022-06-03 英特尔公司 改变数据格式的交织数据转换
US12112167B2 (en) 2020-06-27 2024-10-08 Intel Corporation Matrix data scatter and gather between rows and irregularly spaced memory locations
US12474928B2 (en) 2020-12-22 2025-11-18 Intel Corporation Processors, methods, systems, and instructions to select and store data elements from strided data element positions in a first dimension from three source two-dimensional arrays in a result two-dimensional array
US20220197652A1 (en) * 2020-12-22 2022-06-23 Intel Corporation Processors, methods, systems, and instructions to merge portions of two source two-dimensional arrays without explicit per-portion control

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI771373B (zh) * 2017-05-25 2022-07-21 南韓商三星電子股份有限公司 向量處理器的序列對齊方法

Also Published As

Publication number Publication date
CN106605206A (zh) 2017-04-26
US20170308383A1 (en) 2017-10-26
WO2016048630A1 (en) 2016-03-31
JP2017529597A (ja) 2017-10-05
JP6508850B2 (ja) 2019-05-08
EP3001306A1 (en) 2016-03-30
KR20170036022A (ko) 2017-03-31
TWI567645B (zh) 2017-01-21

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MM4A Annulment or lapse of patent due to non-payment of fees