TW201612965A - Wafer dicing using hybrid laser and plasma etch approach with mask application by vacuum lamination - Google Patents
Wafer dicing using hybrid laser and plasma etch approach with mask application by vacuum laminationInfo
- Publication number
- TW201612965A TW201612965A TW104120529A TW104120529A TW201612965A TW 201612965 A TW201612965 A TW 201612965A TW 104120529 A TW104120529 A TW 104120529A TW 104120529 A TW104120529 A TW 104120529A TW 201612965 A TW201612965 A TW 201612965A
- Authority
- TW
- Taiwan
- Prior art keywords
- semiconductor wafer
- mask layer
- integrated circuits
- plasma etch
- vacuum lamination
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
- H10P76/40—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials
- H10P76/408—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials characterised by their sizes, orientations, dispositions, behaviours or shapes
- H10P76/4085—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials characterised by their sizes, orientations, dispositions, behaviours or shapes characterised by the processes involved to create the masks
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P50/00—Etching of wafers, substrates or parts of devices
- H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
- H10P50/24—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials
- H10P50/242—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials of Group IV materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P50/00—Etching of wafers, substrates or parts of devices
- H10P50/69—Etching of wafers, substrates or parts of devices using masks for semiconductor materials
- H10P50/691—Etching of wafers, substrates or parts of devices using masks for semiconductor materials for Group V materials or Group III-V materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P54/00—Cutting or separating of wafers, substrates or parts of devices
Landscapes
- Dicing (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Laser Beam Processing (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US14/320,426 | 2014-06-30 | ||
| US14/320,426 US9142459B1 (en) | 2014-06-30 | 2014-06-30 | Wafer dicing using hybrid laser scribing and plasma etch approach with mask application by vacuum lamination |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW201612965A true TW201612965A (en) | 2016-04-01 |
| TWI659461B TWI659461B (zh) | 2019-05-11 |
Family
ID=54107139
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW104120529A TWI659461B (zh) | 2014-06-30 | 2015-06-25 | 使用具有藉由真空層疊之遮罩應用的混成雷射與電漿蝕刻方法之晶圓切割 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US9142459B1 (zh) |
| TW (1) | TWI659461B (zh) |
| WO (1) | WO2016003709A1 (zh) |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI641045B (zh) * | 2016-08-30 | 2018-11-11 | Zing Semiconductor Corporation | 蝕刻方法、蝕刻裝置及半導體晶圓分割方法 |
| TWI721383B (zh) * | 2019-03-08 | 2021-03-11 | 力成科技股份有限公司 | 具有多個積體電路單元的封裝結構及其製作方法 |
| US11081360B2 (en) | 2016-11-07 | 2021-08-03 | Tokyo Electron Limited | Method for processing workpiece |
| TWI748080B (zh) * | 2017-04-21 | 2021-12-01 | 美商英帆薩斯邦德科技有限公司 | 晶粒處理 |
| US11742314B2 (en) | 2020-03-31 | 2023-08-29 | Adeia Semiconductor Bonding Technologies Inc. | Reliable hybrid bonded apparatus |
| US11855064B2 (en) | 2018-02-15 | 2023-12-26 | Adeia Semiconductor Bonding Technologies Inc. | Techniques for processing devices |
| US12550799B2 (en) | 2021-03-31 | 2026-02-10 | Adeia Semiconductor Bonding Technologies Inc. | Direct bonding methods and structures |
| US12604771B2 (en) | 2021-10-28 | 2026-04-14 | Adeia Semiconductor Bonding Technologies Inc. | Direct bonding methods and structures |
Families Citing this family (13)
| Publication number | Priority date | Publication date | Assignee | Title |
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| US9601375B2 (en) * | 2015-04-27 | 2017-03-21 | Applied Materials, Inc. | UV-cure pre-treatment of carrier film for wafer dicing using hybrid laser scribing and plasma etch approach |
| JP6492287B2 (ja) * | 2015-10-01 | 2019-04-03 | パナソニックＩｐマネジメント株式会社 | 素子チップの製造方法および電子部品実装構造体の製造方法 |
| JP6594153B2 (ja) | 2015-10-13 | 2019-10-23 | 株式会社ディスコ | ウエーハの加工方法 |
| JP6469854B2 (ja) * | 2015-11-09 | 2019-02-13 | 古河電気工業株式会社 | 半導体チップの製造方法及びこれに用いるマスク一体型表面保護テープ |
| JP2017163069A (ja) * | 2016-03-11 | 2017-09-14 | パナソニックＩｐマネジメント株式会社 | 素子チップの製造方法 |
| US10721419B2 (en) | 2017-11-30 | 2020-07-21 | International Business Machines Corporation | Ortho-selfie distortion correction using multiple image sensors to synthesize a virtual image |
| JP6994646B2 (ja) * | 2018-01-17 | 2022-01-14 | パナソニックＩｐマネジメント株式会社 | 素子チップの製造方法 |
| TWI741262B (zh) * | 2018-06-04 | 2021-10-01 | 美商帕斯馬舍門有限責任公司 | 切割晶粒附接膜的方法 |
| US10916474B2 (en) * | 2018-06-25 | 2021-02-09 | Semiconductor Components Industries, Llc | Method of reducing residual contamination in singulated semiconductor die |
| CN110634796A (zh) * | 2018-06-25 | 2019-12-31 | 半导体元件工业有限责任公司 | 用于处理电子管芯的方法及半导体晶圆和管芯的切单方法 |
| US11621257B2 (en) * | 2020-02-03 | 2023-04-04 | Micron Technology, Inc. | Wafer-scale memory techniques |
| KR102836418B1 (ko) * | 2020-09-18 | 2025-07-22 | 삼성디스플레이 주식회사 | 마스크 수리 장치 및 그것을 이용한 마스크 수리 방법 |
| CN115763237A (zh) * | 2022-12-09 | 2023-03-07 | 湖北三维半导体集成创新中心有限责任公司 | 晶圆切割方法 |
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2014
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-
2015
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- 2015-06-25 TW TW104120529A patent/TWI659461B/zh not_active IP Right Cessation
Cited By (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI641045B (zh) * | 2016-08-30 | 2018-11-11 | Zing Semiconductor Corporation | 蝕刻方法、蝕刻裝置及半導體晶圓分割方法 |
| US12476115B2 (en) | 2016-11-07 | 2025-11-18 | Tokyo Electron Limited | Method for processing workpiece |
| US11081360B2 (en) | 2016-11-07 | 2021-08-03 | Tokyo Electron Limited | Method for processing workpiece |
| TWI759348B (zh) * | 2016-11-07 | 2022-04-01 | 日商東京威力科創股份有限公司 | 被處理體之處理方法 |
| TWI879604B (zh) * | 2017-04-21 | 2025-04-01 | 美商艾德亞半導體接合科技有限公司 | 用於處理半導體晶粒構件的方法 |
| TWI748080B (zh) * | 2017-04-21 | 2021-12-01 | 美商英帆薩斯邦德科技有限公司 | 晶粒處理 |
| TWI790817B (zh) * | 2017-04-21 | 2023-01-21 | 美商英帆薩斯邦德科技有限公司 | 用於處理半導體晶粒構件的方法 |
| US11742315B2 (en) | 2017-04-21 | 2023-08-29 | Adeia Semiconductor Bonding Technologies Inc. | Die processing |
| US12431460B2 (en) | 2017-04-21 | 2025-09-30 | Adeia Semiconductor Bonding Technologies Inc. | Die processing |
| TWI847438B (zh) * | 2017-04-21 | 2024-07-01 | 美商艾德亞半導體接合科技有限公司 | 用於處理半導體晶粒構件的方法 |
| US11855064B2 (en) | 2018-02-15 | 2023-12-26 | Adeia Semiconductor Bonding Technologies Inc. | Techniques for processing devices |
| US12406975B2 (en) | 2018-02-15 | 2025-09-02 | Adeia Semiconductor Bonding Technologies Inc. | Techniques for processing devices |
| TWI721383B (zh) * | 2019-03-08 | 2021-03-11 | 力成科技股份有限公司 | 具有多個積體電路單元的封裝結構及其製作方法 |
| US12300661B2 (en) | 2020-03-31 | 2025-05-13 | Adeia Semiconductor Bonding Technologies Inc. | Reliable hybrid bonded apparatus |
| US11742314B2 (en) | 2020-03-31 | 2023-08-29 | Adeia Semiconductor Bonding Technologies Inc. | Reliable hybrid bonded apparatus |
| US12550799B2 (en) | 2021-03-31 | 2026-02-10 | Adeia Semiconductor Bonding Technologies Inc. | Direct bonding methods and structures |
| US12604771B2 (en) | 2021-10-28 | 2026-04-14 | Adeia Semiconductor Bonding Technologies Inc. | Direct bonding methods and structures |
Also Published As
| Publication number | Publication date |
|---|---|
| US9142459B1 (en) | 2015-09-22 |
| WO2016003709A1 (en) | 2016-01-07 |
| TWI659461B (zh) | 2019-05-11 |
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