WO1996010842A1 - Field-effect transistor of the metal-dielectric-semiconductor type - Google Patents
Field-effect transistor of the metal-dielectric-semiconductor type Download PDFInfo
- Publication number
- WO1996010842A1 WO1996010842A1 PCT/RU1995/000217 RU9500217W WO9610842A1 WO 1996010842 A1 WO1996010842 A1 WO 1996010842A1 RU 9500217 W RU9500217 W RU 9500217W WO 9610842 A1 WO9610842 A1 WO 9610842A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- area
- source
- areas
- metal
- τρanzystορ
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
- H10D30/6713—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/64—Electrodes comprising a Schottky barrier to a semiconductor
- H10D64/647—Schottky drain or source electrodes for IGFETs
Definitions
- the invention is related to field-based types of metal - dielectric - receiver ( ⁇ PDP).
- ⁇ PDP metal - dielectric - receiver
- the prior art has been known for the use of a transformer that has been completed in the area of the source and source of equipment and supplies. Between the source and start areas there is a free area, at the front of the door there is a layer of a good dielectric.
- Discharge of the invention results in a significant increase in the operating temperature, for example, up to 350-400 ° C, and an increase in the output of 1.5 to 2 times.
- the goodwill that may be obtained may be a little out of minor parts, for example, two or two, which are very weak
- ⁇ me ⁇ g ⁇ , ⁇ blas ⁇ i is ⁇ a and s ⁇ a m ⁇ gu ⁇ by ⁇ vy ⁇ l- Nena of sl ⁇ ya with me ⁇ alliches ⁇ y ⁇ v ⁇ dim ⁇ s ⁇ yu and sl ⁇ ya ⁇ lu ⁇ - v ⁇ dni ⁇ a, ⁇ ilegayuscheg ⁇ ⁇ diele ⁇ iches ⁇ y ⁇ dl ⁇ zh ⁇ e and ⁇ l- n ⁇ s ⁇ yu za ⁇ lnenn ⁇ g ⁇ ⁇ blas ⁇ yu ⁇ s ⁇ ans ⁇ venn ⁇ g ⁇ za ⁇ yada, ⁇ b- ⁇ azuem ⁇ g ⁇ ba ⁇ e ⁇ ami Sh ⁇ i ⁇ blas ⁇ ey is ⁇ a and s ⁇ a.
- ⁇ a ⁇ zhe ⁇ anzis ⁇ m ⁇ zhe ⁇ ime ⁇ two ⁇ blas ⁇ i is ⁇ a two ⁇ lu ⁇ v ⁇ dni ⁇ vye ⁇ dza ⁇ v ⁇ nye ⁇ blas ⁇ i ⁇ e ⁇ v ⁇ g ⁇ and v ⁇ g ⁇ ⁇ i ⁇ a ⁇ v ⁇ dim ⁇ s ⁇ i and ⁇ blas ⁇ s ⁇ a with me ⁇ alliches ⁇ y ⁇ v ⁇ - dim ⁇ s ⁇ yu, ⁇ b ⁇ azuyuschuyu ba ⁇ e ⁇ y Sh ⁇ i with ⁇ itheri ⁇ dza ⁇ v ⁇ ny- ⁇ blas ⁇ yami mi.
- a suitable metal silicide for example, iron silicide.
- FIG. 1 is a view of the overhead view of a trance analysis according to the invention, in FIG. 2 - ⁇ gins ⁇ Services ⁇ ⁇ ⁇ anzyst ⁇ réelle on ⁇ ig. 1 ⁇ P-P, on ⁇ ig. 3 - ⁇ gins ⁇ Services ⁇ réelle ⁇ ⁇ ⁇ ⁇ fantasyanalysis on Consequently ⁇ ig. 1, in fact, the user-friendly area is comprised of two parts, in FIG.
- FIG. 5 is a view of the top of the trance according to the invention, which has an additional complementary area
- FIG. 7 is a view of the top of the trance according to the invention, which has two further enlarged areas, in FIG.
- FIG. 8 is a view of the overpass of the United Kingdom according to the invention, with two source areas and two user areas, in FIG. 9 - ⁇ ⁇ ⁇ analysis for ## ⁇ ig. 8 ⁇ ⁇ - ⁇ . ⁇ 96/10842 ⁇ ⁇ 5 / 00217
- Figures 1 and 2 illustrate a trance analysis having a dielectric service 1, for example, have a blink of light on source 2 and a cover of source 3. The source of power is supplied
- ⁇ ezhdu ⁇ b- las ⁇ yami is ⁇ a and s ⁇ a ⁇ azmeschena ⁇ lu ⁇ v ⁇ dni ⁇ vaya ⁇ dza ⁇ - v ⁇ naya ⁇ blas ⁇ 6 on ⁇ ve ⁇ n ⁇ s ⁇ i ⁇ y applied sl ⁇ y ⁇ d- za ⁇ v ⁇ n ⁇ g ⁇ diele ⁇ i ⁇ a 7 ele ⁇ d ⁇ m za ⁇ v ⁇ a 8.
- South Ossetia is comprised of two parts 9 and 10, and three parts 11, 12 and 13, respectively.
- the area of the source and the course of the transition have two layers 14 and 15.
- the facility is equipped with an additional facility
- the second optional secondary area 18 is equipped with its own power supply 19.
- P ⁇ i nulev ⁇ m ⁇ entsiale za ⁇ v ⁇ a ⁇ v ⁇ dim ⁇ s ⁇ ⁇ i ⁇ ve ⁇ - n ⁇ s ⁇ n ⁇ g ⁇ sl ⁇ ya ⁇ lu ⁇ v ⁇ dni ⁇ v ⁇ y ⁇ dza ⁇ v ⁇ n ⁇ y ⁇ blas ⁇ i depend si ⁇ ⁇ magnitude and zna ⁇ a za ⁇ yada in ⁇ dza ⁇ v ⁇ n ⁇ m diele ⁇ i ⁇ e 7.
- P ⁇ i e ⁇ m ele ⁇ iches ⁇ ie sv ⁇ ys ⁇ va sis ⁇ emy is ⁇ (s ⁇ ) - ⁇ lu ⁇ v ⁇ dni ⁇ vaya ⁇ dza ⁇ v ⁇ naya ⁇ blas ⁇ ( ⁇ .e.
- ⁇ e ⁇ alliches ⁇ aya ⁇ v ⁇ dim ⁇ s ⁇ , ⁇ ⁇ ayney me ⁇ e, ⁇ dn ⁇ y of ⁇ blas ⁇ ey is ⁇ a or s ⁇ a ⁇ vyshae ⁇ ⁇ e ⁇ m ⁇ s ⁇ y ⁇ s ⁇ d ⁇ , HA ⁇ ime ⁇ 350-400 ° C and 1.5-2 bys ⁇ deys ⁇ vie d ⁇ ⁇ az on account of the increase and decrease ⁇ v ⁇ dim ⁇ s ⁇ i ⁇ anzis ⁇ a ⁇ blas ⁇ ey ⁇ e ⁇ m ⁇ gene ⁇ atsii.
- ⁇ ⁇ ig. The 3 parts of 9 and 10 of the main free zone are areas of a different level of legacy, one of which is weakly leveled, and another. > 96/10842 ⁇ / ⁇ 5 / 00217
- the voltage ⁇ In the case of a direct displacement of the barrier, the voltage ⁇ with a change in the conductivity of the transducer due to the modulation of the voltage of the arrester of the volt- age of the volt- ager. Is ⁇ lz ⁇ vanie in ⁇ lev ⁇ m ⁇ anzis ⁇ e u ⁇ avlyaem ⁇ g ⁇ ⁇ e ⁇ e ⁇ da ba ⁇ e ⁇ a Sh ⁇ i in ⁇ unneln ⁇ -ny ⁇ z ⁇ ach- ba ⁇ e ⁇ ⁇ zv ⁇ lyae ⁇ uvelichi ⁇ bys ⁇ deys ⁇ vie and ⁇ u ⁇ iznu, ⁇ a ⁇ ⁇ a ⁇ e ⁇ e ⁇ ivnaya length ⁇ anala in ⁇ a ⁇ m ⁇ anzis ⁇ e s ⁇ - ve ⁇ s ⁇ vue ⁇ shi ⁇ ine ⁇ PZ.
- Parts 9 and 10 of the user-friendly area also have a different type of accessibility.
- part 9 is a weak area of privacy
- part 10 is a strong area of empiricity.
- ⁇ dna ⁇ , ⁇ i ⁇ e ⁇ eme- not zna ⁇ a ⁇ with s ⁇ e-is ⁇ e and d ⁇ s ⁇ izhenii ⁇ ⁇ ⁇ U 2 ⁇ iv ⁇ l ⁇ zhn ⁇ g ⁇ ⁇ ⁇ ⁇ zna ⁇ u, ⁇ anzis ⁇ nachinae ⁇ ⁇ ab ⁇ - ⁇ a ⁇ anal ⁇ gichn ⁇ ⁇ anzis ⁇ u, ⁇ a ⁇ ⁇ isan ⁇ above ⁇ .e. ⁇ " ⁇ " -channel ⁇ analysis.
- ⁇ patented ⁇ anzizt ⁇ on fig. 6 is equipped with one additional, strong, comfortable 16th zone with a first or second type of direct access or, as a rule, for convenience. 7, by two additional areas 16 and 18 of the first and second types of accessibility. ⁇ a ⁇ ig.
- y ⁇ g ⁇ ⁇ be ⁇ blas ⁇ i is ⁇ a 2 and 20, two ⁇ lu ⁇ v ⁇ dni ⁇ vye ⁇ dza ⁇ v ⁇ nye ⁇ blas ⁇ i 6 and 21 and ⁇ e ⁇ v ⁇ g ⁇ v ⁇ g ⁇ ⁇ i ⁇ a ⁇ v ⁇ dim ⁇ s ⁇ i and ⁇ b- las ⁇ s ⁇ a 3 me ⁇ alliches ⁇ y ⁇ v ⁇ dim ⁇ s ⁇ yu ⁇ b ⁇ azuyu ⁇ ba ⁇ e- ⁇ y Sh ⁇ i with ⁇ mecanici ⁇ dza ⁇ v ⁇ nymi ⁇ blas ⁇ yami.
- either one or the other means that the region is exposed to a metal area having a metal barrier.
- the deliberate use of the invention is consistent with the invention and may be used in different ways where it is used.
Landscapes
- Insulated Gate Type Field-Effect Transistor (AREA)
- Thin Film Transistor (AREA)
- Electrodes Of Semiconductors (AREA)
- Nitrogen And Oxygen Or Sulfur-Condensed Heterocyclic Ring Systems (AREA)
Description
Claims
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8511660A JPH10506753A (ja) | 1994-09-30 | 1995-09-29 | 金属−誘電体−半導体型の電界効果トランジスタ |
| EP95934359A EP0786813A4 (en) | 1994-09-30 | 1995-09-29 | METAL - DIELECTRIC - SEMICONDUCTOR FIELD EFFECT TRANSISTOR |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| RU94037403A RU2130668C1 (ru) | 1994-09-30 | 1994-09-30 | Полевой транзистор типа металл - диэлектрик-полупроводник |
| RU94037403 | 1994-09-30 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO1996010842A1 true WO1996010842A1 (en) | 1996-04-11 |
Family
ID=20161316
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/RU1995/000217 Ceased WO1996010842A1 (en) | 1994-09-30 | 1995-09-29 | Field-effect transistor of the metal-dielectric-semiconductor type |
Country Status (5)
| Country | Link |
|---|---|
| EP (1) | EP0786813A4 (ru) |
| JP (1) | JPH10506753A (ru) |
| KR (1) | KR100396151B1 (ru) |
| RU (1) | RU2130668C1 (ru) |
| WO (1) | WO1996010842A1 (ru) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| RU2002115829A (ru) * | 2002-06-17 | 2004-03-10 | Саито ТАКЕШИ (JP) | Полевой транзистор |
| WO2014174937A1 (ja) * | 2013-04-24 | 2014-10-30 | 独立行政法人産業技術総合研究所 | 異種材料接合を有する半導体デバイス |
| JP6562089B2 (ja) * | 2016-02-01 | 2019-08-21 | 株式会社リコー | 電界効果型トランジスタ及びその製造方法、表示素子、表示装置、システム |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3609477A (en) * | 1967-04-18 | 1971-09-28 | Ibm | Schottky-barrier field-effect transistor |
| FR2268361A1 (ru) * | 1974-04-19 | 1975-11-14 | Rca Corp | |
| US4106045A (en) * | 1975-05-20 | 1978-08-08 | The President Of The Agency Of Industrial Science And Technology | Field effect transistors |
| FR2452788A1 (fr) * | 1979-03-30 | 1980-10-24 | Tokyo Shibaura Electric Co | Dispositif semi-conducteur a transistors a effet de champ formes sur un substrat isolant |
| DE3313163A1 (de) * | 1982-04-12 | 1983-10-20 | Tokyo Shibaura Denki K.K., Kawasaki, Kanagawa | Halbleiteranordnung und verfahren zu ihrer herstellung |
| US4554569A (en) * | 1981-03-27 | 1985-11-19 | Tove Per Arne | Integrated electron circuits having Schottky field effect transistors of P- and N-type |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4558340A (en) * | 1983-06-29 | 1985-12-10 | Stauffer Chemical Company | Thin film field effect transistors utilizing a polypnictide semiconductor |
| JPS6074561A (ja) * | 1983-09-30 | 1985-04-26 | Fujitsu Ltd | Cmos半導体装置 |
| JPS62104173A (ja) * | 1985-10-31 | 1987-05-14 | Fujitsu Ltd | 半導体装置 |
| JPS62229873A (ja) * | 1986-03-29 | 1987-10-08 | Hitachi Ltd | 薄膜半導体装置の製造方法 |
| JPS63168046A (ja) * | 1986-12-29 | 1988-07-12 | Nec Corp | Cmos装置 |
| US4849797A (en) * | 1987-01-23 | 1989-07-18 | Hosiden Electronics Co., Ltd. | Thin film transistor |
| GB9008214D0 (en) * | 1990-04-11 | 1990-06-13 | Gen Electric Co Plc | Semiconductor devices |
| DE69121629T2 (de) * | 1990-04-27 | 1997-02-13 | Nippon Electric Co | Dünnfilmtransistor mit Schottky-Sperrschicht |
| JP3039967B2 (ja) * | 1990-08-03 | 2000-05-08 | 株式会社日立製作所 | 半導体装置 |
| JPH04299574A (ja) * | 1991-03-28 | 1992-10-22 | Toshiba Corp | 半導体装置及びその製造方法 |
| JP3134360B2 (ja) * | 1991-06-27 | 2001-02-13 | 株式会社村田製作所 | 薄膜熱電素子の製造方法 |
-
1994
- 1994-09-30 RU RU94037403A patent/RU2130668C1/ru not_active IP Right Cessation
-
1995
- 1995-09-29 KR KR1019970702100A patent/KR100396151B1/ko not_active Expired - Fee Related
- 1995-09-29 JP JP8511660A patent/JPH10506753A/ja not_active Ceased
- 1995-09-29 EP EP95934359A patent/EP0786813A4/en not_active Withdrawn
- 1995-09-29 WO PCT/RU1995/000217 patent/WO1996010842A1/ru not_active Ceased
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3609477A (en) * | 1967-04-18 | 1971-09-28 | Ibm | Schottky-barrier field-effect transistor |
| FR2268361A1 (ru) * | 1974-04-19 | 1975-11-14 | Rca Corp | |
| US4106045A (en) * | 1975-05-20 | 1978-08-08 | The President Of The Agency Of Industrial Science And Technology | Field effect transistors |
| FR2452788A1 (fr) * | 1979-03-30 | 1980-10-24 | Tokyo Shibaura Electric Co | Dispositif semi-conducteur a transistors a effet de champ formes sur un substrat isolant |
| US4554569A (en) * | 1981-03-27 | 1985-11-19 | Tove Per Arne | Integrated electron circuits having Schottky field effect transistors of P- and N-type |
| DE3313163A1 (de) * | 1982-04-12 | 1983-10-20 | Tokyo Shibaura Denki K.K., Kawasaki, Kanagawa | Halbleiteranordnung und verfahren zu ihrer herstellung |
Non-Patent Citations (2)
| Title |
|---|
| JU. POZHELA, "Fizika Bystrodeistvujuschikh Tranzistorov", 1989, "Mokslas", (VILNJUS), pages 88-89. * |
| See also references of EP0786813A4 * |
Also Published As
| Publication number | Publication date |
|---|---|
| KR970706610A (ko) | 1997-11-03 |
| EP0786813A4 (en) | 1998-06-03 |
| KR100396151B1 (ko) | 2004-04-21 |
| EP0786813A1 (en) | 1997-07-30 |
| JPH10506753A (ja) | 1998-06-30 |
| RU94037403A (ru) | 1996-09-27 |
| RU2130668C1 (ru) | 1999-05-20 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US5731603A (en) | Lateral IGBT | |
| US5237193A (en) | Lightly doped drain MOSFET with reduced on-resistance | |
| EP0458381B1 (en) | A semiconductor device comprising a high voltage MOS transistor having shielded crossover path for a high voltage connection bus | |
| JP4744146B2 (ja) | 表面電界緩和型トランジスタを備える半導体部品 | |
| JP3899231B2 (ja) | 半導体装置 | |
| JP3778581B2 (ja) | 半導体装置およびその製造方法 | |
| JP2005528804A (ja) | トレンチ・ゲート半導体装置 | |
| DE102013218959A1 (de) | Transistorbauelement mit Feldelektrode | |
| KR970060530A (ko) | 유전체 분리형 박막 반도체 장치 | |
| EP0110331A2 (en) | A MOS transistor | |
| JP2001044431A (ja) | 半導体装置 | |
| US5844273A (en) | Vertical semiconductor device and method of manufacturing the same | |
| KR20000029449A (ko) | 측방향엠오에스트랜지스터소자 | |
| WO1996010842A1 (en) | Field-effect transistor of the metal-dielectric-semiconductor type | |
| US6583487B1 (en) | Power component bearing interconnections | |
| KR950012769A (ko) | 반도체 소자 | |
| JP3401918B2 (ja) | 半導体装置 | |
| US20030230777A1 (en) | MOSFET and a method for manufacturing the same | |
| KR19990087142A (ko) | 반도체 소자 | |
| JP2608976B2 (ja) | 半導体装置 | |
| US5760424A (en) | Integrated circuit arrangement having at least one IGBT | |
| WO2003107433A1 (en) | Field-effect transistor | |
| JP3503197B2 (ja) | 半導体装置 | |
| CN107591446B (zh) | 超结器件及其制造方法 | |
| JP3255141B2 (ja) | 半導体装置及びその使用方法 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| AK | Designated states |
Kind code of ref document: A1 Designated state(s): JP KR US |
|
| AL | Designated countries for regional patents |
Kind code of ref document: A1 Designated state(s): AT BE CH DE DK ES FR GB GR IE IT LU MC NL PT SE |
|
| DFPE | Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101) | ||
| 121 | Ep: the epo has been informed by wipo that ep was designated in this application | ||
| ENP | Entry into the national phase |
Ref country code: US Ref document number: 1997 809525 Date of ref document: 19970326 Kind code of ref document: A Format of ref document f/p: F |
|
| WWE | Wipo information: entry into national phase |
Ref document number: 1019970702100 Country of ref document: KR |
|
| WWE | Wipo information: entry into national phase |
Ref document number: 1995934359 Country of ref document: EP |
|
| WWP | Wipo information: published in national office |
Ref document number: 1995934359 Country of ref document: EP |
|
| WWP | Wipo information: published in national office |
Ref document number: 1019970702100 Country of ref document: KR |
|
| WWW | Wipo information: withdrawn in national office |
Ref document number: 1995934359 Country of ref document: EP |
|
| WWG | Wipo information: grant in national office |
Ref document number: 1019970702100 Country of ref document: KR |