WO1999009600A1 - Semiconductor device and method for manufacturing the same - Google Patents
Semiconductor device and method for manufacturing the same Download PDFInfo
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- WO1999009600A1 WO1999009600A1 PCT/JP1997/002835 JP9702835W WO9909600A1 WO 1999009600 A1 WO1999009600 A1 WO 1999009600A1 JP 9702835 W JP9702835 W JP 9702835W WO 9909600 A1 WO9909600 A1 WO 9909600A1
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P34/00—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices
- H10P34/40—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices with high-energy radiation
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/50—Physical imperfections
- H10D62/53—Physical imperfections the imperfections being within the semiconductor body
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D8/00—Diodes
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D8/00—Diodes
- H10D8/01—Manufacture or treatment
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P30/00—Ion implantation into wafers, substrates or parts of devices
- H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
- H10P30/202—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials
- H10P30/204—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials into Group IV semiconductors
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P30/00—Ion implantation into wafers, substrates or parts of devices
- H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
- H10P30/208—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically inactive species
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/548—Amorphous silicon PV cells
Definitions
- the present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly to a technique suitable for improving a diode recovery characteristic.
- FIG. 17 is a cross-sectional view showing a basic structure of a diode.
- an anode region 3 P is formed on the surface of an N substrate 4 P composed of an N + layer 1 P and an N ⁇ layer 2 P by diffusing P-type impurities.
- An anode electrode 5 P is formed on the surface of the anode region 3 P, and a force source electrode 6 P is formed on the back surface of the N substrate 4 P. The operation of the diode is described below.
- a predetermined anode voltage VAK forward bias
- the anode voltage has a certain threshold value (up to 0.6 V).
- a certain threshold value up to 0.6 V.
- VKA reverse bias
- the reverse bias VKA is applied to the PN junction of the anode region 3 P and the N- layer 2 P. No current flows in the diode until the breakdown voltage is reached.
- FIG. 18 is incorporated in the description of the embodiment of the present invention together with FIG.
- the reverse recovery characteristic (Transient response).
- I rr indicates the peak value of the current flowing in the reverse direction (recovery current) Ir
- T rr indicates the time required for the current flowing in the reverse direction to disappear.
- the symbol If is the current value at the time of forward bias.
- the reverse recovery characteristic it is desired that the magnitude of the peak current I rr of the recovery current is small and the current I r flowing in the reverse direction gradually disappears. That is, the times T 1 and T 2 are determined as shown in FIG. It is defined that the recovery property is soft and the recovery characteristic is soft when T1 and T2.
- a diode is used as a pair with a main switching device such as an IGBT, if the recovery characteristics are hard, a surge voltage is generated and heat is generated due to switching loss. Soft recovery characteristics with loss (reduction of time change dIr / dt of current Ir) are required.
- the peak value I rr of the recovery current I r is referred to as “recovery peak current”.
- the recovery peak current I rr depends on the carrier density of the semiconductor region near the anode electrode, and the recovery peak current I rr also decreases as the carrier density decreases.
- the above-mentioned disappearance time T r r depends on the carrier density of the semiconductor region near the cathode electrode, and the disappearance time T r r becomes longer with an increase in the carrier density of the cathode region. Therefore, many structures for improving the reverse recovery characteristic have been proposed based on the results of the investigation.
- the first is, for example, disclosed in Japanese Patent Application Laid-Open No. H8-46221, and described later in the Mitsubishi Electric Technical Report and the 1995 IEEJ Industrial Application Division National Convention ( ⁇ .136, This is a technology pointed out as a conventional technology in ⁇ 79). That is, the heavy metal typified by platinum is doped and diffused from the anode electrode side as a lifetime killer, thereby shortening the lifetime of the N-type layer near the PN junction. . In particular, using this technique, the diffusion of platinum can be controlled so that the lifetime of carriers in the N-type layer on the force electrode is longer than the lifetime near the PN junction on the anode. The carrier density on the cathode side can be increased, so that the above-mentioned disappearance time T rr can be lengthened.
- the problem with the first conventional technique is that it is not easy to control the lifetime of the carrier in the N-type layer on the anode side even shorter, including uniformity and reproducibility. Remains as a point.
- FIG. 20 shows a longitudinal sectional structure of a diode when the conventional technique is applied. Show. In FIG. 20, the same symbols as those in FIG. 17 indicate the same components.
- This second conventional technique suppresses the injection of holes from the anode region 3P by partially forming the anode region 3P formed on the surface, and thus the carrier density in the region near the anode electrode 5P. To reduce the recovery peak current I rr.
- the carrier density near the anode is controlled by the partially formed anode region 3P and the interval W, but if the interval W of the anode region 3P is too wide, the breakdown voltage decreases.
- a new problem arises in that the carrier density near the node cannot be sufficiently controlled due to such a bottleneck.
- the lifetime in the n-layer is locally controlled by proton irradiation, the carrier density near the anode region is reduced, and the recovery-peak current I rr is reduced. It was a try. As a result, it has been reported that the slope dIrZdt is reduced to 1Z2 or less and the recovery-peak current Irr is reduced by about 40% as compared with the case of only electron beam irradiation.
- FIG. 22 also shows the measurement result of the recovery-one peak current I rr with respect to the forward current I ⁇ (see FIG. 19) flowing just before the recovery.
- proton energy was adjusted near the anode by adjusting the acceleration energy of the proton beam with a buffer such as an aluminum wheel, and the irradiation amount was changed. This is the result when evaluating the withstand voltage of the sample.
- a buffer such as an aluminum wheel
- the horizontal axis indicates the proton dose expressed as a relative value
- the left vertical axis indicates the breakdown voltage Vr
- the right vertical axis indicates the ratio (Irr / If).
- the withstand voltage Vr decreases with an increase in the amount of proton irradiation (see FIG. 23 in comparison). The cause of the decrease in the withstand voltage Vr will be described later.
- the case of the fourth prior art shown in FIG. 21 corresponds to the case where the relative value of the proton dose is about 1 in the experimental results of FIG.
- the relative value of the proton dose is about 1 in the experimental results of FIG.
- the relative proton dose is about 10 to 100 cm- 3. Is desired.
- the present invention has been made to solve all the problems described above.
- the present invention provides the following reverse recovery characteristics: (1) lowering the carrier density near the third semiconductor layer to further reduce the recovery-peak current (I rr); and (2) combining the first semiconductor layer with the second semiconductor layer.
- the carrier lifetime in the first semiconductor layer is controlled so that the carrier density of the first semiconductor layer near the side opposite to the interface with the semiconductor layer is increased to increase the recovery current extinction time (T rr).
- T rr recovery current extinction time
- the primary objective is to realize a semiconductor device with a new structure without a decrease in breakdown voltage.
- the present invention is focused on satisfying the above conditions (1) and (3) at the same time.
- by further optimizing the carrier density of the first semiconductor layer for example, by applying the above-mentioned first conventional technology, it is possible to realize the above-mentioned 2. It is a secondary object of the present invention.
- a second object of the present invention is to provide a manufacturing method for realizing a semiconductor device having the above-mentioned characteristics (1), (3) and (4).
- a semiconductor device is provided as the following first to ninth aspects.
- a semiconductor device includes a first semiconductor layer of a first conductivity type, a first main surface forming a first interface with a main surface of the first semiconductor layer, and the first main surface.
- a second semiconductor layer of the first conductivity type having a second main surface facing the second semiconductor layer; and a third semiconductor layer of a second conductivity type having a main surface forming a second interface with the second main surface of the second semiconductor layer.
- a semiconductor layer; The second lifetime in the second semiconductor layer is shorter than the first lifetime in the first semiconductor layer, and the resistance value in the second semiconductor layer is from the second interface to the first interface. And is monotonically decreasing.
- the second semiconductor layer is a low lifetime region having a high resistance value, and its resistance value only decreases monotonically. Therefore, the impurity concentration monotonically increases from the second semiconductor layer to the first semiconductor layer. As a result, even if a low lifetime region occurs between the first and third semiconductor regions, it is possible to maintain a large value without deteriorating the breakdown voltage (breakdown voltage) of the PN junction. Then, due to the reduction in the lifetime, the carrier density near the second interface is sufficiently reduced. Therefore, the peak value of the recovery current flowing when the bias applied to the PN junction is changed from the forward bias to the reverse bias can be further reduced as compared with the first to fourth techniques described above. This makes it possible to significantly improve the characteristics of soft recovery.
- a semiconductor device is characterized in that the second lifetime in the first aspect is smaller than 1Z10 of the first lifetime.
- the carrier density in the first semiconductor layer is optimized, so that the on-voltage can be reduced when the device is applied to the diode, and therefore, the recovery current during recovery can be extended and the disappearance time can be extended.
- the second resistivity of the second semiconductor layer in the first aspect is more than 50 times the first resistivity of the first semiconductor layer. It is characterized by being large.
- the carrier density of the first semiconductor layer can be optimized.
- the peak of the current flowing when the voltage applied between the first semiconductor layer and the third semiconductor layer is switched from forward bias to reverse bias
- the first interface between the second semiconductor layer and the first semiconductor layer according to the first aspect such that the value is smaller than the peak value of the current when there is no second semiconductor layer.
- the thickness of the second semiconductor layer improves the recovery characteristics of the diode and From the point of view, it is controlled to the optimum value required. Therefore, when the present device is applied to a diode, a diode having a small recovery-peak current and a softer recovery characteristic can be realized without deteriorating the breakdown voltage.
- a semiconductor device is characterized in that the thickness in the fourth aspect is set within a range from 15 micrometers to 40 micrometers. I do.
- the carrier density near the interface between the second semiconductor layer and the third semiconductor layer is reduced, and the carrier density of the first semiconductor layer is optimized. Therefore, the recovery characteristic of the diode, that is, the peak current of the recovery current can be further reduced, and the recovery current disappearance time can be further prolonged.
- a sixth aspect of the present invention is characterized in that the semiconductor device according to the fifth aspect is used as a free wheel diode.
- a semiconductor device is the semiconductor device according to the first aspect, wherein the first semiconductor layer has a first conductivity type, and is formed on a surface of the first semiconductor layer, and excludes hydrogen ions over the entire region.
- the second semiconductor layer is merely converted into a high-resistance region, and is not converted into a donor or an activated semiconductor.
- the resistivity monotonously decreases, and the lifetime of the carrier is sufficiently shorter than that of the carrier in the first semiconductor layer.
- the carrier density near the interface between the second semiconductor layer and the third semiconductor layer becomes sufficiently small, and the recovery-peak current in the recovery characteristics when this device is applied to a diode becomes sufficiently small.
- the withstand voltage is not affected at all.
- the semiconductor device according to the eighth aspect of the present invention is the semiconductor device according to the seventh aspect, It is characterized in that the predetermined ions are helium ions.
- the second semiconductor layer a property as a low-lifetime region by irradiating a general-purpose ion called a Helium ion.
- a semiconductor device is characterized in that the first semiconductor layer in the eighth aspect includes a diffused heavy metal.
- the lifetime of the carrier of the first semiconductor layer becomes longer than the lifetime of the second semiconductor layer, and the carrier density of the first semiconductor layer is optimized. Therefore, when this device is applied to a diode, it is possible to prevent an increase in the on-state voltage during turn-on, which may be caused by the formation of a low lifetime layer, and to extend the time required for the recovery current to completely disappear during recovery. It is possible to do.
- a method for manufacturing a semiconductor device according to the present invention is provided as the following tenth to sixteenth aspects.
- a method of manufacturing a semiconductor device includes a first step of preparing a first semiconductor layer of a first conductivity type having a first life time, and a surface of the first semiconductor layer.
- the junction composed of the first semiconductor layer and the second semiconductor layer since the low lifetime region is formed, the junction composed of the first semiconductor layer and the second semiconductor layer has the following advantages. A semiconductor device having one characteristic of soft recovery with a smaller current peak value can be realized.
- the third step in the tenth local surface may include the step of: A step of irradiating the predetermined position of the section with predetermined ions excluding hydrogen ions.
- a low lifetime region can be easily formed by a physical method of predetermined ion irradiation excluding protons. There is an effect that an easy semiconductor device manufacturing technique can be provided.
- the predetermined ions on the eleventh local surface are helium ions.
- a semiconductor device having a novel structure can be manufactured using a general-purpose helium ion source. is there.
- the depth from the surface of the second semiconductor layer to the predetermined position on the first local surface is 15 It is characterized in that it is controlled within the range from one micrometer to 40 micrometers.
- the depth at which predetermined ions are irradiated can be optimally controlled, so that improved soft recovery characteristics can be obtained without affecting the breakdown voltage.
- a semiconductor device having the same can be reliably manufactured.
- a low lifetime region can be formed so as not to affect the first lifetime of the first semiconductor layer.
- the third step in the eleventh local area may include a first heat treatment on the semiconductor device after the predetermined ion irradiation step.
- the method further comprises the step of:
- the 14th aspect of the present invention since a predetermined heat treatment is performed on a portion damaged by predetermined ion irradiation, there is an effect that the damaged portion can be formed stably.
- the second step in the fourteenth local surface includes a step of forming a main electrode on a surface of the second semiconductor layer. And the predetermined ion irradiation is performed using a predetermined ion source provided on the main electrode side.
- the second step in the fourteenth aspect includes the step of forming the first semiconductor layer after the second semiconductor layer forming step. A step of performing a second heat treatment by diffusing a heavy metal from the surface into the inside of the first semiconductor layer.
- the relationship (temperature of the second heat treatment)> (temperature of the first heat treatment) is established.
- the effect can be prevented from affecting the third step. That is, the control of the lifetime of the carrier by predetermined ion irradiation and the control of the lifetime by diffusion of the heavy metal can be performed separately.
- the first life time of the first semiconductor layer is reduced by the first life time from the interface between the first semiconductor layer and the low lifetime region.
- the distribution has a monotonous increase toward the inside of the semiconductor layer. Therefore, it is possible to increase the carrier density on the side opposite to the interface between the first semiconductor layer and the low lifetime region, and to increase the reverse current disappearance time in the force-burr characteristic.
- FIG. 1 is a longitudinal sectional view showing a structure of a diode according to Embodiment 1 of the present invention.
- FIG. 2 is a diagram schematically showing an SR measurement method.
- FIG. 3 is a diagram showing a result of SR measurement of a diode when the third conventional technique is applied.
- FIG. 4 is a diagram showing an SR measurement result of the diode according to the first embodiment of the present invention.
- FIG. 5 is a longitudinal sectional view showing a simulation model according to the present invention.
- FIG. 6 is a diagram showing a simulation result for the model of FIG.
- FIG. 7 is a view showing a trial production result of a diode according to the first embodiment of the present invention.
- Fig. 8 shows the SR when the recovery-peak current shows the minimum value in the prototype result of Fig. 7. It is a figure showing a measurement result.
- FIG. 9 is a diagram showing a trial production result of the diode according to the first embodiment of the present invention.
- FIG. 10 is a diagram showing a measurement result of a conventional diode shown for comparison with FIG.
- FIG. 11 is a cross-sectional view illustrating a method of manufacturing the diode according to the second embodiment of the present invention.
- FIG. 12 is a cross-sectional view illustrating a method of manufacturing a diode according to Embodiment 2 of the present invention.
- FIG. 13 is a cross-sectional view showing a method for manufacturing a diode according to Embodiment 2 of the present invention.
- FIG. 14 is a cross-sectional view showing a method for manufacturing a diode according to Embodiment 2 of the present invention.
- FIG. 15 is a flowchart showing a manufacturing process according to the third embodiment of the present invention.
- FIG. 16 is a cross-sectional view showing a part of the second step in FIG.
- FIG. 17 is a cross-sectional view showing the structure of a conventional general diode.
- FIG. 18 is a diagram showing output characteristics of the diode.
- FIG. 19 is a diagram showing the reverse recovery characteristics of the diode.
- FIG. 20 is a cross-sectional view showing a structural example of a diode when the second conventional technique is applied.
- FIG. 21 is a cross-sectional view showing the structure of a diode when the fourth conventional technique is applied.
- FIG. 22 is a diagram showing the relationship between the amount of proton irradiation, the breakdown voltage, and the recovery peak current in a diode to which the fourth conventional technology is applied.
- FIG. 23 is a diagram showing the measurement results of the breakdown voltage and the recovery peak current during helium ion irradiation.
- a semiconductor device having a novel Pin structure is provided.
- the diode according to the present embodiment is damaged by being irradiated with helium ions as predetermined ions in advance from the interface between the P layer and the N layer of the PN junction to a predetermined depth or a predetermined position in the N layer.
- a damage region having a characteristic that the resistance value monotonously decreases from the interface By forming such a damaged region in the N layer near the interface or near the junction, it is possible to realize a softer recovery characteristic without changing the breakdown voltage or the breakdown voltage (invariant). It becomes possible.
- the present diode having the damaged region will be described through more specific analysis.
- FIG. 1 is a longitudinal sectional view of a diode according to Embodiment 1 of the present invention.
- a first semiconductor layer (N-type substrate) 1 of the first conductivity type includes a force source N + layer 1A and an N ⁇ layer 1B formed on the surface thereof.
- the N-type conductivity type corresponds to the first conductivity type.
- a second semiconductor layer 2 also having N-type conductivity is formed in a state damaged by light ion (eg, He ion) irradiation.
- the first main surface of the second semiconductor layer 2 and the first main surface of the first semiconductor layer 1 form a first interface S1.
- the second semiconductor layer 2 is a characteristic part of the present embodiment.
- the second semiconductor layer 2 has (i) a lifetime of carriers in the first semiconductor layer 1. It is an area having a shorter or smaller lifetime (called a second lifetime) 2 than 1 (called a first lifetime time) and (ii) having a monotonically decreasing resistance value.
- the second semiconductor layer 2 is referred to as a “low lifetime layer or low lifetime region”.
- a third semiconductor layer (in the anode layer) formed by impurity diffusion of a second conductivity type (here, a P type) is formed on the second main surface of the low lifetime layer 2 (opposing the first main surface).
- a third semiconductor layer (in the anode layer) formed by impurity diffusion of a second conductivity type (here, a P type) is formed on the second main surface of the low lifetime layer 2 (opposing the first main surface).
- a third semiconductor layer (in the anode layer) formed by impurity diffusion of a second conductivity type (here, a P type) is formed on the second main surface of the low lifetime layer 2 (opposing the first main surface).
- the anode P layer.) 3 is provided, and the second main surface of the same layer 2 and the second main surface of the same layer 3 form a second interface S2.
- the thickness of the anode P layer 3 is set to be thin, and is about 3 im.
- anode electrode (first main electrode) 5 is provided on the first main surface of the anode P layer 3
- a cathode electrode (second main electrode) is provided on the second main surface corresponding to the back surface of the force source N + layer 1A. electrode) 6 are each formed.
- the diffusion of heavy metals such as Pt and Au in the first prior art described above is also adopted in this device, and the diffusion time or the diffusion temperature of heavy metals is controlled, whereby the first semiconductor layer 1 is formed.
- the carrier density on the force sword side is increased.
- the life time of the force source N + layer 1A side (1A) is N—layer 1B Lifetime is slightly longer than (1B).
- the thickness of the low lifetime layer 2 or the depth d from the second interface S2 is controlled to a value within a predetermined range as described later.
- a predetermined anode voltage VAK is applied as a forward bias between the anode electrode 5 and the cathode electrode 6 (see FIG. 18), and the anode voltage VAK reaches a certain threshold (up to 0.6 V). ), Holes are injected from the anode electrode 5 into the N ⁇ layer 1 B via the low lifetime layer 2, and the diode conducts.
- the anode voltage V AK becomes equal to the on-voltage value V f shown in FIG. 18, the rated current If flows.
- a predetermined anode voltage VKA is applied as a reverse bias between the force electrode 6 and the anode electrode 5 (see FIG. 18), a low lifetime is maintained in the diode unless the anode voltage VKA exceeds the breakdown voltage Vr. Only the layer 2 is formed.
- the diode of this structure has the following characteristics: (3) the diode in the case where the low lifetime layer 2 is not formed; This has the advantage that it does not decrease compared to that of.
- the low lifetime layer 2 is formed on the anode side, the carrier density near the anode is significantly reduced.
- the advantage that the peak current I rr can be further reduced as compared with the above-described first to fourth prior arts is obtained.
- the heavy metal is diffused into the first semiconductor layer 1 in advance, as in the first prior art.
- the life on the power source N + layer 1A side is controlled. Since the carrier time on the force side is increased by increasing the time, the on-state voltage V f (see Fig. 18) at the time of on is reduced, and (2) the recovery current disappearance time T rr (see Fig. 19) is increased. It can also be done.
- SR measurement means that, as schematically illustrated in FIG. 2, for example, a semiconductor element is polished in an oblique direction (of course, it may be polished in a vertical direction) and two electrodes are polished on a polished surface SS.
- the resistance in the semiconductor element is reduced.
- Figures 3 and 4 show the SR measurement results for the conventional proton irradiation and the SR measurement results for the device subjected to He ion irradiation, respectively.
- the measurements shown in Figs. 3 and 4 are all performed using a measuring instrument manufactured by SOLID STATE MEASUREMENTS, INC. In the United States.
- the horizontal axis in Figs. 3 and 4 indicates the anode P in Fig. 1.
- the charged particle irradiation position given as the depth L from the first main surface of the layer 3 is shown.
- the measurement results R, P, and N indicate the spreading resistance, the element resistivity, and the impurity concentration, respectively.
- a low-resistance region was measured between the high-resistance portion of the wafer damaged by proton irradiation and the N ⁇ layer of the wafer.
- “damage” is used to mean that the resistance of the semiconductor layer is increased by light ion irradiation. This is thought to be due to the fact that the damage layer formed by the protons was turned into a donor (impurity) by a subsequent heat treatment. This phenomenon of turning into a donor is actually occurring over the entire damaged layer. Probably, therefore, the breakdown voltage decreases with proton irradiation.
- the donor phenomenon as shown by the region R1 in FIG. 3 does not occur, and the spreading resistance R or The resistivity i0 monotonously decreases as the depth L from the first main surface of the anode P layer 3 or the depth from the interface S2 increases. That is, the damaged portion formed by helium ion irradiation is measured as a high-resistance region, and it can be determined that a donor formation phenomenon such as proton irradiation has not occurred.
- FIG. 23 shows measurement results regarding the characteristics of the withstand voltage V r and the recovery peak current I rr with respect to the amount of the Helium ion irradiation.
- the left and right vertical axes in FIG. 23 indicate the withstand voltage V r and the relative ratio (I rr Z lf), respectively, as in the case of FIG.
- the irradiation dose that can realize a sufficiently small recovery current value I rr for practical use is 10 to 100 cm— Even with irradiation of about 3 (relative value) helium ions, there is almost no change in the withstand voltage Vr.
- the formation of the low lifetime region 2 by helium ion irradiation has an effect that the irradiated N ⁇ layer portion does not become a donor even after the heat treatment, thereby making the breakdown voltage Vr unchanged.
- FIG. 5 shows a simulation model for analyzing the reverse recovery characteristics of the diode when the low lifetime region 2 is formed.
- the same symbols as those in FIG. 1 indicate the same parts.
- the area corresponding to the low lifetime area 2 in FIG. 1 is divided into the area 2S and the area 2S1 in FIG.
- the region 2S1 is simply N — Treated as an N-type semiconductor layer with the same lifetime as Layer 1B.
- both regions 2 S and 2 S 1 are layers damaged by helium ion irradiation, the respective lifetimes of each region 2 S and 2 S 1 are 2 S and 2 S 1 respectively. In other words, it is considered that the relationship of 1> 1 2 S 1> 2 S is established. Therefore, in FIG. 1, both regions are integrally integrated including both regions 2 S and 2 S 1 in FIG. 2 Semiconductor layer (low lifetime layer) Defined as 2.
- the parameters are set as follows.
- the diode of the model is set to a diode with a withstand voltage of 600 V class
- the specific resistance of the N-layer 1 B is set to 30 ⁇ .
- the depth or thickness of the anode P layer 3 is set to 3 zm in accordance with the actual diode, and its surface concentration is set to 1e17.
- the lifetime of the diode in the case where there is no low lifetime region, that is, in the case of the prior art shown in FIG.
- the width d1 of the low lifetime region 2S in the model of Fig. 5 is set to 10 m in correspondence with the half-value width of the helium ion beam.
- the lifetime of 2 S is 8 nsec. «1/1 OX 200 nsec.)
- the lifetime of other areas (2 S 1, IB, 1 A) is 200 nsec. Then, a simulation of one recovery characteristic was performed by changing the position or depth d of the low lifetime region 2 or 2S from the interface S2.
- the simulation was performed using a commercially available simulator Medici with respect to the on-voltage V: f shown in FIG. 18 and the reverse recovery characteristics (Irr, Trr) shown in FIG. Figure 6 shows the obtained simulation results.
- the characteristics T rr, I rr, and V f are shown as standard values for the characteristics when the carrier life time is the same in all regions (that is, when the region 2S is not formed). Have been. Therefore, when the relative ratio is 1, this device shows the same characteristics as the conventional device (for example, the device shown in Fig. 17).
- the on-voltage V f increases as the low lifetime region 2 S is formed deeper in the N-type substrate.
- the recovery-peak current I rr is at a depth of 20 / xm
- the recovery-one current disappearance time T rr becomes smaller as the low lifetime region 2 S is formed deeper, contrary to the case of the on-voltage V f.
- the reason that the recovery peak current I rr has the minimum value is that the regions 2 S 1 and 2 S are set in the model of FIG. It is considered that this is because carriers, that is, carriers in the region 2S1 increase. Furthermore, as the low lifetime region 2S is formed deeper, the number of carriers on the force side decreases, so the recovery-current extinction time T rr decreases as the low lifetime region 2S becomes deeper.
- V f 1 invariation of on-voltage V f ⁇ lengthening time T rr
- T rr lengthening time
- the carrier density in the ON state when the irradiation position d of the helium ion was set to the irradiation position 30 / im in FIG. 6 where the time T rr is the same as in the conventional case was investigated.
- the position where the concentration of the carrier injected into the layer 1 became the same was 58 m from the interface S2.
- the helium ion irradiation position d is controlled within the range of 10 m to 30 m as described above, the hole injected from the anode electrode 5 intersects the N substrate 1. If the irradiation position d is set to less than half of the depth, the recovery-current extinction time T rr will be longer than the conventional case without heavy metal diffusion or electron beam irradiation (Fig. 17). rr Relative value of> 1).
- Helium ion irradiation is performed under the condition that the half width of the irradiation beam is 10 / m, as in the simulation, and the irradiation amount is about 10 to 100 cm to 3 at a practical relative value level (Fig. See 2 2).
- the SR measurement results of the heat-treated diode were evaluated (see Figs. 4 and 8), and the change in resistivity in the damaged low lifetime region and the change in resistivity in the N-substrate were evaluated.
- the point P is the helium ion irradiation position L.
- Figure 7 shows the results of the prototype. As in FIG. 6, the vertical axis in FIG. 7 is given as a relative value to the characteristic of the conventional structure without region 2 (see FIG. 17).
- the prototype result is almost the same as the simulation result in FIG. 6, and the on-voltage V f increases as the low lifetime region 2 (FIG. 1) becomes deeper.
- the recovery-one current disappearance time T rr becomes smaller as the position L of the low lifetime region 2 becomes deeper, on the contrary to the on-voltage V f.
- Fig. 8 shows the SR measurement results when a prototype was manufactured with the helium ion irradiation position L from the first main surface of the anode P layer 3 controlled at 28 in Fig. 7.
- the resistance in the damaged low lifetime region is about 50 times higher than before the damage was caused. That is, it is desirable that the resistivity of the low lifetime region 2 be set to 50 times or more that of the first semiconductor layer 1.
- the relationship of (the lifetime of the low lifetime region 2 is 2) ⁇ 1 / 10X (the lifetime of the first semiconductor layer 1 is 1) is seen from the setting of the simulation conditions described above. It is hoped that this holds. This makes it possible to make the carrier density in the rectangular substrate 1 appropriate.
- FIG. 9 shows the recovery characteristics when the low-lifetime region 2 is formed by controlling the irradiation position L of the laser beam to a position of 28 m where the recovery peak current I rr is minimized.
- FIG. 10 shows the results of the reverse recovery characteristics of the diode when helium ion irradiation was not performed.
- the symbol I k indicates the anode-force current.
- Other symbols are as described above.
- the diode of the present invention in FIG. 9 has a smaller recovery-to-peak current I rr and a longer recovery-to-current extinction time T rr. Has become.
- the N-type substrate 1 and the anode P layer 3 are the first semiconductor layer of the first conductivity type and the third semiconductor layer of the second conductivity type, respectively, and are sandwiched between them.
- the intermediate layer was the low lifetime layer 2
- the anode 5 and the cathode 6 were the first and second main electrodes, respectively (see FIG. 1).
- the present invention is not limited to this.
- the p-type semiconductor substrate is a first semiconductor layer of the first conductivity type, and (ii) the lifetime is shorter and monotonically reduced.
- the present invention is also applicable to semiconductor devices in which a force source electrode and an anode electrode are the first and second main electrodes, respectively.
- the second semiconductor layer is a region that has been damaged only by being irradiated with predetermined ions such as helium ions. It has the property that it does not change even after subsequent heat treatment (therefore, the monotonous decrease in resistivity)
- the diodes shown in Figs. 1, 6 and 7 are based on the premise that heavy metals such as platinum are diffused in the N- layer 1B and the N + layer 1A in advance before helium ion irradiation.
- the present invention is not limited to this, and can also be applied to a diode that forms a low lifetime region 2 by performing helium ion irradiation when the heavy metal has not been diffused in advance.
- the term “light ion” means a hydrogen ion, that is, an ion of a relatively light atom, excluding protons, including ions of a hemisphere having an atomic number of 2 and oxygen ions having an atomic number of 8. As such, it is used in a broad sense. In particular, it is effective to use, as predetermined ions, He, Li, and Be, which are atoms of atoms belonging to a class that does not constitute a semiconductor impurity such as donor and acceptor with respect to silicon.
- FIG. 11 to FIG. 14 show the manufacturing steps in this embodiment.
- an N-type substrate composed of an N + layer 1 A and an N ⁇ layer 1 B (corresponding to a first semiconductor layer of the first conductivity type)
- a P-type impurity is implanted and annealed from the exposed surface of the N ⁇ layer 1 B to form the anode region 3 (the second half of the second conductivity type).
- an anode electrode (first main electrode) 5 is provided on the surface of the N-type substrate 1 and a force electrode is provided on the back surface of the N-type substrate 1.
- the force source electrode 6 is formed after a third step described later.
- a predetermined ion source is provided on the anode side so as to face the anode electrode 5.
- the given ion source is hydrogen ion
- a buffer layer (for example, aluminum oil) 7 for adjusting the depth of helium ion irradiation without changing the irradiation amount is disposed in front of the anode electrode 5 (according to the thickness of the buffer layer 7, the acceleration energy of the heliomion beam is changed).
- helium ions are introduced from the interface S 2 to the N ⁇ layer 1 B at a predetermined depth d from the interface S 2 (one of the anode regions 3 where the anode electrode 5 is formed).
- a low lifetime region 2 having a thickness d is formed in the N_ layer 1BS near the interface S2.
- the other N-layer parts are represented by the symbol 1B.
- a novel diode structure as shown in FIG. 1 can be obtained. That is, a semiconductor device having a low-loss soft recovery characteristic with a smaller recovery peak current I rr can be easily formed without deteriorating the withstand voltage by using a general-purpose light ion source, such as a helium ion beam generator. Can be. In this case, the number of steps is only the number of steps in FIG. 14 increases.
- the technical idea described in the present embodiment is basically applicable to a case where a low-lifetime region is formed near the PN junction surface in the anode region.
- FIG. 15 is a flowchart showing the steps of this embodiment.
- the feature of the present embodiment is that the heavy metal diffusion step shown in FIG. 16 is added before the helium ion irradiation step during the second step described in the second embodiment. It is in.
- This heavy metal diffusion process itself is equivalent to the first conventional technology described above, and increases the carrier lifetime on the cathode N + layer 1A side in FIG. 1 and increases the carrier density on the cathode side. The point is that the increase of the on-voltage V f which can be caused by the provision of the low lifetime region 2 is prevented so that the time T rr is increased.
- the manufacturing method of the present embodiment it is possible to provide a semiconductor device capable of further improving the soft recovery characteristics (Irr-small, Trr-large) without deteriorating the breakdown voltage.
- the diode in each embodiment of the present invention has a low life time region 2 having a monotonously decreasing resistivity and formed from the bottom surface of the third semiconductor layer on the first main electrode side to a predetermined depth. Therefore, the carrier density near the third semiconductor layer can be reduced without affecting the breakdown voltage, and the reverse current of the reverse recovery characteristic can be significantly reduced. In addition, since the lifetime of the low lifetime region 2 and the lifetime of the other regions are separately controlled to optimal values, the carrier density of the first semiconductor layer on the second main electrode side is increased. Can be controlled The reverse recovery characteristics are improved.
- the breakdown voltage is determined by the first semiconductor layer and the third semiconductor layer.
- a diode having such improved soft recovery characteristics can be produced easily and with versatility.
- the present invention can exhibit its characteristics effectively when used for a pin diode in a semiconductor device.
- the semiconductor device according to the present invention can be used as a freewheel diode in a power module.
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Description
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Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/JP1997/002835 WO1999009600A1 (en) | 1997-08-14 | 1997-08-14 | Semiconductor device and method for manufacturing the same |
| EP97935790.2A EP1014453B1 (en) | 1997-08-14 | 1997-08-14 | Semiconductor device |
| KR10-2000-7001315A KR100418007B1 (ko) | 1997-08-14 | 1997-08-14 | 반도체 장치 및 그의 제조방법 |
| JP51299099A JP3435166B2 (ja) | 1997-08-14 | 1997-08-14 | 半導体装置 |
| US09/463,975 US6603189B2 (en) | 1997-08-14 | 1997-08-14 | Semiconductor device with deliberately damaged layer having a shorter carrier lifetime therein |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/JP1997/002835 WO1999009600A1 (en) | 1997-08-14 | 1997-08-14 | Semiconductor device and method for manufacturing the same |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO1999009600A1 true WO1999009600A1 (en) | 1999-02-25 |
Family
ID=14180974
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/JP1997/002835 Ceased WO1999009600A1 (en) | 1997-08-14 | 1997-08-14 | Semiconductor device and method for manufacturing the same |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US6603189B2 (ja) |
| EP (1) | EP1014453B1 (ja) |
| JP (1) | JP3435166B2 (ja) |
| KR (1) | KR100418007B1 (ja) |
| WO (1) | WO1999009600A1 (ja) |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1098371A3 (en) * | 1999-11-05 | 2003-06-25 | Fuji Electric Co. Ltd. | A semiconductor device with good reverse recovery withstand and the method of manufacturing the same |
| JP2006352101A (ja) * | 2005-05-20 | 2006-12-28 | Toyota Motor Corp | 半導体装置及びその製造方法 |
| US7400017B2 (en) | 2004-04-28 | 2008-07-15 | Mitsubishi Denki Kabushiki Kaisha | Reverse conducting semiconductor device and a fabrication method thereof |
| DE102010063159A1 (de) | 2009-12-16 | 2011-06-22 | Toyota Jidosha Kabushiki Kaisha, Aichi-ken | Halbleitervorrichtung und ihr Herstellungsverfahren |
| JP2014060426A (ja) * | 2013-11-08 | 2014-04-03 | Fuji Electric Co Ltd | 半導体装置およびその製造方法 |
| US8698250B2 (en) | 2011-10-12 | 2014-04-15 | Mitsubishi Electric Corporation | Semiconductor device |
| CN106569036A (zh) * | 2016-11-14 | 2017-04-19 | 中广核工程有限公司 | 离子辐照试样辐照损伤区域的电阻率和电导率的测试方法 |
| US9870923B2 (en) | 2014-09-04 | 2018-01-16 | Fuji Electric Co., Ltd. | Semiconductor device and method of manufacturing the semiconductor device |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| DE10048345A1 (de) | 2000-09-29 | 2002-05-16 | Eupec Gmbh & Co Kg | Körper aus Halbleitermaterial mit reduzierter mittlerer freier Weglänge |
| JP4539011B2 (ja) * | 2002-02-20 | 2010-09-08 | 富士電機システムズ株式会社 | 半導体装置 |
| DE102004004045B4 (de) | 2004-01-27 | 2009-04-02 | Infineon Technologies Ag | Halbleiterbauelement mit temporärem Feldstoppbereich und Verfahren zu dessen Herstellung |
| JP2005340528A (ja) * | 2004-05-27 | 2005-12-08 | Fuji Electric Device Technology Co Ltd | 半導体装置およびその製造方法 |
| KR100626390B1 (ko) * | 2005-02-07 | 2006-09-20 | 삼성전자주식회사 | 자기 메모리 소자 및 그 형성 방법 |
| JP5194273B2 (ja) | 2007-09-20 | 2013-05-08 | 三菱電機株式会社 | 半導体装置 |
| JP5309360B2 (ja) * | 2008-07-31 | 2013-10-09 | 三菱電機株式会社 | 半導体装置およびその製造方法 |
| JP2010098189A (ja) * | 2008-10-17 | 2010-04-30 | Toshiba Corp | 半導体装置 |
| EP2320451B1 (en) * | 2009-11-09 | 2013-02-13 | ABB Technology AG | Fast recovery Diode |
| ATE529888T1 (de) | 2009-11-09 | 2011-11-15 | Abb Technology Ag | Schnelle diode und verfahren zu deren herstellung |
| JP5450490B2 (ja) * | 2011-03-24 | 2014-03-26 | 株式会社東芝 | 電力用半導体装置 |
| CN103392224A (zh) * | 2011-06-08 | 2013-11-13 | 丰田自动车株式会社 | 半导体装置及其制造方法 |
| CN102842501B (zh) * | 2012-08-03 | 2015-07-08 | 中国电力科学研究院 | 一种高压快速恢复二极管制造方法 |
| JP5915756B2 (ja) * | 2012-08-22 | 2016-05-11 | 富士電機株式会社 | 半導体装置および半導体装置の製造方法 |
| US9419116B2 (en) * | 2014-01-22 | 2016-08-16 | Alexei Ankoudinov | Diodes and methods of manufacturing diodes |
| US9224876B2 (en) * | 2014-01-24 | 2015-12-29 | Alexei Ankoudinov | Fast switching diodes and methods of manufacturing those diodes |
| CN103872144B (zh) * | 2014-03-06 | 2016-08-24 | 国家电网公司 | 一种软快恢复二极管及其制造方法 |
| DE112015000206T5 (de) * | 2014-10-03 | 2016-08-25 | Fuji Electric Co., Ltd. | Halbleitervorrichtung und Verfahren zum Herstellen einer Halbleitervorrichtung |
| JP6846119B2 (ja) * | 2016-05-02 | 2021-03-24 | 株式会社 日立パワーデバイス | ダイオード、およびそれを用いた電力変換装置 |
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- 1997-08-14 US US09/463,975 patent/US6603189B2/en not_active Expired - Lifetime
- 1997-08-14 JP JP51299099A patent/JP3435166B2/ja not_active Expired - Lifetime
- 1997-08-14 KR KR10-2000-7001315A patent/KR100418007B1/ko not_active Expired - Lifetime
- 1997-08-14 WO PCT/JP1997/002835 patent/WO1999009600A1/ja not_active Ceased
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| JPH05102161A (ja) * | 1991-07-15 | 1993-04-23 | Toshiba Corp | 半導体装置の製造方法とその半導体装置 |
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Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1098371A3 (en) * | 1999-11-05 | 2003-06-25 | Fuji Electric Co. Ltd. | A semiconductor device with good reverse recovery withstand and the method of manufacturing the same |
| US6870199B1 (en) | 1999-11-05 | 2005-03-22 | Fuji Electric Co., Ltd. | Semiconductor device having an electrode overlaps a short carrier lifetime region |
| US7400017B2 (en) | 2004-04-28 | 2008-07-15 | Mitsubishi Denki Kabushiki Kaisha | Reverse conducting semiconductor device and a fabrication method thereof |
| JP2006352101A (ja) * | 2005-05-20 | 2006-12-28 | Toyota Motor Corp | 半導体装置及びその製造方法 |
| DE102010063159A1 (de) | 2009-12-16 | 2011-06-22 | Toyota Jidosha Kabushiki Kaisha, Aichi-ken | Halbleitervorrichtung und ihr Herstellungsverfahren |
| DE102010063159B4 (de) * | 2009-12-16 | 2013-10-10 | Toyota Jidosha Kabushiki Kaisha | Halbleitervorrichtung und ihr Herstellungsverfahren |
| US8698285B2 (en) | 2009-12-16 | 2014-04-15 | Toyota Jidosha Kabushiki Kaisha | Reverse recovery using oxygen-vacancy defects |
| US8846544B2 (en) | 2009-12-16 | 2014-09-30 | Toyota Jidosha Kabushiki Kaisha | Reverse recovery using oxygen-vacancy defects |
| US8698250B2 (en) | 2011-10-12 | 2014-04-15 | Mitsubishi Electric Corporation | Semiconductor device |
| JP2014060426A (ja) * | 2013-11-08 | 2014-04-03 | Fuji Electric Co Ltd | 半導体装置およびその製造方法 |
| US9870923B2 (en) | 2014-09-04 | 2018-01-16 | Fuji Electric Co., Ltd. | Semiconductor device and method of manufacturing the semiconductor device |
| CN106569036A (zh) * | 2016-11-14 | 2017-04-19 | 中广核工程有限公司 | 离子辐照试样辐照损伤区域的电阻率和电导率的测试方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| EP1014453B1 (en) | 2016-04-27 |
| JP3435166B2 (ja) | 2003-08-11 |
| US20030062584A1 (en) | 2003-04-03 |
| KR20010022718A (ko) | 2001-03-26 |
| EP1014453A4 (en) | 2002-04-10 |
| EP1014453A1 (en) | 2000-06-28 |
| US6603189B2 (en) | 2003-08-05 |
| KR100418007B1 (ko) | 2004-02-11 |
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