WO2000020979A2 - Method and apparatus for element selection exhausting an entire array - Google Patents
Method and apparatus for element selection exhausting an entire array Download PDFInfo
- Publication number
- WO2000020979A2 WO2000020979A2 PCT/US1999/023551 US9923551W WO0020979A2 WO 2000020979 A2 WO2000020979 A2 WO 2000020979A2 US 9923551 W US9923551 W US 9923551W WO 0020979 A2 WO0020979 A2 WO 0020979A2
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- elements
- array
- index
- processing
- recited
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/76—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S707/00—Data processing: database and file management or data structures
- Y10S707/99931—Database or file accessing
- Y10S707/99937—Sorting
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S707/00—Data processing: database and file management or data structures
- Y10S707/99941—Database schema or data structure
- Y10S707/99942—Manipulating data structure, e.g. compression, compaction, compilation
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S707/00—Data processing: database and file management or data structures
- Y10S707/99941—Database schema or data structure
- Y10S707/99943—Generating database or data structure, e.g. via user interface
Definitions
- the present invention relates generally to computer systems. More
- the present invention relates to array element selection with reduced
- arrays are often used
- array elements are stored in a predetermined order and are therefore
- each array element in an alternate order is preferable.
- each array element in an alternate order is preferable.
- each array element in an alternate order is preferable.
- a corresponding element in a second array of boolean values may be flagged
- equivalent memory space may be allocated to store each selected element in the array.
- the elements in the array Prior to processing an array, the elements in the array are commonly sorted.
- the present invention provides methods and apparatus for reordering and
- each array element may be reordered upon selection and processed.
- elements in an array is disclosed. One of the plurality of elements is selected. The
- element may be selected according to any order, such as a specified priority order or a
- the selected element is then swapped with an unselected element in
- the selected element may then be selected.
- the method may be used to reorder the entire array which
- the present invention permits reordering and processing of array elements
- FIG. 1 illustrates a typical, general-purpose computer system suitable for
- FIG. 2 illustrates a method for selecting and exhausting an entire array
- FIG. 3 A illustrates an exemplary array on which the method of FIG. 2 may be
- FIG. 3B illustrates the exemplary array of FIG. 3 A after a first application of
- FIG. 3C illustrates the exemplary array of FIG. 3 A after a subsequent
- the present invention provides methods and apparatus for reordering elements
- the array elements may be processed immediately upon selection or
- an array may be reordered and processed without the use of
- a first array element in the array is
- the selected first array element is swapped with an array element located in
- the selected first array element is then processed.
- the present invention may generally be implemented on any suitable
- Figure 1 illustrates a typical, general-purpose computer system 102
- the computer system 102 includes
- processors 104 also referred to as central processing units, or CPUs
- primary storage device 108 typically a read only memory, or ROM
- ROM read only memory
- RAM random access memory
- the CPUs 104 may include any suitable computer-readable media.
- the CPUs 104 may include any suitable computer-readable media.
- processors may generally include any number of processors.
- a secondary storage medium 110 which is typically a mass memory device
- CPUs 104 may also be coupled bi-directionally to CPUs 104 and provides additional data
- the mass memory device 110 is a computer-readable medium that
- the mass memory device 110 is a storage medium such as a hard disk
- the CPUs 104 may also be coupled to one or more input/output devices 112
- mice keyboards, microphones, touch-sensitive displays, transducer card readers,
- CPUs 104 optionally may be coupled to a computer or telecommunications network,
- 104 might receive information from the network, or might output information to the
- CPUs 104 may be received from and outputted to the network, for example,
- the array is
- the array includes a plurality of storage locations, each of
- the storage which is capable of storing an array element.
- the storage is capable of storing an array element.
- locations may include logical memory locations that are addressable through one or
- the array may be provided according to any conventional manner.
- an array having a plurality of elements may be
- the array contains N unprocessed array elements.
- the array may be obtained from a separate software function
- Each index may be implemented
- index corresponding to a first element in the array may be initialized to zero.
- an upper bound index corresponding to a last element in the array may be
- index may be updated to reflect the selection of each array element.
- the upper bound index corresponds to the last element in the array.
- the array have been selected and processed.
- Each array element is selected to be processed according to a specified order.
- an array element is selected to be processed according to a selection
- the selection index is selected from between the lower bound index and the
- upper bound index inclusive, and may be obtained through any index generating
- the index generating process may generate a random
- the random number may be generated by any random number generator, while the priority order may be generated
- the selected array element is the array element corresponding to the
- the selection index points to the selected array
- the selected array element is swapped with an unselected
- index is swapped with the array element corresponding to the lower bound index.
- the first selected array element may be swapped with an array
- each remaining array element located in a first storage location.
- a temporary variable may be effectively removed from the array.
- a temporary variable may be effectively removed from the array.
- the temporary variable may be used to contain the array element pointed
- variable capable of storing a single array element may be utilized.
- index may be updated at step 216 to reflect the selection of the array element.
- the lower bound index may be incremented.
- each array element that has been processed includes a first section in which each array element that has been processed is stored
- the first section may be bounded by the initial lower bound index and the
- index divides the array into two sections, providing an upper bound for the first
- the initial lower bound index 304 is zero.
- the upper bound index 306 is 6. If the selection
- FIG. 3B illustrates the exemplary array 302 of FIG. 3 A after a first application
- the first selected array element 308, ARRAY[5] is
- the first selected array element 308, ARRAY[5] is swapped with the array element corresponding to
- ARRAY[0] is swapped with ARRAY[5], as
- index 304 equal to zero, points to the previously selected array element 308.
- the first section containing each selected array element, is
- FIG. 3C illustrates the exemplary array 302 of FIG. 3 A after a subsequent
- array element 308 would be "D”.
- the selected array As shown, the selected array
- each selected array element is stored in the
- the array may be reordered according to a priority scheme.
- the reordered array elements may subsequently be processed in ascending order
- the present invention is described as separating an array
- each selected array element is
- the selected array element may be any one of the selected array element.
- array may include multiple dimensions accessible by multiple indexes. Accordingly,
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Memory System Of A Hierarchy Structure (AREA)
- Debugging And Monitoring (AREA)
- Semiconductor Memories (AREA)
Abstract
Description
Claims
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CA002345422A CA2345422A1 (en) | 1998-10-06 | 1999-10-06 | Method and apparatus for element selection exhausting an entire array |
| EP99953119A EP1145133A2 (en) | 1998-10-06 | 1999-10-06 | Method and apparatus for element selection exhausting an entire array |
| JP2000575036A JP2003501707A (en) | 1998-10-06 | 1999-10-06 | Method and apparatus for element selection using an entire array |
| AU65128/99A AU766777B2 (en) | 1998-10-06 | 1999-10-06 | Method and apparatus for element selection exhausting an entire array |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US09/167,518 | 1998-10-06 | ||
| US09/167,518 US6311188B1 (en) | 1998-10-06 | 1998-10-06 | Method and apparatus for element selection exhausting an entire array |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| WO2000020979A2 true WO2000020979A2 (en) | 2000-04-13 |
| WO2000020979A3 WO2000020979A3 (en) | 2000-07-13 |
Family
ID=22607704
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/US1999/023551 Ceased WO2000020979A2 (en) | 1998-10-06 | 1999-10-06 | Method and apparatus for element selection exhausting an entire array |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US6311188B1 (en) |
| EP (1) | EP1145133A2 (en) |
| JP (1) | JP2003501707A (en) |
| AU (1) | AU766777B2 (en) |
| CA (1) | CA2345422A1 (en) |
| WO (1) | WO2000020979A2 (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9282051B2 (en) * | 2013-06-26 | 2016-03-08 | Netronome Systems, Inc. | Credit-based resource allocator circuit |
| US10402164B1 (en) * | 2016-12-23 | 2019-09-03 | EMC IP Holding Company LLC | Method for merge sort by representation |
| WO2020028912A2 (en) * | 2018-08-03 | 2020-02-06 | Catolog Technologies, Inc | Systems and methods for storing and reading nucleic acid-based data with error protection |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5704057A (en) * | 1992-10-01 | 1997-12-30 | The United States Of America As Represented By The Secretary Of The Navy | Real-time data sorter |
| JP3202074B2 (en) * | 1992-10-21 | 2001-08-27 | 富士通株式会社 | Parallel sort method |
| US5870764A (en) * | 1993-05-12 | 1999-02-09 | Apple Computer, Inc. | Method of managing a data structure for concurrent serial and parallel revision of a work |
| US5806064A (en) * | 1995-11-21 | 1998-09-08 | Garza; Alberto Ortegon | Method for multi-field ordering of data base records with sequence variables |
-
1998
- 1998-10-06 US US09/167,518 patent/US6311188B1/en not_active Expired - Lifetime
-
1999
- 1999-10-06 AU AU65128/99A patent/AU766777B2/en not_active Ceased
- 1999-10-06 CA CA002345422A patent/CA2345422A1/en not_active Abandoned
- 1999-10-06 EP EP99953119A patent/EP1145133A2/en not_active Ceased
- 1999-10-06 WO PCT/US1999/023551 patent/WO2000020979A2/en not_active Ceased
- 1999-10-06 JP JP2000575036A patent/JP2003501707A/en active Pending
Non-Patent Citations (2)
| Title |
|---|
| KNUTH, DONALD E.: "The Art of Computerprogramming" 1980 , ADDISON WESLEY , US, READING XP002135453 page 139, line 37 - last line * |
| LIPPMAN, S.: "The C++ Primer" 1991 , US XP002135454 page 125 -page 127, paragraph 3.6 * |
Also Published As
| Publication number | Publication date |
|---|---|
| US6311188B1 (en) | 2001-10-30 |
| JP2003501707A (en) | 2003-01-14 |
| CA2345422A1 (en) | 2000-04-13 |
| AU766777B2 (en) | 2003-10-23 |
| WO2000020979A3 (en) | 2000-07-13 |
| AU6512899A (en) | 2000-04-26 |
| EP1145133A2 (en) | 2001-10-17 |
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