WO2000062347A2 - Solarzelle sowie verfahren zur herstellung einer solarzelle - Google Patents
Solarzelle sowie verfahren zur herstellung einer solarzelle Download PDFInfo
- Publication number
- WO2000062347A2 WO2000062347A2 PCT/DE2000/001073 DE0001073W WO0062347A2 WO 2000062347 A2 WO2000062347 A2 WO 2000062347A2 DE 0001073 W DE0001073 W DE 0001073W WO 0062347 A2 WO0062347 A2 WO 0062347A2
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- absorber layer
- carrier
- layer
- solar cell
- copper
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F77/00—Constructional details of devices covered by this subclass
- H10F77/10—Semiconductor bodies
- H10F77/16—Material structures, e.g. crystalline structures, film structures or crystal plane orientations
- H10F77/169—Thin semiconductor films on metallic or insulating substrates
- H10F77/1698—Thin semiconductor films on metallic or insulating substrates the metallic or insulating substrates being flexible
- H10F77/1699—Thin semiconductor films on metallic or insulating substrates the metallic or insulating substrates being flexible the films including Group I-III-VI materials, e.g. CIS or CIGS on metal foils or polymer foils
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F71/00—Manufacture or treatment of devices covered by this subclass
- H10F71/137—Batch treatment of the devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F77/00—Constructional details of devices covered by this subclass
- H10F77/10—Semiconductor bodies
- H10F77/12—Active materials
- H10F77/126—Active materials comprising only Group I-III-VI chalcopyrite materials, e.g. CuInSe2, CuGaSe2 or CuInGaSe2 [CIGS]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F77/00—Constructional details of devices covered by this subclass
- H10F77/10—Semiconductor bodies
- H10F77/16—Material structures, e.g. crystalline structures, film structures or crystal plane orientations
- H10F77/169—Thin semiconductor films on metallic or insulating substrates
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/541—CuInSe2 material PV cells
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Definitions
- the invention relates to a solar cell which has an absorber layer which is arranged on a flexible and band-shaped carrier and in which the absorber layer at least partially contains copper, at least one element from the group of indium and gallium and at least one element from the group of selenium and sulfur and in which the absorber layer is at least partially p-type.
- the invention further relates to a method for producing a solar cell, in which a flexible and ribbon-shaped support is provided with an absorber layer and in which the absorber layer is at least partially made of copper, at least one element from the group indium and gallium and at least one element from the group Selenium and sulfur is produced and in which the absorber layer is provided with p-conducting properties at least in some areas.
- Thin-film solar cells are generally produced by first applying a transparent, electrically conductive layer to special silicate glass (solar glass) and then vapor-deposition silicon with various doping. In turn, a conductive layer is applied as the cover layer, but this does not need to be translucent. Through the use of masks, a separation of the layers using a laser and the successive sequence of the processing steps described, the entire area is structured in such a way that a large number of individual cells that are electrically connected in series. Through contacting, protective cover on the back and framing of the entire structure, a thin-film solar module is created which is used to convert light energy into electrical power (regenerative power generation). Solar modules are also known in which copper-indium-selenide (CIS) was vapor-deposited on glass instead of silicon.
- CIS copper-indium-selenide
- Solar modules are available under the trade name UNISOLAR, in which silicon was vapor-deposited on a long stainless steel strip in a high vacuum ("roll-to-roll” process). The tape is then cut at the non-vaporized points and the individual cells are electrically and mechanically combined to form solar modules.
- a specialty here is the production of tandem or triple cells, in which two or three spectrally differently sensitive silicon cells are layered on top of one another. Such a tandem cell on a glass substrate, manufactured in a high vacuum, was already produced in CIS technology by the Hahn-Meitner-Institut Berlin and was shown for the first time at the 1998 technical fair in Hanover.
- DE 196 34 580 proposes to use the shingle technique known per se, the question of undesirable contacts between the copper and the conductive cover layers at the edges and the interfaces of the band being open remains.
- the object of the present invention is therefore to construct a solar cell of the type mentioned in the introduction in such a way that both low production costs and high electrical efficiency are achieved.
- the object is achieved in that the absorber layer is at least partially applied galvanically to the carrier, that the components of the absorber layer are relative to each other in a stoichiometric. trical ratio and that the absorber layer is heat-treated after its application to the carrier.
- Another object of the present invention is to improve a method of the type mentioned in the introduction in such a way that large-scale production of the solar cells is supported at low production prices.
- the absorber layer is at least partially applied galvanically to the carrier, in that the constituents of the absorber layer are deposited in a stoichiometric ratio relative to one another and in that the absorber layer is subjected to a heat treatment after it has been applied to the carrier.
- the strip is guided continuously or clocked through several "galvanic" baths, with CIS (copper, indium and selenium) being electromechanical on the cell areas. is mixed homogeneously.
- a further, homogeneous copper cover layer can preferably be applied galvanically to these galvanically produced layers or, alternatively, copper doping can be carried out.
- the strip can be passed through a so-called "lamp oven", the mixing and the microcrystalline structure of the CIS layer being optimized by heating the coated areas in a precisely metered manner in terms of time and temperature.
- the cover layer made of metallic copper and a layer of copper selenium which may be located below it can be selectively removed by etching.
- a transparent, n-conductive cover layer for example zinc oxide, can be applied to the entire strip.
- the flexible carrier is cut in the area of the insulating layer, so that individual cells are formed whose top layer (ITO) and base layer are electrically conductive, but are reliably insulated from one another.
- the method proposed according to the invention can be carried out in such a way that an approximately 35 mm wide and fractional millimeter thick stainless steel strip is used.
- This has the advantage that a width of 35 mm is an international standard for flexible printed circuit boards, which creates equipment advantages in the manufacture of solar cells.
- the number of contacts when the cells are connected to modules, which also presents a certain problem in shingle technology, is considerably reduced compared to a band cell that is only 10 mm wide, for example.
- an insulating layer made of an electrically non-conductive and highly temperature-resistant material can also be applied to the carrier in such a way that delimited, uncoated areas are formed, on which the CIS is later deposited.
- ternary i.e. at the same time, copper, indium and selenium are deposited electrochemically in one pass through an appropriate bath. Precautions must be taken to ensure that the concentration of the electrolytes remains constant, that no gas bubbles adhere to the layer (risk of "pinholes") and that other inhomogeneities are avoided.
- ternary deposition it can prove to be expedient to break down the deposition of the elements into sub-steps, for example first applying binary indium + selenium and then copper. Certain advantages arise if first binary copper + selenium, then indium + selenium are deposited at the same time.
- the "mixing" is then carried out by heating in the lamp furnace, the temperature, the residence time and the heating and cooling gradients having to be optimized differently depending on the layer structure selected.
- the strip is fed into an annealing furnace, it being advantageous to supply the strip with the required thermal energy not by heat conduction, but rather by heat radiation.
- the temperature, the time gradient of the heating (which seems to be important for the crystallization process) and the residence time can be set up as desired.
- the cooling process is controlled in terms of speed and course (bottom to top or vice versa) by cooling the contact surface and / or blowing in cooled protective gas.
- tempering CIS cells A known problem in tempering CIS cells is the volatility of selenium, which destroys any optimal stoichiometric balance that may be present.
- selenium steam By adding selenium steam, it is necessary to "re-select" in the tempering furnace ("selenization furnace"); In the lamp furnace, as used for the production of CIS cells according to the invention, this is avoided by, on the one hand, using the lowest possible temperatures, and on the other hand, the heating takes place very quickly by means of correspondingly strong light radiation on the covering copper layer of the strip. If this is not sufficient, an excess pressure of the protective gas atmosphere (eg nitrogen) can be set in the lamp furnace. Annealing under excess pressure the structuring of the band according to the invention in areas and the clocked feed almost inevitably presupposes this, but this can in principle also be carried out with a rapidly continuously running band cell.
- the protective gas atmosphere eg nitrogen
- the irradiation of light on the upper side of the band leads to a temperature gradient in the layer, which can be advantageous with regard to the diffusion out of the band or with regard to the load on lower layers when building a tandem cell structure.
- the strip After leaving the lamp furnace, the strip is largely removed by etching in the fifth process step, i.e.
- individual conductor tracks made of Cu remain, which take over the low-resistance derivation of the electrons generated by the photon absorption and field separation instead of the grid (usually "printed” with silver paste), usually printed with silver paste.
- the "etched free" surface of the cell is provided with a transparent, highly electrically conductive cover layer ("ITO window electrode").
- ITO window electrode a transparent, highly electrically conductive cover layer
- This is done, for example, by spray pyrolysis of zinc oxide; It is advantageous that the cell area was delimited in step 1 by an insulator, so that an exact delimitation of the areas affected by the spraying is now not necessary: applying the electrically conductive layer beyond the cell edge does not lead to short circuits or reworking.
- the finished, for example 40 cm long and 35 mm wide, CIS solar cells are produced by cutting the tape outside the cell areas. Instead of the shingle-like connection proposed in DE 196 34 589, they are preferably electrically connected to one another by means of interposed "spacers".
- the finished arrangement of, for example, 40 cells in series connection is covered in a so-called “laminator 1 in a slight vacuum under pressure and heat on the front with a transparent TEDLAR ° film and on the back with the EVA film customary in solar technology and protected against weather influences.
- the resulting arrangement of solar cells is called a “laminate”, which is further processed into a “standard solar module” by providing it with a frame and a cable junction box.
- the carrier consists of at least one metal and the back electrode of the solar cell forms that the absorber layer is at least partially applied galvanically to the carrier is that the constituents of the absorber layer copper, indium / gallium and selenium / sulfur are present in a stoichometric ratio of 1: 1: 2 or with a slight excess of selenium and that the absorber layer is heat-treated in a device after it has been applied to the carrier in such a way that it is converted into pure, single-phase crystalline copper indium / gallium diselenide / sulfide with at least some p-type characteristics.
- one or more matching, base, contact or adhesive layers are applied before the application of the absorber layer, preferably by electrochemical deposition.
- the layers which form the absorber by sequential electrochemical deposition of the metals copper, indium / gallium and selenium or by binary deposition of compound semiconductors according to the formula "Cu2Se plus In2Se3 / Ga2Se3 equal to 2 Culn / GaSe2" or by ternary Deposition or by a mixture of metal deposition and deposition of compound semiconductors such as Cu, In2Se3 / Ga2Se3, Se takes place with a precisely determined thickness in such a way that the proportions are correct or a small excess of selenium is present.
- a sodium-containing compound for example sodium selenide
- a sodium-containing compound for example sodium selenide
- the constituents of the absorber layer were "recrystallized" by heating to temperatures above 500 ° Celsius under a protective gas atmosphere to form a uniform, pure and p-conducting CIS2 layer, with a very rapid rise in temperature and a short duration of the Heating, by a very small volume above the absorber layer and / or by an overpressure of the protective gas atmosphere, evaporation of selenium / sulfur and the formation of other crystalline phases is prevented or made more difficult.
- FIG. 2 a top view of the arrangement according to FIG. 1
- Fig. 3 an example of the structure of a heat treatment furnace.
- Fig. 1 shows a flexible carrier (1) which is provided with a surface (2) on which an absorber layer (3) is arranged. Insulating layers (4) extend along edge regions and a copper cover layer (5) is applied to the absorber layer (3) in this embodiment. Alternatively, doping with copper can also be used, for example. be lized. In the area of the side of the absorber layer (3) facing away from the carrier (1), a cover layer (6) is arranged, which can be formed, for example, as an ITO layer.
- the flexible carrier (1) is unwound from a roll (7) and passed through an interior (8) of the temperature control device (9).
- the cover layer (5) and intermediate cell areas (10) are located on the carrier (1).
- a material (11), which can be sulfur or selenium, for example, is applied in the conveying direction next to the absorber layer (3).
- the temperature control device (9) has a transparent lower cover (12) and a semi-transparent upper cover (13).
- a protective gas atmosphere is arranged in the area of the interior (8) and the interior (8) is enclosed by a translucent housing (14).
- Heat radiators (15) of a first control circuit are arranged below the housing (14) and heat radiators (16) of a second control circuit and heat radiators (17) of a third control circuit are positioned above the housing (13).
- the heat radiators (15) of the first control loop are essentially opposite the heat radiators of the third control loop.
- the heat radiators of the second control circuit are arranged in the transport direction of the carrier (1) from the roll (7) to a take-up roll (18) in front of or behind the heat radiators (17) of the third control circuit. arranges.
- the lower cover (12) is provided with cooling (19), which can be formed, for example, from cooling channels through which a cooling medium flows.
- cooling (19) can be formed, for example, from cooling channels through which a cooling medium flows.
- locks (20) are arranged in the inlet area and in the outlet area of the housing (14).
- the carrier (1) can be made of different materials. In particular, the use of copper is thought of. Alternatively, steel strips or carrier materials made of flexible plastics can also be used.
- the insulating layer (4) is arranged in such a way that the cell areas remain free.
- the electrodeposition of the absorber layer (4) can be carried out, for example, in such a way that an electrochemical deposition of the metals copper, indium and / or gallium and selenium is carried out sequentially.
- the heat treatment of the absorber layer (3) within the furnace described in FIG. 3 takes place during the cycle operation of the carrier (1) through the furnace.
- sulfur or selenium is supplied in vapor form.
- these elements are deposited on the intermediate cell area (10).
- a regulation of the heat supply is divided into at least two control loops, so that the cell areas and the intermediate cell areas can be heated differently.
- the sulfur and selenium in the intercell area is first evaporated and then this area is used to condense the remaining steam.
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- Photovoltaic Devices (AREA)
Abstract
Description
Claims
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| AU50592/00A AU5059200A (en) | 1999-04-10 | 2000-04-10 | Solar cell and method for producing a solar cell |
| EP00934884A EP1177584A2 (de) | 1999-04-10 | 2000-04-10 | Solarzelle sowie verfahren zur herstellung einer solarzelle |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19917758.9 | 1999-04-10 | ||
| DE19917758A DE19917758C2 (de) | 1999-04-10 | 1999-04-10 | Verfahren zur Herstellung einer CuInSe2(CIS)Solarzelle |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| WO2000062347A2 true WO2000062347A2 (de) | 2000-10-19 |
| WO2000062347A3 WO2000062347A3 (de) | 2001-03-01 |
Family
ID=7905163
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/DE2000/001073 Ceased WO2000062347A2 (de) | 1999-04-10 | 2000-04-10 | Solarzelle sowie verfahren zur herstellung einer solarzelle |
Country Status (4)
| Country | Link |
|---|---|
| EP (1) | EP1177584A2 (de) |
| AU (1) | AU5059200A (de) |
| DE (1) | DE19917758C2 (de) |
| WO (1) | WO2000062347A2 (de) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE10247402A1 (de) * | 2002-10-03 | 2004-04-22 | Cis Solartechnik Gmbh | Substrat-Aufbau für flexible CIS-Solarzellen |
| JP2005524244A (ja) * | 2002-04-29 | 2005-08-11 | エレクトリシテ ド フランス セルビス ナショナル | I−iii−vi2化合物を基礎とする光起電性用途向け薄膜半導体の製造方法 |
| EP2128903A1 (de) | 2008-05-30 | 2009-12-02 | Atotech Deutschland Gmbh | Galvanisierungszusatz zum Auftragen eines Metalls oder einer binären, ternären, quaternären oder pentanären Legierung von Elementen der Gruppe 11 (IB)-Gruppe 13 (IIIA)-Gruppe 16 (VIA) |
| EP2159846A1 (de) | 2008-08-29 | 2010-03-03 | ODERSUN Aktiengesellschaft | Dünnfilmsolarzelle und photovoltaische Stranganordnung |
| DE102008049374A1 (de) | 2008-09-27 | 2010-04-01 | JODLAUK, Jörg | Halbleiterfaserstrukturen als Energieerzeuger |
| CN102484169A (zh) * | 2009-09-09 | 2012-05-30 | 国际商业机器公司 | 控制光生伏打薄膜成分的方法 |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102004013442B4 (de) * | 2004-03-14 | 2006-05-24 | Klaus Dr. Kalberlah | Verfahren zur Herstellung von bandförmigen Solarzellen der CIS-Technologie |
| DE102006041046A1 (de) * | 2006-09-01 | 2008-03-06 | Cis Solartechnik Gmbh & Co. Kg | Solarzelle, Verfahren zur Herstellung von Solarzellen sowie elektrische Leiterbahn |
| WO2009030281A1 (en) * | 2007-09-07 | 2009-03-12 | ETH Zürich | Method of forming thin film solar cell |
| DE102008020749A1 (de) * | 2008-04-22 | 2009-10-29 | Cis Solartechnik Gmbh & Co. Kg | Verfahren zur Herstellung einer Solarzelle |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE4103291A1 (de) * | 1990-09-22 | 1992-04-02 | Battelle Institut E V | Verfahren zur herstellung einer absorberschicht fuer solarzellen mit hilfe galvanischer abscheidetechnik |
| DE4225385C2 (de) * | 1992-07-31 | 1994-09-29 | Siemens Solar Gmbh | Verfahren zur kostengünstigen Herstellung einer Schicht eines ternären Verbindungshalbleiters |
| WO1994007269A1 (de) * | 1992-09-22 | 1994-03-31 | Siemens Aktiengesellschaft | Schnelles verfahren zur erzeugung eines chalkopyrit-halbleiters auf einem substrat |
| DE19634580C2 (de) * | 1996-08-27 | 1998-07-02 | Inst Solar Technologien | Verfahren zur Herstellung einer CIS-Bandsolarzelle und Vorrichtung zur Durchführung des Verfahrens |
-
1999
- 1999-04-10 DE DE19917758A patent/DE19917758C2/de not_active Expired - Fee Related
-
2000
- 2000-04-10 AU AU50592/00A patent/AU5059200A/en not_active Abandoned
- 2000-04-10 EP EP00934884A patent/EP1177584A2/de not_active Withdrawn
- 2000-04-10 WO PCT/DE2000/001073 patent/WO2000062347A2/de not_active Ceased
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005524244A (ja) * | 2002-04-29 | 2005-08-11 | エレクトリシテ ド フランス セルビス ナショナル | I−iii−vi2化合物を基礎とする光起電性用途向け薄膜半導体の製造方法 |
| US7026258B2 (en) | 2002-04-29 | 2006-04-11 | Electricite De France Service National | Method for making thin-film semiconductors based on I-III-VI2 compounds, for photovoltaic applications |
| DE10247402A1 (de) * | 2002-10-03 | 2004-04-22 | Cis Solartechnik Gmbh | Substrat-Aufbau für flexible CIS-Solarzellen |
| EP2128903A1 (de) | 2008-05-30 | 2009-12-02 | Atotech Deutschland Gmbh | Galvanisierungszusatz zum Auftragen eines Metalls oder einer binären, ternären, quaternären oder pentanären Legierung von Elementen der Gruppe 11 (IB)-Gruppe 13 (IIIA)-Gruppe 16 (VIA) |
| US8828278B2 (en) | 2008-05-30 | 2014-09-09 | Atotech Deutschland Gmbh | Electroplating additive for the deposition of metal, a binary, ternary, quaternary or pentanary alloy of elements of group 11 (IB)—group 13 (IIIA)—Group 16 (VIA) |
| EP2159846A1 (de) | 2008-08-29 | 2010-03-03 | ODERSUN Aktiengesellschaft | Dünnfilmsolarzelle und photovoltaische Stranganordnung |
| DE102008049374A1 (de) | 2008-09-27 | 2010-04-01 | JODLAUK, Jörg | Halbleiterfaserstrukturen als Energieerzeuger |
| CN102484169A (zh) * | 2009-09-09 | 2012-05-30 | 国际商业机器公司 | 控制光生伏打薄膜成分的方法 |
| CN102484169B (zh) * | 2009-09-09 | 2015-10-14 | 国际商业机器公司 | 控制光生伏打薄膜成分的方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2000062347A3 (de) | 2001-03-01 |
| DE19917758C2 (de) | 2003-08-28 |
| EP1177584A2 (de) | 2002-02-06 |
| AU5059200A (en) | 2000-11-14 |
| DE19917758A1 (de) | 2000-10-19 |
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