WO2001047323A2

WO2001047323A2 - Compander for power control in a ballast

Info

Publication number: WO2001047323A2
Application number: PCT/EP2000/012622
Authority: WO
Inventors: Benoit R. Veillette
Original assignee: Koninklijke Philips Electronics NV
Current assignee: Koninklijke Philips NV
Priority date: 1999-12-22
Filing date: 2000-12-13
Publication date: 2001-06-28
Anticipated expiration: 2002-06-22
Also published as: WO2001047323A3; JP2003518669A; US6577262B1; CN1378767A; EP1228671A2

Abstract

A system and method for the dynamic power control of a ballast, wherein a compander (10) is used to reduce dynamic input range requirements of an analog-to-digital converter (ADC) (18) in power systems having dynamic signal ranges that are several orders of magnitude smaller than the largest signal being sampled. The present invention compresses an analog power signal (12) and then digitizes and expands the signal to attain a digitized signal having an amplitude identical to the analog signal (12), thereby providing a power control system that is less expensive and less complicated than conventional power systems. The present invention can use algorithms to calculate both the expansion values and correction values required for a power control circuit to adjust an output power level toward a desired value.

Description

Compander for power control m a ballast

The present invention pertains to the field of electronic power control circuits, and more specifically to dynamic power controls used in ballasts employed in lighting systems.

Conventional electronic power control systems typically employ a closed-loop feedback architecture Certain of these systems, such as digital power control systems, use an analog-to-digital converter (ADC) which digitizes a signal provided by a power output sensing means. Digitized data values from the ADC are presented to a digital signal processor (DSP), and when deviations are sensed in the ADC output relative to a reference signal, the DSP causes corrective actions to be taken in the dπve circuitry to move the output to a desired value. To correctly monitor precise changes in a low amplitude signal, a sensing ADC must necessarily have a high bit resolution

A problem aπses, however, when precision control is required for a time varying signal that is several orders of magnitude smaller than the largest signal to be detected Specifically, for a system to be able to linearly maintain precise sensing of a small signal and also be able to sense large signals requires the use of expensive ADCs or extra controllable gain stages Conventional methods used to address this problem either limit the dynamic range of the signal or limit the precision of the error detection, both of which degrade the performance of the power system

In non-power systems applications, such as telephony systems and filters, the aforementioned problem has been addressed using companding in which the amplitude of an analog signal is compressed and the signal is then digitized The digitized signal is then expanded such that the amplitude of the resulting digital signal is equal the amplitude of the analog signal, thus making the analog-to-digital conversion transparent to the system An analog compression technique which uses logaπthms is particularly suited to a reduction in the dynamic range of a signal to a more manageable range that can then be sampled with a less expensive, lower bit resolution ADCs See Y Tsividia, "External Linear Time-Vaπant Systems and Their Applications to Companding Signal Processors, "IEEE Transactions Circ Syst II, Vol 44, pp 65-85, Feb 1997, J Bellamy, Digital Telephony, Wiley Seπes in Telecommunications, Edition 1990, pp 108-115 See also U S Patent 4,903,020 to Wermuth, et al., and U.S. Pate it 5,023,490 to Gittinger. To date companding has not been used in power system applications. Accordingly, it is an objective of the present invention to use companding in power systems.

The invention offers a system and method for the dynamic power control of a ballast, wherein a compander is used to reduce the dynamic input range requirements of an analog-to-digital converter (ADC) in power systems having a dynamic signal range that is several orders of magnitude smaller than the largest signal being sampled. The compander is comprised of: an analog compressor to create a reduced-amplitude analog signal from an uncompressed analog signal; a sampling ADC to convert each one of the plurality of signal samples of the compressed analog signal to a digital data value; and a data expander to digitally expand the digital data value to an amplitude identical to the amplitude of the uncompressed analog signal.

An algorithm is then used to calculate a correction signal from the expanded digital data values. The correction signal causes a power feedback control circuit to adjust an output power level to a desired value. The control circuit can be implemented to control either an output current or an output voltage and provides a lower cost and less complex power control system than conventional systems used for such purposes.

FIG. 1 shows an exemplary embodiment of a compander according to the present invention.

FIG. 2 shows a circuit diagram of an exemplary embodiment of the voltage signal compressor according to the present invention.

FIG. 3a shows a plot of the digital output voltage in volts (v) as a function of analog input voltage (v) of a high resolution ADC in response to an uncompressed electrical signal of the prior art.

FIG. 3b shows a plot of the digital output voltage (v) as a function of analog input voltage (v) of a high resolution ADC in response to an amplitude-compressed electrical signal according to the present invention.

The present invention is for a system and method for using a compander for power control in a ballast. FIG. 1 shows an exemplary embodiment of a compander 10 according to the present invention. An analog input signal 12 derived from a power signal is input to an analog compressor 14. The amplitude-compressed analog output 16 of compressor 14 is then sampled by analog-to-digital converter (ADC) 18 which outputs a digitally-encoded signal 20 which is input to a digital expansion block 22.

Expansion block 22 expands data signal 20 in the digital domain to create a digital data signal 24 which is identical in amplitude to that of input signal 12. Expansion block 22 is compπsed of a memory device having a look-up table (LUT) in which are stored a plurality of digital data values, each value being identical in amplitude to one of the plurality of signal amplitudes of analog input signal 12. Each one of a plurality of data values in data signal 20 corresponds to a unique address in the LUT to locate a unique one of the plurality of digital data values which generates a digital signal 24. Signal 24 is processed by a digital computing device 26, such as a digital signal processor (DSP) or a microprocessor. Digital computing device 26 calculates a corrective signal 28 which is based on an error value associated with the magnitude of signal 24 relative to a reference value within the operating program of digital computing device 26 Corrective signal 28 supplies an appropπate movement to an actuator (not shown) to cause signal 12 to move to a new desired value. Expansion block 22 can also be incorporated within digital computing device 26 as a memory look-up table, the values of which are generated by a mathematical expression or by a piece-wise linear approximation algoπthm

Compander 10 can be used to compand either a sensed voltage or a sensed current signal In an exemplary compressor for a load current the transfer function for conduction through a diode creates a logaπthmic voltage response across that diode whose operation is descπbed by the equation

ID V_D = m V_T log ( — + 1) (1)

Io

where V_D is the voltage (v) across the diode, m is a junction constant (1 < m < 2), V_τ is a thermal voltage (0.025 v @ 25°C), I_D is a current in amperes (amps) conducted through the diode, and I₀ is a saturation current (amps)

FIG 2 shows an exemplary circuit 30 of a voltage signal compressor. Logaπthmic transfer characteπstics associated with diodes 32 and 34 across operational amplifier 36 provide the compression of an input voltage 38 to obtain compressed output voltage 40. Resistor 42 provides a linear control for the slope of the transfer characteπstics Vaπous alternative configurations can be used to compress either current or voltage or both voltage and current simultaneously, as are known to those skilled in the art FIG. 3a shows a plot of the digital output voltage (v) as a function of analog input voltage (v) for a conventional high resolution ADC in response to an uncompressed electrical signal of the prior art. Transfer curve 44 shows that in the absence of compression, for each linear step increase in analog input voltage signal 12 shown in figure 1, a corresponding step is made in the digital output voltage of the ADC. For an exemplary analog input variation 46, the digital output voltage varies by a proportional amount 48.

FIG. 3b shows a plot of the digital output voltage (v) as a function of analog input voltage (v) of a high resolution ADC in response to an amplitude-compressed electrical signal according to the present invention. Transfer curve 50 shows that for each linear step increase in analog input voltage signal 12 shown in FIG. 1, the effects of compression cause a larger step for small signals to be made in the digital output voltage than that of FIG. 3a.

Thus, if it is assumed that an analog input variation 52 shown in FIG. 3b is of the same magnitude as the analog input variation 46 shown in FIG. 3a, the digital output variation 54 shown in FIG. 3b is significantly greater than digital output variation 48 shown in FIG. 3a. Conversely, a given digital output variation of an ADC can be made to occur with much smaller variations of the input voltage of a compressed analog signal than that of an uncompressed signal, and the number of bits of the ADC can be reduced over that of an uncompressed signal.

Consequently, power controls that heretofore required a high resolution and a wide dynamic range ADC, can be implemented with a compander which incorporates an analog compression mechanism and an ADC having a lower bit resolution over the same dynamic range. This results in power control systems that are less expensive and less complicated than conventional systems.

Numerous modifications to the alternative embodiments of the present invention will be apparent to those skilled in the art in view of the foregoing description. Accordingly, this description is to be construed as illustrative only and is for the purpose of teaching those skilled in the art the best mode of carrying out the invention. Details of the structure may be varied substantially without departing from the spirit of the invention and the exclusive use of all modifications which come within the scope of the claims is reserved.

Claims

CLAIMS:

1. A system for dynamic power control, comprising: an electrical signal analog sensing means; a companding means; a correction signal calculating means; and an electrical signal correcting means.

2. The system according to Claim 1, wherein the companding means comprises: an analog signal compression means (14); an analog-to-digital converter (ADC) (18); and a digital signal expansion means (22).

3. The system according to Claim 2, wherein the analog signal compression means (14) is a circuit that increases an amplitude of a small analog signal and reduces an amplitude of a large analog signal.

4. The system according to Claim 2, wherein the analog signal compression means (14) is a diode.

5. The system according to Claim 2, wherein the analog signal compression means (14) is comprised of a plurality of diodes (32, 34) coupled to an operational amplifier (36).

6. The system according to Claim 2, wherein the digital signal expansion means (22) is comprised of a circuit for converting a compressed digital data signal (20) from the ADC (18) into an expanded digital data signal (24) having an amplitude identical to an amplitude of a signal (12) from the analog sensing means.

7. The system according to Claim 2, wherein the digital signal expansion means (22) is comprised of a memory device having a look-up table in which a plurality of expanded digital data values ar3 stored, each digital data value being identical to an amplitude of a signal (12) from the analog sensing means.

8. The system according to Claim 7, wherein a digital output signal from the ADC (18) corresponds to a unique one of a plurality of locations in the memory device in which is stored a corresponding expanded digital data value.

9. The system according to Claim 2, wherein the digital signal expansion means (22) comprises a digital signal processor or a microprocessor having a lookup table.

10. The system according to Claim 2, wherein the digital signal expansion means (22) is a linear approximation algorithm which is stored in a digital computing device (26), such as a digital signal processor (DSP) or a microprocessor.