WO2002005432A2 - Sigma-delta modulator with an adjustable feedback factor - Google Patents

Sigma-delta modulator with an adjustable feedback factor Download PDF

Info

Publication number
WO2002005432A2
WO2002005432A2 PCT/EP2001/007232 EP0107232W WO0205432A2 WO 2002005432 A2 WO2002005432 A2 WO 2002005432A2 EP 0107232 W EP0107232 W EP 0107232W WO 0205432 A2 WO0205432 A2 WO 0205432A2
Authority
WO
WIPO (PCT)
Prior art keywords
sigma
delta modulator
integrator
adjusting member
feedback
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/EP2001/007232
Other languages
French (fr)
Other versions
WO2002005432A3 (en
Inventor
Matthias Locher
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Koninklijke Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics NV filed Critical Koninklijke Philips Electronics NV
Priority to DE60124318T priority Critical patent/DE60124318T2/en
Priority to KR1020027002954A priority patent/KR20020035586A/en
Priority to JP2002509178A priority patent/JP2004503167A/en
Priority to CN018019420A priority patent/CN1547804B/en
Priority to EP01962781A priority patent/EP1374409B1/en
Publication of WO2002005432A2 publication Critical patent/WO2002005432A2/en
Anticipated expiration legal-status Critical
Publication of WO2002005432A3 publication Critical patent/WO2002005432A3/en
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00—Conversion of analogue values to or from differential modulation
    • H03M3/02—Delta modulation, i.e. one-bit differential modulation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00—Conversion of analogue values to or from differential modulation
    • H03M3/30—Delta-sigma modulation
    • H03M3/458—Analogue/digital converters using delta-sigma modulation as an intermediate step
    • H03M3/478—Means for controlling the correspondence between the range of the input signal and the range of signals the converter can handle; Means for out-of-range indication
    • H03M3/48—Means for controlling the correspondence between the range of the input signal and the range of signals the converter can handle; Means for out-of-range indication characterised by the type of range control, e.g. limiting
    • H03M3/482—Means for controlling the correspondence between the range of the input signal and the range of signals the converter can handle; Means for out-of-range indication characterised by the type of range control, e.g. limiting by adapting the quantisation step size
    • H03M3/484—Means for controlling the correspondence between the range of the input signal and the range of signals the converter can handle; Means for out-of-range indication characterised by the type of range control, e.g. limiting by adapting the quantisation step size by adapting the gain of the feedback signal, e.g. by adapting the reference values of the digital/analogue converter in the feedback path

Definitions

  • the invention relates to a sigma-delta modulator, comprising: an integrator, a quantizer connected to an output of the integrator, a feedback circuit comprising a D/A-converter having an input connected to an output of the quantizer, and an adder having an output connected to an input of the integrator and having a first input which forms the input of the sigma-delta modulator and having a second input connected to an output of the feedback circuit.
  • Such sigma-delta modulators are generally known but particularly from the article: "A 0.2 mW CMOS ⁇ Modulator for Speech Coding with 80 dB Dynamic Range.”, IEEE Journal of Solid-State Circuits, vol. 31,No.l2, December 1996. Due to the increasing use of these circuits in a wide field of applications, a need has developed for circuits which are flexible in terms of input level, gain, process parameters, etc. From the document above it is known to vary the input level by switching of resistors in the integrator, which leads to a certain degree of flexibility in input level. However, there is also a need for flexibility in more parameters.
  • the invention provides such a sigma-delta modulator, wherein the feedback circuit has an adjustable feedback factor and wherein the sigma-delta modulator includes an adjusting member for adjusting the feedback factor of the feedback circuit.
  • the feedback circuit includes an attenuator which is adjustable by the adjusting member. This feature provides in a easy implement and easy to understand configuration.
  • the adjustable attenuator concludes switched capacitors.
  • Capacitors can be implemented more easily in an integrated circuit than resistors, so that this structure leads to less surface area on the chip, which results in lower costs.
  • Another embodiment has the features that the feedback circuit, the adder and the integrator are combined to a united circuit and the united circuit includes at least one adjustable current source connected to the common contact of a switch having two other contacts connected each to one terminal of a capacitor which performs the integrating function of the integrator, the switch being controlled by the D/A-converter and the adjusting member being operable to adjust the magnitude of the current delivered by said current source.
  • Stability of sigma-delta modulators can be a problem in modulators with high closed loop gains. This may also be the case with the present invention when the feedback loop factor is increased. This increase may lead to such a high closed loop gain that the system becomes marginally stable or unstable.
  • a preferred embodiment is characterized in that the gain of the combination of the integrator and the quantizer is adjustable.
  • control can be simplified when, as proposed in another preferred embodiment, the gain of the combination of the integrator and the quantizer is adjustable by the control member.
  • the control of the gain of the feedback loop can then be related to the control of the gain of the rest of the closed loop. A particular adjustment strategy can then be used to avoid potentially instable situations.
  • an adjustment strategy is that the adjustment member is operable to control the gain of the combination of the integrator and the quantizer in such a manner that the product of their individual gain factors is constant. This strategy automatically ensures stability if the product is chosen small enough.
  • the preceding embodiments all relate to the adjustability of the gain factors, i.e. the situation in which the adjustments are made and are fixed during the production of the integrated circuit containing the components of the sigma-delta converter, or shortly thereafter during an initialization procedure.
  • the invention is, however, not limited to such a situation; it is very well possible to adjust the gain also during actual use of the circuits.
  • the word 'control' is used instead of the word 'adjustment'. Therefore, in a preferred embodiment the adjusting member is adapted to continuously control the feedback factor of the feedback loop. This feature relates to the situation in which only the gain of the feedback loop is controlled. However, this feature is also applicable in a situation in which the overall closed-loop gain is also controlled.
  • the feature that the adjusting member is adapted to continuously control the gain of the combination of the integrator and the quantizer can then be used.
  • Fig. 1 shows a diagram of a sigma delta-modulator according to the principles of the invention
  • Fig. 2 shows a diagram of a first embodiment of a sigma-delta modulator according to the invention
  • Fig. 3 shows a diagram of a second embodiment of a sigma-delta modulator according to the invention.
  • Fig. 4 shows a diagram of a third embodiment a sigma-delta modulator according to the invention.
  • Fig. 1 shows a diagram of a sigma delta modulator 1 comprising an integrator
  • the invention provides an adjustment of the feedback factor of the feedback loop, which in the present case includes the D/A-converter 4 and the adder 5.
  • the adjustment is achieved by means of an adjustment member 6, which controls the gain of the D/A- converter 4. It is, however, also possible to control the gain of the feedback branch of the adder 5. This can be achieved, for example, by incorporating an attenuator in said adder or in the analog part of the D/A-converter.
  • Fig. 2 shows a diagram of a sigma-delta modulator similar to the sigma-delta modulator shown in FigJ.
  • the embodiment shown in Fig. 2 includes a separate attenuator circuit 7 in order to perform the adjustment function.
  • the attenuator can be formed by means of a switchable resistor network, but also, as shown, by a switched capacitor network.
  • Such a network comprises a capacitor 8, and four switches formed by FETs 9a, 9b, 9c and 9d.
  • the FETs are controlled in pairs 9a, 9c and 9b, 9d so that the capacitor 8 is alternately charged and discharged.
  • the ratio between the periods of charging and discharging defines the attenuation factor.
  • the adjustment circuit 6 supplies suitable driving signals to the FETs. In this case the adjustment circuit may also work only initially or continuously.
  • Fig. 3 shows a second embodiment in which the functions of the D/A- converter, the adder and the integrator are all combined in a single circuit 10.
  • This circuit 10 comprises a capacitor 11 and a switch 12, which can be formed by means of a pair of FETs or other switching elements.
  • the capacitor 11 is connected between the contacts 12a and 12b of the switch 12, and these contacts are connected to the inputs of an operational amplifier 13.
  • the switch 12 is controlled by the digital signal BTSTRM present on the output of the quantizer 3.
  • the common contact 12c of the switch 12 is connected to a current source 14. As such, said circuit is known from prior art.
  • the current source 14 is a controllable current source, which makes it possible to adjust or to control the current to the switch 12 and thus the current for charging or discharging the capacitor 11.
  • the current determines the charge collected on the capacitor 11 and hence the voltage thereon, which is fed to the inputs of the operational amplifier 13.
  • feedback factor is controlled by adjustment or control of the current of the current source 14.
  • the current source can be divided into a number of current sources, which can each be connected to the switch 12 through a controllable switch. By adjustment or control of these controllable switches, adjustment or control of the feedback factor can be achieved.
  • Fig. 4 An embodiment of such a configuration is shown in Fig. 4.
  • the contact 12c of the switch 12 is connected to a first current source 15, which supplies a current having a magnitude of 41, which is a bias current to keep the system working.
  • this contact 12c is connected to a contact 16a of a first control switch 16, whose contact 16c is connected to a second current source 17, which supplies a current having a magnitude of 21.
  • the switches can be formed by FETs or other switching components.
  • the other contact 16b of the first control switch 16 is connected to the drain of a FET 18, which functions as an input element of the operational amplifier of the integrator. The current coming from the current source 17 will flow to the capacitor 11 or to the FET 18, depending on the position of the switch 16.
  • a third current source 20 has been provided, which fulfills a role similar to that of the second current source 17. Therefore, it is connected to the fixed contact 19c of a second control switch 19 which, just like the first control switch 16, is connected to the capacitor 11 and the FET 18. This second switch 19 provides another possibility of controlling the magnitude of the current for charging or discharging the capacitor 11.
  • a fourth current source 21 has been supplies, which provides a bias current to the FET 18. It is, in principle, possible to make the magnitude of the current of any of the current sources 15, 17 or 20 controllable, but usually sufficient flexibility is obtained by switching the fixed currents.
  • the circuit of Fig. 4 is a symmetric configuration. Therefore, the components 16,17,18,19,20 and 21 have counterparts on the 'other side' of the circuit. The function thereof will be clear.
  • the circuit also provides adjustability of the input gain by means of resistors 23, 24 and 25 connected in series between the FET 18 and a bias current source 30. These resistors can be short-circuited by switches 26, 27 and 28, so as to obtain different levels of attenuation. Again, the components 23 to 28 have counterparts on the other side of the circuit, hi this way a double possibility of adjustment and control of signal levels is obtained.

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Semiconductor Lasers (AREA)
  • Oscillators With Electromechanical Resonators (AREA)

Abstract

In a sigma-delta modulator the feedback circuit (4, 5) has an adjustable feedback factor controlled by an adjusting member (6) for adjusting the feedback factor of the feedback circuit.

Description

Sigma-delta modulator with an adjustable feedback factor
The invention relates to a sigma-delta modulator, comprising: an integrator, a quantizer connected to an output of the integrator, a feedback circuit comprising a D/A-converter having an input connected to an output of the quantizer, and an adder having an output connected to an input of the integrator and having a first input which forms the input of the sigma-delta modulator and having a second input connected to an output of the feedback circuit.
Such sigma-delta modulators are generally known but particularly from the article: "A 0.2 mW CMOS ΣΔModulator for Speech Coding with 80 dB Dynamic Range.", IEEE Journal of Solid-State Circuits, vol. 31,No.l2, December 1996. Due to the increasing use of these circuits in a wide field of applications, a need has developed for circuits which are flexible in terms of input level, gain, process parameters, etc. From the document above it is known to vary the input level by switching of resistors in the integrator, which leads to a certain degree of flexibility in input level. However, there is also a need for flexibility in more parameters. Therefore, the invention provides such a sigma-delta modulator, wherein the feedback circuit has an adjustable feedback factor and wherein the sigma-delta modulator includes an adjusting member for adjusting the feedback factor of the feedback circuit. These features provide adjustability of the feedback factor, which leads to a substantially better adaptability to different applications. According to a first preferred embodiment the feedback circuit includes an attenuator which is adjustable by the adjusting member. This feature provides in a easy implement and easy to understand configuration.
According to a second preferred embodiment the adjustable attenuator concludes switched capacitors. Capacitors can be implemented more easily in an integrated circuit than resistors, so that this structure leads to less surface area on the chip, which results in lower costs.
Another embodiment has the features that the feedback circuit, the adder and the integrator are combined to a united circuit and the united circuit includes at least one adjustable current source connected to the common contact of a switch having two other contacts connected each to one terminal of a capacitor which performs the integrating function of the integrator, the switch being controlled by the D/A-converter and the adjusting member being operable to adjust the magnitude of the current delivered by said current source.
The use of a united circuit with a switch and a current source is known in this field. It provides an attractive solution for all these functions with a limited number of components. This embodiment combines these advantages with the advantages of the invention. This combination is only possible by the use of adjustable current sources, which can be realised easily.
Although other solutions, such as gradually controllable current sources are possible, an exceptionally easy solution is obtained when the current source is composed of a number of partial current sources each connected to the common contact of the switch through respective further switches which are controllable by the adjusting member. Even with a limited number of switches a wide range of currents can be controlled, which leads to a wide control range. This range can even be enlarged or refined when the current sources have mutually different current values. It is, however, also possible to use this feature to limit the number of current sources and switches.
Stability of sigma-delta modulators can be a problem in modulators with high closed loop gains. This may also be the case with the present invention when the feedback loop factor is increased. This increase may lead to such a high closed loop gain that the system becomes marginally stable or unstable.
To avoid such an undesired situation, a preferred embodiment is characterized in that the gain of the combination of the integrator and the quantizer is adjustable. These features provide an extra possibility of controlling the overall closed-loop gain so as to avoid instability.
Furthermore, control can be simplified when, as proposed in another preferred embodiment, the gain of the combination of the integrator and the quantizer is adjustable by the control member. The control of the gain of the feedback loop can then be related to the control of the gain of the rest of the closed loop. A particular adjustment strategy can then be used to avoid potentially instable situations.
An example of such an adjustment strategy is that the adjustment member is operable to control the gain of the combination of the integrator and the quantizer in such a manner that the product of their individual gain factors is constant. This strategy automatically ensures stability if the product is chosen small enough.
The preceding embodiments all relate to the adjustability of the gain factors, i.e. the situation in which the adjustments are made and are fixed during the production of the integrated circuit containing the components of the sigma-delta converter, or shortly thereafter during an initialization procedure.
The invention is, however, not limited to such a situation; it is very well possible to adjust the gain also during actual use of the circuits. In such a situation the word 'control' is used instead of the word 'adjustment'. Therefore, in a preferred embodiment the adjusting member is adapted to continuously control the feedback factor of the feedback loop. This feature relates to the situation in which only the gain of the feedback loop is controlled. However, this feature is also applicable in a situation in which the overall closed-loop gain is also controlled. The feature that the adjusting member is adapted to continuously control the gain of the combination of the integrator and the quantizer can then be used.
The present invention will be elucidated with reference to the accompanying drawings, in which: Fig. 1 shows a diagram of a sigma delta-modulator according to the principles of the invention;
Fig. 2 shows a diagram of a first embodiment of a sigma-delta modulator according to the invention;
Fig. 3 shows a diagram of a second embodiment of a sigma-delta modulator according to the invention; and
Fig. 4 shows a diagram of a third embodiment a sigma-delta modulator according to the invention.
Fig. 1 shows a diagram of a sigma delta modulator 1 comprising an integrator
2, which is used here as a low-pass filter, a quantizer 3, a D/A-converter (digital-to-analog converter) 4 and an adder 5. Such a sigma-delta modulator is known from the prior art, and its operation is well known. The invention provides an adjustment of the feedback factor of the feedback loop, which in the present case includes the D/A-converter 4 and the adder 5. The adjustment is achieved by means of an adjustment member 6, which controls the gain of the D/A- converter 4. It is, however, also possible to control the gain of the feedback branch of the adder 5. This can be achieved, for example, by incorporating an attenuator in said adder or in the analog part of the D/A-converter. It is, however, also possible to use a D/A-converter which allows the adaptation of the intrinsic conversion factor between the digital and the analogue signal. As stated before, the initial adjustment may be replaced by a continuous control. Fig. 2 shows a diagram of a sigma-delta modulator similar to the sigma-delta modulator shown in FigJ. The embodiment shown in Fig. 2 includes a separate attenuator circuit 7 in order to perform the adjustment function. The attenuator can be formed by means of a switchable resistor network, but also, as shown, by a switched capacitor network. Such a network comprises a capacitor 8, and four switches formed by FETs 9a, 9b, 9c and 9d. The FETs are controlled in pairs 9a, 9c and 9b, 9d so that the capacitor 8 is alternately charged and discharged. The ratio between the periods of charging and discharging defines the attenuation factor. To control the FETs and thus the attenuation ratio, the adjustment circuit 6 supplies suitable driving signals to the FETs. In this case the adjustment circuit may also work only initially or continuously. Fig. 3 shows a second embodiment in which the functions of the D/A- converter, the adder and the integrator are all combined in a single circuit 10. This circuit 10 comprises a capacitor 11 and a switch 12, which can be formed by means of a pair of FETs or other switching elements. The capacitor 11 is connected between the contacts 12a and 12b of the switch 12, and these contacts are connected to the inputs of an operational amplifier 13. The switch 12 is controlled by the digital signal BTSTRM present on the output of the quantizer 3. The common contact 12c of the switch 12 is connected to a current source 14. As such, said circuit is known from prior art.
According to the invention the current source 14 is a controllable current source, which makes it possible to adjust or to control the current to the switch 12 and thus the current for charging or discharging the capacitor 11. The current determines the charge collected on the capacitor 11 and hence the voltage thereon, which is fed to the inputs of the operational amplifier 13. Thus, feedback factor is controlled by adjustment or control of the current of the current source 14. There are numerous possibilities of adjusting or to controlling the current of the current source, for example, by analog control through transistors. Another possibility is the use of a digital control. For this purpose, the current source can be divided into a number of current sources, which can each be connected to the switch 12 through a controllable switch. By adjustment or control of these controllable switches, adjustment or control of the feedback factor can be achieved.
An embodiment of such a configuration is shown in Fig. 4. Herein the contact 12c of the switch 12 is connected to a first current source 15, which supplies a current having a magnitude of 41, which is a bias current to keep the system working. Furthermore, this contact 12c is connected to a contact 16a of a first control switch 16, whose contact 16c is connected to a second current source 17, which supplies a current having a magnitude of 21. The switches can be formed by FETs or other switching components. The other contact 16b of the first control switch 16 is connected to the drain of a FET 18, which functions as an input element of the operational amplifier of the integrator. The current coming from the current source 17 will flow to the capacitor 11 or to the FET 18, depending on the position of the switch 16.
A third current source 20 has been provided, which fulfills a role similar to that of the second current source 17. Therefore, it is connected to the fixed contact 19c of a second control switch 19 which, just like the first control switch 16, is connected to the capacitor 11 and the FET 18. This second switch 19 provides another possibility of controlling the magnitude of the current for charging or discharging the capacitor 11.
Furthermore, a fourth current source 21 has been supplies, which provides a bias current to the FET 18. It is, in principle, possible to make the magnitude of the current of any of the current sources 15, 17 or 20 controllable, but usually sufficient flexibility is obtained by switching the fixed currents.
The circuit of Fig. 4 is a symmetric configuration. Therefore, the components 16,17,18,19,20 and 21 have counterparts on the 'other side' of the circuit. The function thereof will be clear.
Finally, the circuit also provides adjustability of the input gain by means of resistors 23, 24 and 25 connected in series between the FET 18 and a bias current source 30. These resistors can be short-circuited by switches 26, 27 and 28, so as to obtain different levels of attenuation. Again, the components 23 to 28 have counterparts on the other side of the circuit, hi this way a double possibility of adjustment and control of signal levels is obtained.

Claims

CLAIMS:
1. A sigma-delta modulator, comprising: an integrator, a quantizer connected to an output of the integrator, a feedback circuit comprising a D/A-converter having an input connected to an output of the quantizer, and an adder having an output connected to an input of the integrator and having a first input which forms the input of the sigma-delta modulator and having a second input connected to an output of the feedback circuit, characterized in that the feedback circuit has an adjustable feedback factor and the sigma-delta modulator includes an adjusting member for adjusting the feedback factor of the feedback circuit.
2. A sigma-delta modulator as claimed in claim 1, characterized in that the feedback circuit includes an attenuator which is adjustable by the adjusting member.
3. A sigma-delta modulator as claimed in claim 2, characterized in that the adjustable attenuator includes switched capacitors.
4. A sigma-delta modulator as claimed in claim 1 , characterized in that the feedback circuit, the adder and the integrator are combined to a united circuit and the united circuit includes at least one adjustable current source connected to the common contact of a switch having two other contacts connected each to one terminal of a capacitor which performs the integrating function of the integrator, the switch being controlled by the D/A- converter and the adjusting member being operable to adjust the magnitude of the current delivered by said current source.
5. A sigma-delta modulator as claimed in claim 4, characterized in that the current source is composed of a number of partial current sources each connected to the common contact of the switch through respective further switches which are controllable by the adjusting member.
6. A sigma-delta modulator as claimed in claim 5, characterized in that the current sources have mutually different current values.
7. A sigma-delta modulator as claimed in claim 1, 2, 3, 4, 5 or 6, characterized in that the gain of the combination of the integrator and the quantizer is adjustable by the adjusting member
8. A sigma-delta modulator as claimed in claim 7, characterized in that the adjusting member is operable to control the gain of the combination of the integrator and the quantizer in such a manner that the product of their individual gain factors is constant.
9. A sigma-delta modulator as claimed in claim 1, 2, 3, 4, 5, 6, 7 or 8, characterized in that the adjusting member is operable to continuously control the feedback factor of the feedback loop.
10. A sigma-delta modulator as claimed in claim 1, 8 or 9, characterized in that the adjusting member is operable to continuously control the gain of the combination of the integrator and the quantizer.
PCT/EP2001/007232 2000-07-07 2001-06-26 Sigma-delta modulator with an adjustable feedback factor Ceased WO2002005432A2 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
DE60124318T DE60124318T2 (en) 2000-07-07 2001-06-26 SIGMA-DELTA MODULATOR WITH ADJUSTABLE FEEDBACK FACTOR
KR1020027002954A KR20020035586A (en) 2000-07-07 2001-06-26 Sigma-delta modulator with an adjustable feedback factor
JP2002509178A JP2004503167A (en) 2000-07-07 2001-06-26 Adjustable feedback element
CN018019420A CN1547804B (en) 2000-07-07 2001-06-26 Sigma-delta modulator with an adjustable feedback factor
EP01962781A EP1374409B1 (en) 2000-07-07 2001-06-26 Sigma-delta modulator with an adjustable feedback factor

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP00202425.5 2000-07-07
EP00202425 2000-07-07

Publications (2)

Publication Number Publication Date
WO2002005432A2 true WO2002005432A2 (en) 2002-01-17
WO2002005432A3 WO2002005432A3 (en) 2003-10-16

Family

ID=8171768

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/EP2001/007232 Ceased WO2002005432A2 (en) 2000-07-07 2001-06-26 Sigma-delta modulator with an adjustable feedback factor

Country Status (8)

Country Link
US (1) US6507301B2 (en)
EP (1) EP1374409B1 (en)
JP (1) JP2004503167A (en)
KR (1) KR20020035586A (en)
CN (1) CN1547804B (en)
AT (1) ATE344549T1 (en)
DE (1) DE60124318T2 (en)
WO (1) WO2002005432A2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100380814C (en) * 2002-08-09 2008-04-09 索尼株式会社 Digital signal processing device and digital signal processing method
US7443349B2 (en) 2004-08-09 2008-10-28 Nec Corporation Radio communication device
US20130082179A1 (en) * 2010-07-01 2013-04-04 Panasonic Corporation Object detection device

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8232582B2 (en) * 2000-04-24 2012-07-31 Life Technologies Corporation Ultra-fast nucleic acid sequencing device and a method for making and using the same
EP1239575A3 (en) * 2001-03-08 2003-11-05 Shindengen Electric Manufacturing Company, Limited DC stabilised power supply
AU2002358243A1 (en) * 2002-01-30 2003-09-02 Koninklijke Philips Electronics N.V. Electronic circuit with a sigma delta a/d converter
DE10247133B4 (en) * 2002-10-09 2009-12-31 Infineon Technologies Ag Controlled current source, in particular for digital-to-analog converters in continuous-time sigma-delta modulators
DE10327621B4 (en) * 2003-06-18 2009-10-15 Infineon Technologies Ag Circuit arrangement and method for reducing an adaptation error in a sigma-delta modulator
DE102004007207B4 (en) * 2004-02-13 2008-03-27 Albert-Ludwigs-Universität Freiburg, vertreten durch den Rektor Method for characterizing and automatically correcting linear errors in analog-to-digital converters
DE102004009611B4 (en) * 2004-02-27 2010-01-14 Infineon Technologies Ag Time-continuous sigma-delta analog-to-digital converter
US7268715B2 (en) * 2004-10-29 2007-09-11 Freescale Semiconductor, Inc. Gain control in a signal path with sigma-delta analog-to-digital conversion
DE602005017827D1 (en) 2005-04-15 2009-12-31 Semtech Internat Ag ELECTRONIC SWITCHING FOR THE ANALOG / DIGITAL IMPLEMENTATION OF AN ANALOG INPUT SIGNAL
WO2008023710A1 (en) * 2006-08-23 2008-02-28 Asahi Kasei Emd Corporation Delta-sigma modulator
KR100804645B1 (en) * 2006-11-07 2008-02-20 삼성전자주식회사 Continuous Time Delta Sigma Modulator with Self-Blocking Current-Mode Digital-to-Analog Converter
US7414557B2 (en) * 2006-12-15 2008-08-19 Telefonaktiebolaget Lm Ericsson (Publ) Method and apparatus for feedback signal generation in sigma-delta analog-to-digital converters
US7362252B1 (en) * 2007-01-25 2008-04-22 Mstar Semiconductor, Inc. Bandwidth tunable sigma-delta ADC modulator
CN101267413B (en) * 2008-03-18 2011-04-27 北京天碁科技有限公司 RF transmission method and system and vibration wave generator, sigma-delta modulator and mobile terminal
KR101042989B1 (en) * 2009-02-27 2011-06-21 서울대학교산학협력단 Delta Sigma Analog-to-Digital Converter
TW201218644A (en) * 2010-10-26 2012-05-01 Ping-Ying Wang Voltage converter
JP5696508B2 (en) * 2011-02-04 2015-04-08 ソニー株式会社 ΔΣ modulator and signal processing system
EP2498400A1 (en) * 2011-03-11 2012-09-12 Dialog Semiconductor GmbH A delta-sigma modulator approach to increased amplifier gain resolution
US8847803B2 (en) * 2011-09-09 2014-09-30 Mstar Semiconductor, Inc. Parallel multibit digital-to-digital sigma-delta modulation
US9160356B1 (en) * 2014-07-17 2015-10-13 Analog Devices Global Analog to digital convertor and a method of calibrating same
CN110658879B (en) * 2018-06-28 2021-10-29 硅谷介入有限公司 Apparatus for improving performance of sigma delta modulator

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4009475A (en) * 1974-12-05 1977-02-22 Hybrid Systems Corporation Delta-sigma converter and decoder
US4439756A (en) * 1982-01-20 1984-03-27 International Telephone And Telegraph Corporation Delta-Sigma modulator with switch capacitor implementation
US4504803A (en) * 1982-06-28 1985-03-12 Gte Lenkurt, Incorporated Switched capacitor AM modulator/demodulator
BE899174A (en) * 1984-03-16 1984-09-17 Bell Telephone Mfg FEEDBACK CONTROL CHAIN AND SWITCHED SWITCHES AND SIGMA-DELTA MODULATOR IN WHICH IT IS APPLIED.
JP3039809B2 (en) * 1990-05-31 2000-05-08 株式会社日立製作所 Analog / digital converter, sampling pulse generation circuit, and current switch circuit
FI96649C (en) * 1994-06-07 1996-07-25 Fincitec Oy Oversampled higher order modulator

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100380814C (en) * 2002-08-09 2008-04-09 索尼株式会社 Digital signal processing device and digital signal processing method
US7443349B2 (en) 2004-08-09 2008-10-28 Nec Corporation Radio communication device
US20130082179A1 (en) * 2010-07-01 2013-04-04 Panasonic Corporation Object detection device
US9212951B2 (en) * 2010-07-01 2015-12-15 Panasonic Intellectual Property Management Co., Ltd. Object detection device

Also Published As

Publication number Publication date
DE60124318D1 (en) 2006-12-14
JP2004503167A (en) 2004-01-29
DE60124318T2 (en) 2007-05-24
US20020011945A1 (en) 2002-01-31
KR20020035586A (en) 2002-05-11
EP1374409B1 (en) 2006-11-02
US6507301B2 (en) 2003-01-14
CN1547804B (en) 2012-08-29
EP1374409A2 (en) 2004-01-02
CN1547804A (en) 2004-11-17
WO2002005432A3 (en) 2003-10-16
ATE344549T1 (en) 2006-11-15

Similar Documents

Publication Publication Date Title
US6507301B2 (en) Sigma-delta modulator with an adjustable feedback factor
KR100667957B1 (en) Sigma-delta modulators with variable order, and receivers and integrated circuits including such sigma-delta modulators
EP0954107B1 (en) Sigma-delta modulator and digitizing method
US6693573B1 (en) Mixed technology MEMS/BiCMOS LC bandpass sigma-delta for direct RF sampling
US6642873B1 (en) Multi-level D/A converter incorporated with multi-level quantizer in multi-bit sigma-delta A/D converter
EP0486332B1 (en) Operational amplifier
US7061416B2 (en) Adaptive-type sigma-delta A/D converter
US20020105449A1 (en) Multi-bit sigma-delta analog to digital converter with a variable full scale
EP1579570A2 (en) Delta-sigma amplifiers with output stage supply voltage variation compensation and methods and digital amplifier systems using the same
US6697001B1 (en) Continuous-time sigma-delta modulator with discrete time common-mode feedback
KR20040048988A (en) Operational amplifier with chopped input transistor pair
KR20090109454A (en) Continuous Time Delta-Sigma Modulator
EP0737381A1 (en) A gain controllable amplifier, a receiver comprising a gain-controllable amplifier, and a method of controlling signal amplitudes
KR100298562B1 (en) Linear attenuator for current-mode digital-to-analog converters and digital-to-analog converter
US5825250A (en) Operational amplifier having an adjustable frequency compensation
US7719339B2 (en) Circuit arrangement and method for limiting a signal voltage
KR100219969B1 (en) 3-Level Digital-to-Analog Converter and How to Convert a Digital Signal to an Analog Signal
US20220352857A1 (en) Transimpedance amplifier circuit
US20060164274A1 (en) Cascade-type variable-order delta-sigma modulator
CN110113017B (en) Variable gain amplifier device and power system
JP2000332553A (en) 1-bit digital amplifier
JP7729064B2 (en) Transimpedance Amplifier Circuit
GB2457010A (en) Automatic gain control for delta sigma modulators
JP2002076780A (en) Power amplifier circuit output power adjustment method and power amplifier circuit
SE518012C2 (en) Sigma-Delta Modulator in front receiver and A / D converter including such and a method for signal processing

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A2

Designated state(s): CN JP KR

AL Designated countries for regional patents

Kind code of ref document: A2

Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE TR

ENP Entry into the national phase

Ref country code: JP

Ref document number: 2002 509178

Kind code of ref document: A

Format of ref document f/p: F

WWE Wipo information: entry into national phase

Ref document number: 018019420

Country of ref document: CN

Ref document number: 1020027002954

Country of ref document: KR

121 Ep: the epo has been informed by wipo that ep was designated in this application
WWP Wipo information: published in national office

Ref document number: 1020027002954

Country of ref document: KR

WWE Wipo information: entry into national phase

Ref document number: 2001962781

Country of ref document: EP

WWP Wipo information: published in national office

Ref document number: 2001962781

Country of ref document: EP

WWG Wipo information: grant in national office

Ref document number: 2001962781

Country of ref document: EP