WO2002045137A3 - Reduced edge contact wafer handling system and method of retrofitting and using same - Google Patents

Reduced edge contact wafer handling system and method of retrofitting and using same Download PDF

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Publication number
WO2002045137A3
WO2002045137A3 PCT/US2002/001545 US0201545W WO0245137A3 WO 2002045137 A3 WO2002045137 A3 WO 2002045137A3 US 0201545 W US0201545 W US 0201545W WO 0245137 A3 WO0245137 A3 WO 0245137A3
Authority
WO
WIPO (PCT)
Prior art keywords
wafer
area
chucks
chuck
retrofitting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/US2002/001545
Other languages
French (fr)
Other versions
WO2002045137A2 (en
Inventor
Stephen D Coomer
Stanislaw Kopacz
Glyn Reynolds
Michael James Lombardi
Todd Michael Visconti
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Electron Ltd
Tokyo Electron Arizona Inc
Original Assignee
Tokyo Electron Ltd
Tokyo Electron Arizona Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Ltd, Tokyo Electron Arizona Inc filed Critical Tokyo Electron Ltd
Priority to JP2002547208A priority Critical patent/JP4060185B2/en
Priority to AU2002236801A priority patent/AU2002236801A1/en
Priority to EP02703165A priority patent/EP1340246A2/en
Publication of WO2002045137A2 publication Critical patent/WO2002045137A2/en
Publication of WO2002045137A3 publication Critical patent/WO2002045137A3/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/76Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using mechanical means, e.g. clamps or pinches
    • H10P72/7604Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using mechanical means, e.g. clamps or pinches the wafers being placed on a susceptor, stage or support
    • H10P72/7608Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using mechanical means, e.g. clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a plurality of separate clamping members, e.g. clamping fingers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/76Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using mechanical means, e.g. clamps or pinches
    • H10P72/7602Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using mechanical means, e.g. clamps or pinches the wafers being placed on a robot blade or gripped by a gripper for conveyance
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S414/00Material or article handling
    • Y10S414/135Associated with semiconductor wafer handling
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S414/00Material or article handling
    • Y10S414/135Associated with semiconductor wafer handling
    • Y10S414/139Associated with semiconductor wafer handling including wafer charging or discharging means for vacuum chamber
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S414/00Material or article handling
    • Y10S414/135Associated with semiconductor wafer handling
    • Y10S414/14Wafer cassette transporting

Landscapes

  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

A wafer handling system (200) and a method of retrofitting the system to an existing wafer handling apparatus (100) are provided that make possible a method of handling wafers (35) by contacting only a narrow area (202) of not more than two millimeters wide adjacent the edge of the wafer, which is particularly useful for backside deposition where device side contact defines an area of exclusion (202) that renders the wafer unusable in that area. The system (200) provides a chuck (201) on a wafer transfer arm (212) that holds a wafer by gravity on a segmented, upwardly facing annular surface (207, 208). A compatible annular surface (223) is provided on an aligning station chuck (216) so that wafers can be transferred by contact only with the exclusion area (202) of the wafer surface. A load arm (260) has two similarly compatible chucks (259) further provided with pneumatically actuated grippers (270) to allow the wafer to be loaded into a vertical processing apparatus (10). The wafer chucks (201, 216, 259) are retrofitted into a processing apparatus (100) in place of vacuum chucks and the vacuum lines that were provided to activate them are used for wafer detection. The electrical signals that were provided for vacuum chuck commands are utilized to actuate the grippers (270) on the transfer arm (260) so that no control software and little hardware need be altered for the retrofit.
PCT/US2002/001545 2000-11-29 2001-11-20 Reduced edge contact wafer handling system and method of retrofitting and using same Ceased WO2002045137A2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2002547208A JP4060185B2 (en) 2000-11-29 2001-11-20 Wafer handling system with reduced edge contact, modification method and use thereof
AU2002236801A AU2002236801A1 (en) 2000-11-29 2001-11-20 Reduced edge contact wafer handling system and method of retrofitting and using same
EP02703165A EP1340246A2 (en) 2000-11-29 2001-11-20 Reduced edge contact wafer handling system and method of retrofitting and using same

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/725,823 US6692219B2 (en) 2000-11-29 2000-11-29 Reduced edge contact wafer handling system and method of retrofitting and using same
US09/725,823 2000-11-29

Publications (2)

Publication Number Publication Date
WO2002045137A2 WO2002045137A2 (en) 2002-06-06
WO2002045137A3 true WO2002045137A3 (en) 2003-03-20

Family

ID=24916099

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2002/001545 Ceased WO2002045137A2 (en) 2000-11-29 2001-11-20 Reduced edge contact wafer handling system and method of retrofitting and using same

Country Status (7)

Country Link
US (1) US6692219B2 (en)
EP (1) EP1340246A2 (en)
JP (1) JP4060185B2 (en)
CN (1) CN1481577A (en)
AU (1) AU2002236801A1 (en)
TW (1) TW511136B (en)
WO (1) WO2002045137A2 (en)

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US7319335B2 (en) 2004-02-12 2008-01-15 Applied Materials, Inc. Configurable prober for TFT LCD array testing
US7330021B2 (en) 2004-02-12 2008-02-12 Applied Materials, Inc. Integrated substrate transfer module
US7355418B2 (en) 2004-02-12 2008-04-08 Applied Materials, Inc. Configurable prober for TFT LCD array test
US7535238B2 (en) 2005-04-29 2009-05-19 Applied Materials, Inc. In-line electron beam test system
US7569818B2 (en) 2006-03-14 2009-08-04 Applied Materials, Inc. Method to reduce cross talk in a multi column e-beam test system
US7602199B2 (en) 2006-05-31 2009-10-13 Applied Materials, Inc. Mini-prober for TFT-LCD testing

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US9837295B2 (en) 2010-04-15 2017-12-05 Suss Microtec Lithography Gmbh Apparatus and method for semiconductor wafer leveling, force balancing and contact sensing
US9859141B2 (en) 2010-04-15 2018-01-02 Suss Microtec Lithography Gmbh Apparatus and method for aligning and centering wafers
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KR102245762B1 (en) * 2014-04-17 2021-04-27 어플라이드 머티어리얼스, 인코포레이티드 Holder, carrier having the same, and method for fixing a substrate
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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7319335B2 (en) 2004-02-12 2008-01-15 Applied Materials, Inc. Configurable prober for TFT LCD array testing
US7330021B2 (en) 2004-02-12 2008-02-12 Applied Materials, Inc. Integrated substrate transfer module
US7355418B2 (en) 2004-02-12 2008-04-08 Applied Materials, Inc. Configurable prober for TFT LCD array test
US7535238B2 (en) 2005-04-29 2009-05-19 Applied Materials, Inc. In-line electron beam test system
US7569818B2 (en) 2006-03-14 2009-08-04 Applied Materials, Inc. Method to reduce cross talk in a multi column e-beam test system
US7602199B2 (en) 2006-05-31 2009-10-13 Applied Materials, Inc. Mini-prober for TFT-LCD testing

Also Published As

Publication number Publication date
TW511136B (en) 2002-11-21
JP4060185B2 (en) 2008-03-12
US6692219B2 (en) 2004-02-17
WO2002045137A2 (en) 2002-06-06
US20020064450A1 (en) 2002-05-30
CN1481577A (en) 2004-03-10
AU2002236801A1 (en) 2002-06-11
EP1340246A2 (en) 2003-09-03
JP2004515073A (en) 2004-05-20

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