WO2002050664A3 - Logical substitution of processor control in an emulated computing environment - Google Patents

Logical substitution of processor control in an emulated computing environment Download PDF

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Publication number
WO2002050664A3
WO2002050664A3 PCT/US2001/049217 US0149217W WO0250664A3 WO 2002050664 A3 WO2002050664 A3 WO 2002050664A3 US 0149217 W US0149217 W US 0149217W WO 0250664 A3 WO0250664 A3 WO 0250664A3
Authority
WO
WIPO (PCT)
Prior art keywords
processor
operating system
settings
computing environment
emulated computing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/US2001/049217
Other languages
French (fr)
Other versions
WO2002050664A2 (en
Inventor
Eric P Traut
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Connectix Corp
Original Assignee
Connectix Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US09/747,492 external-priority patent/US7085705B2/en
Application filed by Connectix Corp filed Critical Connectix Corp
Priority to DE60141173T priority Critical patent/DE60141173D1/en
Priority to EP01991342A priority patent/EP1410170B1/en
Priority to AU2002231073A priority patent/AU2002231073A1/en
Priority to JP2002551693A priority patent/JP4316882B2/en
Priority to AT01991342T priority patent/ATE456087T1/en
Publication of WO2002050664A2 publication Critical patent/WO2002050664A2/en
Anticipated expiration legal-status Critical
Publication of WO2002050664A3 publication Critical patent/WO2002050664A3/en
Ceased legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/455Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45533Hypervisors; Virtual machine monitors
    • G06F9/45558Hypervisor-specific management and integration aspects
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/455Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45533Hypervisors; Virtual machine monitors
    • G06F9/45558Hypervisor-specific management and integration aspects
    • G06F2009/45583Memory management, e.g. access or allocation

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Multi Processors (AREA)

Abstract

In an emulated computing environment, a method is provided for logically decoupling the host operating system from the processor of the computer system with respect to certain processor settings of the processor. A hypervisor of the emulation program replaces some of the processor settings of the processor with processor settings associated with software routines or data structures provided by the guest operating system. During this period, when the processor calls a software routine or accesses a data structure associated with the replaced processor setting, the processor will call or access a software routine or access a data structure associated with the guest operating system, bypassing the host operating system and communicating directly with the guest operating system. When the host operating system is to be recoupled to the processor, the processor settings that have been saved to memory are rewritten to the appropriate registers of the processor.
PCT/US2001/049217 2000-12-21 2001-12-19 Logical substitution of processor control in an emulated computing environment Ceased WO2002050664A2 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
DE60141173T DE60141173D1 (en) 2000-12-21 2001-12-19 LOGICAL REPLACEMENT OF PROCESSING IN A EMULATED COMPUTER ENVIRONMENT
EP01991342A EP1410170B1 (en) 2000-12-21 2001-12-19 Logical substitution of processor control in an emulated computing environment
AU2002231073A AU2002231073A1 (en) 2000-12-21 2001-12-19 Logical substitution of processor control in an emulated computing environment
JP2002551693A JP4316882B2 (en) 2000-12-21 2001-12-19 System and method for logical replacement of processor control in an emulated computing environment
AT01991342T ATE456087T1 (en) 2000-12-21 2001-12-19 LOGICAL REPLACEMENT OF PROCESSOR GUIDE IN AN EMULATED COMPUTER ENVIRONMENT

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US09/747,492 US7085705B2 (en) 2000-12-21 2000-12-21 System and method for the logical substitution of processor control in an emulated computing environment
US09/747,492 2000-12-21
US09/906,392 US7275028B2 (en) 2000-12-21 2001-07-16 System and method for the logical substitution of processor control in an emulated computing environment
US09/906,392 2001-07-16

Publications (2)

Publication Number Publication Date
WO2002050664A2 WO2002050664A2 (en) 2002-06-27
WO2002050664A3 true WO2002050664A3 (en) 2004-02-26

Family

ID=27114760

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2001/049217 Ceased WO2002050664A2 (en) 2000-12-21 2001-12-19 Logical substitution of processor control in an emulated computing environment

Country Status (4)

Country Link
EP (1) EP1410170B1 (en)
JP (1) JP4316882B2 (en)
AU (1) AU2002231073A1 (en)
WO (1) WO2002050664A2 (en)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7035963B2 (en) * 2000-12-27 2006-04-25 Intel Corporation Method for resolving address space conflicts between a virtual machine monitor and a guest operating system
EP1563376B1 (en) 2002-11-18 2006-04-12 ARM Limited Exception types within a secure processing system
US7802250B2 (en) 2004-06-28 2010-09-21 Intel Corporation Support for transitioning to a virtual machine monitor based upon the privilege level of guest software
JP4345630B2 (en) 2004-09-29 2009-10-14 ソニー株式会社 Information processing apparatus, interrupt processing control method, and computer program
JP4601577B2 (en) * 2006-05-02 2010-12-22 株式会社ソニー・コンピュータエンタテインメント Emulation device
AU2009222627B2 (en) 2008-10-09 2011-07-21 Aristocrat Technologies Australia Pty Limited Gaming system and gaming system processor module
US11385758B2 (en) 2008-10-09 2022-07-12 Aristocrat Technologies Australia Pty Limited Gaming system and gaming system processor module
AU2011205032B2 (en) * 2008-10-09 2013-12-05 Aristocrat Technologies Australia Pty Limited Gaming system and gaming system processor module
US11287939B2 (en) 2008-10-09 2022-03-29 Aristocrat Technologies Australia Pty Limited Gaming system and gaming system processor module
US11726811B2 (en) * 2021-06-18 2023-08-15 Vmware, Inc. Parallel context switching for interrupt handling

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2587519A1 (en) * 1985-09-18 1987-03-20 Nec Corp Mode-changing arrangement making it possible to selectively change operating modes of a virtual machine system
DE4217444A1 (en) * 1991-05-27 1992-12-03 Hitachi Ltd METHOD AND DEVICE FOR THE DYNAMIC TRANSFER OF VIRTUAL MACHINES IN A MAIN STORAGE

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2587519A1 (en) * 1985-09-18 1987-03-20 Nec Corp Mode-changing arrangement making it possible to selectively change operating modes of a virtual machine system
DE4217444A1 (en) * 1991-05-27 1992-12-03 Hitachi Ltd METHOD AND DEVICE FOR THE DYNAMIC TRANSFER OF VIRTUAL MACHINES IN A MAIN STORAGE

Also Published As

Publication number Publication date
EP1410170A2 (en) 2004-04-21
JP4316882B2 (en) 2009-08-19
JP2004531788A (en) 2004-10-14
EP1410170B1 (en) 2010-01-20
AU2002231073A1 (en) 2002-07-01
WO2002050664A2 (en) 2002-06-27

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