WO2003083645A3 - Procede cryptographique protege contre les attaques de type a canal cache - Google Patents

Procede cryptographique protege contre les attaques de type a canal cache Download PDF

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Publication number
WO2003083645A3
WO2003083645A3 PCT/FR2003/001058 FR0301058W WO03083645A3 WO 2003083645 A3 WO2003083645 A3 WO 2003083645A3 FR 0301058 W FR0301058 W FR 0301058W WO 03083645 A3 WO03083645 A3 WO 03083645A3
Authority
WO
WIPO (PCT)
Prior art keywords
cryptographic method
channel type
protected against
covert channel
type attacks
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/FR2003/001058
Other languages
English (en)
Other versions
WO2003083645A2 (fr
Inventor
Marc Joye
Benoit Chevallier-Mames
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Gemplus SA
Original Assignee
Gemplus Card International SA
Gemplus SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gemplus Card International SA, Gemplus SA filed Critical Gemplus Card International SA
Priority to AU2003258856A priority Critical patent/AU2003258856A1/en
Priority to DE60326707T priority patent/DE60326707D1/de
Priority to EP03740566A priority patent/EP1493078B8/fr
Priority to US10/509,876 priority patent/US7742595B2/en
Publication of WO2003083645A2 publication Critical patent/WO2003083645A2/fr
Publication of WO2003083645A3 publication Critical patent/WO2003083645A3/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
    • G06F7/72—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic
    • G06F7/724—Finite field arithmetic
    • G06F7/725—Finite field arithmetic over elliptic curves
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G06F21/75—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information by inhibiting the analysis of circuitry or operation
    • G06F21/755—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information by inhibiting the analysis of circuitry or operation with measures against power attack
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
    • G06F7/72—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic
    • G06F7/723—Modular exponentiation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/72—Indexing scheme relating to groups G06F7/72 - G06F7/729
    • G06F2207/7219—Countermeasures against side channel or fault attacks
    • G06F2207/7261—Uniform execution, e.g. avoiding jumps, or using formulae with the same power profile

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Optimization (AREA)
  • Mathematical Analysis (AREA)
  • Computational Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Software Systems (AREA)
  • Computer Security & Cryptography (AREA)
  • Executing Machine-Instructions (AREA)
  • Mobile Radio Communication Systems (AREA)
  • Storage Device Security (AREA)
  • Bidet-Like Cleaning Device And Other Flush Toilet Accessories (AREA)
  • Facsimile Transmission Control (AREA)
  • Circuits Of Receivers In General (AREA)
  • Complex Calculations (AREA)
  • Nonmetallic Welding Materials (AREA)
  • Paper (AREA)
  • Percussion Or Vibration Massage (AREA)

Abstract

L'invention concerne un procédé cryptographique sécurisé contre une attaque à canal caché. Selon l'invention, pour exécuter un bloc d'instructions choisi (Πj) en fonction d'une variable d'entrée (D1) parmi N blocs d'instructions prédéfinis (Π1, , ΠN), on exécute un nombre prédéfini (Lj) de fois un bloc commun ( (k,s)) aux N blocs d'instructions prédéfinis (Π1, , ΠN), le nombre prédéfini (Lj) étant associé au bloc d'instructions choisi (Πj).
PCT/FR2003/001058 2002-04-03 2003-04-03 Procede cryptographique protege contre les attaques de type a canal cache Ceased WO2003083645A2 (fr)

Priority Applications (4)

Application Number Priority Date Filing Date Title
AU2003258856A AU2003258856A1 (en) 2002-04-03 2003-04-03 Cryptographic method protected against covert channel type attacks
DE60326707T DE60326707D1 (de) 2002-04-03 2003-04-03 Sches verfahren
EP03740566A EP1493078B8 (fr) 2002-04-03 2003-04-03 Procédé cryptographique protégé contre les attaques de type à canal caché
US10/509,876 US7742595B2 (en) 2002-04-03 2003-04-03 Cryptographic method protected against covert channel type attacks

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR02/04117 2002-04-03
FR0204117A FR2838210B1 (fr) 2002-04-03 2002-04-03 Procede cryptographique protege contre les attaques de type a canal cache

Publications (2)

Publication Number Publication Date
WO2003083645A2 WO2003083645A2 (fr) 2003-10-09
WO2003083645A3 true WO2003083645A3 (fr) 2004-04-01

Family

ID=28052059

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/FR2003/001058 Ceased WO2003083645A2 (fr) 2002-04-03 2003-04-03 Procede cryptographique protege contre les attaques de type a canal cache

Country Status (7)

Country Link
US (1) US7742595B2 (fr)
EP (1) EP1493078B8 (fr)
AT (1) ATE426202T1 (fr)
AU (1) AU2003258856A1 (fr)
DE (1) DE60326707D1 (fr)
FR (1) FR2838210B1 (fr)
WO (1) WO2003083645A2 (fr)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE602005020702D1 (de) 2005-10-18 2010-05-27 Telecom Italia Spa Verfahren zur skalarmultiplikation in gruppen elliptischer kurven über primkörpern für nebenkanal-attacken-beständige kryptosysteme
DE602005020991D1 (de) * 2005-10-28 2010-06-10 Telecom Italia Spa Verfahren zur skalarmultiplikation in gruppen ellir nebenkanalattacken-beständige kryptosysteme
EP1949292A1 (fr) * 2005-11-04 2008-07-30 Gemplus SA. Procede securise de manipulations de donnees lors de l'execution d'algorithmes cryptographiques sur systemes embarques
US8065531B2 (en) * 2006-04-06 2011-11-22 Nxp B.V. Decryption method
EP2015171A1 (fr) * 2007-06-29 2009-01-14 Gemplus Procédé cryptographique comprenant une exponentiation modulaire sécurisée contre les attaques à canaux cachés sans la connaissance de l'exposant public, cryptoprocesseur pour la mise en oeuvre du procédé et carte à puce associée
WO2009004505A1 (fr) * 2007-07-05 2009-01-08 Nxp B.V. Microprocesseur dans un système sensible du point de vue de la sécurité
FR2947647B1 (fr) 2009-07-06 2011-08-26 Oberthur Technologies Procede de traitement de donnees et dispositif associe
FR2972064B1 (fr) * 2011-02-25 2013-03-15 Inside Secure Procede de cryptographie comprenant une operation d'exponentiation
EP2535804A1 (fr) * 2011-06-17 2012-12-19 Thomson Licensing Algorithme de mise à la puissance résistant contre des fautes
FR2997780B1 (fr) 2012-11-07 2016-01-22 Inside Secure Procede de cryptographie comprenant une operation d'exponentiation modulaire
EP2793123A1 (fr) 2013-04-16 2014-10-22 Gemalto SA Procédé d'exécution sécurisée d'une exponentiation modulaire
CN104778408B (zh) * 2015-04-15 2017-12-29 华中科技大学 一种基于Android的隐蔽通道攻击审计与侦测方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000025204A1 (fr) * 1998-10-28 2000-05-04 Certicom Corp. Cryptographie resistant aux attaques contre la signature electrique
EP1158384A1 (fr) * 2000-05-22 2001-11-28 Infineon Technologies AG Unité de traitement de données et méthode associée
WO2002099624A1 (fr) * 2001-06-07 2002-12-12 Gemplus Procede de securisation d'un calcul d'exponentiation dans un dispositif electronique

Family Cites Families (15)

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Publication number Priority date Publication date Assignee Title
US6965673B1 (en) * 1997-09-19 2005-11-15 Telcordia Technologies, Inc. Method of using transient faults to verify the security of a cryptosystem
IL139935A (en) * 1998-06-03 2005-06-19 Cryptography Res Inc Des and other cryptographic processes with leak minimization for smartcards and other cryptosystems
CA2243761C (fr) * 1998-07-21 2009-10-06 Certicom Corp. Systeme cryptographique resistant aux attaques par analyse du delai de traitement des messages
JP3600454B2 (ja) * 1998-08-20 2004-12-15 株式会社東芝 暗号化・復号装置、暗号化・復号方法、およびそのプログラム記憶媒体
US6724894B1 (en) * 1999-11-05 2004-04-20 Pitney Bowes Inc. Cryptographic device having reduced vulnerability to side-channel attack and method of operating same
TW536672B (en) * 2000-01-12 2003-06-11 Hitachi Ltd IC card and microcomputer
JP4199937B2 (ja) * 2001-03-06 2008-12-24 株式会社日立製作所 耐タンパー暗号処理方法
US7142670B2 (en) * 2001-08-14 2006-11-28 International Business Machines Corporation Space-efficient, side-channel attack resistant table lookups
JP4086503B2 (ja) * 2002-01-15 2008-05-14 富士通株式会社 暗号演算装置及び方法並びにプログラム
FR2847402B1 (fr) * 2002-11-15 2005-02-18 Gemplus Card Int Procede de division entiere securise contre les attaques a canaux caches
US7181572B2 (en) * 2002-12-02 2007-02-20 Silverbrook Research Pty Ltd Cache updating method and apparatus
FR2848753B1 (fr) * 2002-12-11 2005-02-18 Gemplus Card Int Procede de division entiere ou de reduction modulaire securise contre les attaques a canaux caches
US20050152539A1 (en) * 2004-01-12 2005-07-14 Brickell Ernie F. Method of protecting cryptographic operations from side channel attacks
US8054967B2 (en) * 2004-04-26 2011-11-08 Panasonic Corporation Computer system and computer program executing encryption or decryption
US7404089B1 (en) * 2005-06-03 2008-07-22 Pitney Bowes Inc. Method and system for protecting against side channel attacks when performing cryptographic operations

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000025204A1 (fr) * 1998-10-28 2000-05-04 Certicom Corp. Cryptographie resistant aux attaques contre la signature electrique
EP1158384A1 (fr) * 2000-05-22 2001-11-28 Infineon Technologies AG Unité de traitement de données et méthode associée
WO2002099624A1 (fr) * 2001-06-07 2002-12-12 Gemplus Procede de securisation d'un calcul d'exponentiation dans un dispositif electronique

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
MOELLER ET AL: "SECURING ELLIPTIC CURVE POINT MULTIPLICATION AGAINST SIDE-CHANNEL ATTACKS", INFORMATION SECURITY. 4TH INTERNATIONAL CONFERENCE, ISC 2001 MALAGA, SPAIN, OCTOBER 1-3, 2001, PROCEEDINGS, 1 October 2001 (2001-10-01), Springer Verlag, Berlin DE, pages 324 - 334, XP001068194 *
OSWALD E ET AL: "RANDOMIZED ADDITION-SUBTRACTION CHAINS AS A COUNTERMEASURE AGAINST POWER ATTACKS", CRYPTOGRAPHIC HARDWARE AND EMBEDDED SYSTEMS. 3RD INTERNATIONAL WORKSHOP, CHES 2001, PARIS, FRANCCE, MAY 14 - 16, 2001 PROCEEDINGS, LECTURE NOTES IN COMPUTER SCIENCE, BERLIN: SPRINGER, DE, vol. 2162, 14 May 2001 (2001-05-14), pages 39 - 50, XP001061159, ISBN: 3-540-42521-7 *

Also Published As

Publication number Publication date
EP1493078A2 (fr) 2005-01-05
US20050163312A1 (en) 2005-07-28
FR2838210A1 (fr) 2003-10-10
DE60326707D1 (de) 2009-04-30
AU2003258856A1 (en) 2003-10-13
US7742595B2 (en) 2010-06-22
EP1493078B8 (fr) 2009-07-01
FR2838210B1 (fr) 2005-11-04
EP1493078B1 (fr) 2009-03-18
WO2003083645A2 (fr) 2003-10-09
ATE426202T1 (de) 2009-04-15

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