WO2004012156A3 - Latching electronic circuit for random number generation - Google Patents

Latching electronic circuit for random number generation Download PDF

Info

Publication number
WO2004012156A3
WO2004012156A3 PCT/IB2003/003231 IB0303231W WO2004012156A3 WO 2004012156 A3 WO2004012156 A3 WO 2004012156A3 IB 0303231 W IB0303231 W IB 0303231W WO 2004012156 A3 WO2004012156 A3 WO 2004012156A3
Authority
WO
WIPO (PCT)
Prior art keywords
random number
electronic circuit
number generation
stable latch
voltage input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/IB2003/003231
Other languages
French (fr)
Other versions
WO2004012156A2 (en
Inventor
Laszlo Hars
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
US Philips Corp
Original Assignee
Koninklijke Philips Electronics NV
US Philips Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics NV, US Philips Corp filed Critical Koninklijke Philips Electronics NV
Priority to EP03771229A priority Critical patent/EP1527384B1/en
Priority to DE60308689T priority patent/DE60308689T2/en
Priority to JP2004524019A priority patent/JP2005534115A/en
Priority to AU2003247073A priority patent/AU2003247073A1/en
Publication of WO2004012156A2 publication Critical patent/WO2004012156A2/en
Publication of WO2004012156A3 publication Critical patent/WO2004012156A3/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/58—Random or pseudo-random number generators
    • G06F7/588—Random number generators, i.e. based on natural stochastic processes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/84—Generating pulses having a predetermined statistical distribution of a parameter, e.g. random pulse generators

Landscapes

  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Mathematical Optimization (AREA)
  • Mathematical Analysis (AREA)
  • General Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Pure & Applied Mathematics (AREA)
  • Manipulation Of Pulses (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Electronic Switches (AREA)
  • Electrophonic Musical Instruments (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Channel Selection Circuits, Automatic Tuning Circuits (AREA)
  • Read Only Memory (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
  • Communication Control (AREA)

Abstract

A physical random number generator has a bi-stable latch that operates to generate a random number bit in response to a reception of one or more voltage input signals and a clock signal. A voltage source provides the voltage input signal(s) for provoking the bi-stable latch into a metastable state. A clock provides the clock signal for triggering the bi-stable latch. When triggered, the bi-stable latch latches the random number bit as a function of its metastable state provoked by the voltage input signal(s).
PCT/IB2003/003231 2002-07-25 2003-07-14 Latching electronic circuit for random number generation Ceased WO2004012156A2 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
EP03771229A EP1527384B1 (en) 2002-07-25 2003-07-14 Latching electronic circuit for random number generation
DE60308689T DE60308689T2 (en) 2002-07-25 2003-07-14 MEMORY CIRCUIT FOR COUNTER-COUNTER GENERATION
JP2004524019A JP2005534115A (en) 2002-07-25 2003-07-14 Latching electronics for random number generation
AU2003247073A AU2003247073A1 (en) 2002-07-25 2003-07-14 Latching electronic circuit for random number generation

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/205,231 2002-07-25
US10/205,231 US7124155B2 (en) 2002-07-25 2002-07-25 Latching electronic circuit for random number generation

Publications (2)

Publication Number Publication Date
WO2004012156A2 WO2004012156A2 (en) 2004-02-05
WO2004012156A3 true WO2004012156A3 (en) 2004-06-03

Family

ID=30770023

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/IB2003/003231 Ceased WO2004012156A2 (en) 2002-07-25 2003-07-14 Latching electronic circuit for random number generation

Country Status (8)

Country Link
US (1) US7124155B2 (en)
EP (1) EP1527384B1 (en)
JP (1) JP2005534115A (en)
CN (1) CN100468317C (en)
AT (1) ATE341026T1 (en)
AU (1) AU2003247073A1 (en)
DE (1) DE60308689T2 (en)
WO (1) WO2004012156A2 (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7146392B2 (en) * 2003-06-30 2006-12-05 International Business Machines Corporation Random number generator
JP4549263B2 (en) * 2005-09-01 2010-09-22 富士通セミコンダクター株式会社 Random number generation apparatus and random number generation method
CN100458685C (en) * 2006-05-26 2009-02-04 北京中星微电子有限公司 Device and method for generating randow number
DE102006030888B4 (en) * 2006-07-04 2009-06-25 Infineon Technologies Ag Method and apparatus for generating a starting value for a pseudorandom number generator
US8346832B2 (en) * 2006-10-12 2013-01-01 The Regents Of The University Of Michigan Random number generator
US8805905B2 (en) * 2007-09-18 2014-08-12 Seagate Technology Llc On-line randomness test for restart random number generators
US8676870B2 (en) 2007-09-18 2014-03-18 Seagate Technology Llc Active test and alteration of sample times for a ring based random number generator
US8583712B2 (en) * 2007-09-18 2013-11-12 Seagate Technology Llc Multi-bit sampling of oscillator jitter for random number generation
CN101833434B (en) * 2009-03-13 2012-10-17 国民技术股份有限公司 A CMOS Random Number Generator
US8522065B2 (en) * 2009-09-06 2013-08-27 Percello Ltd. Generating a random number in an existing system on chip
US8583711B2 (en) * 2009-12-02 2013-11-12 Seagate Technology Llc Random number generation system with ring oscillators
US8635260B2 (en) * 2009-12-02 2014-01-21 Seagate Technology Llc Random number generator incorporating channel filter coefficients
US20110191129A1 (en) * 2010-02-04 2011-08-04 Netzer Moriya Random Number Generator Generating Random Numbers According to an Arbitrary Probability Density Function
KR20140108362A (en) 2013-02-25 2014-09-11 삼성전자주식회사 Random number generator
JP6167876B2 (en) * 2013-11-28 2017-07-26 富士通株式会社 Electronic circuit, electronic device and authentication system
US9189202B2 (en) 2013-12-23 2015-11-17 The University Of Massachusetts Generate random numbers using metastability resolution time
KR102652735B1 (en) * 2016-11-24 2024-04-02 삼성전자주식회사 Random number generator and method of generating random number using adjustable meta-stable voltage
CN107565951B (en) * 2017-08-23 2020-08-07 深圳市芯华国创半导体股份有限公司 Multi-state signal generating circuit
US12587179B2 (en) * 2024-07-10 2026-03-24 Arm Limited Ring oscillator-based true random number generator

Citations (1)

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US5963104A (en) * 1996-04-15 1999-10-05 Vlsi Technology, Inc. Standard cell ring oscillator of a non-deterministic randomizer circuit

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US4571556A (en) 1983-07-28 1986-02-18 Mi Medical & Scientific Instruments, Inc. Randomized-clock circuit
US4771429A (en) * 1986-09-18 1988-09-13 Abbott Laboratories Circuit combining functions of cyclic redundancy check code and pseudo-random number generators
US5153532A (en) 1989-05-24 1992-10-06 Honeywell Inc. Noise generator using combined outputs of two pseudo-random sequence generators
DE4302830C1 (en) 1993-01-27 1994-03-03 Siemens Ag Feedback shift register reproducing random sequences - has five stages, each consisting of D=flip=flop, and XOR gates in feedback logic as well as clock generator.
US5606322A (en) 1994-10-24 1997-02-25 Motorola, Inc. Divergent code generator and method
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US6324558B1 (en) 1995-02-14 2001-11-27 Scott A. Wilber Random number generator and generation method
JP3410269B2 (en) 1995-12-21 2003-05-26 株式会社アドバンテスト Delay time measurement method
GB2333652A (en) 1998-01-24 1999-07-28 Motorola Ltd Random number generator with improved equiprobability
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JP2000105685A (en) * 1998-09-28 2000-04-11 Nec Ic Microcomput Syst Ltd Random number generator
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US5963104A (en) * 1996-04-15 1999-10-05 Vlsi Technology, Inc. Standard cell ring oscillator of a non-deterministic randomizer circuit

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
BELLIDO M J ET AL: "A simple binary random number generator: new approaches for CMOS VLSI", CIRCUITS AND SYSTEMS, 1992., PROCEEDINGS OF THE 35TH MIDWEST SYMPOSIUM ON WASHINGTON, DC, USA 9-12 AUG. 1992, NEW YORK, NY, USA,IEEE, US, 9 August 1992 (1992-08-09), pages 127 - 129, XP010057783, ISBN: 0-7803-0510-8 *
KINNEMENT D J; CHESTER E G: "Design of an on-chip random number generator using metastability", ESSCIRC 2002 PROCEEDINGS ON THE 28TH EUROPEAN SOLID-STATE CIRCUIT CONFERENCE, 24 September 2002 (2002-09-24) - 26 September 2002 (2002-09-26), Firenze, Italy, pages 595 - 598, XP002273019 *
WALKER S ET AL: "Evaluating metastability in electronic circuits for random number generation", IEEE COMPUTER SOCIETY WORKSHOP VLSI 2001, 19 April 2001 (2001-04-19) - 20 April 2001 (2001-04-20), pages 99 - 101, XP010541763 *

Also Published As

Publication number Publication date
CN100468317C (en) 2009-03-11
US20040019617A1 (en) 2004-01-29
DE60308689T2 (en) 2007-09-06
CN1672126A (en) 2005-09-21
AU2003247073A8 (en) 2004-02-16
JP2005534115A (en) 2005-11-10
DE60308689D1 (en) 2006-11-09
ATE341026T1 (en) 2006-10-15
EP1527384B1 (en) 2006-09-27
AU2003247073A1 (en) 2004-02-16
WO2004012156A2 (en) 2004-02-05
US7124155B2 (en) 2006-10-17
EP1527384A2 (en) 2005-05-04

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