WO2004019495A3 - Supply voltage modulation circuit for mos transistors, reconfigurable logic device and method of processing an input signal to a logic circuit - Google Patents

Supply voltage modulation circuit for mos transistors, reconfigurable logic device and method of processing an input signal to a logic circuit Download PDF

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Publication number
WO2004019495A3
WO2004019495A3 PCT/EP2003/008576 EP0308576W WO2004019495A3 WO 2004019495 A3 WO2004019495 A3 WO 2004019495A3 EP 0308576 W EP0308576 W EP 0308576W WO 2004019495 A3 WO2004019495 A3 WO 2004019495A3
Authority
WO
WIPO (PCT)
Prior art keywords
circuit
logic device
input signal
supply voltage
processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/EP2003/008576
Other languages
French (fr)
Other versions
WO2004019495A2 (en
Inventor
Anthony I Stansfield
Alan D Marshall
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Elixent Ltd
Original Assignee
Elixent Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Elixent Ltd filed Critical Elixent Ltd
Priority to JP2004530071A priority Critical patent/JP4201202B2/en
Priority to AU2003260358A priority patent/AU2003260358A1/en
Priority to EP03792245A priority patent/EP1537666B1/en
Priority to DE60322231T priority patent/DE60322231D1/en
Publication of WO2004019495A2 publication Critical patent/WO2004019495A2/en
Publication of WO2004019495A3 publication Critical patent/WO2004019495A3/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/1733—Controllable logic circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0008—Arrangements for reducing power consumption
    • H03K19/0013—Arrangements for reducing power consumption in field effect transistor circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018585—Coupling arrangements; Interface arrangements using field effect transistors only programmable

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)

Abstract

Power supply voltages are selectively modulated to correspond with degraded input voltages to a logic device. Modulated power supply voltages are provided to transistors within the logic device, so that the degraded input voltages supplied to the transistors are sufficient to turn the transistors substantially on or off. Leakage currents are prevented thereby from flowing across the transistors.
PCT/EP2003/008576 2002-08-19 2003-08-01 Supply voltage modulation circuit for mos transistors, reconfigurable logic device and method of processing an input signal to a logic circuit Ceased WO2004019495A2 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2004530071A JP4201202B2 (en) 2002-08-19 2003-08-01 Low voltage modulation circuit for pass device
AU2003260358A AU2003260358A1 (en) 2002-08-19 2003-08-01 Supply voltage modulation circuit for mos transistors, reconfigurable logic device and method of processing an input signal to a logic circuit
EP03792245A EP1537666B1 (en) 2002-08-19 2003-08-01 Reconfigurable logic device comprising supply voltage modulation circuits for mos transistors
DE60322231T DE60322231D1 (en) 2002-08-19 2003-08-01 RECONFIGURABLE LOGIC ARRANGEMENT WITH CIRCUITS FOR MODULATING THE OPERATING VOLTAGE OF MOS TRANSISTORS

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/224,093 2002-08-19
US10/224,093 US6859084B2 (en) 2002-08-19 2002-08-19 Low-power voltage modulation circuit for pass devices

Publications (2)

Publication Number Publication Date
WO2004019495A2 WO2004019495A2 (en) 2004-03-04
WO2004019495A3 true WO2004019495A3 (en) 2004-10-14

Family

ID=31715215

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/EP2003/008576 Ceased WO2004019495A2 (en) 2002-08-19 2003-08-01 Supply voltage modulation circuit for mos transistors, reconfigurable logic device and method of processing an input signal to a logic circuit

Country Status (7)

Country Link
US (1) US6859084B2 (en)
EP (1) EP1537666B1 (en)
JP (1) JP4201202B2 (en)
AT (1) ATE401700T1 (en)
AU (1) AU2003260358A1 (en)
DE (1) DE60322231D1 (en)
WO (1) WO2004019495A2 (en)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6946903B2 (en) * 2003-07-28 2005-09-20 Elixent Limited Methods and systems for reducing leakage current in semiconductor circuits
KR100687867B1 (en) * 2004-07-21 2007-02-27 주식회사 하이닉스반도체 Low power high performance inverter circuit
US20070008004A1 (en) * 2005-07-11 2007-01-11 Vikram Santurkar Apparatus and methods for low-power routing circuitry in programmable logic devices
US7362126B1 (en) * 2005-08-17 2008-04-22 National Semiconductor Corporation Floating CMOS input circuit that does not draw DC current
US20070047364A1 (en) * 2005-08-31 2007-03-01 International Business Machines Corporation Methods and apparatus for varying a supply voltage or reference voltage using independent control of diode voltage in asymmetrical double-gate devices
US7567096B2 (en) * 2007-03-21 2009-07-28 Qualcomm Incorporated Circuit device and method of controlling a voltage swing
DE102008002749A1 (en) * 2008-06-27 2009-12-31 Carl Zeiss Smt Ag Illumination optics for microlithography
US9166567B2 (en) * 2013-03-15 2015-10-20 University Of California, San Diego Data-retained power-gating circuit and devices including the same
US12388483B2 (en) 2020-06-02 2025-08-12 Intel Corporation Dynamic power rail floating for CDAC circuits
CN115201542B (en) * 2021-04-09 2026-02-27 联芸科技(杭州)股份有限公司 Voltage detection circuit
CN114389598A (en) * 2022-03-23 2022-04-22 武汉市聚芯微电子有限责任公司 Conversion device, interface circuit and chip

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59208926A (en) * 1983-05-13 1984-11-27 Hitachi Ltd Schmidt trigger circuit
JPS62136914A (en) * 1985-12-10 1987-06-19 Citizen Watch Co Ltd Schmitt trigger circuit
JPS62178015A (en) * 1986-01-31 1987-08-05 Nippon Telegr & Teleph Corp <Ntt> Digital logic fet circuit
US5767728A (en) * 1996-09-05 1998-06-16 International Business Machines Corporation Noise tolerant CMOS inverter circuit having a resistive bias
US6208171B1 (en) * 1998-04-20 2001-03-27 Nec Corporation Semiconductor integrated circuit device with low power consumption and simple manufacturing steps
US6285213B1 (en) * 1997-11-19 2001-09-04 Mitsubishi Denki Kabushiki Kaisha Semiconductor integrated circuit device

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2585348B2 (en) * 1988-02-22 1997-02-26 株式会社東芝 Nonvolatile semiconductor memory device
US5684415A (en) * 1995-12-22 1997-11-04 Symbios Logic Inc. 5 volt driver in a 3 volt CMOS process
US5894227A (en) * 1996-03-15 1999-04-13 Translogic Technology, Inc. Level restoration circuit for pass logic devices
US5828231A (en) * 1996-08-20 1998-10-27 Xilinx, Inc. High voltage tolerant input/output circuit
US6118303A (en) * 1998-04-17 2000-09-12 Lsi Logic Corporation Integrated circuit I/O buffer having pass gate protection with RC delay
DE69930238D1 (en) * 1999-06-17 2006-05-04 St Microelectronics Srl Non-volatile memory row decoder for optional positive and negative bias adjustment of word lines

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59208926A (en) * 1983-05-13 1984-11-27 Hitachi Ltd Schmidt trigger circuit
JPS62136914A (en) * 1985-12-10 1987-06-19 Citizen Watch Co Ltd Schmitt trigger circuit
JPS62178015A (en) * 1986-01-31 1987-08-05 Nippon Telegr & Teleph Corp <Ntt> Digital logic fet circuit
US5767728A (en) * 1996-09-05 1998-06-16 International Business Machines Corporation Noise tolerant CMOS inverter circuit having a resistive bias
US6285213B1 (en) * 1997-11-19 2001-09-04 Mitsubishi Denki Kabushiki Kaisha Semiconductor integrated circuit device
US6208171B1 (en) * 1998-04-20 2001-03-27 Nec Corporation Semiconductor integrated circuit device with low power consumption and simple manufacturing steps

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 0090, no. 75 (E - 306) 4 April 1985 (1985-04-04) *
PATENT ABSTRACTS OF JAPAN vol. 0113, no. 63 (E - 560) 26 November 1987 (1987-11-26) *
PATENT ABSTRACTS OF JAPAN vol. 0120, no. 20 (E - 575) 21 January 1988 (1988-01-21) *

Also Published As

Publication number Publication date
JP4201202B2 (en) 2008-12-24
AU2003260358A8 (en) 2004-03-11
EP1537666B1 (en) 2008-07-16
ATE401700T1 (en) 2008-08-15
DE60322231D1 (en) 2008-08-28
JP2005536161A (en) 2005-11-24
US6859084B2 (en) 2005-02-22
EP1537666A2 (en) 2005-06-08
WO2004019495A2 (en) 2004-03-04
US20040032289A1 (en) 2004-02-19
AU2003260358A1 (en) 2004-03-11

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