WO2004034441A3 - Apparatus and method for assembling arrays of functional elements to substrates - Google Patents

Apparatus and method for assembling arrays of functional elements to substrates Download PDF

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Publication number
WO2004034441A3
WO2004034441A3 PCT/IL2003/000821 IL0300821W WO2004034441A3 WO 2004034441 A3 WO2004034441 A3 WO 2004034441A3 IL 0300821 W IL0300821 W IL 0300821W WO 2004034441 A3 WO2004034441 A3 WO 2004034441A3
Authority
WO
WIPO (PCT)
Prior art keywords
dimensional
constituted
display pixels
dimensional arrays
microstructures
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/IL2003/000821
Other languages
French (fr)
Other versions
WO2004034441A2 (en
Inventor
Ofer Avineri
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to AU2003272055A priority Critical patent/AU2003272055A1/en
Priority to EP03753896A priority patent/EP1554917A2/en
Publication of WO2004034441A2 publication Critical patent/WO2004034441A2/en
Publication of WO2004034441A3 publication Critical patent/WO2004034441A3/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0442—Apparatus for placing on an insulating substrate, e.g. tape
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K13/00—Apparatus or processes specially adapted for manufacturing or adjusting assemblages of electric components
    • H05K13/04—Mounting of components, e.g. of leadless components
    • H05K13/0478—Simultaneously mounting of different components
    • H05K13/0482—Simultaneously mounting of different components using templates; using magazines, the configuration of which corresponds to the sites on the boards where the components have to be attached
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/117—Shapes of semiconductor bodies

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Supply And Installment Of Electrical Components (AREA)
  • Led Devices (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

Method for handling microstructures, which comprises arranging them into one-dimensional, two-dimensional or three-dimensional arrays, and displacing them as such. The one-dimensional arrays are constituted by lines which may be straight or curved or constituted of different connected sections and the two-dimensional arrays are constituted by matrices. The microstructures may be liquid crystal display pixels; light-emitting diode display pixels; organic light emitting diode pixels; solar cell elements; electromagnetic signal detectors; plasma display pixels; integrated circuits. They can also be generated in wafers at regular distances from one another so as to form a matrix .The part itself could be shaped in the special form in order to fit the holes of a support or substrate to which they are to be connected.
PCT/IL2003/000821 2002-10-10 2003-10-10 Apparatus and method for assembling arrays of functional elements to substrates Ceased WO2004034441A2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
AU2003272055A AU2003272055A1 (en) 2002-10-10 2003-10-10 Apparatus and method for assembling arrays of functional elements to substrates
EP03753896A EP1554917A2 (en) 2002-10-10 2003-10-10 Apparatus and method for assembling arrays of functional elements to substrates

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US41744702P 2002-10-10 2002-10-10
US60/417,447 2002-10-10
US46904303P 2003-05-06 2003-05-06
US60/469,043 2003-05-06

Publications (2)

Publication Number Publication Date
WO2004034441A2 WO2004034441A2 (en) 2004-04-22
WO2004034441A3 true WO2004034441A3 (en) 2004-06-10

Family

ID=32096197

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/IL2003/000821 Ceased WO2004034441A2 (en) 2002-10-10 2003-10-10 Apparatus and method for assembling arrays of functional elements to substrates

Country Status (3)

Country Link
EP (1) EP1554917A2 (en)
AU (1) AU2003272055A1 (en)
WO (1) WO2004034441A2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4748644B2 (en) * 2005-02-28 2011-08-17 岐阜県 Test method for equol and test method for equol-producing bacteria
KR101872764B1 (en) * 2017-03-02 2018-06-29 주식회사 코엠에스 Display LED Chip Arrangement Method and LED Chip Picking and Arrangement Device
CN113410368B (en) * 2021-05-31 2023-03-21 长春希龙显示技术有限公司 Mixed-woven packaging method for high-uniformity integrated LED display module chip

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4212102A (en) * 1978-11-22 1980-07-15 Burroughs Corporation IC Socket insertion tool
DE19625515A1 (en) * 1996-06-26 1998-01-02 Mci Computer Gmbh Raster arrangement changing device for electronic component support retainer
US6557247B1 (en) * 1998-01-29 2003-05-06 Technology Development Associate Operations Limited Component placement apparatus

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4212102A (en) * 1978-11-22 1980-07-15 Burroughs Corporation IC Socket insertion tool
DE19625515A1 (en) * 1996-06-26 1998-01-02 Mci Computer Gmbh Raster arrangement changing device for electronic component support retainer
US6557247B1 (en) * 1998-01-29 2003-05-06 Technology Development Associate Operations Limited Component placement apparatus

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
HOHMANN A FARNKOPF L: "CHIP PARALLEL INSERTION AUTOMAT", MOTOROLA TECHNICAL DEVELOPMENTS, MOTOROLA INC. SCHAUMBURG, ILLINOIS, US, vol. 39, September 1999 (1999-09-01), pages 193 - 194, XP000930968, ISSN: 0887-5286 *

Also Published As

Publication number Publication date
WO2004034441A2 (en) 2004-04-22
AU2003272055A8 (en) 2004-05-04
EP1554917A2 (en) 2005-07-20
AU2003272055A1 (en) 2004-05-04

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