WO2004038902A2 - Capacitively coupled power supply - Google Patents

Capacitively coupled power supply Download PDF

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Publication number
WO2004038902A2
WO2004038902A2 PCT/IB2003/005308 IB0305308W WO2004038902A2 WO 2004038902 A2 WO2004038902 A2 WO 2004038902A2 IB 0305308 W IB0305308 W IB 0305308W WO 2004038902 A2 WO2004038902 A2 WO 2004038902A2
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WO
WIPO (PCT)
Prior art keywords
capacitor
power supply
coupled
switch
capacitors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/IB2003/005308
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French (fr)
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WO2004038902A3 (en
Inventor
Rudolf Weber
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Thomson Licensing SAS
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Thomson Licensing SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thomson Licensing SAS filed Critical Thomson Licensing SAS
Priority to DE60326616T priority Critical patent/DE60326616D1/en
Priority to AU2003276632A priority patent/AU2003276632A1/en
Priority to CN2003801013136A priority patent/CN1703825B/en
Priority to MXPA05004085A priority patent/MXPA05004085A/en
Priority to EP03809408A priority patent/EP1552596B1/en
Priority to KR1020057006633A priority patent/KR101084411B1/en
Priority to US10/531,118 priority patent/US7019992B1/en
Priority to JP2004546312A priority patent/JP4457014B2/en
Publication of WO2004038902A2 publication Critical patent/WO2004038902A2/en
Publication of WO2004038902A3 publication Critical patent/WO2004038902A3/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of DC power input into DC power output
    • H02M3/02Conversion of DC power input into DC power output without intermediate conversion into AC
    • H02M3/04Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
    • H02M3/10Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/08Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H02M1/088Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
    • H02M1/096Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices the power supply of the control circuit being connected in parallel to the main switching element
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/32Means for protecting converters other than automatic disconnection
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of DC power input into DC power output
    • H02M3/005Conversion of DC power input into DC power output using Cuk converters
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of AC power input into DC power output; Conversion of DC power input into AC power output
    • H02M7/02Conversion of AC power input into DC power output without possibility of reversal
    • H02M7/04Conversion of AC power input into DC power output without possibility of reversal by static converters
    • H02M7/06Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes without control electrode or semiconductor devices without control electrode
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of AC power input into DC power output; Conversion of DC power input into AC power output
    • H02M7/02Conversion of AC power input into DC power output without possibility of reversal
    • H02M7/04Conversion of AC power input into DC power output without possibility of reversal by static converters
    • H02M7/12Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/21Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/217Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Definitions

  • the present invention relates to power supplies in general, and more particularly, to generating a supply voltage using a capacitive voltage divider.
  • Power supplies serve the purpose of converting an input voltage into one or several output voltages.
  • An AC power source may be used to provide an AC power line input, which gets converted to a DC regulated output voltage.
  • a power supply that produces a lower output voltage than that of the rectified main voltage power supply is generally needed in order to power small signal devices such as integrated circuit (IC) controllers and the like.
  • IC integrated circuit
  • step down transformers have been used as power supplies, such devices tend to be large, bulky, and relatively expensive.
  • a regulated power supply that utilizes capacitive elements to transform an input voltage from an AC power source to a specified output voltage level across a load is desired.
  • a power supply comprises a pair of first and second capacitors forming a capacitive voltage divider.
  • a source of a periodic input supply voltage is coupled to the capacitive voltage divider for producing in the second capacitor, from a portion of the periodic input supply voltage, a second supply voltage that is coupled to a load circuit.
  • a switch is coupled to the second capacitor for selectively coupling the first capacitor to the second capacitor in a manner to regulate the second supply voltage.
  • a power supply using a controlled capacitive divider comprises a first capacitor and a second capacitor that is selectively coupled to the first capacitor by means of a switch.
  • a control circuit senses the voltage across one of the first and second capacitors; and provides a control signal to cause the switch to selectively couple the first and second capacitors.
  • Figure 1 is an exemplary illustration of a capacitively coupled power supply according to an exemplary embodiment of the present invention.
  • Figure 2 is an exemplary illustration of a capacitively coupled power supply according to another exemplary embodiment of the present invention.
  • Figure 3 is an exemplary illustration of a capacitively coupled power supply according to another exemplary embodiment of the present invention.
  • Figure 4 is an exemplary illustration of a capacitively coupled power supply according to another exemplary embodiment of the present invention.
  • Figure 5 is an exemplary illustration of a capacitively coupled power supply according to another exemplary embodiment of the present invention.
  • FIG. 1 is a block diagram illustrating a circuit 100 for generating a regulated supply voltage using a capacitive divider according to the general principles embodying the present invention.
  • the circuit 100 includes a source 10 of AC power applied at node 10a.
  • a voltage or a current source may be used, however, in case of a mains application, it is understood that the source comprise an AC power line input.
  • a capacitive divider comprising capacitor Cmains and capacitor CL connected in series, is used to transform the input voltage (Vin) at node 10a to the desired output voltage level VI across load device RL.
  • Control circuit 60 coupled to the voltage divider arrangement measures the output voltage VI and compares the measured output voltage with a reference voltage Vref in order to control switched rectifier circuit 30.
  • the second arrangement enables a faster discharge of capacitor CL as long as the output voltage (VI) exceeds the desired value (Vref). This arrangement may be implemented as a controlled series switch, whose return current is controlled.
  • auxiliary power in a switch mode power supply may be accomplished in the following manner.
  • a source of periodic input voltage Vin is developed at node 10a from AC source 10 coupled to rectifier 12.
  • Filter capacitor Cmains has a first terminal connected to node 10a, and a second terminal connected to node 10b.
  • Diode Dl is coupled in reverse-bias fashion between node 10b and ground potential (GND).
  • Filter capacitor Cmains is coupled to capacitor CL via diode D2 in a voltage divider arrangement.
  • Capacitor CL has a first terminal connected at node 10c to the cathode of diode D2, and a second terminal connected to GND.
  • Switch SI is connected between node 10b and GND, in parallel with diode Dl.
  • Control circuit 60 is coupled in parallel with load resistor RL and capacitor CL at node 10c.
  • Bias resistor Rbias is connected between nodes 10a and 10c. Note that when diode D2 is forward biased (i.e. conducting), nodes 10b, 10c are at substantially the same potential, except for the relatively small voltage drop across diode D2.
  • the resistor Rbias has a relatively large value and delivers the start up voltage (VI) for a common used primary controller IC.
  • Resistor Rmains represents the main load resistance and is connected between the input node 10a and GND.
  • Control circuit 60 is communicatively coupled (represented by dashed line 63) to switch SI, which selectively couple capacitors Cmains and CL.
  • Control circuit 60 senses output voltage VI and compares the output voltage with a predetermined reference voltage Vref to generate a control signal to cause SI to open or close, thereby switchably coupling/decoupling the electrical path between Cmains and CL.
  • Output voltage VI at node 10c is used for the primary switch control circuit or controller 60.
  • the switch control circuit may be a pulse width modulated (PWM) control circuit or any other type of switch controlling arrangement. It is understood that capacitor Cmains couples the AC signal to the switched rectifier circuit 30 and controller 60.
  • PWM pulse width modulated
  • the DC voltage Vin is further applied across the representative main load resistance Rmains.
  • the capacitor Cmains essentially operates as a filter capacitor to filter the periodic input signal applied at node 10a.
  • the transferred energy in CL is much smaller than the energy in Cmains.
  • Capacitor CL is charged through conducting diode D2 and the capacitor by the rectified input current Iin, when switch SI is open. This results in an increasing voltage across Cmains and CL as long as a charge current flows.
  • the rectifier 12 decouples the AC source 10 from the rest of the circuit (i.e. node 10a).
  • capacitor Cmains delivers current to load Rmains by means of conducting diode Dl.
  • a relatively small current flowing through CL is discharged through load resistor RL.
  • the discharge current flowing through CL is only feeding the control circuit 60 and load RL, which represents the standby power supply, for example, in a television set (which is e.g. 1-3 Watts). This is significantly less than the current being discharged through diode Dl, capacitor Cmains and Rmains representing the main load of the TV set (which is, e.g., 100-150 Watts). Because diode D2 becomes reverse biased, the voltage VI across CL remains positive, and its drop is only determined by the auxiliary load resistor RL.
  • the charge condition of Cmains mainly determines the charge in CL. More particularly, after a first discharging period wherein Cmains is discharged, during the next cycle of the mains, the capacitor Cmains is charged while at the same time, capacitor CL is charged, due to the conduction of diode D2.
  • CL is approximately 3-4 times greater than that of Cmains (e.g. Cmains is about 68 uF (micro Farads) while CL is 220 uF).
  • the voltage at " Rmains and RL has a ratio that is chosen to obtain the desired output voltage VI .
  • Rmains for the main power supply often varies in a wide range.
  • Rmains is typically the main power supply for any consumer electronic device, such as a TV
  • its power may range anywhere from 50W to 150W depending on factors such as sound, picture parameters and the like, within the range of the run mode of the device.
  • the standby output power of VI may drop down to 1W (Watt) or less.
  • the load RL remains substantially constant in order to feed small signal devices such as a microprocessor, controller, and IR receivers, for example.
  • switch SI is configured as a switched shunt controller arrangement, wherein SI closes in response to a signal from control circuit 60, thereby disabling further charging of CL as soon as the desired output voltage at node 10c is reached.
  • switch SI By opening and closing switch SI, the output voltage VI across RL may be controlled.
  • This implementation is useful in providing a circuit arrangement when the output voltage should not exceed a predetermined level. More particularly, as soon as the desired output voltage level at CL is reached and sensed by control circuit 60, switch S 1 closes so that the current path exists through Cmains, SI and back to the input, without further charging at CL, to thereby maintain the voltage VI . Note that S 1 can be closed or open within 1 cycle of the 50 or 60Hz input sinusoid.
  • FIG. 3 Another embodiment is shown in Figure 3.
  • the embodiment of Figure 3 differs from that of Figure 2 in that switch SI is connected between nodes 10b and 10c in parallel with conducting diode D2.
  • the maximum output voltage VI is not precisely determined as a threshold limit.
  • the switch SI in response to a signal from control circuit 60, closes to enable a discharge path from CL through SI and Cmains to Rmains. Opening of the switch disables the further discharge to Rmains as soon as a minimal desired output voltage is reached.
  • the output voltage across RL is not controlled during the charging cycle (when SI is open).
  • the above described embodiment provides a useful solution whenever a voltage limiter like a series regulator is followed.
  • the solution according Figure 3 advantageously does not produce current transients in Cmains and in the line rectifier. From the above described embodiments shown in Figures 2 and 3, the charge is controlled in the embodiment of Figure 2, while the discharge is controlled in the embodiment of Figure 3.
  • FIG. 4 Detailed circuit diagrams implementing the schematic representations of Figures 2 and 3, are shown in Figures 4 and 5, respectively.
  • an arrangement for generating auxiliary power for a common used primary controller of a switch mode power supply is implemented.
  • the initial start up voltage is provided by Rbias.
  • the power consumption for the controller is higher than resistor Rbias can deliver.
  • the tapped capacitors Cmains and CL support the power to the controller as described above.
  • the representative switch SI in Figure 2 is established by means of high gain transistors Ql and Q2 of Figure 4.
  • pnp transistor Ql has its base terminal bl connected to terminal c2 of transistor Q2.
  • Terminal el of Ql is connected to node 10b, while terminal cl of Ql is connected to base terminal b2 of npn transistor Q2.
  • Terminals cl, b2 are connected at node lOd, which is coupled to GND through resistor R2.
  • Resistor Rl couples terminals bl, c2 of Ql, Q2, respectively, to node 10b.
  • Zener diode D4 is coupled between node 10c and node lOd. The output voltage is sensed by diode D4 and directly controls the high gains transistors Ql, Q2.
  • the circuit 400 may be embodied in a free running power oscillator, whose operation is enabled/disabled depending on the output voltage from the secondary side 410.
  • the initial startup voltage is provided by Rbias. As long as the voltage across CL is below a threshold, the current path from Cmains through D2 to CL is established, and the capacitors Cmains and CL continue to charge. However, upon operation of the power oscillator, the power consumed by the oscillator is higher than Rbias can deliver. Thus, the energy stored in Cmains and CL are used to power the drivers of the power oscillator.
  • switch SI of Figure 3 is implemented as transistor Ql in the circuit arrangement 500 illustrated in Figure 5.
  • pnp transistor Ql has its base terminal bl connected to terminal c2 of npn transistor Q2 through resistor R2.
  • Terminal el of Ql is connected to the anode of diode D2
  • terminal cl of Ql is connected to the cathode of diode D2 at node 10b.
  • Resistor Rl is connected between the anode of D2 and terminal bl of Ql in a voltage divider arrangement with R2.
  • Diode Dl is connected between node 10b and GND.
  • Base terminal b2 of npn transistor Q2 is connected to Zener diode D4 at node lOe.
  • Resistor R3 is connected between node lOe and GND, while the cathode of diode D4 is connected to node 10c through resistor R4.
  • Terminal e2 of transistor Q2 is connected to GND.
  • Zener Diode D4 limits the drive voltage at the input of the controller 60 to a given or predetermined value.
  • Diode D4 controls Ql via the driver Q2.
  • capacitor CL remains switchably coupled to Cmains and to the main load Rmains, corresponding to the transformed load Rs on the secondary side, until the desired minimal voltage at the input of controller 60 is reached.
  • capacitor CL is discharged through control circuit 60 by the relatively low current required for the controller. This takes place until the next charge interval arrives in Cmains.
  • diode D4 could be part of a common used series voltage limiter or stabilization circuit.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)
  • Direct Current Feeding And Distribution (AREA)
  • Rectifiers (AREA)

Abstract

A power supply comprises a pair of first and second capacitors forming a capacitive voltage divider. A source of a periodic input supply voltage is coupled to the capacitive voltage divider for producing in the second capacitor, from a portion of the periodic input supply voltage, a second supply voltage that is coupled to a load circuit. A switch is coupled to the second capacitor for selectively coupling the first capacitor to the second capacitor in a manner to regulate the second supply voltage.

Description

CAPACITIVELY COUPLED POWER SUPPLY
RELATED APPLICATIONS
[0001] The present application claims priority under 35 U.S.C. § 119 of Provisional Patent Application Serial Number 60/418,823 filed on October 16, 2002. FIELD OF THE INVENTION
[0002] The present invention relates to power supplies in general, and more particularly, to generating a supply voltage using a capacitive voltage divider.
BACKGROUND OF THE INVENTION
[0003] Power supplies serve the purpose of converting an input voltage into one or several output voltages. An AC power source may be used to provide an AC power line input, which gets converted to a DC regulated output voltage. Moreover, a power supply that produces a lower output voltage than that of the rectified main voltage power supply is generally needed in order to power small signal devices such as integrated circuit (IC) controllers and the like. Such power supplies should minimize losses occurring therein. While step down transformers have been used as power supplies, such devices tend to be large, bulky, and relatively expensive. A regulated power supply that utilizes capacitive elements to transform an input voltage from an AC power source to a specified output voltage level across a load is desired.
SUMMARY OF THE INVENTION [0004] According to an aspect of the present invention, a power supply comprises a pair of first and second capacitors forming a capacitive voltage divider. A source of a periodic input supply voltage is coupled to the capacitive voltage divider for producing in the second capacitor, from a portion of the periodic input supply voltage, a second supply voltage that is coupled to a load circuit. A switch is coupled to the second capacitor for selectively coupling the first capacitor to the second capacitor in a manner to regulate the second supply voltage.
[0005] According to another aspect of the present invention, a power supply using a controlled capacitive divider comprises a first capacitor and a second capacitor that is selectively coupled to the first capacitor by means of a switch. A control circuit senses the voltage across one of the first and second capacitors; and provides a control signal to cause the switch to selectively couple the first and second capacitors.
BRIEF DESCRIPTION OF THE DRAWINGS
[0006] Figure 1 is an exemplary illustration of a capacitively coupled power supply according to an exemplary embodiment of the present invention.
[0007] Figure 2 is an exemplary illustration of a capacitively coupled power supply according to another exemplary embodiment of the present invention.
[0008] Figure 3 is an exemplary illustration of a capacitively coupled power supply according to another exemplary embodiment of the present invention. [0009] Figure 4 is an exemplary illustration of a capacitively coupled power supply according to another exemplary embodiment of the present invention.
[0010] Figure 5 is an exemplary illustration of a capacitively coupled power supply according to another exemplary embodiment of the present invention.
DETAILED DESCRIPTION [0011] Figure 1 is a block diagram illustrating a circuit 100 for generating a regulated supply voltage using a capacitive divider according to the general principles embodying the present invention. Throughout the drawings, like reference numerals are used to indicate like parts. The circuit 100 includes a source 10 of AC power applied at node 10a. A voltage or a current source may be used, however, in case of a mains application, it is understood that the source comprise an AC power line input. A capacitive divider comprising capacitor Cmains and capacitor CL connected in series, is used to transform the input voltage (Vin) at node 10a to the desired output voltage level VI across load device RL. Since the energy transfer is determined by the capacitor Cmains, a voltage source can automatically be considered as a current source. [0012] Control circuit 60 coupled to the voltage divider arrangement measures the output voltage VI and compares the measured output voltage with a reference voltage Vref in order to control switched rectifier circuit 30. There exist two basic arrangements for the switched rectifier circuit 30. The first arrangement disables the further charge of capacitor CL as soon as a desired output voltage level (Vl=Vref) is reached. This arrangement may be implemented as a forward controlled shunt switch. The second arrangement enables a faster discharge of capacitor CL as long as the output voltage (VI) exceeds the desired value (Vref). This arrangement may be implemented as a controlled series switch, whose return current is controlled. These two basic implementations are shown in greater detail in Figures 2 and 3, respectively. [0013] In an exemplary application, generation of auxiliary power in a switch mode power supply may be accomplished in the following manner. Referring now to Figure 2, a source of periodic input voltage Vin is developed at node 10a from AC source 10 coupled to rectifier 12. Filter capacitor Cmains has a first terminal connected to node 10a, and a second terminal connected to node 10b. Diode Dl is coupled in reverse-bias fashion between node 10b and ground potential (GND). Filter capacitor Cmains is coupled to capacitor CL via diode D2 in a voltage divider arrangement. Capacitor CL has a first terminal connected at node 10c to the cathode of diode D2, and a second terminal connected to GND. Switch SI is connected between node 10b and GND, in parallel with diode Dl. Control circuit 60 is coupled in parallel with load resistor RL and capacitor CL at node 10c. Bias resistor Rbias is connected between nodes 10a and 10c. Note that when diode D2 is forward biased (i.e. conducting), nodes 10b, 10c are at substantially the same potential, except for the relatively small voltage drop across diode D2. The resistor Rbias has a relatively large value and delivers the start up voltage (VI) for a common used primary controller IC. Resistor Rmains represents the main load resistance and is connected between the input node 10a and GND.
[0014] Control circuit 60 is communicatively coupled (represented by dashed line 63) to switch SI, which selectively couple capacitors Cmains and CL. Control circuit 60 senses output voltage VI and compares the output voltage with a predetermined reference voltage Vref to generate a control signal to cause SI to open or close, thereby switchably coupling/decoupling the electrical path between Cmains and CL. Output voltage VI at node 10c is used for the primary switch control circuit or controller 60. In an exemplary embodiment, the switch control circuit may be a pulse width modulated (PWM) control circuit or any other type of switch controlling arrangement. It is understood that capacitor Cmains couples the AC signal to the switched rectifier circuit 30 and controller 60. [0015] The DC voltage Vin is further applied across the representative main load resistance Rmains. [0016] For the case where CL»Cmains, the capacitor Cmains essentially operates as a filter capacitor to filter the periodic input signal applied at node 10a. The transferred energy in CL is much smaller than the energy in Cmains. Capacitor CL is charged through conducting diode D2 and the capacitor by the rectified input current Iin, when switch SI is open. This results in an increasing voltage across Cmains and CL as long as a charge current flows. When the input voltage of AC source 10 is below the voltage Vin, the rectifier 12 decouples the AC source 10 from the rest of the circuit (i.e. node 10a). At this time, capacitor Cmains delivers current to load Rmains by means of conducting diode Dl. In this case, no current path exists between Cmains and CL, as diode D2 serves to block any current flowing there between. A relatively small current flowing through CL is discharged through load resistor RL. Note that the discharge current flowing through CL is only feeding the control circuit 60 and load RL, which represents the standby power supply, for example, in a television set (which is e.g. 1-3 Watts). This is significantly less than the current being discharged through diode Dl, capacitor Cmains and Rmains representing the main load of the TV set (which is, e.g., 100-150 Watts). Because diode D2 becomes reverse biased, the voltage VI across CL remains positive, and its drop is only determined by the auxiliary load resistor RL.
[0017] According to an aspect of the invention, the charge condition of Cmains mainly determines the charge in CL. More particularly, after a first discharging period wherein Cmains is discharged, during the next cycle of the mains, the capacitor Cmains is charged while at the same time, capacitor CL is charged, due to the conduction of diode D2. Note that in one embodiment, CL is approximately 3-4 times greater than that of Cmains (e.g. Cmains is about 68 uF (micro Farads) while CL is 220 uF). Note that the voltage at " Rmains and RL has a ratio that is chosen to obtain the desired output voltage VI . However, Rmains for the main power supply often varies in a wide range. For example, since Rmains is typically the main power supply for any consumer electronic device, such as a TV, its power may range anywhere from 50W to 150W depending on factors such as sound, picture parameters and the like, within the range of the run mode of the device. However, the standby output power of VI may drop down to 1W (Watt) or less. Moreover, the load RL remains substantially constant in order to feed small signal devices such as a microprocessor, controller, and IR receivers, for example. [0018] As shown in Figure 2, switch SI is configured as a switched shunt controller arrangement, wherein SI closes in response to a signal from control circuit 60, thereby disabling further charging of CL as soon as the desired output voltage at node 10c is reached. In this manner, by opening and closing switch SI, the output voltage VI across RL may be controlled. This implementation is useful in providing a circuit arrangement when the output voltage should not exceed a predetermined level. More particularly, as soon as the desired output voltage level at CL is reached and sensed by control circuit 60, switch S 1 closes so that the current path exists through Cmains, SI and back to the input, without further charging at CL, to thereby maintain the voltage VI . Note that S 1 can be closed or open within 1 cycle of the 50 or 60Hz input sinusoid.
[0019] Another embodiment is shown in Figure 3. The embodiment of Figure 3 differs from that of Figure 2 in that switch SI is connected between nodes 10b and 10c in parallel with conducting diode D2. In this case, the maximum output voltage VI is not precisely determined as a threshold limit. The switch SI, in response to a signal from control circuit 60, closes to enable a discharge path from CL through SI and Cmains to Rmains. Opening of the switch disables the further discharge to Rmains as soon as a minimal desired output voltage is reached. In this implementation, the output voltage across RL is not controlled during the charging cycle (when SI is open). The above described embodiment provides a useful solution whenever a voltage limiter like a series regulator is followed. The solution according Figure 3 advantageously does not produce current transients in Cmains and in the line rectifier. From the above described embodiments shown in Figures 2 and 3, the charge is controlled in the embodiment of Figure 2, while the discharge is controlled in the embodiment of Figure 3.
[0020] Detailed circuit diagrams implementing the schematic representations of Figures 2 and 3, are shown in Figures 4 and 5, respectively. As shown therein, an arrangement for generating auxiliary power for a common used primary controller of a switch mode power supply is implemented. The initial start up voltage is provided by Rbias. In normal run mode, the power consumption for the controller is higher than resistor Rbias can deliver. Here, the tapped capacitors Cmains and CL support the power to the controller as described above. The representative switch SI in Figure 2 is established by means of high gain transistors Ql and Q2 of Figure 4. As shown in Figure 4, pnp transistor Ql has its base terminal bl connected to terminal c2 of transistor Q2. Terminal el of Ql is connected to node 10b, while terminal cl of Ql is connected to base terminal b2 of npn transistor Q2. Terminals cl, b2 are connected at node lOd, which is coupled to GND through resistor R2. Resistor Rl couples terminals bl, c2 of Ql, Q2, respectively, to node 10b. Zener diode D4 is coupled between node 10c and node lOd. The output voltage is sensed by diode D4 and directly controls the high gains transistors Ql, Q2. The circuit 400 may be embodied in a free running power oscillator, whose operation is enabled/disabled depending on the output voltage from the secondary side 410. As previously mentioned, the initial startup voltage is provided by Rbias. As long as the voltage across CL is below a threshold, the current path from Cmains through D2 to CL is established, and the capacitors Cmains and CL continue to charge. However, upon operation of the power oscillator, the power consumed by the oscillator is higher than Rbias can deliver. Thus, the energy stored in Cmains and CL are used to power the drivers of the power oscillator.
[0021] In analogous fashion, switch SI of Figure 3 is implemented as transistor Ql in the circuit arrangement 500 illustrated in Figure 5. As shown in Figure 5, pnp transistor Ql has its base terminal bl connected to terminal c2 of npn transistor Q2 through resistor R2. Terminal el of Ql is connected to the anode of diode D2, while terminal cl of Ql is connected to the cathode of diode D2 at node 10b. Resistor Rl is connected between the anode of D2 and terminal bl of Ql in a voltage divider arrangement with R2. Diode Dl is connected between node 10b and GND. Base terminal b2 of npn transistor Q2 is connected to Zener diode D4 at node lOe. Resistor R3 is connected between node lOe and GND, while the cathode of diode D4 is connected to node 10c through resistor R4. Terminal e2 of transistor Q2 is connected to GND. Here, Zener Diode D4 limits the drive voltage at the input of the controller 60 to a given or predetermined value. Diode D4 controls Ql via the driver Q2. Thus, capacitor CL remains switchably coupled to Cmains and to the main load Rmains, corresponding to the transformed load Rs on the secondary side, until the desired minimal voltage at the input of controller 60 is reached. At that time, capacitor CL is discharged through control circuit 60 by the relatively low current required for the controller. This takes place until the next charge interval arrives in Cmains. As an alternative arrangement, diode D4 could be part of a common used series voltage limiter or stabilization circuit.
[0022] Although the invention has been described in terms of exemplary embodiments, it is not limited thereto. The appended claims should be construed broadly to include other variants and embodiments of the invention which may be made by those skilled in the art without departing from the scope and range of equivalents of the invention.

Claims

1. A power supply comprising: a pair of first and second capacitors forming a capacitive voltage divider; a source of a periodic input supply voltage coupled to said capacitive voltage divider for producing in said second capacitor from a portion of said periodic input supply voltage, a second supply voltage that is coupled to a load circuit; and a switch coupled to said second capacitor for selectively coupling said first capacitor to said second capacitor in a manner to regulate said second supply voltage.
2. The power supply of claim 1, wherein said switch is coupled to said second capacitor for selectively coupling said first capacitor to said second capacitor in a negative feedback manner to regulate said second supply voltage.
3. The power supply of claim 1, wherein the switch is responsive to a control signal from a control circuit which senses said second supply voltage and compares said sensed voltage with a reference voltage, for selectively coupling said first capacitor to said second capacitor.
4. The power supply of claim 1, wherein said switch is coupled between said first and second capacitors and responsive to a control signal from a control circuit for selectively coupling said first and second capacitors.
5. The power supply of claim 1, wherein the switch comprises a shunt circuit across said second capacitor for selectively coupling said first and said second capacitors.
6. The power supply of claim 1 , wherein the switch comprises at least one transistor.
7. The power supply of claim 1, wherein a first diode is coupled between the first and second capacitors, and wherein said second capacitor has a first terminal coupled to a reference potential.
8. The power supply of claim 7, wherein a second diode is coupled between the first capacitor and said reference potential.
9. The power supply of claim 1, wherein the source of periodic input supply voltage comprises an AC source coupled to a rectifier.
10. The power supply of claim 1, wherein said switch selectively couples said first and second capacitors according to a control signal for one of: a) regulating a charging of said second capacitor; and b) regulating a discharging of said second capacitor.
11. The power supply of claim 1 , wherein said switch varies a charge transfer between the first and second capacitors when one of said first and second capacitors is charged in a first direction, and is prevented from varying a charge transfer between first and second capacitors when said one of said first and second capacitors is charged in a second direction opposite said first direction.
12. A power supply, comprising: a first capacitor; a second capacitor that is selectively coupled to the first capacitor to form a capacitive voltage divider; a control circuit coupled to said second capacitor for sensing the voltage across one of said first and second capacitors and for controllably coupling the first and second capacitors.
13. The power supply of claim 12, further comprising at least one switch coupled between said first and second capacitors and responsive to a control signal from the control circuit for selectively coupling said first and second capacitors.
14. The power supply of claim 13 , wherein the at least one switch comprises one or more transistors.
15. The power supply of claim 12, further comprising a first rectifier having a first terminal coupled to said first capacitor, and a second terminal coupled to said second capacitor, and a switch having a terminal coupled to said first terminal of said first rectifier.
16. The power supply of claim 15, wherein said switch further comprises a second terminal coupled to said second terminal of said first rectifier.
17. The power supply of claim 16, wherein said switch comprises one or more transistors.
18. The power supply of claim 16, further comprising a second rectifier coupled in parallel with said switch.
19. The power supply of claim 12, wherein the second capacitor provides a discharge current through said controller.
PCT/IB2003/005308 2002-10-16 2003-10-16 Capacitively coupled power supply Ceased WO2004038902A2 (en)

Priority Applications (8)

Application Number Priority Date Filing Date Title
DE60326616T DE60326616D1 (en) 2002-10-16 2003-10-16 CAPACITIVELY COUPLED POWER SUPPLY
AU2003276632A AU2003276632A1 (en) 2002-10-16 2003-10-16 Capacitively coupled power supply
CN2003801013136A CN1703825B (en) 2002-10-16 2003-10-16 Capacitively coupled power supply
MXPA05004085A MXPA05004085A (en) 2002-10-16 2003-10-16 Capacitively coupled power supply.
EP03809408A EP1552596B1 (en) 2002-10-16 2003-10-16 Capacitively coupled power supply
KR1020057006633A KR101084411B1 (en) 2002-10-16 2003-10-16 Capacitively Coupled Power Supplies
US10/531,118 US7019992B1 (en) 2002-10-16 2003-10-16 Capacitively coupled power supply
JP2004546312A JP4457014B2 (en) 2002-10-16 2003-10-16 Capacitively coupled power supply

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US41882302P 2002-10-16 2002-10-16
US60/418,823 2002-10-16

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EP (1) EP1552596B1 (en)
JP (1) JP4457014B2 (en)
KR (1) KR101084411B1 (en)
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AU (1) AU2003276632A1 (en)
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CN1703825A (en) 2005-11-30
MXPA05004085A (en) 2005-06-08
US20060067094A1 (en) 2006-03-30
EP1552596A2 (en) 2005-07-13
DE60326616D1 (en) 2009-04-23
AU2003276632A1 (en) 2004-05-13
KR101084411B1 (en) 2011-11-21
WO2004038902A3 (en) 2004-07-22
MY134548A (en) 2007-12-31
MY134537A (en) 2007-12-31
JP2006511182A (en) 2006-03-30
JP4457014B2 (en) 2010-04-28
KR20050048691A (en) 2005-05-24
EP1552596B1 (en) 2009-03-11
US7019992B1 (en) 2006-03-28
CN1703825B (en) 2012-07-04
AU2003276632A8 (en) 2004-05-13

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