WO2004086611A3 - Systems and methods for implementing a sample rate converter using hardware and software to maximize speed and flexibility - Google Patents

Systems and methods for implementing a sample rate converter using hardware and software to maximize speed and flexibility Download PDF

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Publication number
WO2004086611A3
WO2004086611A3 PCT/US2004/008547 US2004008547W WO2004086611A3 WO 2004086611 A3 WO2004086611 A3 WO 2004086611A3 US 2004008547 W US2004008547 W US 2004008547W WO 2004086611 A3 WO2004086611 A3 WO 2004086611A3
Authority
WO
WIPO (PCT)
Prior art keywords
sample rate
hardware
data stream
systems
methods
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/US2004/008547
Other languages
French (fr)
Other versions
WO2004086611A2 (en
Inventor
Jack B Andersen
Larry E Hand
Daniel L W Chieng
Joel W Page
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
D2Audio LLC
Original Assignee
D2Audio LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by D2Audio LLC filed Critical D2Audio LLC
Priority to JP2006507404A priority Critical patent/JP4276258B2/en
Priority to EP04757929A priority patent/EP1609241B1/en
Priority to DE602004010632T priority patent/DE602004010632T2/en
Publication of WO2004086611A2 publication Critical patent/WO2004086611A2/en
Publication of WO2004086611A3 publication Critical patent/WO2004086611A3/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/52—Circuit arrangements for protecting such amplifiers
    • H03F1/523—Circuit arrangements for protecting such amplifiers for amplifiers using field-effect devices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H03F3/217—Class D power amplifiers; Switching amplifiers
    • H03F3/2171—Class D power amplifiers; Switching amplifiers with field-effect devices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H03F3/217—Class D power amplifiers; Switching amplifiers
    • H03F3/2175—Class D power amplifiers; Switching amplifiers using analogue-digital or digital-analogue conversion
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03G—CONTROL OF AMPLIFICATION
    • H03G7/00—Volume compression or expansion in amplifiers
    • H03G7/007—Volume compression or expansion in amplifiers of digital or coded signals
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H17/00—Networks using digital techniques
    • H03H17/02—Frequency selective networks
    • H03H17/06—Non-recursive filters
    • H03H17/0621—Non-recursive filters with input-sampling frequency and output-delivery frequency which differ, e.g. extrapolation; Anti-aliasing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0016—Arrangements for synchronising receiver with transmitter correction of synchronization errors
    • H04L7/005—Correction by an elastic buffer
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/331—Sigma delta modulation being used in an amplifying circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H2218/00—Indexing scheme relating to details of digital filters
    • H03H2218/06—Multiple-input, multiple-output [MIMO]; Multiple-input, single-output [MISO]

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Mathematical Physics (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Television Systems (AREA)
  • Communication Control (AREA)
  • Radar Systems Or Details Thereof (AREA)

Abstract

Systems and methods for converting a digital input data stream from a first sample rate to a second, fixed sample rate using a combination of hardware and software components. In one embodiment, a system includes a rate estimator configured to estimate the sample rate of an input data stream, a phase selection unit configured to select a phase for interpolation of a set of polyphase filter coefficients based on the estimated sample rate, a coefficient interpolator configured to interpolate the filter coefficients based on the selected phase, and a convolution unit configured to convolve the interpolated filter coefficients with samples of the input data stream to produce samples of a re­sampled output data stream. One or more hardware or software components are shared between multiple channels that can process data streams having independently variable sample rates.
PCT/US2004/008547 2003-03-21 2004-03-19 Systems and methods for implementing a sample rate converter using hardware and software to maximize speed and flexibility Ceased WO2004086611A2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2006507404A JP4276258B2 (en) 2003-03-21 2004-03-19 System and method for implementing sample rate converters using hardware and software to maximize speed and flexibility
EP04757929A EP1609241B1 (en) 2003-03-21 2004-03-19 Systems and methods for implementing a sample rate converter using hardware and software to maximize speed and flexibility
DE602004010632T DE602004010632T2 (en) 2003-03-21 2004-03-19 SYSTEMS AND METHOD FOR IMPLEMENTING A SCAN CONVERTER USING HARDWARE AND SOFTWARE TO MAXIMIZE SPEED AND FLEXIBILITY

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US45642903P 2003-03-21 2003-03-21
US60/456,429 2003-03-21
US46976103P 2003-05-12 2003-05-12
US60/469,761 2003-05-12

Publications (2)

Publication Number Publication Date
WO2004086611A2 WO2004086611A2 (en) 2004-10-07
WO2004086611A3 true WO2004086611A3 (en) 2005-01-27

Family

ID=33101246

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2004/008547 Ceased WO2004086611A2 (en) 2003-03-21 2004-03-19 Systems and methods for implementing a sample rate converter using hardware and software to maximize speed and flexibility

Country Status (5)

Country Link
EP (1) EP1609241B1 (en)
JP (1) JP4276258B2 (en)
AT (1) ATE381145T1 (en)
DE (1) DE602004010632T2 (en)
WO (1) WO2004086611A2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101433181B1 (en) * 2014-03-28 2014-08-27 삼성탈레스 주식회사 Satellite communication transmitter/receiver method of polyphase fitlter structure capable of applying to nonequivalent interval channels

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2267193A (en) * 1992-05-21 1993-11-24 Sony Broadcast & Communication Multi-tap oversampling filter
US5475628A (en) * 1992-09-30 1995-12-12 Analog Devices, Inc. Asynchronous digital sample rate converter
US5986589A (en) * 1997-10-31 1999-11-16 Ati Technologies, Inc. Multi-stream audio sampling rate conversion circuit and method
US6061410A (en) * 1997-02-27 2000-05-09 Advanced Micro Devices Frequency ratio estimation arrangement and method thereof
US6134268A (en) * 1998-10-19 2000-10-17 Motorola, Inc. Apparatus for performing a non-integer sampling rate change in a multichannel polyphase filter
US20020190880A1 (en) * 2001-06-07 2002-12-19 Mclaughlin Kevin J. Digital sample rate converters having matched group delay

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2267193A (en) * 1992-05-21 1993-11-24 Sony Broadcast & Communication Multi-tap oversampling filter
US5475628A (en) * 1992-09-30 1995-12-12 Analog Devices, Inc. Asynchronous digital sample rate converter
US6061410A (en) * 1997-02-27 2000-05-09 Advanced Micro Devices Frequency ratio estimation arrangement and method thereof
US5986589A (en) * 1997-10-31 1999-11-16 Ati Technologies, Inc. Multi-stream audio sampling rate conversion circuit and method
US6134268A (en) * 1998-10-19 2000-10-17 Motorola, Inc. Apparatus for performing a non-integer sampling rate change in a multichannel polyphase filter
US20020190880A1 (en) * 2001-06-07 2002-12-19 Mclaughlin Kevin J. Digital sample rate converters having matched group delay

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
PARK S ET AL: "A novel structure for real-time digital sample-rate converters with finite precision error analysis", SPEECH PROCESSING 2, VLSI, UNDERWATER SIGNAL PROCESSING. TORONTO, MAY 14 - 17, 1991, INTERNATIONAL CONFERENCE ON ACOUSTICS, SPEECH & SIGNAL PROCESSING. ICASSP, NEW YORK, IEEE, US, vol. VOL. 2 CONF. 16, 14 April 1991 (1991-04-14), pages 3613 - 3616, XP010043651, ISBN: 0-7803-0003-3 *

Also Published As

Publication number Publication date
JP4276258B2 (en) 2009-06-10
DE602004010632T2 (en) 2008-12-11
EP1609241A2 (en) 2005-12-28
JP2007521716A (en) 2007-08-02
DE602004010632D1 (en) 2008-01-24
EP1609241B1 (en) 2007-12-12
WO2004086611A2 (en) 2004-10-07
ATE381145T1 (en) 2007-12-15

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