WO2005029583A3 - Schottky barrier integrated circuit - Google Patents

Schottky barrier integrated circuit Download PDF

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Publication number
WO2005029583A3
WO2005029583A3 PCT/US2004/030710 US2004030710W WO2005029583A3 WO 2005029583 A3 WO2005029583 A3 WO 2005029583A3 US 2004030710 W US2004030710 W US 2004030710W WO 2005029583 A3 WO2005029583 A3 WO 2005029583A3
Authority
WO
WIPO (PCT)
Prior art keywords
schottky barrier
integrated circuit
reducing
semiconductor substrate
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/US2004/030710
Other languages
French (fr)
Other versions
WO2005029583A2 (en
Inventor
John P Snyder
John M Larson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Spinnaker Semiconductor Inc
Original Assignee
Spinnaker Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Spinnaker Semiconductor Inc filed Critical Spinnaker Semiconductor Inc
Priority to EP04784553A priority Critical patent/EP1676322A2/en
Publication of WO2005029583A2 publication Critical patent/WO2005029583A2/en
Publication of WO2005029583A3 publication Critical patent/WO2005029583A3/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/027Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs
    • H10D30/0277Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs forming conductor-insulator-semiconductor or Schottky barrier source or drain regions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/60Electrodes characterised by their materials
    • H10D64/64Electrodes comprising a Schottky barrier to a semiconductor
    • H10D64/647Schottky drain or source electrodes for IGFETs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/017Manufacturing their source or drain regions, e.g. silicided source or drain regions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/86Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of Schottky-barrier gate FETs

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

A Schottky barrier integrated circuit is disclosed, the circuit having at least one PMOS device or at least one NMOS device, at least one of the PMOS device or NMOS device having metal source-drain contacts forming Schottky barrier or Schottky-like contacts to the semiconductor substrate. The device provides a new distribution of mobile charge carriers in the bulk region of the semiconductor substrate, which improves device and circuit performance by lowering gate capacitance, improving effective carrier mobility, μ reducing noise, reducing gate insulator leakage, reducing hot carrier effect and improving reliability.
PCT/US2004/030710 2003-09-19 2004-09-17 Schottky barrier integrated circuit Ceased WO2005029583A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
EP04784553A EP1676322A2 (en) 2003-09-19 2004-09-17 Schottky barrier integrated circuit

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US50407803P 2003-09-19 2003-09-19
US60/504,078 2003-09-19
US55604604P 2004-03-24 2004-03-24
US60/556,046 2004-03-24

Publications (2)

Publication Number Publication Date
WO2005029583A2 WO2005029583A2 (en) 2005-03-31
WO2005029583A3 true WO2005029583A3 (en) 2005-07-07

Family

ID=34381099

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2004/030710 Ceased WO2005029583A2 (en) 2003-09-19 2004-09-17 Schottky barrier integrated circuit

Country Status (3)

Country Link
US (2) US20050104152A1 (en)
EP (1) EP1676322A2 (en)
WO (1) WO2005029583A2 (en)

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US7238567B2 (en) * 2004-08-23 2007-07-03 Texas Instruments Incorporated System and method for integrating low schottky barrier metal source/drain
US7393733B2 (en) 2004-12-01 2008-07-01 Amberwave Systems Corporation Methods of forming hybrid fin field-effect transistor structures
US20060237752A1 (en) * 2005-03-31 2006-10-26 Larson John M Schottky barrier MOSFET device and circuit
JP2008226862A (en) * 2005-05-11 2008-09-25 Interuniv Micro Electronica Centrum Vzw Method for adjusting the work function of a silicided gate electrode
US9153645B2 (en) 2005-05-17 2015-10-06 Taiwan Semiconductor Manufacturing Company, Ltd. Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication
US8324660B2 (en) 2005-05-17 2012-12-04 Taiwan Semiconductor Manufacturing Company, Ltd. Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication
US8222646B2 (en) * 2005-07-08 2012-07-17 The Hong Kong University Of Science And Technology Thin-film transistors with metal source and drain and methods of fabrication
US7250666B2 (en) * 2005-11-15 2007-07-31 International Business Machines Corporation Schottky barrier diode and method of forming a Schottky barrier diode
WO2007112066A2 (en) 2006-03-24 2007-10-04 Amberwave Systems Corporation Lattice-mismatched semiconductor structures and related methods for device fabrication
US20070267762A1 (en) * 2006-05-19 2007-11-22 Interuniversitair Microelektronica Centrum Vzw (Imec) Semiconductor devices
WO2008030574A1 (en) 2006-09-07 2008-03-13 Amberwave Systems Corporation Defect reduction using aspect ratio trapping
WO2008039495A1 (en) * 2006-09-27 2008-04-03 Amberwave Systems Corporation Tri-gate field-effect transistors formed by aspect ratio trapping
US7875958B2 (en) 2006-09-27 2011-01-25 Taiwan Semiconductor Manufacturing Company, Ltd. Quantum tunneling devices and circuits with lattice-mismatched semiconductor structures
US20080187018A1 (en) 2006-10-19 2008-08-07 Amberwave Systems Corporation Distributed feedback lasers formed via aspect ratio trapping
US8304805B2 (en) 2009-01-09 2012-11-06 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor diodes fabricated by aspect ratio trapping with coalesced films
US7825328B2 (en) 2007-04-09 2010-11-02 Taiwan Semiconductor Manufacturing Company, Ltd. Nitride-based multi-junction solar cell modules and methods for making the same
WO2008124154A2 (en) 2007-04-09 2008-10-16 Amberwave Systems Corporation Photovoltaics on silicon
US8237151B2 (en) 2009-01-09 2012-08-07 Taiwan Semiconductor Manufacturing Company, Ltd. Diode-based devices and methods for making the same
US8329541B2 (en) 2007-06-15 2012-12-11 Taiwan Semiconductor Manufacturing Company, Ltd. InP-based transistor fabrication
JP5108408B2 (en) * 2007-07-26 2012-12-26 ルネサスエレクトロニクス株式会社 Semiconductor device and manufacturing method thereof
WO2009035746A2 (en) 2007-09-07 2009-03-19 Amberwave Systems Corporation Multi-junction solar cells
US8183667B2 (en) 2008-06-03 2012-05-22 Taiwan Semiconductor Manufacturing Co., Ltd. Epitaxial growth of crystalline material
US8274097B2 (en) 2008-07-01 2012-09-25 Taiwan Semiconductor Manufacturing Company, Ltd. Reduction of edge effects from aspect ratio trapping
US8981427B2 (en) 2008-07-15 2015-03-17 Taiwan Semiconductor Manufacturing Company, Ltd. Polishing of small composite semiconductor materials
WO2010033813A2 (en) 2008-09-19 2010-03-25 Amberwave System Corporation Formation of devices by epitaxial layer overgrowth
US20100072515A1 (en) 2008-09-19 2010-03-25 Amberwave Systems Corporation Fabrication and structures of crystalline material
US8253211B2 (en) 2008-09-24 2012-08-28 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor sensor structures with reduced dislocation defect densities
SG171987A1 (en) 2009-04-02 2011-07-28 Taiwan Semiconductor Mfg Devices formed from a non-polar plane of a crystalline material and method of making the same
JP2012004471A (en) * 2010-06-21 2012-01-05 Toshiba Corp Semiconductor device and method of manufacturing the same
CN104170058B (en) 2011-11-23 2017-08-08 阿科恩科技公司 Improved metal contacts to group IV semiconductors by intercalating interfacial atomic monolayers
US20140166323A1 (en) * 2012-09-16 2014-06-19 J. Carl Cooper Kickback Reduction for Power Tools and Machines
US9620611B1 (en) 2016-06-17 2017-04-11 Acorn Technology, Inc. MIS contact structure with metal oxide conductor
WO2018094205A1 (en) 2016-11-18 2018-05-24 Acorn Technologies, Inc. Nanowire transistor with source and drain induced by electrical contacts with negative schottky barrier height
US12136661B2 (en) * 2020-09-08 2024-11-05 James D. Welch Compact CMOS

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4485550A (en) * 1982-07-23 1984-12-04 At&T Bell Laboratories Fabrication of schottky-barrier MOS FETs
US6268636B1 (en) * 1994-05-31 2001-07-31 James D. Welch Operation and biasing for single device equivalent to CMOS
WO2003015181A1 (en) * 2001-08-10 2003-02-20 Spinnaker Semiconductor, Inc. Transistor having high dielectric constant gate insulating layer and source and drain forming schottky contact with substrate
WO2003063202A2 (en) * 2002-01-23 2003-07-31 Spinnaker Semiconductor, Inc. Field effect transistor having source and/or drain forming schottky or schottky-like contact with strained semiconductor substrate

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US6624493B1 (en) * 1994-05-31 2003-09-23 James D. Welch Biasing, operation and parasitic current limitation in single device equivalent to CMOS, and other semiconductor systems
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JP4213776B2 (en) * 1997-11-28 2009-01-21 光照 木村 MOS gate Schottky tunnel transistor and integrated circuit using the same
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Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4485550A (en) * 1982-07-23 1984-12-04 At&T Bell Laboratories Fabrication of schottky-barrier MOS FETs
US6268636B1 (en) * 1994-05-31 2001-07-31 James D. Welch Operation and biasing for single device equivalent to CMOS
WO2003015181A1 (en) * 2001-08-10 2003-02-20 Spinnaker Semiconductor, Inc. Transistor having high dielectric constant gate insulating layer and source and drain forming schottky contact with substrate
WO2003063202A2 (en) * 2002-01-23 2003-07-31 Spinnaker Semiconductor, Inc. Field effect transistor having source and/or drain forming schottky or schottky-like contact with strained semiconductor substrate

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
TUCKER J R ED - POMRENKE G S ET AL: "Schottky barrier MOSFETs for silicon nanoelectronics", FRONTIERS IN ELECTRONICS, 1997. WOFE '97. PROCEEDINGS., 1997 ADVANCED WORKSHOP ON PUERTO DE LA CRUZ, SPAIN 6-11 JAN. 1997, NEW YORK, NY, USA,IEEE, US, 6 January 1997 (1997-01-06), pages 97 - 100, XP010245492, ISBN: 0-7803-4059-0 *
WANG C ET AL: "Sub-40 nm PtSi Schottky source/drain metal–oxide–semicond uctor field-effect transistors", APPLIED PHYSICS LETTERS, AMERICAN INSTITUTE OF PHYSICS. NEW YORK, US, vol. 74, no. 8, 22 February 1999 (1999-02-22), pages 1174 - 1176, XP012023320, ISSN: 0003-6951 *

Also Published As

Publication number Publication date
US20100025774A1 (en) 2010-02-04
US20050104152A1 (en) 2005-05-19
EP1676322A2 (en) 2006-07-05
WO2005029583A2 (en) 2005-03-31

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