WO2005076679A3 - Verfahren zum anordnen einer leitungsstruktur auf einem substrat und substrat mit der leitungsstruktur - Google Patents

Verfahren zum anordnen einer leitungsstruktur auf einem substrat und substrat mit der leitungsstruktur Download PDF

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Publication number
WO2005076679A3
WO2005076679A3 PCT/EP2005/050322 EP2005050322W WO2005076679A3 WO 2005076679 A3 WO2005076679 A3 WO 2005076679A3 EP 2005050322 W EP2005050322 W EP 2005050322W WO 2005076679 A3 WO2005076679 A3 WO 2005076679A3
Authority
WO
WIPO (PCT)
Prior art keywords
substrate
conductor structure
nanotubes
transfer support
contact surface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/EP2005/050322
Other languages
English (en)
French (fr)
Other versions
WO2005076679A2 (de
Inventor
Gerald Eckstein
Wolfram Wersing
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Siemens Corp
Original Assignee
Siemens AG
Siemens Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG, Siemens Corp filed Critical Siemens AG
Priority to JP2006551839A priority Critical patent/JP2007520887A/ja
Priority to US10/587,982 priority patent/US20070120273A1/en
Priority to EP05701610A priority patent/EP1712113A2/de
Publication of WO2005076679A2 publication Critical patent/WO2005076679A2/de
Publication of WO2005076679A3 publication Critical patent/WO2005076679A3/de
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B7/00—Microstructural systems ; Auxiliary parts of microstructural devices or systems
    • B81B7/0006—Interconnects
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y30/00—Nanotechnology for materials or surface science, e.g. nanocomposites
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/098—Applying pastes or inks, e.g. screen printing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/66—Conductive materials thereof
    • H10W70/664—Carbon-based materials, e.g. fullerenes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/0554—Manufacture or treatment of conductive parts of the interconnections of nanotubes or nanowires
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/30—Self-sustaining carbon mass or layer with impregnant or other layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Nanotechnology (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Composite Materials (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Materials Engineering (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Carbon And Carbon Compounds (AREA)

Abstract

Die Erfindung betrifft ein Verfahren zum Anordnen einer Leitungsstruktur (2) auf einem Substrat (1). Das Verfahren kann als Transferdruckverfahren bezeichnet werden. Folgende Verfahrensschritte werden durchgeführt: a) Herstellen einer trennbaren Verbindung (4) zwischen mindestens einem Transferträger (3) und der Leitungsstruktur (2), b) Zusammenbringen des Transferträgers (3) mit der Leistungsstruktur (2) und des Substrats (1), so dass eine Verbindung (5) zwischen der Leitungsstruktur (2) und dem Substrat (1) hergestellt wird, die stärker ist als die trennbare Verbindung (4) zwischen dem Transferträger (3) und der Leitungsstruktur (2) und c) Trennen der trennbaren Verbindung (4) zwischen dem Transferträger (3) und der Leitungsstruktur (2) des Transferträgers (3), wobei die Verbindung (5) zwischen der Leitungsstruktur (2) und dem Substrat (1) erhalten bleibt. Das Verfahren ist insbesondere zur lateralen Anordnung von Leitungsstrukturen mit Nanoröhren (20) bei relativ­niedrigen Temperaturen (T < 600° C) geeignet. So resultiert ein Substrat (1) mit einer Leitungsstruktur (2), die an einer Substratkontaktfläche (10, 11) des Substrats (1) und an mindestens einer weiteren Substratkontaktfläche (10, 11) des Substrats (1) mit dem Substrat (1) verbunden ist. Das Substrat (1) ist dadurch gekennzeichnet, dass die Leitungsstruktur (2) zwischen den beiden Substratkontaktflächen (10, 11) Nanoröhren (20) aufweist, die von der Substratkontaktfläche (10, 11) zur weiteren Substratkontaktfläche (10, 11) ausgerichtet sind. Die Nanoröhren (20) sind lateral angeordnet. Durch das laterale Anordnen entstehen Nanodrähte. Dabei werden die ausgezeichneten elektrischen und thermischen Eigenschaften der Nanoröhren (20) nutzbar gemacht.
PCT/EP2005/050322 2004-02-03 2005-01-26 Verfahren zum anordnen einer leitungsstruktur auf einem substrat und substrat mit der leitungsstruktur Ceased WO2005076679A2 (de)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2006551839A JP2007520887A (ja) 2004-02-03 2005-01-26 基板上に導体構造部を配置するための方法及び該導体構造部を備えた基板
US10/587,982 US20070120273A1 (en) 2004-02-03 2005-01-26 Method for disposing a conductor structure on a substrate, and substrate comprising said conductor structure
EP05701610A EP1712113A2 (de) 2004-02-03 2005-01-26 Verfahren zum anordnen einer leitungsstruktur auf einem substrat und substrat mit der leitungsstruktur

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102004005255A DE102004005255B4 (de) 2004-02-03 2004-02-03 Verfahren zum Anordnen einer Leitungsstruktur mit Nanoröhren auf einem Substrat
DE102004005255.7 2004-02-03

Publications (2)

Publication Number Publication Date
WO2005076679A2 WO2005076679A2 (de) 2005-08-18
WO2005076679A3 true WO2005076679A3 (de) 2005-12-22

Family

ID=34801492

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/EP2005/050322 Ceased WO2005076679A2 (de) 2004-02-03 2005-01-26 Verfahren zum anordnen einer leitungsstruktur auf einem substrat und substrat mit der leitungsstruktur

Country Status (6)

Country Link
US (1) US20070120273A1 (de)
EP (1) EP1712113A2 (de)
JP (1) JP2007520887A (de)
CN (1) CN1914963A (de)
DE (1) DE102004005255B4 (de)
WO (1) WO2005076679A2 (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060188721A1 (en) * 2005-02-22 2006-08-24 Eastman Kodak Company Adhesive transfer method of carbon nanotube layer
US8080481B2 (en) * 2005-09-22 2011-12-20 Korea Electronics Technology Institute Method of manufacturing a nanowire device
US9095639B2 (en) * 2006-06-30 2015-08-04 The University Of Akron Aligned carbon nanotube-polymer materials, systems and methods
DE102007047162B4 (de) * 2007-05-25 2011-12-08 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Verfahren zum Herstellen einer Mikrostruktur oder Nanostruktur und mit Mikrostruktur oder Nanostruktur versehenes Substrat
TW201144741A (en) * 2010-02-16 2011-12-16 Etamota Corp Process for making thin film heat spreaders
TWI524825B (zh) 2012-10-29 2016-03-01 財團法人工業技術研究院 碳材導電膜的轉印方法
DE102016109950B3 (de) 2016-05-30 2017-09-28 X-Fab Semiconductor Foundries Ag Integrierte Schaltung mit einem - durch einen Überführungsdruck aufgebrachten - Bauelement und Verfahren zur Herstellung der integrierten Schaltung

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000073204A1 (en) * 1999-05-28 2000-12-07 Commonwealth Scientific And Industrial Research Organisation Substrate-supported aligned carbon nanotube films
EP1100297A2 (de) * 1999-11-10 2001-05-16 Electrovac, Fabrikation Elektrotechnischer Spezialartikel Gesellschaft M.B.H. Lösbare Befestigung eines Anschlusskontaktes auf einer Leiterbahn eines Schaltungsträgers
US20030046809A1 (en) * 2001-09-11 2003-03-13 Egon Mergenthaler Method of connecting a device to a support, and pad for establishing a connection between a device and a support
WO2003037791A1 (de) * 2001-10-29 2003-05-08 Siemens Aktiengesellschaft Derivatisierte nanoröhren oder nanozwiebeln, komposite mit diesen verbindungen, verfahren zur herstellung und verwendungen
WO2003094226A2 (de) * 2002-05-06 2003-11-13 Infineon Technologies Ag Kontaktierung von nanoröhren

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KR970002140B1 (ko) * 1993-12-27 1997-02-24 엘지반도체 주식회사 반도체 소자, 패키지 방법, 및 리드테이프
JP3740295B2 (ja) * 1997-10-30 2006-02-01 キヤノン株式会社 カーボンナノチューブデバイス、その製造方法及び電子放出素子
JP4207398B2 (ja) * 2001-05-21 2009-01-14 富士ゼロックス株式会社 カーボンナノチューブ構造体の配線の製造方法、並びに、カーボンナノチューブ構造体の配線およびそれを用いたカーボンナノチューブデバイス
DE10127351A1 (de) * 2001-06-06 2002-12-19 Infineon Technologies Ag Elektronischer Chip und elektronische Chip-Anordnung
DE10217362B4 (de) * 2002-04-18 2004-05-13 Infineon Technologies Ag Gezielte Abscheidung von Nanoröhren
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EP1540378A4 (de) * 2002-09-20 2008-09-10 Trustees Of Boston College Low Nanoröhren-kragträgersonden für die magnetsmikroskopie auf nanomassstab

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000073204A1 (en) * 1999-05-28 2000-12-07 Commonwealth Scientific And Industrial Research Organisation Substrate-supported aligned carbon nanotube films
EP1100297A2 (de) * 1999-11-10 2001-05-16 Electrovac, Fabrikation Elektrotechnischer Spezialartikel Gesellschaft M.B.H. Lösbare Befestigung eines Anschlusskontaktes auf einer Leiterbahn eines Schaltungsträgers
US20030046809A1 (en) * 2001-09-11 2003-03-13 Egon Mergenthaler Method of connecting a device to a support, and pad for establishing a connection between a device and a support
WO2003037791A1 (de) * 2001-10-29 2003-05-08 Siemens Aktiengesellschaft Derivatisierte nanoröhren oder nanozwiebeln, komposite mit diesen verbindungen, verfahren zur herstellung und verwendungen
WO2003094226A2 (de) * 2002-05-06 2003-11-13 Infineon Technologies Ag Kontaktierung von nanoröhren

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Also Published As

Publication number Publication date
JP2007520887A (ja) 2007-07-26
US20070120273A1 (en) 2007-05-31
EP1712113A2 (de) 2006-10-18
CN1914963A (zh) 2007-02-14
DE102004005255B4 (de) 2005-12-08
WO2005076679A2 (de) 2005-08-18
DE102004005255A1 (de) 2005-08-18

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