WO2007014378A3 - Motion estimation and compensation using a hierarchical cache - Google Patents

Motion estimation and compensation using a hierarchical cache Download PDF

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Publication number
WO2007014378A3
WO2007014378A3 PCT/US2006/029719 US2006029719W WO2007014378A3 WO 2007014378 A3 WO2007014378 A3 WO 2007014378A3 US 2006029719 W US2006029719 W US 2006029719W WO 2007014378 A3 WO2007014378 A3 WO 2007014378A3
Authority
WO
WIPO (PCT)
Prior art keywords
hierarchical cache
levels
motion process
video motion
compensation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/US2006/029719
Other languages
French (fr)
Other versions
WO2007014378A2 (en
Inventor
Stephen John Brooks
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Thomson Licensing SAS
Original Assignee
Thomson Licensing SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thomson Licensing SAS filed Critical Thomson Licensing SAS
Priority to JP2008524256A priority Critical patent/JP5053275B2/en
Priority to MX2008001286A priority patent/MX2008001286A/en
Priority to US11/989,263 priority patent/US20090119454A1/en
Priority to BRPI0614662-7A priority patent/BRPI0614662A2/en
Priority to KR1020087001969A priority patent/KR101293078B1/en
Priority to EP06788974A priority patent/EP1908295A2/en
Publication of WO2007014378A2 publication Critical patent/WO2007014378A2/en
Publication of WO2007014378A3 publication Critical patent/WO2007014378A3/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/50—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding
    • H04N19/503—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding involving temporal prediction
    • H04N19/51—Motion estimation or motion compensation
    • H04N19/523—Motion estimation or motion compensation with sub-pixel accuracy
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/50—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding
    • H04N19/503—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding involving temporal prediction
    • H04N19/51—Motion estimation or motion compensation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/42—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
    • H04N19/43—Hardware specially adapted for motion estimation or compensation
    • H04N19/433—Hardware specially adapted for motion estimation or compensation characterised by techniques for memory access
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/50—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding
    • H04N19/503—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding involving temporal prediction
    • H04N19/51—Motion estimation or motion compensation
    • H04N19/53—Multi-resolution motion estimation; Hierarchical motion estimation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/60—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding
    • H04N19/61—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding in combination with predictive coding

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Compression Or Coding Systems Of Tv Signals (AREA)
  • Image Analysis (AREA)

Abstract

There are provided method and apparatus for video motion process optimization using a hierarchical cache. A storage method for a video motion process includes configuring (622) a hierarchical cache to have one or more levels, each of the levels of the hierarchical cache corresponding to a respective one of a plurality of levels of a calculation hierarchy associated with calculating sample values for the video motion process. The method also includes storing (655) a particular value for a sample relating to the video motion process in a corresponding level of the hierarchical cache based on which of the plurality of levels of the calculation hierarchy the particular value corresponds to, when the particular value is non-existent in the hierarchical cache.
PCT/US2006/029719 2005-07-28 2006-07-27 Motion estimation and compensation using a hierarchical cache Ceased WO2007014378A2 (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP2008524256A JP5053275B2 (en) 2005-07-28 2006-07-27 Method and apparatus for video motion processing optimization using hierarchical cache
MX2008001286A MX2008001286A (en) 2005-07-28 2006-07-27 Motion estimation and compensation using a hierarchical cache.
US11/989,263 US20090119454A1 (en) 2005-07-28 2006-07-27 Method and Apparatus for Video Motion Process Optimization Using a Hierarchical Cache
BRPI0614662-7A BRPI0614662A2 (en) 2005-07-28 2006-07-27 motion compensation and estimation using a hierarchical cache
KR1020087001969A KR101293078B1 (en) 2005-07-28 2006-07-27 Motion estimation and compensation using a hierarchical cache
EP06788974A EP1908295A2 (en) 2005-07-28 2006-07-27 Method and apparatus for video motion process optimization using a hierarchical cache

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US70320405P 2005-07-28 2005-07-28
US60/703,204 2005-07-28

Publications (2)

Publication Number Publication Date
WO2007014378A2 WO2007014378A2 (en) 2007-02-01
WO2007014378A3 true WO2007014378A3 (en) 2007-05-24

Family

ID=37605745

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2006/029719 Ceased WO2007014378A2 (en) 2005-07-28 2006-07-27 Motion estimation and compensation using a hierarchical cache

Country Status (8)

Country Link
US (1) US20090119454A1 (en)
EP (1) EP1908295A2 (en)
JP (1) JP5053275B2 (en)
KR (1) KR101293078B1 (en)
CN (1) CN101233758A (en)
BR (1) BRPI0614662A2 (en)
MX (1) MX2008001286A (en)
WO (1) WO2007014378A2 (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4917709B2 (en) 2000-03-06 2012-04-18 ローム株式会社 Semiconductor device
US7272609B1 (en) * 2004-01-12 2007-09-18 Hyperion Solutions Corporation In a distributed hierarchical cache, using a dependency to determine if a version of the first member stored in a database matches the version of the first member returned
US8225043B1 (en) * 2010-01-15 2012-07-17 Ambarella, Inc. High performance caching for motion compensated video decoder
CN102663096B (en) * 2012-04-11 2015-12-16 北京像素软件科技股份有限公司 A kind of method reading data based on Data cache technology
JP6232828B2 (en) * 2013-08-13 2017-11-22 日本電気株式会社 Still image providing device
US10296458B2 (en) * 2017-05-31 2019-05-21 Dell Products L.P. Multi-level cache system in a software application
WO2025183928A1 (en) * 2024-02-26 2025-09-04 Google Llc Asymmetric interpolation of sub-pixels for motion compensation

Citations (3)

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WO1994018796A1 (en) * 1993-02-11 1994-08-18 Georgia Tech Research Corporation Vector quantization video encoder using hierarchical cache memory scheme
US6757330B1 (en) * 2000-06-01 2004-06-29 Hewlett-Packard Development Company, L.P. Efficient implementation of half-pixel motion prediction
EP1610561A2 (en) * 2004-06-27 2005-12-28 Apple Computer, Inc. Encoding and decoding images

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JP3846642B2 (en) * 1994-01-31 2006-11-15 ソニー株式会社 Motion amount detection method and motion amount detection device
US6549575B1 (en) * 1996-11-07 2003-04-15 International Business Machines Corporation. Efficient, flexible motion estimation architecture for real time MPEG2 compliant encoding
JP4131026B2 (en) * 1998-01-07 2008-08-13 ソニー株式会社 Image processing apparatus and image processing method
US6434196B1 (en) * 1998-04-03 2002-08-13 Sarnoff Corporation Method and apparatus for encoding video information
US6813633B2 (en) * 2001-06-19 2004-11-02 Foedero Technologies, Inc. Dynamic multi-level cache manager
US6950469B2 (en) * 2001-09-17 2005-09-27 Nokia Corporation Method for sub-pixel value interpolation
US7305034B2 (en) * 2002-04-10 2007-12-04 Microsoft Corporation Rounding control for multi-stage interpolation
US7620109B2 (en) * 2002-04-10 2009-11-17 Microsoft Corporation Sub-pixel interpolation in motion estimation and compensation
US8284835B2 (en) * 2004-04-21 2012-10-09 Panasonic Corporation Motion compensating apparatus
US7873776B2 (en) * 2004-06-30 2011-01-18 Oracle America, Inc. Multiple-core processor with support for multiple virtual processors
US20060050976A1 (en) * 2004-09-09 2006-03-09 Stephen Molloy Caching method and apparatus for video motion compensation
US20060088104A1 (en) * 2004-10-27 2006-04-27 Stephen Molloy Non-integer pixel sharing for video encoding
WO2006124885A2 (en) * 2005-05-12 2006-11-23 Kylintv, Inc. Codec for iptv
US20060285597A1 (en) * 2005-06-20 2006-12-21 Flextronics International Usa, Inc. Reusing interpolated values in advanced video encoders
KR100842557B1 (en) * 2006-10-20 2008-07-01 삼성전자주식회사 How to access memory on video processing devices

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WO1994018796A1 (en) * 1993-02-11 1994-08-18 Georgia Tech Research Corporation Vector quantization video encoder using hierarchical cache memory scheme
US6757330B1 (en) * 2000-06-01 2004-06-29 Hewlett-Packard Development Company, L.P. Efficient implementation of half-pixel motion prediction
EP1610561A2 (en) * 2004-06-27 2005-12-28 Apple Computer, Inc. Encoding and decoding images

Non-Patent Citations (4)

* Cited by examiner, † Cited by third party
Title
CORBAL J ET AL: "On the efficiency of reductions in mi-SIMD media extensions", PARALLEL ARCHITECTURES AND COMPILATION TECHNIQUES, 2001. PROCEEDINGS. 2001 INTERNATIONAL CONFERENCE ON 8-12 SEPT. 2001, PISCATAWAY, NJ, USA,IEEE, 8 September 2001 (2001-09-08), pages 83 - 94, XP010558950, ISBN: 0-7695-1363-8 *
LAI YU-LUN ; TSENG YU-YUAN ; LIN CILIA-WEN ; ZHOU ZHI ; SUN MING-TING: "H.264 encoder speed-up via joint algorithm/code-level optimization", PROCEEDINGS OF SPIE - THE INTERNATIONAL SOCIETY FOR OPTICAL ENGINEERING; VISUAL COMMUNICATIONS AND IMAGE PROCESSING 2005, vol. 5960, no. 2, 12 July 2005 (2005-07-12) - 15 July 2005 (2005-07-15), Beijing, China, pages 1089 - 1100, XP002417947, ISSN: 0277-786X *
TAMBANKAR A ET AL: "An overview of H.264 / MPEG-4 part 10", VIDEO/IMAGE PROCESSING AND MULTIMEDIA COMMUNICATIONS, 2003. 4TH EURASIP CONFERENCE FOCUSED ON 2-5 JULY 2003, PISCATAWAY, NJ, USA,IEEE, 2 July 2003 (2003-07-02), pages 1 - 51, XP010650106, ISBN: 953-184-054-7 *
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Also Published As

Publication number Publication date
KR20080030624A (en) 2008-04-04
CN101233758A (en) 2008-07-30
WO2007014378A2 (en) 2007-02-01
MX2008001286A (en) 2008-03-25
BRPI0614662A2 (en) 2011-04-12
US20090119454A1 (en) 2009-05-07
KR101293078B1 (en) 2013-08-16
EP1908295A2 (en) 2008-04-09
JP2009504035A (en) 2009-01-29
JP5053275B2 (en) 2012-10-17

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