WO2007119188A2 - Micro device with microtubes - Google Patents
Micro device with microtubes Download PDFInfo
- Publication number
- WO2007119188A2 WO2007119188A2 PCT/IB2007/051179 IB2007051179W WO2007119188A2 WO 2007119188 A2 WO2007119188 A2 WO 2007119188A2 IB 2007051179 W IB2007051179 W IB 2007051179W WO 2007119188 A2 WO2007119188 A2 WO 2007119188A2
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- layer
- disposable
- microtubes
- barrier layer
- barrier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
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Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W40/00—Arrangements for thermal protection or thermal control
- H10W40/40—Arrangements for thermal protection or thermal control involving heat exchange by flowing fluids
- H10W40/47—Arrangements for thermal protection or thermal control involving heat exchange by flowing fluids by flowing liquids, e.g. forced water cooling
Definitions
- the current invention is related to a micro device with microtubes that can be used as a heat exchanger for ultra fast cooling or heating of liquids.
- a buried micro pipe is formed by filling a trench that has a height which is larger than a width thereof, so that the trench filler material lines sidewalls and bottom of the trench, and covers the top of the trench to form the micro pipe within the trench.
- Another layer can be formed over the filler material and planarized.
- the filler material itself can be planarized. Forming trenches in the planarized layer, and repeating the above steps forms a second set of buried micro pipes in these new trenches. This forms a semiconductor device having multiple layers of buried micro pipes.
- Via holes may be etched to contact a micro pipe, or to interconnect micro pipes buried at different levels.
- the voids are controlled to form the micro pipes, which may be used to circulate a cooling fluid, or lined with a conductive material to form a micro light pipe channel, or buried conductive pipes.
- the disadvantage of this devices and the method is that the distance between the different micro pipes is large causing an inefficient cooling. Lengthy systems of micro pipes are needed limiting the velocity of cooling and wasting substrate area.
- the objective is achieved by means of a method for manufacturing a micro device comprising the steps of: providing a substrate; providing a first disposable layer; providing at least one barrier layer; providing a second disposable layer; - building a first microtube by removing the first disposable layer and building a second microtube by selectively removing the second disposable layer.
- the substrate can be any kind of substrate made of glass, ceramic or silicon. Further the substrate can comprise additional layers of at least one material.
- Using two different disposable layers enables the production of microtubes essentially arranged in one plane essentially parallel to the substrate by structuring the disposable layers by means of standard semiconductor methods as e.g. optical lithography and wet etching. Only one barrier layer separates two adjacent microtubes taking a cross section perpendicular to the extension of the microtubes.
- the barrier layer can be around 10 nm. The small distance between two separate microtubes enables highly efficient heating or cooling of liquids if two liquids of different temperatures flow through the microtubes especially if the barrier layer does have a high thermal conductivity.
- the method for manufacturing a micro device comprises the additional steps of: providing a permeable layer; removing the first disposable layer via the permeable layer; providing and patterning an encapsulation layer and - selectively removing the second disposable layer embedded in the at least one barrier layer.
- the first disposable layer can be a thermal degradable polymer (TDP) that can be removed by means of heat through the permeable layer as described e.g. in EP 1577939 A2 (see e.g. Fig. 1 - Fig. 12 and the belonging description, especially paragraphs 10 and 11).
- TDP thermal degradable polymer
- the TDP decomposes during the heating procedure and evaporates through the permeable layer leaving one or more microtubes underneath the permeable layer depending on the structuring of the first disposable layer.
- Another example of the first disposable layer could be an oxide layer, which can be selectively removed by HF-exposure through a porous organic layer on top.
- the second disposable layer can be metal as copper embedded in one or more barrier layers.
- the metall can be removed through openings in the encapsulation layer and the barrier layer by means of an etching solution etching the metal very fast but etching the barrier layer (Ti, TiN, Ta, TaN, WN) very slow.
- each microtube does have two openings where the etching solution can enter the microtube etching the metal embedded in the barrier layer or layer step by step until all metal in the microtube formed by the barrier layers is etched.
- the thickness of the barrier layer depends on the relation between the cross- sectional area perpendicular to the extension of the microtube and the length of the microtube on the one side and the selectivity of the etching solution with respect to the second disposable layer and the barrier layer on the other side.
- the encapsulation layer can comprise SiN or TEOS.
- the method for manufacturing a micro device comprises the steps of: depositing a first disposable layer on a substrate ; structuring the first disposable layer; depositing a first barrier layer on top of the structured first disposable layer; depositing a second disposable layer on top of the first barrier layer; removing the second disposable layer and the first barrier layer up to the structured first disposable layer; - plating the residual structures of the second disposable layer with a second barrier layer; depositing a permeable dielectric layer on top of the second barrier layer and the structured first disposable layer; - removing the first disposable layer through the permeable dielectric layer; depositing an encapsulation layer on top of the permeable dielectric layer; opening the second disposable layer through the encapsulation layer, the permeable dielectric layer and the second barrier layer building at least two vias to the second disposable layer; depositing a third barrier layer; removing the third barrier layer on top of the second disposable layer in building at least two openings and - selectively removing the
- the first disposable layer can be a thermal degradable polymer (TDP) that can be removed by means of heat through the permeable layer as described e.g. in EP 1577939 A2 (see e.g. Fig. 1 - Fig. 12 and the belonging description, especially paragraphs 10 and 11).
- the second disposable layer can be metal that can be removed by means of an etching solution etching the metal very fast but etching the barrier layer very slow.
- the metal layer and the barrier layer on top of the TDP can be removed by planarization techniques as described e.g. in WO 2004/023550 Al (see e.g. Fig. 1 and Fig. 2 and the belonging description).
- the second barrier layer is used to enclose the residues of the metal.
- the encapsulation layer can be TEOS or SiN, it can be used to prevent the permeation of substances through the permeable layer and/or to enable the integration of further devices as e.g. sensors.
- the final device consists of a configuration of microtubes essentially arranged in a plane essentially parallel to the substrate where most of the microtubes on two sides are separated from one or two microtubes by only one layer of material (the first barrier layer).
- this one layer of material depends on the material itself and the selectivity of the etching procedure with respect to the second disposable layer (metal layer) and the first barrier layer as described above.
- a thickness of this one layer of around 10 nm can be realized with this method. In general the range of the thickness of this layer is between 5 nm and 100 nm.
- the method for manufacturing a micro device comprises the steps of: depositing a first disposable layer on a substrate; depositing a permeable dielectric layer on top of the first disposable layer; structuring the first disposable layer and the permeable dielectric layer; depositing a first barrier layer on top of the structured stack built by the first disposable layer and the permeable dielectric layer; - depositing a second disposable layer on top of the first barrier layer; removing the second disposable layer and the first barrier layer up to the structured permeable dielectric layer; removing the first disposable layer through the permeable dielectric layer; depositing a second barrier layer on top of the residual structures of the second disposable layer and the permeable dielectric layer; depositing an encapsulation layer on top of the second barrier layer; - opening the second disposable layer through the encapsulation layer and the second barrier layer building at least two vias to the second disposable layer; depositing a third barrier layer; removing the third barrier layer on top of the second disposable layer building at least two openings and selectively removing the second disposable layer.
- the first disposable layer can be a thermal degradable polymer (TDP) that can be removed by means of heat through the permeable layer as described e.g. in EP 1577939 A2 (see e.g. Fig. 1 - Fig. 12 and the belonging description).
- the second disposable layer can be metal that can be removed by means of an etching solution etching the metal very fast but etching the barrier layer very slow.
- the metal layer and the barrier layer on top of the TDP can be removed by planarization techniques as described e.g. in WO 2004/023550 Al (see e.g. Fig. 1 and Fig. 2 and the belonging description).
- the second barrier layer is used to enclose the residues of the metal.
- the encapsulation layer can be used to prevent the permeation of substances through the permeable layer and/or to enable the integration of further devices as sensors.
- a barrier layer can be deposited on top of the planarized second disposable layer by e.g. sputtering.
- the second disposable layer has not to be conductive as if electroless plating is used.
- the second barrier can be used to encapsulate the permeable layer since it covers the whole planarized surface.
- a separate encapsulation layer is not necessary but it can be used for further integration steps as described above.
- the final device consists of a configuration of microtubes essentially arranged in a plane essentially parallel to the substrate where most of the microtubes on two sides are separated from one or two microtubes by only one layer of material (the first barrier layer).
- this one layer of material depends on the material itself and the selectivity of the etching procedure with respect to the second disposable layer (metal layer) and the first barrier layer as described above.
- a thickness of this one layer of around 10 nm can be realized with this method. In general the range of the thickness of this layer is between 5 nm and 100 nm.
- micro device for highly efficient and compact heating or cooling.
- the objective is achieved by means of a micro device comprising at least one substrate, the substrate is directly or indirectly attached to at least two microtubes and a barrier layer separates the microtubes from each other.
- the microtubes are directly attached to the substrate if there is no intermediate layer between the substrate and the microtubes.
- the microtube or microtubes can have a cross sectional area between 10 nm x 10 nm and 10 ⁇ m x lO ⁇ m.
- the only one barrier layer enables thin walls between the microtubes.
- the microtubes are arranged next to each other only separated by means of the barrier layer, the microtubes essentially form a layer having low thermal conductivity perpendicular to the extension of the layer with the microtubes in comparison with a layer of the same thickness without microtubes.
- the layer with the microtubes can correspondingly be used for thermal isolation between layers and devices below and above the layer with the microtubes. Further the layer with the microtubes can be used to compensate mechanical stress. More than one layer of microtubes can be stacked on top of each other separated by means of a spacer layer if necessary.
- each of the microtubes of the micro device has at least two openings.
- the system of two different microtubes can be flood by means of the openings with fluids. If the fluids flow through the microtubes they exchange heat. Consequently this embodiment can be used as heat exchanger for heating or cooling the fluids.
- the cross sectional area of the microtubes in this embodiment is preferably between 50 nm x 50 nm and 500 nm x 500 nm, whereby the cross section is not necessarily square. The relation between surface area and volume is of importance if the micro fluidic device is used as a heat exchanger.
- Cooling or heating is most effective if the area of the barrier separating two microtubes is large in comparison to the volume of the microtubes maximizing the heat exchange between both microtubes.
- two microtubes share one barrier layer at the entire length L of their extension.
- the height of the barrier layer and both microtubes is given by H. Consequently the area Al of the barrier separating two microtubes is given by the product L*H.
- the width of both microtubes perpendicular to their extension is given by W resulting in a volume Vl of both microtubes given by W*L*H.
- a first configuration for a heat exchanger is a combination of two microtubes being arranged in a way that they wind in a spiral like manner adjacent to each other in a plane essentially parallel to the substrate.
- the microtubes would be near to each other at two sides of the microtubes nearly along the whole length of the microtubes being favorable for an efficient heat exchange between fluids with different temperature.
- the microtubes with the fluids with different temperature are arranged in an alternating manner in a plane essentially parallel to the substrate.
- One microtube with a fluid with a temperature Tl does have two adjacent microtubes with a fluid with a temperature T2 again optimizing the heat exchange between the fluids (this is not valid for the microtubes at the border of the heat exchanger).
- the one barrier layer between the microtubes enables to decrease the distance between the microtubes improving the heat transfer. The thinner the barrier layer is the faster the heat can be exchanged.
- high thermal conductivity of the barrier layer is favorable for heat exchangers.
- Further heating elements as conductors with high resistance can be placed next to parts of one of the microtubes in order to heat one fluid.
- parts of one microtube can be cooled by means of a Peltier-Element.
- the heating element and the Peltier -Element can be integrated in the device.
- the microtubes are covered by at least one encapsulation layer of material or materials and the at least two openings of each of the microtubes are accessible via the encapsulation layer.
- the additional layer or layers can be used to integrate further functional devices as e.g. lab on the chip configurations those have to be thermally isolated from other devices or those needing a heat exchanger for e.g. analytical purposes or synthesizing.
- the encapsulation layer can be used to integrate sensors for measuring the temperature of the fluids and/or the flow of the fluids. Valves, heaters and pumps based on MEMS technology can be integrated for controlling the micro device.
- the micro device comprises at least one first isolation layer and at least one second isolation layer, each of the isolation layers has a low thermal conductivity, and the microtubes are sandwiched between the first and the second isolation layer.
- the isolation layers may comprise a material of low thermal conductivity or further microtubes building a layer of low thermal conductivity. Further openings to the microtubes embedded between the isolation layers can be provided in order to let liquids flow through the embedded microtubes.
- the thermal isolation of the embedded microtubes enables a more efficient heat exchanger by limiting the heat exchange with the environment.
- the heat exchange with additional devices e.g. sensors
- thermally isolated form the heat exchanger by means of the isolation layers is reduced limiting the influence of the heat exchanger with respect to the functionality of the devices (e.g. accuracy of measurement).
- Fig. 1 shows a principal sketch of one embodiment of the current invention
- Fig. 2a - 2f show a first process flow to manufacture a device according to the current invention
- Fig. 3a - 3g show a second process flow to manufacture a device according to the current invention
- Fig. 1 shows a cross section parallel to the substrate of a first embodiment of the current invention.
- Two microtubes 1 and 2 twine next to each other in a spiral like pattern from an outer region to an inner region.
- the second microtube 2 shares two sides of its surface with the first microtube 1 along the whole length of the second microtube 2.
- the first microtube 1 is accessible by means of the openings 11 and 12 and the second microtube 2 is accessible by means of the openings 21 and 22. If a fluid with a temperature Tl flows in microtube 1 first passing opening 12 it transfers heat with a second fluid with a temperature T2 flowing in microtube 2 after the second fluid first passes opening 21.
- Fig. 2a - 2f show a first process flow to manufacture a device according to the current invention.
- Fig. 2a shows a principal sketch of a cross sectional view of a structure metal 130 embedded in two barrier layers 120 and 140 in a thermal degradable polymer (TDP).
- TDP thermal degradable polymer
- the TDP layer 110 has been structured and partly removed up to the substrate 100 in a way that channels essentially with an rectangular cross-sectional area perpendicular to the extension of the channels are formed in the TDP layer 110.
- a first barrier layer 120 of TaN has been deposited on top of the residues of the TDP layer 110 also covering the sides and the bottom of the channels in the TDP layer 110.
- copper has been deposited on top of the TaN layer 120 filling the space between the residues of the TDP layer 110 building the second disposable layer 130.
- the residues of the TDP layer 110 and the residues of the copper 130 are freely accessible.
- the residues of the copper 130 are selectively capped using electroless self aligned barriers (e.g. CoWP, CoWB or NiMoP) building the second barrier layer 140.
- electroless self aligned barriers e.g. CoWP, CoWB or NiMoP building the second barrier layer 140.
- This process step is followed by CVD deposition of Black Diamond- 1 of AMAT building a permeable dielectric layer 150.
- Fig. 2b shows the formation of the first microtube 1 by means of the decomposition of the residues of the TDP layer 110 permeating as vapor 111 through the permeable dielectric layer 150.
- Fig. 2c the deposition of the encapsulation layer 160 a further CVD layer (e.g. TEOS) on top of the permeable dielectric layer 150 is shown.
- Fig. 2d shows the patterning of the CVD layer 160 and the permeable dielectric layer 150.
- a damascene patterning scheme layer by layer etching
- the second barrier layer 140 is removed on top of the residues of copper 130 now being accessible at two spots by means of the vias 170.
- Fig. 2b shows the formation of the first microtube 1 by means of the decomposition of the residues of the TDP layer 110 permeating as vapor 111 through the permeable dielectric layer 150.
- a further CVD layer e.g. TEOS
- Fig. 2d shows the patterning of the CVD
- the encapsulation layer the sides of the vias 170 and the copper accessible through the vias 170 are covered with PVD TaN 180 building the third barrier layer 180.
- the PVD TaN 180 is removed from the encapsulation layer 160 and the copper 130 by means of re-sputtering (using an Ar-preclean) leaving a vertical barrier layer 180 in the vias 170 covering and protecting the permeable layer 150.
- the residues of copper 130 are removed by means of sulfuric acid.
- the second microtube 2 is built accessible by means of the openings 21 and 22 (openings 11 and 12 are not visible in this cross sectional view).
- Fig. 3a - 3g show a second process flow to manufacture a device according to the current invention.
- Fig. 3 a shows a principal sketch of a cross sectional view of a structure metal 130 embedded in two barrier layers 120 and 140 in a thermal degradable polymer (TDP) and a permeable dielectric layer.
- TDP thermal degradable polymer
- a first disposable TDP layer 110 has been deposited that decomposes at temperatures between 300 0 C and 500 0 C. This process step is followed by CVD deposition of Black Diamond- 1 of AMAT building a permeable dielectric layer 150.
- the TDP layer 110 and the permeable dielectric layer 150 have been structured and partly removed up to the substrate 100 in a way that channels essentially with an rectangular cross-sectional area perpendicular to the extension of the channels are formed in the TDP layer 110.
- a first barrier layer 120 of TaN has been deposited on top of the permeable dielectric layer 150 and the residues of the TDP layer 110 also covering the sides and the bottom of the channels in the TDP layer 1 lOand the permeable dielectric layer 150.
- copper has been deposited on top of the TaN layer 120 filling the channels in the structured permeable dielectric layer 150 and the residues of the TDP layer 110 building the second disposable layer 130.
- Fig. 3b shows the formation of the first microtube 1 by means of the decomposition of the residues of the TDP layer 110 permeating as vapor 111 through the permeable dielectric layer 150.
- Fig. 3c the deposition of a second barrier layer 140 (TaN) on top of the permeable dielectric layer 150 is shown followed by the deposition of the encapsulation layer 160 (e.g. TEOS) by means of CVD shown in Fig. 3d.
- Fig. 3e shows the patterning of the encapsulation layer 160 and the second barrier layer 140.
- the residues of copper 130 are now accessible at two spots by means of the vias 170.
- the encapsulation layer the sides of the vias 170 and the copper accessible through the vias 170 are covered with PVD TaN 180 building the third barrier layer 180.
- the PVD TaN 180 is removed from the encapsulation layer 160 and the copper 130 by means of re-sputtering (using an Ar-preclean) leaving a vertical barrier layer 180 in the vias 170 covering and protecting the permeable layer 150.
- the residues of copper 130 are removed by means of sulfuric acid.
- the second microtube 2 is built accessible by means of the openings 21 and 22 (openings 11 and 12 are not visible in this cross sectional view).
- first, second, third and the like in the description and in the claims are used for distinguishing between similar elements and not necessarily for describing a sequential or chronological order. It is to be understood that the terms so used are interchangeable under appropriate circumstances and that the embodiments of the invention described herein are capable of operation in other sequences than described or illustrated herein. Moreover, the terms top, bottom, first, second and the like in the description and the claims are used for descriptive purposes and not necessarily for describing relative positions. It is to be understood that the terms so used are interchangeable under appropriate circumstances and that the embodiments of the invention described herein are capable of operation in other orientations than described or illustrated herein.
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- Micromachines (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Heat-Exchange Devices With Radiators And Conduit Assemblies (AREA)
Abstract
Description
Claims
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| EP07735363A EP2011148A2 (en) | 2006-04-13 | 2007-04-03 | Micro device with microtubes |
| US12/296,703 US20090120669A1 (en) | 2006-04-13 | 2007-04-03 | Micro device with microtubes |
| JP2009504868A JP2009533859A (en) | 2006-04-13 | 2007-04-03 | Microdevice with microtube |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| EP06112632.2 | 2006-04-13 | ||
| EP06112632 | 2006-04-13 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| WO2007119188A2 true WO2007119188A2 (en) | 2007-10-25 |
| WO2007119188A3 WO2007119188A3 (en) | 2008-02-21 |
Family
ID=38609888
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/IB2007/051179 Ceased WO2007119188A2 (en) | 2006-04-13 | 2007-04-03 | Micro device with microtubes |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US20090120669A1 (en) |
| EP (1) | EP2011148A2 (en) |
| JP (1) | JP2009533859A (en) |
| CN (1) | CN101421843A (en) |
| WO (1) | WO2007119188A2 (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5404261B2 (en) * | 2009-04-16 | 2014-01-29 | モレックス インコーポレイテド | Cooling device, electronic board, electronic equipment |
| US8987892B2 (en) * | 2013-05-10 | 2015-03-24 | Raytheon Company | Method for creating a selective solder seal interface for an integrated circuit cooling system |
| US20240188212A1 (en) * | 2022-12-02 | 2024-06-06 | Intel Corporation | Package substrate architectures with improved cooling |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2004023550A1 (en) | 2002-09-04 | 2004-03-18 | Koninklijke Philips Electronics N.V. | Method for fabrication of in-laid metal interconnects |
Family Cites Families (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6136212A (en) * | 1996-08-12 | 2000-10-24 | The Regents Of The University Of Michigan | Polymer-based micromachining for microfluidic devices |
| US6031286A (en) * | 1997-02-28 | 2000-02-29 | International Business Machines Corporation | Semiconductor structures containing a micro pipe system therein |
| US6032689A (en) * | 1998-10-30 | 2000-03-07 | Industrial Technology Research Institute | Integrated flow controller module |
| US6815329B2 (en) * | 2000-02-08 | 2004-11-09 | International Business Machines Corporation | Multilayer interconnect structure containing air gaps and method for making |
| US6337794B1 (en) * | 2000-02-11 | 2002-01-08 | International Business Machines Corporation | Isothermal heat sink with tiered cooling channels |
| SG105459A1 (en) * | 2000-07-24 | 2004-08-27 | Micron Technology Inc | Mems heat pumps for integrated circuit heat dissipation |
| US6821898B2 (en) * | 2001-09-14 | 2004-11-23 | Wisconsin Alumni Research Foundation | Method of forming a multi-layer microfluidic device |
| DE10246990A1 (en) * | 2002-10-02 | 2004-04-22 | Atotech Deutschland Gmbh | Microstructure cooler and its use |
| US20040087162A1 (en) * | 2002-10-17 | 2004-05-06 | Nantero, Inc. | Metal sacrificial layer |
| US6983792B2 (en) * | 2002-11-27 | 2006-01-10 | The Aerospace Corporation | High density electronic cooling triangular shaped microchannel device |
| US7017654B2 (en) * | 2003-03-17 | 2006-03-28 | Cooligy, Inc. | Apparatus and method of forming channels in a heat-exchanging device |
| KR20060014425A (en) * | 2003-05-26 | 2006-02-15 | 코닌클리즈케 필립스 일렉트로닉스 엔.브이. | Method of manufacturing a substrate, having a porous dielectric layer and air gaps, and a substrate |
| TW591984B (en) * | 2003-07-04 | 2004-06-11 | Sentelic Corp | Micro-circulating flow channel system and its manufacturing method |
| US20050170670A1 (en) * | 2003-11-17 | 2005-08-04 | King William P. | Patterning of sacrificial materials |
| US20050141195A1 (en) * | 2003-12-31 | 2005-06-30 | Himanshu Pokharna | Folded fin microchannel heat exchanger |
| TWI273671B (en) * | 2004-03-18 | 2007-02-11 | Imec Inter Uni Micro Electr | Method of manufacturing a semiconductor device having damascene structures with air gaps |
| US20060001039A1 (en) * | 2004-06-30 | 2006-01-05 | Stmicroelectronics, Inc. | Method of forming buried channels and microfluidic devices having the same |
| US8310053B2 (en) * | 2008-04-23 | 2012-11-13 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of manufacturing a device with a cavity |
-
2007
- 2007-04-03 EP EP07735363A patent/EP2011148A2/en not_active Withdrawn
- 2007-04-03 JP JP2009504868A patent/JP2009533859A/en not_active Withdrawn
- 2007-04-03 CN CNA2007800130338A patent/CN101421843A/en active Pending
- 2007-04-03 WO PCT/IB2007/051179 patent/WO2007119188A2/en not_active Ceased
- 2007-04-03 US US12/296,703 patent/US20090120669A1/en not_active Abandoned
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2004023550A1 (en) | 2002-09-04 | 2004-03-18 | Koninklijke Philips Electronics N.V. | Method for fabrication of in-laid metal interconnects |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2007119188A3 (en) | 2008-02-21 |
| CN101421843A (en) | 2009-04-29 |
| US20090120669A1 (en) | 2009-05-14 |
| EP2011148A2 (en) | 2009-01-07 |
| JP2009533859A (en) | 2009-09-17 |
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