WO2008011439A3 - Compensating for coupling between adjacent storage elements in a nonvolatile memory, based on sensing a neighbour using coupling - Google Patents
Compensating for coupling between adjacent storage elements in a nonvolatile memory, based on sensing a neighbour using coupling Download PDFInfo
- Publication number
- WO2008011439A3 WO2008011439A3 PCT/US2007/073737 US2007073737W WO2008011439A3 WO 2008011439 A3 WO2008011439 A3 WO 2008011439A3 US 2007073737 W US2007073737 W US 2007073737W WO 2008011439 A3 WO2008011439 A3 WO 2008011439A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- coupling
- adjacent
- memory cell
- neighbour
- compensating
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
- G11C11/5642—Sensing or reading circuits; Data output circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/24—Bit-line control circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/26—Sensing or reading circuits; Data output circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Read Only Memory (AREA)
- Semiconductor Memories (AREA)
- Non-Volatile Memory (AREA)
Abstract
Shifts in the apparent charge stored on a floating gate (or other charge storing element) of a non-volatile memory cell can occur because of the coupling of an electric field based on the charge stored in adjacent floating gates (or other adjacent charge storing elements). To compensate for this coupling, the read or programming process for a given memory cell can take into account the programmed state of an adjacent memory cell. To determine whether compensation is needed, a process can be performed that includes sensing information about the programmed state of an adjacent memory cell (e.g., on an adjacent bit line or other location).
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| EP07799656A EP2047473B1 (en) | 2006-07-20 | 2007-07-18 | Compensating for coupling between adjacent storage elements in a nonvolatile memory, based on sensing a neighbor using coupling |
| AT07799656T ATE522905T1 (en) | 2006-07-20 | 2007-07-18 | COMPENSATION FOR COUPLING BETWEEN ADJACENT MEMORY ELEMENTS IN A NON-VOLATILE MEMORY BASED ON SENSING A NEIGHBOR WITH COUPLING |
| JP2009520967A JP4918136B2 (en) | 2006-07-20 | 2007-07-18 | Coupling compensation based on detection of neighboring elements using coupling |
| CN2007800275411A CN101512662B (en) | 2006-07-20 | 2007-07-18 | Compensating for coupling between adjacent storage elements in nonvolatile memory based on sensing neighbors using coupling |
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/458,997 US7522454B2 (en) | 2006-07-20 | 2006-07-20 | Compensating for coupling based on sensing a neighbor using coupling |
| US11/458,997 | 2006-07-20 | ||
| US11/459,000 | 2006-07-20 | ||
| US11/459,000 US7443729B2 (en) | 2006-07-20 | 2006-07-20 | System that compensates for coupling based on sensing a neighbor using coupling |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| WO2008011439A2 WO2008011439A2 (en) | 2008-01-24 |
| WO2008011439A3 true WO2008011439A3 (en) | 2008-07-24 |
Family
ID=38957571
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/US2007/073737 Ceased WO2008011439A2 (en) | 2006-07-20 | 2007-07-18 | Compensating for coupling between adjacent storage elements in a nonvolatile memory, based on sensing a neighbour using coupling |
Country Status (6)
| Country | Link |
|---|---|
| EP (1) | EP2047473B1 (en) |
| JP (1) | JP4918136B2 (en) |
| KR (1) | KR101073116B1 (en) |
| AT (1) | ATE522905T1 (en) |
| TW (1) | TWI353606B (en) |
| WO (1) | WO2008011439A2 (en) |
Families Citing this family (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5193701B2 (en) * | 2008-06-30 | 2013-05-08 | 株式会社東芝 | Semiconductor memory device |
| WO2010002942A1 (en) * | 2008-07-01 | 2010-01-07 | Lsi Corporation | Method and apparatus for write-side intercell interference mitigation in flash memories |
| JP2011008838A (en) * | 2009-06-23 | 2011-01-13 | Toshiba Corp | Nonvolatile semiconductor memory device and writing method of the same |
| US9898361B2 (en) | 2011-01-04 | 2018-02-20 | Seagate Technology Llc | Multi-tier detection and decoding in flash memories |
| US8537623B2 (en) * | 2011-07-07 | 2013-09-17 | Micron Technology, Inc. | Devices and methods of programming memory cells |
| US8630120B2 (en) | 2011-10-20 | 2014-01-14 | Sandisk Technologies Inc. | Compact sense amplifier for non-volatile memory |
| WO2013058960A2 (en) * | 2011-10-20 | 2013-04-25 | Sandisk Technologies Inc. | Compact sense amplifier for non-volatile memory |
| US8705293B2 (en) | 2011-10-20 | 2014-04-22 | Sandisk Technologies Inc. | Compact sense amplifier for non-volatile memory suitable for quick pass write |
| JP2013122799A (en) * | 2011-12-09 | 2013-06-20 | Toshiba Corp | Nonvolatile semiconductor storage device |
| JP2014006940A (en) * | 2012-06-21 | 2014-01-16 | Toshiba Corp | Semiconductor memory device |
| US20140003176A1 (en) | 2012-06-28 | 2014-01-02 | Man Lung Mui | Compact High Speed Sense Amplifier for Non-Volatile Memory with Reduced layout Area and Power Consumption |
| US8971141B2 (en) | 2012-06-28 | 2015-03-03 | Sandisk Technologies Inc. | Compact high speed sense amplifier for non-volatile memory and hybrid lockout |
| US9293195B2 (en) | 2012-06-28 | 2016-03-22 | Sandisk Technologies Inc. | Compact high speed sense amplifier for non-volatile memory |
| US9672102B2 (en) * | 2014-06-25 | 2017-06-06 | Intel Corporation | NAND memory devices systems, and methods using pre-read error recovery protocols of upper and lower pages |
| US9208895B1 (en) | 2014-08-14 | 2015-12-08 | Sandisk Technologies Inc. | Cell current control through power supply |
| US9349468B2 (en) | 2014-08-25 | 2016-05-24 | SanDisk Technologies, Inc. | Operational amplifier methods for charging of sense amplifier internal nodes |
| CN112259148B (en) * | 2020-10-28 | 2022-07-26 | 长江存储科技有限责任公司 | Storage device and reading method thereof |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5867429A (en) * | 1997-11-19 | 1999-02-02 | Sandisk Corporation | High density non-volatile flash memory without adverse effects of electric field coupling between adjacent floating gates |
| US20040109357A1 (en) * | 2002-09-24 | 2004-06-10 | Raul-Adrian Cernea | Non-volatile memory and method with improved sensing |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3913704B2 (en) * | 2003-04-22 | 2007-05-09 | 株式会社東芝 | Nonvolatile semiconductor memory device and electronic device using the same |
| US7064980B2 (en) * | 2003-09-17 | 2006-06-20 | Sandisk Corporation | Non-volatile memory and method with bit line coupled compensation |
-
2007
- 2007-07-18 KR KR1020097003267A patent/KR101073116B1/en not_active Expired - Fee Related
- 2007-07-18 WO PCT/US2007/073737 patent/WO2008011439A2/en not_active Ceased
- 2007-07-18 EP EP07799656A patent/EP2047473B1/en not_active Not-in-force
- 2007-07-18 AT AT07799656T patent/ATE522905T1/en not_active IP Right Cessation
- 2007-07-18 JP JP2009520967A patent/JP4918136B2/en not_active Expired - Fee Related
- 2007-07-20 TW TW096126620A patent/TWI353606B/en not_active IP Right Cessation
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5867429A (en) * | 1997-11-19 | 1999-02-02 | Sandisk Corporation | High density non-volatile flash memory without adverse effects of electric field coupling between adjacent floating gates |
| US20040109357A1 (en) * | 2002-09-24 | 2004-06-10 | Raul-Adrian Cernea | Non-volatile memory and method with improved sensing |
Also Published As
| Publication number | Publication date |
|---|---|
| KR20090073082A (en) | 2009-07-02 |
| EP2047473A2 (en) | 2009-04-15 |
| JP2009545092A (en) | 2009-12-17 |
| JP4918136B2 (en) | 2012-04-18 |
| KR101073116B1 (en) | 2011-10-13 |
| ATE522905T1 (en) | 2011-09-15 |
| TW200814066A (en) | 2008-03-16 |
| EP2047473B1 (en) | 2011-08-31 |
| TWI353606B (en) | 2011-12-01 |
| WO2008011439A2 (en) | 2008-01-24 |
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