WO2008105077A1 - 化合物半導体装置とその製造方法 - Google Patents

化合物半導体装置とその製造方法 Download PDF

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Publication number
WO2008105077A1
WO2008105077A1 PCT/JP2007/053689 JP2007053689W WO2008105077A1 WO 2008105077 A1 WO2008105077 A1 WO 2008105077A1 JP 2007053689 W JP2007053689 W JP 2007053689W WO 2008105077 A1 WO2008105077 A1 WO 2008105077A1
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WO
WIPO (PCT)
Prior art keywords
compound semiconductor
opening
active layer
semiconductor device
electrode disposed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2007/053689
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English (en)
French (fr)
Inventor
Toshihide Kikkawa
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Fujitsu Ltd
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Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP2009501080A priority Critical patent/JP5099116B2/ja
Priority to PCT/JP2007/053689 priority patent/WO2008105077A1/ja
Priority to EP07715024.1A priority patent/EP2117040B1/en
Publication of WO2008105077A1 publication Critical patent/WO2008105077A1/ja
Priority to US12/548,622 priority patent/US8183572B2/en
Anticipated expiration legal-status Critical
Priority to US13/454,349 priority patent/US8603871B2/en
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/40—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
    • H10D30/47—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having two-dimensional [2D] charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
    • H10D30/471—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT]
    • H10D30/473—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having confinement of carriers by multiple heterojunctions, e.g. quantum well HEMT
    • H10D30/4732—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having confinement of carriers by multiple heterojunctions, e.g. quantum well HEMT using Group III-V semiconductor material
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/015—Manufacture or treatment of FETs having heterojunction interface channels or heterojunction gate electrodes, e.g. HEMT
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/40—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
    • H10D30/47—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having two-dimensional [2D] charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
    • H10D30/471—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT]
    • H10D30/477—Vertical HEMTs or vertical HHMTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/113—Isolations within a component, i.e. internal isolations
    • H10D62/115—Dielectric isolations, e.g. air gaps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/213—Channel regions of field-effect devices
    • H10D62/221—Channel regions of field-effect devices of FETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/85—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs
    • H10D62/8503—Nitride Group III-V materials, e.g. AlN or GaN

Landscapes

  • Junction Field-Effect Transistors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

　ピンチオフ特性の優れた縦型ＧａＮ系電界効果トランジスタを提供する。 　化合物半導体装置は、導電性半導体基板と、導電性基板裏面上に形成されたドレイン電極と、導電性半導体基板表面上に、高抵抗化合物半導体または絶縁体で形成され、開口を有する電流ブロック層と、開口を埋め、電流ブロック層上面上に延在する化合物半導体の活性層と、開口上方で、活性層上方に形成されたゲート電極と、ゲート電極側方で、活性層上方に形成されたソース電極と、を有する。
PCT/JP2007/053689 2007-02-27 2007-02-27 化合物半導体装置とその製造方法 Ceased WO2008105077A1 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2009501080A JP5099116B2 (ja) 2007-02-27 2007-02-27 化合物半導体装置とその製造方法
PCT/JP2007/053689 WO2008105077A1 (ja) 2007-02-27 2007-02-27 化合物半導体装置とその製造方法
EP07715024.1A EP2117040B1 (en) 2007-02-27 2007-02-27 Compound semiconductor device and process for producing the same
US12/548,622 US8183572B2 (en) 2007-02-27 2009-08-27 Compound semiconductor device and its manufacture method
US13/454,349 US8603871B2 (en) 2007-02-27 2012-04-24 Compound semiconductor device and its manufacture method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2007/053689 WO2008105077A1 (ja) 2007-02-27 2007-02-27 化合物半導体装置とその製造方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US12/548,622 Continuation US8183572B2 (en) 2007-02-27 2009-08-27 Compound semiconductor device and its manufacture method

Publications (1)

Publication Number Publication Date
WO2008105077A1 true WO2008105077A1 (ja) 2008-09-04

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Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2007/053689 Ceased WO2008105077A1 (ja) 2007-02-27 2007-02-27 化合物半導体装置とその製造方法

Country Status (4)

Country Link
US (2) US8183572B2 (ja)
EP (1) EP2117040B1 (ja)
JP (1) JP5099116B2 (ja)
WO (1) WO2008105077A1 (ja)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010225938A (ja) * 2009-03-24 2010-10-07 Fujitsu Ltd 化合物半導体装置及びその製造方法
JP2011146441A (ja) * 2010-01-12 2011-07-28 Toyota Central R&D Labs Inc 半導体装置とその製造方法
JP2011210781A (ja) * 2010-03-29 2011-10-20 Oki Electric Industry Co Ltd 縦型ＡｌＧａＮ／ＧａＮ−ＨＥＭＴおよびその製造方法
DE102010061295B4 (de) * 2009-12-17 2017-11-23 Infineon Technologies Austria Ag Halbleitervorrichtung mit metallischem Träger
WO2022181100A1 (ja) * 2021-02-24 2022-09-01 パナソニックホールディングス株式会社 窒化物半導体装置
JP2023526982A (ja) * 2020-05-29 2023-06-26 エピノバテック、アクチボラグ 縦型ｈｅｍｔ及び縦型ｈｅｍｔを製造する方法

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JP2009054632A (ja) * 2007-08-23 2009-03-12 Fujitsu Ltd 電界効果トランジスタ
EP2346071B1 (en) * 2008-10-29 2017-04-05 Fujitsu Limited Compound semiconductor device and method for manufacturing the same
JP5530682B2 (ja) * 2009-09-03 2014-06-25 パナソニック株式会社 窒化物半導体装置
CN103201841B (zh) * 2010-11-05 2016-06-22 富士通株式会社 半导体器件及半导体器件的制造方法
KR20130014850A (ko) * 2011-08-01 2013-02-12 삼성전자주식회사 파워소자의 제조방법
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JP5784441B2 (ja) 2011-09-28 2015-09-24 トランスフォーム・ジャパン株式会社 半導体装置及び半導体装置の製造方法
KR101805634B1 (ko) * 2011-11-15 2017-12-08 삼성전자 주식회사 Ⅲ-ⅴ족 배리어를 포함하는 반도체 소자 및 그 제조방법
KR101922107B1 (ko) * 2012-06-22 2019-02-13 삼성전자주식회사 반도체소자 및 그 제조방법
US9070685B2 (en) * 2012-08-24 2015-06-30 Win Semiconductors Corp. Compound semiconductor integrated circuit
JP6135436B2 (ja) * 2013-10-04 2017-05-31 住友電気工業株式会社 炭化珪素半導体装置
US9343569B2 (en) 2014-05-21 2016-05-17 International Business Machines Corporation Vertical compound semiconductor field effect transistor on a group IV semiconductor substrate
US9893174B2 (en) * 2014-05-21 2018-02-13 Arizona Board Of Regents On Behalf Of Arizona State University III-nitride based N polar vertical tunnel transistor
CN104992971B (zh) * 2015-06-29 2020-01-24 电子科技大学 具有复合低k电流阻挡层的垂直氮化镓基异质结场效应管
CN105428412A (zh) * 2015-12-22 2016-03-23 工业和信息化部电子第五研究所 AlGaN/GaN异质结场效应晶体管及其制备方法
CN108630677B (zh) * 2017-03-17 2022-03-08 智瑞佳（苏州）半导体科技有限公司 一种功率器件版图结构及制作方法
WO2018182633A1 (en) * 2017-03-30 2018-10-04 Intel Corporation Interlayers in selective area growth of gallium nitride (gan) based structures
DE102017215296A1 (de) * 2017-09-01 2019-03-07 Robert Bosch Gmbh Feldeffekttransistor und Verfahren zur Herstellung eines Feldeffekttransistors
US10608102B2 (en) * 2017-09-29 2020-03-31 Electronics And Telecommunications Research Institute Semiconductor device having a drain electrode contacting an epi material inside a through-hole and method of manufacturing the same
US10784341B2 (en) 2019-01-21 2020-09-22 Northrop Grumnian Systems Corporation Castellated superjunction transistors
US10804387B1 (en) * 2019-03-21 2020-10-13 Northrop Grumman Systems Corporation Vertical superlattice transistors
WO2020216250A1 (zh) * 2019-04-26 2020-10-29 苏州晶湛半导体有限公司 一种增强型器件及其制备方法
US11342440B2 (en) 2019-07-22 2022-05-24 Northrop Grumman Systems Corporation Passivated transistors
KR102767850B1 (ko) * 2019-11-19 2025-02-14 삼성전자주식회사 반도체 구조체, 이를 포함하는 트랜지스터 및 트랜지스터의 제조방법
US12218202B2 (en) * 2021-09-16 2025-02-04 Wolfspeed, Inc. Semiconductor device incorporating a substrate recess

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Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010225938A (ja) * 2009-03-24 2010-10-07 Fujitsu Ltd 化合物半導体装置及びその製造方法
DE102010061295B4 (de) * 2009-12-17 2017-11-23 Infineon Technologies Austria Ag Halbleitervorrichtung mit metallischem Träger
JP2011146441A (ja) * 2010-01-12 2011-07-28 Toyota Central R&D Labs Inc 半導体装置とその製造方法
JP2011210781A (ja) * 2010-03-29 2011-10-20 Oki Electric Industry Co Ltd 縦型ＡｌＧａＮ／ＧａＮ−ＨＥＭＴおよびその製造方法
JP2023526982A (ja) * 2020-05-29 2023-06-26 エピノバテック、アクチボラグ 縦型ｈｅｍｔ及び縦型ｈｅｍｔを製造する方法
JP7668294B2 (ja) 2020-05-29 2025-04-24 エピノバテック、アクチボラグ 縦型ｈｅｍｔ及び縦型ｈｅｍｔを製造する方法
WO2022181100A1 (ja) * 2021-02-24 2022-09-01 パナソニックホールディングス株式会社 窒化物半導体装置
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Also Published As

Publication number Publication date
US20120208331A1 (en) 2012-08-16
EP2117040A1 (en) 2009-11-11
US8183572B2 (en) 2012-05-22
US8603871B2 (en) 2013-12-10
JP5099116B2 (ja) 2012-12-12
US20090315037A1 (en) 2009-12-24
EP2117040A4 (en) 2012-07-18
JPWO2008105077A1 (ja) 2010-06-03
EP2117040B1 (en) 2018-05-16

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