WO2009005700A3 - Memory cell that employs a selectively deposited reversible resistance-switching element and methods of forming the same - Google Patents

Memory cell that employs a selectively deposited reversible resistance-switching element and methods of forming the same Download PDF

Info

Publication number
WO2009005700A3
WO2009005700A3 PCT/US2008/007986 US2008007986W WO2009005700A3 WO 2009005700 A3 WO2009005700 A3 WO 2009005700A3 US 2008007986 W US2008007986 W US 2008007986W WO 2009005700 A3 WO2009005700 A3 WO 2009005700A3
Authority
WO
WIPO (PCT)
Prior art keywords
forming
switching element
memory cell
reversible resistance
employs
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/US2008/007986
Other languages
French (fr)
Other versions
WO2009005700A2 (en
Inventor
April Schricker
S Brad Herner
Michael Konevecki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SanDisk 3D LLC
Original Assignee
SanDisk 3D LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US11/772,084 external-priority patent/US8233308B2/en
Priority claimed from US11/772,090 external-priority patent/US7846785B2/en
Priority to CN200880022647.7A priority Critical patent/CN101720506B/en
Application filed by SanDisk 3D LLC filed Critical SanDisk 3D LLC
Priority to KR1020097027303A priority patent/KR101447176B1/en
Priority to JP2010514824A priority patent/JP5624463B2/en
Priority to EP08779800A priority patent/EP2162916B1/en
Priority to KR1020147008185A priority patent/KR101494335B1/en
Priority to KR1020147008191A priority patent/KR20140061468A/en
Publication of WO2009005700A2 publication Critical patent/WO2009005700A2/en
Publication of WO2009005700A3 publication Critical patent/WO2009005700A3/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/20—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having two electrodes, e.g. diodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/30—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having three or more electrodes, e.g. transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/80—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays
    • H10B63/84—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays arranged in a direction perpendicular to the substrate, e.g. 3D cell arrays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/011—Manufacture or treatment of multistable switching devices
    • H10N70/021—Formation of switching materials, e.g. deposition of layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/20—Multistable switching devices, e.g. memristors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/821—Device geometry
    • H10N70/826—Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/881—Switching materials
    • H10N70/883—Oxides or nitrides
    • H10N70/8833—Binary metal oxides, e.g. TaOx

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)

Abstract

In some aspects, a method of forming a memory cell is provided that includes (1) forming a first conductor above a substrate; (2) forming a diode above the first conductor; (3) forming a reversible resistance-switching element above the first conductor using a selective deposition process; and (4) forming a second conductor above the diode and the reversible resistance-switching element. Numerous other aspects are provided.
PCT/US2008/007986 2007-06-29 2008-06-27 Memory cell that employs a selectively deposited reversible resistance-switching element and methods of forming the same Ceased WO2009005700A2 (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
KR1020147008191A KR20140061468A (en) 2007-06-29 2008-06-27 Memory cell that employs a selectively deposited reversible resistance-switching element and methods of forming the same
KR1020147008185A KR101494335B1 (en) 2007-06-29 2008-06-27 Memory cell that employs a selectively deposited reversible resistance-switching element and methods of forming the same
CN200880022647.7A CN101720506B (en) 2007-06-29 2008-06-27 Memory cell that employs a selectively deposited reversible resistance-switching element and methods of forming the same
KR1020097027303A KR101447176B1 (en) 2007-06-29 2008-06-27 Method for forming a memory cell and a memory cell using a selectively reversible resistive-switching element
JP2010514824A JP5624463B2 (en) 2007-06-29 2008-06-27 Memory cell using reversible resistance switching element by selective attachment and method of forming the same
EP08779800A EP2162916B1 (en) 2007-06-29 2008-06-27 Method of forming a memory cell that employs a selectively deposited reversible resistance-switching element

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US11/772,084 US8233308B2 (en) 2007-06-29 2007-06-29 Memory cell that employs a selectively deposited reversible resistance-switching element and methods of forming the same
US11/772,084 2007-06-29
US11/772,090 US7846785B2 (en) 2007-06-29 2007-06-29 Memory cell that employs a selectively deposited reversible resistance-switching element and methods of forming the same
US11/772,090 2007-06-29

Publications (2)

Publication Number Publication Date
WO2009005700A2 WO2009005700A2 (en) 2009-01-08
WO2009005700A3 true WO2009005700A3 (en) 2009-02-26

Family

ID=39791399

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2008/007986 Ceased WO2009005700A2 (en) 2007-06-29 2008-06-27 Memory cell that employs a selectively deposited reversible resistance-switching element and methods of forming the same

Country Status (6)

Country Link
EP (2) EP2485258B1 (en)
JP (1) JP5624463B2 (en)
KR (3) KR101494335B1 (en)
CN (1) CN101720506B (en)
TW (1) TWI433276B (en)
WO (1) WO2009005700A2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8507889B2 (en) 2009-03-23 2013-08-13 Kabushiki Kaisha Toshiba Nonvolatile semiconductor memory device comprising memory cell array having multilayer structure

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4829320B2 (en) * 2009-03-17 2011-12-07 株式会社東芝 Method for manufacturing nonvolatile semiconductor memory device
JP4875118B2 (en) * 2009-03-24 2012-02-15 株式会社東芝 Method for manufacturing nonvolatile memory device
US7927977B2 (en) * 2009-07-15 2011-04-19 Sandisk 3D Llc Method of making damascene diodes using sacrificial material
JP5161911B2 (en) * 2010-03-25 2013-03-13 株式会社東芝 Resistance change memory
CN102314940B (en) * 2010-07-07 2014-04-23 旺宏电子股份有限公司 Non-volatile memory device having transistors in parallel with resistance value switching means
JP5279879B2 (en) * 2011-08-09 2013-09-04 株式会社東芝 Nonvolatile semiconductor memory device
JP5611903B2 (en) * 2011-08-09 2014-10-22 株式会社東芝 Resistance change memory
JP2013069922A (en) 2011-09-22 2013-04-18 Toshiba Corp Manufacturing method of nonvolatile semiconductor storage device and nonvolatile semiconductor storage device
JP5818679B2 (en) 2011-12-27 2015-11-18 株式会社東芝 Manufacturing method of semiconductor device
JP5606478B2 (en) * 2012-03-22 2014-10-15 株式会社東芝 Semiconductor memory device
US9905757B2 (en) 2013-11-12 2018-02-27 Hewlett Packard Enterprise Development Lp Nonlinear memristor devices with three-layer selectors
CN111106238B (en) * 2019-11-19 2023-08-29 中山大学 Two-way threshold value gating device based on metal doping and preparation method thereof

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030047727A1 (en) * 2001-09-07 2003-03-13 Chien Chiang Using selective deposition to form phase-change memory cells
US20060094236A1 (en) * 2004-11-03 2006-05-04 Elkins Patricia C Electroless plating of metal caps for chalcogenide-based memory devices
KR100717286B1 (en) * 2006-04-21 2007-05-15 삼성전자주식회사 Formation method of phase change material layer, formation method of phase change memory device and phase change memory device using the method
WO2007072308A1 (en) * 2005-12-20 2007-06-28 Koninklijke Philips Electronics N.V. A vertical phase change memory cell and methods for manufacturing thereof
WO2008097742A1 (en) * 2007-02-05 2008-08-14 Interolecular, Inc. Methods for forming resistive switching memory elements

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5915167A (en) 1997-04-04 1999-06-22 Elm Technology Corporation Three dimensional structure memory
US6034882A (en) * 1998-11-16 2000-03-07 Matrix Semiconductor, Inc. Vertically stacked field programmable nonvolatile memory and method of fabrication
US7102150B2 (en) * 2001-05-11 2006-09-05 Harshfield Steven T PCRAM memory cell and method of making same
US7109056B2 (en) * 2001-09-20 2006-09-19 Micron Technology, Inc. Electro-and electroless plating of metal in the manufacture of PCRAM devices
US7176064B2 (en) 2003-12-03 2007-02-13 Sandisk 3D Llc Memory cell comprising a semiconductor junction diode crystallized adjacent to a silicide
WO2004061851A2 (en) 2002-12-19 2004-07-22 Matrix Semiconductor, Inc An improved method for making high-density nonvolatile memory
KR100773537B1 (en) * 2003-06-03 2007-11-07 삼성전자주식회사 Non-volatile memory device including one switching element and one resistor, and manufacturing method thereof
JP2008060091A (en) * 2005-01-14 2008-03-13 Matsushita Electric Ind Co Ltd Variable resistance element
US7812404B2 (en) * 2005-05-09 2010-10-12 Sandisk 3D Llc Nonvolatile memory cell comprising a diode and a resistance-switching material
JP4364180B2 (en) * 2005-08-17 2009-11-11 株式会社東芝 Manufacturing method of integrated circuit device
US20070132049A1 (en) * 2005-12-12 2007-06-14 Stipe Barry C Unipolar resistance random access memory (RRAM) device and vertically stacked architecture
JP2010532568A (en) * 2007-06-29 2010-10-07 サンディスク スリーディー，エルエルシー Memory cell using reversible resistance switching element by selective growth and formation method thereof
US11576477B2 (en) 2020-12-04 2023-02-14 Athena Club Holdings, Inc. Devices and methods for mounting an article to a surface

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030047727A1 (en) * 2001-09-07 2003-03-13 Chien Chiang Using selective deposition to form phase-change memory cells
US20060094236A1 (en) * 2004-11-03 2006-05-04 Elkins Patricia C Electroless plating of metal caps for chalcogenide-based memory devices
WO2007072308A1 (en) * 2005-12-20 2007-06-28 Koninklijke Philips Electronics N.V. A vertical phase change memory cell and methods for manufacturing thereof
KR100717286B1 (en) * 2006-04-21 2007-05-15 삼성전자주식회사 Formation method of phase change material layer, formation method of phase change memory device and phase change memory device using the method
US20070246743A1 (en) * 2006-04-21 2007-10-25 Sung-Lae Cho Method of forming a phase change material layer, method of forming a phase change memory device using the same, and a phase change memory device so formed
WO2008097742A1 (en) * 2007-02-05 2008-08-14 Interolecular, Inc. Methods for forming resistive switching memory elements

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8507889B2 (en) 2009-03-23 2013-08-13 Kabushiki Kaisha Toshiba Nonvolatile semiconductor memory device comprising memory cell array having multilayer structure
USRE45817E1 (en) 2009-03-23 2015-12-08 Kabushiki Kaisha Toshiba Nonvolatile semiconductor memory device comprising memory cell array having multilayer structure

Also Published As

Publication number Publication date
KR20100038317A (en) 2010-04-14
KR20140061468A (en) 2014-05-21
KR20140061467A (en) 2014-05-21
EP2485258A3 (en) 2012-08-22
EP2485258B1 (en) 2014-03-26
CN101720506A (en) 2010-06-02
KR101494335B1 (en) 2015-02-23
KR101447176B1 (en) 2014-10-08
TW200913171A (en) 2009-03-16
JP2010532569A (en) 2010-10-07
EP2162916A2 (en) 2010-03-17
EP2162916B1 (en) 2013-03-20
EP2485258A2 (en) 2012-08-08
JP5624463B2 (en) 2014-11-12
WO2009005700A2 (en) 2009-01-08
CN101720506B (en) 2012-05-16
TWI433276B (en) 2014-04-01

Similar Documents

Publication Publication Date Title
WO2009005700A3 (en) Memory cell that employs a selectively deposited reversible resistance-switching element and methods of forming the same
TW200943488A (en) Memory cell that employs a selectively fabricated carbon nano-tube reversible resistance-switching element formed over a bottom conductor and methods of forming the same
SI2423172T1 (en) Substrate coated with a porous layer, and a solar module containing this substrate
WO2009134603A3 (en) Memory cell that employs a selectively fabricated carbon nano-tube reversible resistance-switching element formed over a bottom conductor and methods of forming the same
WO2007130471A3 (en) Systems and methods for high density multi-component modules
WO2007109046A3 (en) Cross-point memory array
AU4274601A (en) Semiconductor layer, solar cell using it, and production methods and applications therefor
WO2005034149A3 (en) Spherical or grain-shaped semiconductor element for use in solar cells and method for producing the same; method for producing a solar cell comprising said semiconductor element and solar cell
WO2008057686A3 (en) Template for three-dimensional thin-film solar cell manufacturing and methods of use
WO2008027163A3 (en) Enhanced memory density resistance variable memory cells, arrays, devices and systems including the same, and methods of fabrication
EP1858074A3 (en) Nonvolatile memory device using oxygen-deficient metal oxide layer and method of manufacturing the same
WO2008135905A3 (en) A photosensitive device and a method of manufacturing a photosensitive device
WO2010048408A3 (en) Carbon-based memory elements exhibiting reduced delamination and methods of forming the same
WO2009088888A3 (en) Memory cell that employs a selectively fabricated carbon nano-tube reversible resistance-switching element and methods of forming the same
ATE358876T1 (en) MULTI-LEVEL MEMORY CELL
EP1950813A4 (en) TRANSPARENT CONDUCTIVE SUBSTRATE FOR SOLAR CELL AND METHOD FOR MANUFACTURING THE SAME
AU2003303082A1 (en) Compositions and methods related to TIM-3, a Th1-specific cell surface molecule
WO2007134145A3 (en) Lens arrays and methods of making the same
AU2002313948A1 (en) A wire structure, a thin film transistor substrate of using the wire structure and a method of manufacturing the same
WO2010065301A3 (en) Method of enabling selective area plating on a substrate
AU2003235181A1 (en) Organic semiconductor composition, organic semiconductor element, and process for producing the same
AU2003243002A1 (en) Organic semiconductor element, production method therefor and organic semiconductor device
WO2007075998A3 (en) Three dimensional microstructures and methods for making three dimensional microstructures
GB2453283A (en) Bit-erasing architecture for seek-scan probe (SSP) memory storage
WO2008129480A3 (en) An electronic component, and a method of manufacturing an electronic component

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 200880022647.7

Country of ref document: CN

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 08779800

Country of ref document: EP

Kind code of ref document: A2

WWE Wipo information: entry into national phase

Ref document number: 2010514824

Country of ref document: JP

WWE Wipo information: entry into national phase

Ref document number: 2008779800

Country of ref document: EP

ENP Entry into the national phase

Ref document number: 20097027303

Country of ref document: KR

Kind code of ref document: A

NENP Non-entry into the national phase

Ref country code: DE