WO2011022964A1 - 一种数据采集卡、数据采集卡的扩展控制系统及其方法 - Google Patents

一种数据采集卡、数据采集卡的扩展控制系统及其方法 Download PDF

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Publication number
WO2011022964A1
WO2011022964A1 PCT/CN2010/071258 CN2010071258W WO2011022964A1 WO 2011022964 A1 WO2011022964 A1 WO 2011022964A1 CN 2010071258 W CN2010071258 W CN 2010071258W WO 2011022964 A1 WO2011022964 A1 WO 2011022964A1
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WIPO (PCT)
Prior art keywords
signal
channel
data acquisition
card
data
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Ceased
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PCT/CN2010/071258
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English (en)
French (fr)
Inventor
熊勇
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ZTE Corp
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ZTE Corp
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Priority to RU2012108664/08A priority Critical patent/RU2501099C2/ru
Priority to US13/389,347 priority patent/US8762587B2/en
Priority to EP10811130.3A priority patent/EP2472342B1/en
Priority to BR112012003338A priority patent/BR112012003338A2/pt
Publication of WO2011022964A1 publication Critical patent/WO2011022964A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00—Program-control systems
    • G05B19/02—Program-control systems electric
    • G05B19/04—Program control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/042—Program control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
    • G05B19/0423—Input/output
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00—Program-control systems
    • G05B2219/20—Pc systems
    • G05B2219/25—Pc structure of the system
    • G05B2219/25213—Synchronisation, address and data

Definitions

  • the present invention relates to the field of data transmission and processing, and in particular, to an extended control system for a data acquisition card, a data acquisition card, and a method thereof. Background technique
  • Microprocessor-based embedded systems are increasingly used. In many application scenarios, microprocessors need to pick around. Some information or instructions of the environment, through intelligent analysis and processing, finally output the necessary control information. For example, users use various types of sensors to detect or feel external signals, physical conditions (such as light, heat, humidity) or chemical composition (such as smoke). The sensor converts this information into a formatted electrical signal that is passed to the micro. The processor analyzes and processes the data, and finally the microprocessor adjusts or controls it according to the information data.
  • a data acquisition card is a device that collects digital or analog signals from sensors or other devices under test and sends them to a microprocessor for analysis and processing. These data acquisition cards are generally connected to the user circuit through a bus using a common bus interface.
  • the bus interface includes ISA, PCI, PC/104, PXI, CPCI, USB, FireWire (1394), Compact Flash, etc.
  • the bus is usually divided into parallel. Bus and serial bus. For parallel buses such as ISA and PCI, there are many signal lines connected, so the signal transmission distance is short and the expansion is insufficient. For serial buses such as USB and 1394, it is allowed to be far away. Access distance, easy to use, but high requirements for processor capabilities and software systems in the user circuit.
  • serial interfaces such as RS232 and RS485 appear on the market, which can automatically collect input data signals and send them to the user circuit through a certain format communication protocol, and receive the control of the output data signals of the user circuits.
  • serial interfaces such as RS232/RS485
  • software and physical conditions are difficult to support.
  • the technical problem to be solved by the present invention is to provide a data acquisition card with high scalability and high stability, an extended control system for a data acquisition card, and a method thereof.
  • An extended control method for a data acquisition card suitable for a data acquisition card arranged in parallel, the method comprising: presetting a board address for each data acquisition card, and presetting each data channel in the data acquisition card Channel address; the method also includes:
  • the data acquisition card receives a card tick signal from the user circuit, and generates a corresponding card address signal, and the data acquisition card compares the card address signal with the preset card address, and determines the location Whether the data acquisition card is strobed;
  • the data acquisition card receives a channel beat signal from the user circuit, and generates a corresponding channel address signal, wherein the data acquisition card compares the channel address signal with the After the preset channel address is compared, the data channel corresponding to the channel address signal is strobed.
  • the method further includes the following steps: the data acquisition card sends an output data signal from the user circuit to the gated data channel, or from the The gated data channel collects the input data signal and sends it to the user circuit.
  • the input data signal includes an input digital signal and/or an input analog signal; the output data signal includes an output digital signal and/or an output analog signal.
  • the transmission method of the input data signal and the output data signal is: different types of input data signals and output data signals are transmitted in a bus through different cables;
  • the method for transmitting the card tick signal and the channel tick signal is: the card tick signal and the channel tick signal are transmitted in the bus through a separate cable.
  • the method further includes the step of clearing the card address signal or the channel address signal.
  • the method further includes the step of latching the card address signal.
  • the process of the data acquisition card transmitting an output data signal from the user circuit to the gated data channel includes:
  • the gated data acquisition card receives an invalid channel latch signal
  • the gated data acquisition card receives an output data signal from the user circuit; the gated data acquisition card receives a valid channel latch signal;
  • the gated data acquisition card receives an invalid channel latch signal.
  • the method further includes: the un-strokeed data acquisition card suspends transmitting the input data signal to the user circuit and suspending receiving the output data signal from the subscriber unit.
  • a data acquisition card includes a card gating module, a channel address generation module, and a signal processing module; wherein
  • the card gating module is configured to preset a card address, receive a card tick signal from the user circuit, and generate a corresponding card address signal, and is further configured to use the card address signal and the preset After comparing the card addresses, determining whether the data acquisition card is strobed;
  • the channel address generating module is configured to receive a channel beat signal from the user circuit and generate a corresponding channel address signal, and send the signal to the signal processing module;
  • the signal processing module is configured to preset a channel address for the data channel, and compare the channel address signal with the preset channel address when the data acquisition card is strobed, and strobe the corresponding data according to the comparison result. And transmitting an output data signal from the user circuit to the gated data channel, or acquiring an input data signal from the gated data channel and transmitting it to the user circuit.
  • a counter is provided in the card gating module and the channel address generating module;
  • a counter in the card gating module configured to generate a corresponding card address signal according to the number of the card tick signals
  • a counter in the channel address generation module configured to generate a corresponding channel address signal according to the number of the channel beat signals.
  • An extended control system for a data acquisition card comprising a user circuit and a data acquisition card arranged in parallel, the user circuit comprising a beat signal control module, the data acquisition card comprising a card gating module, a channel address generation module and signal processing Module; among them,
  • the beat signal control module is configured to send a card beat signal and a channel beat signal to the data acquisition card;
  • the card gating module is configured to preset a card address for the data acquisition card, receive a card tick signal from the tick signal control module, and generate a corresponding card address signal, and is further configured to: Comparing the board address signal with the preset board address, and determining, according to the comparison result, whether the data acquisition card is strobed;
  • the channel address generating module is configured to receive a channel beat signal from the beat signal control module, generate a corresponding channel address signal, and send the signal to the signal processing module;
  • the signal processing module is configured to preset a channel address for the data channel in the data acquisition card, and compare the channel address signal with the preset channel address when the data acquisition card is strobed, according to Comparing the result to the corresponding data channel, and transmitting an output data signal from the user circuit to the gated data channel, or from the gated data channel
  • the input data signals are collected and sent to the user circuit.
  • the invention has the beneficial effects that the data acquisition card and the data acquisition card expansion control system and method of the invention support the user circuit to strobe the data channel in the data acquisition card and the data acquisition card through the beat signal/CP, and correspondingly
  • the data channel performs data acquisition or signal control.
  • the data acquisition card includes a hardware circuit including only a counter and a comparator, and the present invention is applicable to a plurality of serial interfaces, and can be implemented in comparison with a method in which a data acquisition card actively reports data information to a user circuit through a communication protocol in the prior art. Parallel control of multiple data acquisition cards, so the versatility is good, and the scalability is strong; and the data acquisition card directly accepts the control of the user circuit, there is no problem of software upgrade and protocol incompatibility, and the stability is high.
  • the data acquisition card of the present invention is capable of acquiring various input digital signals and/or input analog signals from a gated data channel, or transmitting various output digital signals and/or output analog signals from the subscriber unit to corresponding data.
  • the channel is therefore very versatile.
  • the invention adopts a technical scheme of address clearing and latching, which can improve the accuracy of the board gating and channel gating and the effectiveness of data transmission.
  • FIG. 1 is a flow chart of a first specific implementation manner of an extended control method for a data acquisition card according to the present invention
  • FIG. 2 is a flow chart of a second embodiment of an extended control method for a data acquisition card according to the present invention
  • FIG. 3 is a flow chart of a third specific implementation manner of an extended control method for a data acquisition card according to the present invention.
  • FIG. 4 is a schematic diagram of a first embodiment of an extended control system for a data acquisition card of the present invention
  • FIG. 5 is a schematic diagram of a second specific implementation manner of an extended control system for a data acquisition card according to the present invention
  • 6 is a schematic diagram of a specific implementation manner of a control circuit of a data acquisition card according to the present invention
  • FIG. 7 is a schematic diagram of a specific implementation manner of a digital signal processing module of a data acquisition card according to the present invention
  • FIG. 8 is a schematic diagram of a specific implementation of an analog signal processing module of a data acquisition card of the present invention.
  • FIG. 9 is a schematic diagram of a specific implementation manner of a digital signal data acquisition card according to the present invention
  • FIG. 10 is a schematic diagram of a specific implementation manner of an analog signal data acquisition card according to the present invention.
  • DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention realizes extended control of a plurality of data acquisition cards arranged in parallel by a user circuit, and after a user circuit outputs a beat signal/CP to each data acquisition card through a bus, if a card address of a data acquisition card is If the beat signal/CP matches, the data acquisition card is strobed; the user circuit inputs the beat signal/CP to the selected data acquisition card to strobe a certain data channel, and finally sends the output data signal from the user circuit. From the strobed data channel, or from the gated data channel, the input data signal is acquired and sent to the user circuit. Specific embodiments of the present invention will be described below with reference to the accompanying drawings.
  • the first specific implementation manner of the extended control method of the data acquisition card of the present invention includes the following steps:
  • Step S100 First, preset a board address for each data acquisition card, and preset a channel address for each data channel in each data acquisition card, so that the user circuit can distinguish the progress.
  • Step S101 The data acquisition card receives the card beat signal /CP from the user circuit, and generates a corresponding board address signal through the card counter.
  • the data acquisition card uses the card counter to generate the board address signal corresponding to the number of the card tick signal/CP. For example, when the user circuit needs to strobe the 1# data acquisition card, it needs to output 1 card beat. Signal / CP.
  • the user circuit can send a reset signal /RST to the data acquisition card to clear the board counter and channel counter in all data acquisition cards, even if the board address signal and channel address signal are cleared. It is convenient to accurately strobe the data acquisition card and data channel.
  • Step S102 After comparing the generated board address signal with the preset board address, the data acquisition card determines whether the data acquisition card is strobed.
  • the data acquisition card may first preset a board address in a comparator, and the comparator receives the board address signal generated by the board counter and compares it with the pre-stored board address, and finally outputs an active low level. Board strobe signal / CS.
  • the user circuit can also send the card latch signal /BLE to the gated data acquisition card to latch the board address signal. This step is implemented by a latch, and the latch receives the card counter generation. After the board address signal and the board latch signal /BLE from the user circuit, the board address signal is latched to the input of the comparator.
  • Step S103 determining whether the data acquisition card is strobed, if yes, proceeding to step S105, otherwise proceeding to step S104.
  • Step S104 continue to wait.
  • Step S105 The data acquisition card receives the channel beat signal /CP from the user circuit, and generates a corresponding channel address signal. Similar to the strobe method of the capture card, the data acquisition card uses the channel counter to generate the channel address signal corresponding to the channel beat signal/CP. For example, when the user circuit needs to strobe the 1# data channel, it needs to output 1 channel. Beat signal / CP.
  • Step S106 The data acquisition card compares the generated channel address signal with the preset channel address. If the preset channel address of a certain data channel matches the generated channel address signal, the data channel is strobed.
  • Step S107 The data acquisition card transmits an output data signal from the user circuit to the gated data channel, or acquires an input data signal from the gated data channel and transmits it to the user circuit.
  • the input data signal includes input digital signals (such as in-position signals, alarm signals) and/or input analog signals (such as current signals) that need to be sent to the user circuit, and the input data signals pass through.
  • the user circuit After conditioning, it is sent to the user circuit through the input digital signal common channel DICS and the input analog signal common channel AICS; output data signal package Including output digital signals (such as power on/off control signals) and/or output analog signals (such as voltage regulation signals), etc., the user circuit sends them to the data acquisition card through the output digital signal common channel DOCS and the output analog signal common channel AOCS. And after conditioning, send to the corresponding data channel.
  • DICS digital signal common channel
  • AICS input analog signal common channel AICS
  • output data signal package Including output digital signals (such as power on/off control signals) and/or output analog signals (such as voltage regulation signals), etc.
  • the data acquisition card sends the output data signal from the user circuit to the gated data channel
  • the user circuit needs to send the channel latch signal to the address lock.
  • the memory isolates the strobed data channel, including the following sub-steps:
  • the gated data acquisition card receives an invalid channel latch signal /CLE from the user circuit
  • the gated data acquisition card receives the output data signal from the user circuit
  • the gated data acquisition card receives a valid channel latch signal /CLE from the user circuit
  • the gated data acquisition card receives an invalid channel latch signal /CLE from the user circuit.
  • the user circuit strobes a plurality of data acquisition cards arranged in parallel and data channels in the data acquisition card through a beat signal/CP, and realizes data collection of the corresponding data channel or
  • the data acquisition card includes a hardware circuit including only a counter, a comparator, and the like, and the present invention is applicable to a plurality of serial interfaces, compared with the manner in which the data acquisition card in the prior art actively reports data information to the user circuit through a communication protocol.
  • the beat signal /CP, the reset signal /RST, the board latch signal /BLE, the channel latch signal /CLE, the input digital signal, and the output digital signal are subjected to differential level conversion. Transmitting over a differential bus, for example, converting these signals into
  • TTL/CMOS levels, or 3.3V LVTTL level signals are transmitted over the bus network.
  • the beat signal /CP, the reset signal /RST, the board latch signal /BLE, the channel latch signal /CLE, the input digital signal, and the output digital signal can all be transmitted through the bus through a cable.
  • the control efficiency and accuracy are improved. Different types of input data signals and output data signals are transmitted in the bus through different cables.
  • the beat signal /CP and the channel beat signal /CP are transmitted in the bus via a separate cable.
  • the state of input digital signal common channel DICS, input analog signal common channel AICS, output digital signal common channel DOCS and output analog signal common channel AOCS can be controlled by chip selection logic.
  • the unstrobed data acquisition card suspends sending input data signals to the user circuit, and suspends reception from the subscriber unit.
  • the output data signal, the chip select logic controls each signal to be disconnected from the bus, that is, when the board does not collect data, The signal is not received from the bus, nor is it output to the bus to interfere with the bus.
  • 2 is a flowchart of a second embodiment of an extended control method for a data acquisition card according to the present invention.
  • the implementation manner of the user circuit controlling multiple data channels in multiple data acquisition cards includes the following steps:
  • Step S200 The process starts.
  • Step S201 The user circuit sends a reset signal /RST to the data acquisition card to clear all the board address signals and channel address signals.
  • Step S202 The user circuit sends N card beat signals /CP to the data acquisition card, and needs to strobe the corresponding data acquisition card, for example, the first data acquisition card whose strobe address is 0.
  • Step S203 The user circuit sends the card latch signal /BLE to the data acquisition card.
  • Step S204 The user circuit sends the M channel beat signals /CP to the data acquisition card, and needs to strobe the corresponding data channel, for example, the first data channel whose strobe address is 0.
  • Step S205 The user circuit sends an invalid channel latch signal /CLE to the data acquisition card.
  • Step S206 the gated data channel collects an input data signal (which may be an input analog signal or an input digital signal) and sends it to the user circuit. Then, the user circuit sends an output data signal (which may be an output analog signal or an output digital signal). ) to the strobed data channel.
  • an input data signal which may be an input analog signal or an input digital signal
  • an output data signal which may be an output analog signal or an output digital signal.
  • Step S207 The user circuit sends a valid channel latch signal /CLE to the data acquisition card.
  • Step S208 After the delay, the user circuit sends an invalid channel latch signal /CLE to the data.
  • Step S209 It is determined whether all the data channels in the data acquisition card are detected. If yes, the process goes to step S211, otherwise the process goes to step S210.
  • Step S210 The user circuit sends another channel beat signal /CP to the data acquisition card to increase the count value of the channel counter by 1. The next data channel needs to be strobed, and step S205 is repeated.
  • Step S211 It is judged whether all the data acquisition cards have been detected, and if yes, the process goes to step S213, otherwise, the process goes to step S212.
  • Step S212 Send another slab beat signal/CP to the data acquisition card to increase the count value of the card counter by one. The next data acquisition card needs to be strobed, and step S203 is repeated.
  • Step 213 End the task.
  • FIG. 3 is a flow chart of a third embodiment of the data acquisition card of the present invention.
  • the process of controlling a certain data channel in a data acquisition card by the user circuit includes the following steps:
  • Step S300 The process starts.
  • Step S301 The user circuit sends a reset signal /RST to the data acquisition card to clear all the board address signals and channel address signals.
  • Step S302 The user circuit sends N card beat signals /CP to the data acquisition card, and the corresponding data acquisition card needs to be strobed.
  • Step S303 The user circuit sends the card latch signal /BLE to the data acquisition card.
  • Step S304 The user circuit sends the M channel beat signals /CP to the data acquisition card, and the corresponding data channel needs to be strobed.
  • Step S305 The user circuit sends an invalid channel latch signal /CLE to the data acquisition card.
  • Step S307 The user circuit sends a valid channel latch signal /CLE to the data acquisition card.
  • Step S308 After the delay, the user circuit sends an invalid channel latch signal /CLE to the data.
  • Step S309 End the task.
  • FIG. 4 is a schematic diagram of a first embodiment of an extended control system for a data acquisition card according to the present invention, including a user circuit and at least one data acquisition card disposed in parallel, wherein the user circuit includes a beat signal control module 10, each data acquisition card Includes board gating module 21, channel address The module 22 and the signal processing module 23 are generated.
  • the beat signal control module 10 is configured to send a card strobe beat signal /CP and a channel strobe beat signal /CP to the data acquisition card.
  • the card gating module 21 is a preset card address of the data acquisition card, and is configured to receive a card tick signal/CP from the tick signal control module 10 and generate a corresponding card address signal, and is also used for the card address signal and After comparing the preset board addresses, it is judged whether the data acquisition card is strobed.
  • the channel address generation module 22 is configured to receive the channel beat signal /CP from the beat signal control module 10 and generate a corresponding channel address signal, and send it to the signal processing module 23.
  • the signal processing module 23 presets a channel address for each data channel in the data acquisition card. When the data acquisition card is strobed, the signal processing module 23 is configured to compare the channel address signal with a preset channel address, and then strobe A corresponding data channel, and an output data signal from the user circuit is sent to the gated data channel, or an input data signal is acquired from the gated data channel and sent to the user circuit.
  • a card counter is provided in the card gating module 21, and a channel counter is provided in the channel address generating module 22.
  • the card counter is configured to generate a corresponding card address signal according to the number of the card tick signals/CP, the channel
  • the counter is used to generate a corresponding channel address signal according to the number of channel beat signals/CP.
  • FIG. 5 is a schematic diagram of a second embodiment of an extended control system for a data acquisition card according to the present invention.
  • the card gating module 21 and the channel address generation module 22 in the data acquisition card are all disposed in the control circuit.
  • the signal processing module 23 includes a digital signal processing module and an analog signal processing module.
  • the signal control module in the user circuit includes a digital signal control module and an analog signal control module.
  • the user circuit performs differential level conversion on the card tick signal /CP and the channel tick signal /CP in the beat signal control module 10, and then sends it to the data acquisition card through the bus, and the data acquisition card performs differential level conversion on the same, respectively
  • the card gating module 21 and the channel gating module 22 sent to the control circuit realize the gating of the data acquisition card and the data channel, and the level conversion is performed.
  • the circuit can use chips such as MAX485.
  • the input digital signal and the output digital signal are also transmitted in the bus network after differential level conversion, and the input analog signal and the output analog signal are transmitted in the bus network after being subjected to compression/frequency conversion.
  • FIG. 6 is a schematic diagram of a specific implementation manner of a control circuit of a data acquisition card according to the present invention.
  • the implementation manner can realize five data acquisition cards in parallel, and each data acquisition card collects 80 data information of 16 data channels (32 inputs). Digital signal, 16 input analog signals, 16 output digital signals, 16 output analog signals).
  • the five capture cards are interconnected directly with the subscriber unit via the bus network.
  • the card gating module 21 includes a card counter, a latch and a comparator
  • the channel address generating module 22 includes a channel counter.
  • the board counter of the present embodiment selects the counter of the modulo 5, and the channel counter is the counter of the modulo 32.
  • both counters can also be designed as analog multiplexer 32, such as the popular chip of 74LS161.
  • the latch and the comparator can also select the common 74HC573, 74HC688 and other chips, and preset the board address 0 ⁇ 31 through the 5-digit DIP switch, or use only the 3-digit DIP switch to set the board address 0 ⁇ 4 .
  • FIG. 7 is a schematic diagram of a specific implementation manner of a digital signal processing module of a data acquisition card according to the present invention, including a channel switching module and an address latch module.
  • the channel switching module selects the data channel according to the board strobe signal /CS and the generated channel address signal in the chip selection logic
  • the input digital signal is collected from the data channel, and the input digital signals are subjected to necessary shaping, isolation, etc. Enter the channel switching module and transmit it by inputting the digital signal to the common DICS.
  • the address latch module selects the data channel according to the board strobe signal /CS and the generated channel address signal in the chip select logic
  • the output digital signal from the output digital signal common channel DOCS is subjected to necessary shaping, isolation, etc.
  • FIG. 8 is a schematic diagram of a specific implementation manner of an analog signal processing module of a data acquisition card according to the present invention, which also includes a channel switching module and an address latch module. After the channel switching module selects the data channel according to the board strobe signal /CS and the generated channel address signal in the chip selection logic, the input analog signal is collected from the data channel, and the input analog signal is adjusted after necessary shaping, isolation, etc.
  • the channel switching module after the voltage/frequency conversion, passes through the tristate gate (the enable end of the tristate gate is controlled by the channel latch signal / CLE) to input the analog signal common channel AICS for transmission.
  • the output analog signal from the output analog signal common channel AOCS is subjected to voltage/frequency conversion and enters the address latch module.
  • the address latch module is based on the board strobe signal /CS and the generated channel address signal in the chip select logic. After selecting the data channel, the output analog signal is conditioned by necessary shaping, isolation, etc., and then enters the corresponding data channel.
  • the voltage-to-frequency conversion circuit of the present embodiment can select a chip such as a commonly used VFC320.
  • FIG. 9 is a schematic diagram of a specific implementation manner of a digital signal data acquisition card according to the present invention.
  • the data acquisition card of the embodiment has a relatively simple function, and is only used for receiving an output digital signal from a user circuit, or collecting input from each data channel. The digital signal is sent to the user circuit.
  • the data acquisition card of the present embodiment also includes a buck module for accepting remote power and ground signals from the subscriber circuit.
  • the data acquisition card of the embodiment has a relatively simple function, and is only used for receiving an output analog signal from a user circuit, or collecting input from each data channel. The analog signal is sent to the user circuit.
  • the data acquisition card and the data acquisition card extended control system and method of the invention support the user circuit to strobe the data channel in the data acquisition card and the data acquisition card through the beat signal/CP, and from the corresponding data channel.
  • the data acquisition card includes a hardware circuit including only a counter and a comparator, and the present invention is applicable to a plurality of serial interfaces, and can be implemented in comparison with a method in which a data acquisition card actively reports data information to a user circuit through a communication protocol in the prior art.
  • Parallel control of multiple data acquisition cards so the versatility is good and the scalability is strong; and the data acquisition card directly accepts the control of the user circuit, does not exist Software upgrades and protocol incompatibilities, high stability.
  • the data acquisition card of the present invention is capable of acquiring various input digital signals and/or input analog signals from a gated data channel, or transmitting various output digital signals and/or output analog signals from the subscriber unit to corresponding data.
  • the channel is therefore very versatile.
  • the invention adopts a technical scheme of address clearing and latching, which can improve the accuracy of the board gating and channel gating and the effectiveness of data transmission.

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Description

一种数据釆集卡、 数据釆集卡的扩展控制系统及其方法 技术领域
本发明涉及数据传输与处理领域， 尤其涉及一种数据采集卡、 数据采 集卡的扩展控制系统及其方法。 背景技术
目前， 越来越多的工业控制、 医疗、 通讯、 消费等电子产品日趋智能 化， 以微处理器为核心的嵌入式系统得到日益广泛的应用， 在很多应用场 景中， 微处理器需要拾取周围环境的一些信息或者指令， 通过智能化的分 析处理， 最终输出必要的控制信息。 例如， 用户使用各类传感器， 来探测 或感受外界的信号、 物理条件（如光、 热、 湿度）或化学组成等（如烟雾）， 传感器将这些信息转换成一定格式的电信号， 传递给微处理器进行分析、 处理， 最后微处理器会根据这些信息数据， 进行相应地调节或控制。
数据采集卡是指从传感器或其它待测设备采集数字或模拟信号， 并将 其发送到微处理器进行分析,处理的器件。 这些数据采集卡一般都采用通用 的总线接口与用户电路通过总线相连， 总线接口包括 ISA、 PCI、 PC/104, PXI、 CPCI、 USB、 火线（1394)、 Compact Flash等类型， 总线通常分为并行 总线和和串行总线， 对于 ISA、 PCI等并行总线而言， 连接的信号线很多， 因此信号传输距离较短，且扩展性不足； 对于 USB、 1394等串行总线而言， 允许较远的接入距离， 使用方便， 但是对用户电路中的处理器能力及软件 系统的要求较高。
目前， 市场上出现了一些具备 RS232、 RS485 等串行接口的数据采集 卡， 能够自动采集输入数据信号后通过一定格式的通讯协议发送给用户电 路， 并接收用户电路的输出数据信号的控制。 然而这些数据采集卡存在以 下弊端： 首先， 有些应用场景并不具备 RS232/RS485等串行接口， 且软件 和物理条件难以支持； 其次， 软件通讯和协议也对数据采集卡的使用造成 一定的影响， 不仅存在软件升级和协议兼容等问题， 数据采集卡还需要完 成译码、 校验等数据处理过程， 因此其扩展性和稳定性都受到数据处理能 力的制约， 例如， 如果通讯协议制定得很筒单， 则需要配套的数据校验能 力， 且不合适恶劣环境下使用， 扩展性不足； 如果通讯协议指定的较复杂， 用户难以对其进行准确地校验， 因此使用不便。 发明内容
本发明所要解决的技术问题是， 提供一种扩展性强， 稳定性高的数据 采集卡、 数据采集卡的扩展控制系统及其方法。
本发明解决其技术问题所采用的技术方案是：
一种数据采集卡的扩展控制方法， 适用于并联设置的数据采集卡， 该 方法包括： 为每个数据采集卡预设板卡地址， 并为所述数据采集卡中的每 个数据通道预设通道地址； 该方法还包括：
所述数据采集卡接收来自用户电路的板卡节拍信号， 并生成对应的板 卡地址信号， 所述数据采集卡将所述板卡地址信号与所述预设的板卡地址 进行比较， 判断所述数据采集卡是否被选通；
在判断结果为所述数据采集卡被选通时， 所述数据采集卡接收来自用 户电路的通道节拍信号， 并生成对应的通道地址信号， 所述数据采集卡将 所述通道地址信号与所述预设的通道地址进行比较后， 选通所述通道地址 信号对应的数据通道。
选通所述通道地址信号对应的数据通道之后， 该方法还包括以下步骤： 所述数据采集卡将来自所述用户电路的输出数据信号发送至所述被选通的 数据通道， 或从所述被选通的数据通道采集输入数据信号并发送至用户电 路。 所述输入数据信号包括输入数字信号和 /或输入模拟信号； 所述输出数 据信号包括输出数字信号和 /或输出模拟信号。
所述输入数据信号和输出数据信号的传输方法为： 不同类型的输入数 据信号和输出数据信号通过不同的线缆在总线中进行传输；
所述板卡节拍信号和通道节拍信号的传输方法为： 所述板卡节拍信号 和通道节拍信号通过一根单独的线缆在总线中进行传输。
所述数据采集卡接收来自用户电路的板卡节拍信号之前， 该方法还包 括对所述板卡地址信号或通道地址信号进行清零的步骤。
所述数据采集卡生成对应的板卡地址信号之后， 该方法还包括对所述 板卡地址信号进行锁存的步骤。
所述数据采集卡将来自所述用户电路的输出数据信号发送至所述被选 通的数据通道的过程包括：
所述被选通的数据采集卡接收无效的通道锁存信号；
所述被选通的数据采集卡接收来自所述用户电路的输出数据信号； 所述被选通的数据采集卡接收有效的通道锁存信号；
所述被选通的数据采集卡接收无效的通道锁存信号。
该方法进一步包括： 未被选通的数据采集卡暂停向用户电路发送输入 数据信号， 并暂停接收来自用户单元的输出数据信号。
一种数据采集卡， 包括板卡选通模块、 通道地址生成模块和信号处理 模块； 其中，
所述板卡选通模块， 用于预设板卡地址， 接收来自用户电路的板卡节 拍信号并生成对应的板卡地址信号， 还用于将所述板卡地址信号与所述预 设的板卡地址进行比较后， 判断所述数据采集卡是否被选通；
所述通道地址生成模块， 用于接收来自用户电路的通道节拍信号并生 成对应的通道地址信号， 并将其发送至所述信号处理模块； 所述信号处理模块， 用于为数据通道预设通道地址， 并在数据采集卡 被选通时将所述通道地址信号与所述预设的通道地址进行比较， 根据比较 结果选通对应的数据通道， 并将来自用户电路的输出数据信号发送至所述 被选通的数据通道， 或从所述被选通的数据通道采集输入数据信号并将其 发送至用户电路。
所述板卡选通模块和通道地址生成模块中均设有计数器；
所述板卡选通模块中的计数器， 用于根据所述板卡节拍信号的个数生 成对应的板卡地址信号；
所述通道地址生成模块中的计数器， 用于根据所述通道节拍信号的个 数生成对应的通道地址信号。
一种数据采集卡的扩展控制系统， 包括用户电路和并联设置的数据采 集卡， 所述用户电路包括节拍信号控制模块， 所述数据采集卡包括板卡选 通模块、 通道地址生成模块和信号处理模块； 其中，
所述节拍信号控制模块， 用于向数据采集卡发送板卡节拍信号和通道 节拍信号；
所述板卡选通模块， 用于为所述数据采集卡预设板卡地址， 接收来自 所述节拍信号控制模块的板卡节拍信号并生成对应的板卡地址信号， 还用 于将所述板卡地址信号与所述预设的板卡地址进行比较， 根据比较结果判 断所述数据采集卡是否被选通；
所述通道地址生成模块， 用于接收来自所述节拍信号控制模块的通道 节拍信号后生成对应的通道地址信号， 并将其发送至信号处理模块；
所述信号处理模块， 用于为所述数据采集卡中的数据通道预设通道地 址， 并且在数据采集卡被选通时将所述通道地址信号与所述预设的通道地 址进行比较， 根据比较结果选通对应的数据通道， 并将来自用户电路的输 出数据信号发送至所述被选通的数据通道， 或从所述被选通的数据通道采 集输入数据信号并将其发送至用户电路。
本发明的有益效果是， 本发明的数据采集卡、 数据采集卡的扩展控制 系统和方法支持用户电路通过节拍信号 /CP对数据采集卡以及数据采集卡 中的数据通道进行选通， 并从对应的数据通道进行数据采集， 或对其进行 信号控制的功能。 数据采集卡中包括只包含计数器、 比较器等硬件电路， 与现有技术中数据采集卡通过通讯协议主动向用户电路上报数据信息的方 式相比， 本发明适用于多种串行接口， 能够实现多个数据采集卡的并联控 制， 因此通用性好， 扩展性强； 而且数据采集卡直接接受用户电路的控制， 并不存在软件升级和协议不兼容的问题， 稳定性高。
本发明的数据采集卡能够从选通的数据通道对各种输入数字信号和 /或 输入模拟信号进行采集， 或将来自用户单元的各种输出数字信号和 /或输出 模拟信号发送至相应的数据通道， 因此用途十分广泛。
本发明对数据采集卡和数据通道进行选通时， 采用了地址清零、 锁存 等技术方案， 能够提高板卡选通和通道选通的准确性和数据传输的有效性。 附图说明
图 1 为本发明的数据采集卡的扩展控制方法第一种具体实施方式流程 图；
图 2为本发明的数据采集卡的扩展控制方法第二种具体实施方式流程 图；
图 3 为本发明的数据采集卡的扩展控制方法第三种具体实施方式流程 图；
图 4为本发明的数据采集卡的扩展控制系统第一种具体实施方式示意 图；
图 5 为本发明的数据采集卡的扩展控制系统第二种具体实施方式示意 图； 图 6为本发明的数据采集卡的控制电路一种具体实施方式示意图； 图 7为本发明的数据采集卡的数字信号处理模块一种具体实施方式示 意图；
图 8为本发明的数据采集卡的模拟信号处理模块一种具体实施方式示 意图；
图 9为本发明的数字信号数据采集卡的一种具体实施方式示意图； 图 10为本发明的模拟信号数据采集卡的一种具体实施方式示意图。 具体实施方式 本发明实现了用户电路对多个并联设置的数据采集卡的扩展控制， 用 户电路通过总线输出节拍信号 /CP至各个数据采集卡后，如果某个数据采集 卡的板卡地址与该节拍信号 /CP相匹配， 则该数据采集卡被选通； 用户电路 再输入节拍信号 /CP至该被选中的数据采集卡以选通某个数据通道，最后将 来自用户电路的输出数据信号发送至被选通的数据通道， 或从被选通的数 据通道采集输入数据信号并将其发送至用户电路。 以下结合附图对本发明 的具体实施方式进行说明。
如图 1 所示， 本发明的数据采集卡的扩展控制方法的第一种具体实施 方式包括以下步骤：
步骤 S100:首先为每个数据采集卡预设板卡地址， 为每个数据采集卡中 的每个数据通道预设通道地址， 便于用户电路对其进进行区分。
步骤 S101 :数据采集卡接收来自用户电路的板卡节拍信号 /CP, 并通过 板卡计数器将其生成对应的板卡地址信号。 本步骤中， 数据采集卡采用板 卡计数器将板卡节拍信号 /CP生成与其个数相对应的板卡地址信号，例如用 户电路需要选通 1#数据采集卡时， 需要输出 1个板卡节拍信号 /CP。 本步骤 之前， 用户电路可向数据采集卡发送复位信号 /RST, 使所有数据采集卡中 的板卡计数器和通道计数器清零， 即使板卡地址信号和通道地址信号清零 便于准确选通数据采集卡和数据通道。
步骤 S102:数据采集卡将生成的板卡地址信号与预设的板卡地址进行 比较后， 判断数据采集卡是否被选通。 该步骤中， 数据采集卡可首先在一 比较器中预置单板地址， 比较器接收板卡计数器生成的板卡地址信号后与 预存的单板地址进行比较， 最后输出低电平有效的单板选通信号 /CS。 该步 骤之前， 用户电路还可向被选通的数据采集卡发送板卡锁存信号 /BLE对板 卡地址信号进行锁存,该步骤通过锁存器来实现， 锁存器接收板卡计数器生 成的板卡地址信号以及来自用户电路的板卡锁存信号 /BLE后， 将板卡地址 信号锁存到比较器的输入端。
步骤 S103:判断数据采集卡是否被选通， 是， 则进入步骤 S105 , 否则进 入步骤 S 104。
步骤 S104:继续等待。
步骤 S105:数据采集卡接收来自用户电路的通道节拍信号 /CP, 并生成 对应的通道地址信号。 与采集卡的选通方法相类似， 数据采集卡采用通道 计数器将通道节拍信号 /CP生成与其个数相对应的通道地址信号，例如用户 电路需要选通 1#数据通道时， 需要输出 1个通道节拍信号 /CP。
步骤 S106:数据采集卡将生成的通道地址信号与预设的通道地址进行 比较， 如果某一数据通道的预设的通道地址与生成的通道地址信号相匹配， 则该数据通道被选通。
步骤 S107:数据采集卡将来自用户电路的输出数据信号发送至被选通 的数据通道， 或从被选通的数据通道采集输入数据信号并将其发送至用户 电路。 其中， 根据数据采集卡的具体应用， 输入数据信号包括需要发送至 用户电路的输入数字信号 （例如在位信号、 告警信号）和 /或输入模拟信号 (例如电流信号）等， 这些输入数据信号经过调理后分别经过输入数字信 号共道 DICS和输入模拟信号共道 AICS发送至用户电路； 输出数据信号包 括输出数字信号（例如开关机控制信号）和 /或输出模拟信号 (例如调压信号) 等，用户电路分别通过输出数字信号共道 DOCS和输出模拟信号共道 AOCS 将其发送至数据采集卡， 并经调理后发送至对应的数据通道。
为了实现用户电路对数据通道进行准确地信号控制， 避免信号干扰， 数据采集卡将来自用户电路的输出数据信号发送至被选通的数据通道时， 用户电路需要发送通道锁存信号至寻址锁存器对选通的数据通道进行隔 离， 具体包括以下子步骤：
a)被选通的数据采集卡接收来自用户电路的无效的通道锁存信号 /CLE;
b)被选通的数据采集卡接收来自用户电路的输出数据信号；
c)被选通的数据采集卡接收来自用户电路的有效的通道锁存信号 /CLE;
d)被选通的数据采集卡接收来自用户电路的无效的通道锁存信号 /CLE。
在上述的四个步骤中， 每个步骤间具有一定延时， 以保障信号能完整 地传输； 且需要满足寻址锁存器的时序性要求， 用户电路首先发送无效的 通道锁存信号 /CLE, 保证总线信号不误进入数据通道， 然后发送输出数据 信号至数据采集卡， 等待信号稳定后， 再发送有效的通道锁存信号 /CLE进 行通道地址的锁存， 最后再次发送无效的通道锁存信号 /CLE结束任务。
本发明的数据采集卡的扩展控制方法中，用户电路通过节拍信号 /CP对 多个并联设置的数据采集卡以及数据采集卡中的数据通道进行选通， 并实 现了对应数据通道的数据采集或控制， 数据采集卡中包括只包含计数器、 比较器等硬件电路， 与现有技术中数据采集卡通过通讯协议主动向用户电 路上报数据信息的方式相比， 本发明适用于多种串行接口， 能够实现多个 数据采集卡的并联控制， 因此通用性好， 扩展性强； 而且数据采集卡直接 接受用户电路的控制， 并不存在软件升级和协议不兼容的问题， 因此显著 提高了对数据采集卡进行数据采集和信号控制的稳定性。
本实施方式中，为了提高数据传输距离，节拍信号 /CP、复位信号 /RST、 板卡锁存信号 /BLE、 通道锁存信号 /CLE、 输入数字信号以及输出数字信号 经过差分电平转换后， 通过差分总线进行传输， 例如可将这些信号转换成
TTL/CMOS电平、 或者 3.3V的 LVTTL电平信号在总线网络中进行传输。 另外， 输入模拟信号和输出模拟信号经过压 /频转换后， 通过频率信号在总 线中进行传输， 例如 RS485、 RS422、 CAN等总线网络， 一种优选的实施 方式为 RS485总线，其最大传输距离达到 4000英尺，最高传输速率 10Mbps, 总线上允许连接多达 128个节点， 能够扩展的最大数字信号能力高达 32路 /采集卡 xl28个采集卡 = 4096路， 其他的模拟采集量、 数字 /模拟的控制量 也是 4096个， 可以满足绝大多数应用需求。 为了降低成本， 数据采集卡也 可由用户电路通过总线网路远程供电。
本实施方式中， 节拍信号 /CP、 复位信号 /RST、 板卡锁存信号 /BLE、 通 道锁存信号 /CLE、 输入数字信号以及输出数字信号等都可通过一根线缆在 总线中进行传输， 然而为了便于数据采集卡对各种信号进行有效区分和识 另' J , 提高控制效率和准确性， 不同类型的输入数据信号和输出数据信号通 过不同的线缆在总线中进行传输， 板卡节拍信号 /CP和通道节拍信号 /CP通 过一根单独的线缆在总线中进行传输。
另外， 为了进一步保证数据传输的稳定性， 可通过片选逻辑对输入数 字信号共道 DICS、 输入模拟信号共道 AICS、 输出数字信号共道 DOCS和 输出模拟信号共道 AOCS的状态进行控制， 当复位信号 /RST有效或者板卡 选通信号 /CS无效（即该数据采集卡未被选通）时， 未被选通的数据采集卡 暂停向用户电路发送输入数据信号， 并暂停接收来自用户单元的输出数据 信号， 片选逻辑控制各个信号共道脱离总线， 即保证板卡未采集数据时， 不从总线上接收信号， 也不输出信号到总线上对总线进行干扰。 图 2为本发明的数据采集卡的扩展控制方法第二种具体实施方式流程 图,该实施方式实现了用户电路对多个数据采集卡中多个数据通道进行控制 的过程， 包括以下步骤：
步骤 S200:流程开始。
步骤 S201 :用户电路发送复位信号 /RST 至数据采集卡对所有板卡地址 信号和通道地址信号进行清零。
步骤 S202:用户电路发送 N个板卡节拍信号 /CP至数据采集卡， 需要选 通对应的数据采集卡，例如选通地址为 0的第一个数据采集卡。
步骤 S203:用户电路发送板卡锁存信号 /BLE至数据采集卡。
步骤 S204:用户电路发送 M个通道节拍信号 /CP至数据采集卡，需要选 通对应的数据通道， 例如选通地址为 0的第一个数据通道。
步骤 S205:用户电路发送无效的通道锁存信号 /CLE至数据采集卡。
步骤 S206:被选通的数据通道采集输入数据信号 (可为输入模拟信号或 输入数字信号)并将其发送至用户电路,接着， 用户电路发送输出数据信号 (可为输出模拟信号或输出数字信号 ) 至被选通的数据通道。
步骤 S207:用户电路发送有效的通道锁存信号 /CLE至数据采集卡。
步骤 S208:延迟后， 用户电路发送无效的通道锁存信号 /CLE至数据采 步骤 S209:判断是否检测完该数据采集卡中所有的数据通道， 是， 则进 入步骤 S211,否则进入步骤 S210。
步骤 S210:用户电路再发送 1个通道节拍信号 /CP至数据采集卡， 使通 道计数器的计数值加 1 , 需要选通下一个数据通道,重复步骤 S205。
步骤 S211 :判断是否检测完所有的数据采集卡， 是， 则进入步骤 S213, 否则进入步骤 S212。 步骤 S212: 再发送一个板块节拍信号 /CP至数据采集卡， 使板卡计数 器的计数值加 1 , 需要选通下一个数据采集卡， 重复步骤 S203。
步骤 213: 结束任务。
图 3 为本发明的数据采集卡的扩展控制方法第三种具体实施方式流程 图， 该实施方式用户电路对某个数据采集卡中的某个数据通道进行控制的 过程， 包括以下步骤：；
步骤 S300:流程开始。
步骤 S301 :用户电路发送复位信号 /RST 至数据采集卡对所有板卡地址 信号和通道地址信号进行清零。
步骤 S302:用户电路发送 N个板卡节拍信号 /CP至数据采集卡， 需要选 通对应的数据采集卡。
步骤 S303:用户电路发送板卡锁存信号 /BLE至数据采集卡。
步骤 S304:用户电路发送 M个通道节拍信号 /CP至数据采集卡，需要选 通对应的数据通道。
步骤 S305:用户电路发送无效的通道锁存信号 /CLE至数据采集卡。 步骤 S306:被选通的数据通道采集输入数据信号 (可为输入模拟信号或 输入数字信号)并将其发送至用户电路,接着， 用户电路发送输出数据信号 (可为输出模拟信号或输出数字信号 ) 至被选通的数据通道。
步骤 S307:用户电路发送有效的通道锁存信号 /CLE至数据采集卡。 步骤 S308:延迟后， 用户电路发送无效的通道锁存信号 /CLE至数据采 步骤 S309:结束任务。
图 4为本发明的数据采集卡的扩展控制系统第一种具体实施方式示意 图， 包括用户电路和至少一个并联设置的数据采集卡， 其中， 用户电路包 括节拍信号控制模块 10, 每个数据采集卡包括板卡选通模块 21、 通道地址 生成模块 22和信号处理模块 23。
节拍信号控制模块 10用于向数据采集卡发送板卡选通节拍信号 /CP和 通道选通节拍信号 /CP。
板卡选通模块 21为数据采集卡预设板卡地址， 用于接收来自节拍信号 控制模块 10的板卡节拍信号 /CP并生成对应的板卡地址信号， 还用于对板 卡地址信号与预设的板卡地址进行比较后， 判断数据采集卡是否被选通。
通道地址生成模块 22用于接收来自节拍信号控制模块 10的通道节拍 信号 /CP并生成对应的通道地址信号， 并将其发送至信号处理模块 23。
信号处理模块 23为数据采集卡中的每个数据通道预设通道地址， 当数 据采集卡被选通时， 信号处理模块 23用于将通道地址信号与预设的通道地 址进行比较后， 选通对应的数据通道， 并将来自用户电路的输出数据信号 发送至被选通的数据通道， 或从被选通的数据通道采集输入数据信号并将 其发送至用户电路。
其中， 板卡选通模块 21 中设有板卡计数器， 通道地址生成模块 22中 设有通道计数器，板卡计数器用于根据板卡节拍信号 /CP的个数生成对应的 板卡地址信号，通道计数器用于根据通道节拍信号 /CP的个数生成对应的通 道地址信号。
图 5 为本发明的数据采集卡的扩展控制系统第二种具体实施方式示意 图， 该实施方式中， 数据采集卡中的板卡选通模块 21和通道地址生成模块 22都设在控制电路中，信号处理模块 23包括数字信号处理模块和模拟信号 处理模块， 相应地， 用户电路中的信号控制模块包括数字信号控制模块和 模拟信号控制模块。用户电路对节拍信号控制模块 10中的板卡节拍信号 /CP 和通道节拍信号 /CP进行差分电平转换后， 通过总线发送至数据采集卡， 数 据采集卡对其进行差分电平转换后， 分别发送至控制电路中的板卡选通模 块 21和通道选通模块 22实现数据采集卡和数据通道的选通， 电平转换电 路可选用 MAX485等芯片。 输入数字信号和输出数字信号也经过差分电平 转换后在总线网络中进行传输， 输入模拟信号和输出模拟信号经过压 /频转 换后在总线网络中进行传输。
图 6为本发明的数据采集卡的控制电路一种具体实施方式示意图， 该 实施方式能够实现 5个数据采集卡并联， 每个数据采集卡采集 16个数据通 道的 80个数据信息 （32个输入数字信号、 16个输入模拟信号、 16个输出 数字信号、 16个输出模拟信号）。 5个采集卡与用户单元直接通过总线网络 互连。 本实施方式的数据采集卡的控制电路中， 板卡选通模块 21包括板卡 计数器、 锁存器和比较器， 通道地址生成模块 22包括通道计数器。
本实施方式的板卡计数器选用模 5的计数器， 通道计数器为模 32的计 数器。 考虑到以后的扩展应用， 也可将两个计数器都设计为模 32的异步计 数器， 例如可选用 74LS161的常用芯片。 锁存器和比较器也可以选择通用 的 74HC573、 74HC688等芯片， 并通过 5位拨码开关来预设单板地址 0 ~ 31 , 或只用 3位拨码开关来设置单板地址 0 ~ 4。
图 7为本发明的数据采集卡的数字信号处理模块一种具体实施方式示 意图， 包括通道切换模块和寻址锁存模块。 通道切换模块根据片选逻辑中 的板卡选通信号 /CS和生成的通道地址信号选择数据通道后，从该数据通道 中采集输入数字信号， 这些输入数字信号经过必要的整形、 隔离等调理后 进入通道切换模块， 并通过输入数字信号共道 DICS进行传输。 同样， 寻址 锁存模块根据片选逻辑中的板卡选通信号 /CS 和生成的通道地址信号选择 数据通道后， 将来自输出数字信号共道 DOCS的输出数字信号经过必要的 整形、隔离等调理后进入对应的数据通道。片选逻辑结合通道锁存信号 /CLE 对寻址锁存模块进行数据通道的选通控制。 通道切换模块可选择 32路模拟 开关， 例如选择 2个单 16通道模拟开关， 如 CD4067合并组成， 寻址锁存 器可由多个类似于 74HC259的芯片合并组成。 图 8为本发明的数据采集卡的模拟信号处理模块一种具体实施方式示 意图， 也包括通道切换模块和寻址锁存模块。 通道切换模块根据片选逻辑 中的板卡选通信号 /CS和生成的通道地址信号选择数据通道后，从该数据通 道中采集输入模拟信号， 输入模拟信号经过必要的整形、 隔离等调理后进 入通道切换模块， 再经过压 /频转换后经过三态门 （三态门的使能端由通道 锁存信号 /CLE控制 )输入模拟信号共道 AICS进行传输。 同样， 来自输出 模拟信号共道 AOCS的输出模拟信号经压 /频转换后进入寻址锁存模块， 寻 址锁存模块根据片选逻辑中的板卡选通信号 /CS 和生成的通道地址信号选 择数据通道后， 将输出模拟信号经过必要的整形、 隔离等调理后进入对应 的数据通道。 本实施方式的压频转换电路可以选择常用的 VFC320等芯片。
图 9为本发明的数字信号数据采集卡的一种具体实施方式示意图， 该 实施方式的数据采集卡功能相对较单一， 只用于接收来自用户电路的输出 数字信号， 或者从各个数据通道采集输入数字信号并将其发送至用户电路。 本实施方式的数据采集卡还包括降压模块， 用于接受来自用户电路的远程 供电和地线信号。
图 10为本发明的模拟信号数据采集卡的一种具体实施方式示意图， 该 实施方式的数据采集卡功能相对较单一， 只用于接收来自用户电路的输出 模拟信号， 或者从各个数据通道采集输入模拟信号并将其发送至用户电路。
可见， 本发明的数据采集卡、 数据采集卡的扩展控制系统和方法， 均 支持用户电路通过节拍信号 /CP对数据采集卡以及数据采集卡中的数据通 道进行选通， 并从对应的数据通道进行数据采集， 或对其进行信号控制的 功能。 数据采集卡中包括只包含计数器、 比较器等硬件电路， 与现有技术 中数据采集卡通过通讯协议主动向用户电路上报数据信息的方式相比， 本 发明适用于多种串行接口， 能够实现多个数据采集卡的并联控制， 因此通 用性好， 扩展性强； 而且数据采集卡直接接受用户电路的控制， 并不存在 软件升级和协议不兼容的问题， 稳定性高。
本发明的数据采集卡能够从选通的数据通道对各种输入数字信号和 /或 输入模拟信号进行采集， 或将来自用户单元的各种输出数字信号和 /或输出 模拟信号发送至相应的数据通道， 因此用途十分广泛。
本发明对数据采集卡和数据通道进行选通时， 采用了地址清零、 锁存 等技术方案， 能够提高板卡选通和通道选通的准确性和数据传输的有效性。
以上内容是结合具体的优选实施方式对本发明所作的进一步详细说 明， 不能认定本发明的具体实施只局限于这些说明。 对于本发明所属技术 领域的普通技术人员来说， 在不脱离本发明构思的前提下， 还可以做出若 干筒单推演或替换， 都应当视为属于本发明的保护范围。

Claims

权利要求书
1、 一种数据采集卡的扩展控制方法， 适用于并联设置的数据采集卡， 该方法包括： 为每个数据采集卡预设板卡地址， 并为所述数据采集卡中的 每个数据通道预设通道地址； 其特征在于， 该方法还包括：
所述数据采集卡接收来自用户电路的板卡节拍信号， 并生成对应的板 卡地址信号， 所述数据采集卡将所述板卡地址信号与所述预设的板卡地址 进行比较， 判断所述数据采集卡是否被选通；
在判断结果为所述数据采集卡被选通时， 所述数据采集卡接收来自用 户电路的通道节拍信号， 并生成对应的通道地址信号， 所述数据采集卡将 所述通道地址信号与所述预设的通道地址进行比较后， 选通所述通道地址 信号对应的数据通道。
2、 根据权利要求 1所述的方法， 其特征在于， 选通所述通道地址信号 对应的数据通道之后， 该方法还包括以下步骤： 所述数据采集卡将来自所 述用户电路的输出数据信号发送至所述被选通的数据通道， 或从所述被选 通的数据通道采集输入数据信号并发送至用户电路。
3、 根据权利要求 2所述的方法， 其特征在于： 所述输入数据信号包括 输入数字信号和 /或输入模拟信号； 所述输出数据信号包括输出数字信号和 / 或输出模拟信号。
4、 根据权利要求 2所述的方法， 其特征在于： 所述输入数据信号和输 出数据信号的传输方法为： 不同类型的输入数据信号和输出数据信号通过 不同的线缆在总线中进行传输；
所述板卡节拍信号和通道节拍信号的传输方法为： 所述板卡节拍信号 和通道节拍信号通过一根单独的线缆在总线中进行传输。
5、 根据权利要求 1至 4任一项所述的方法， 其特征在于： 所述数据采 集卡接收来自用户电路的板卡节拍信号之前， 该方法还包括对所述板卡地 址信号或通道地址信号进行清零的步骤。
6、 根据权利要求 1至 4任一项所述的方法， 其特征在于： 所述数据采 集卡生成对应的板卡地址信号之后， 该方法还包括对所述板卡地址信号进 行锁存的步骤。
7、 根据权利要求 2所述的方法， 其特征在于： 所述数据采集卡将来自 所述用户电路的输出数据信号发送至所述被选通的数据通道的过程包括： 所述被选通的数据采集卡接收无效的通道锁存信号；
所述被选通的数据采集卡接收来自所述用户电路的输出数据信号； 所述被选通的数据采集卡接收有效的通道锁存信号；
所述被选通的数据采集卡接收无效的通道锁存信号。
8、 根据权利要求 1至 4任一项所述的方法， 其特征在于， 该方法进一 步包括： 未被选通的数据采集卡暂停向用户电路发送输入数据信号， 并暂 停接收来自用户单元的输出数据信号。
9、 一种数据采集卡， 其特征在于， 包括板卡选通模块、 通道地址生成 模块和信号处理模块； 其中，
所述板卡选通模块， 用于预设板卡地址， 接收来自用户电路的板卡节 拍信号并生成对应的板卡地址信号， 还用于将所述板卡地址信号与所述预 设的板卡地址进行比较后， 判断所述数据采集卡是否被选通；
所述通道地址生成模块， 用于接收来自用户电路的通道节拍信号并生 成对应的通道地址信号， 并将其发送至所述信号处理模块；
所述信号处理模块， 用于为数据通道预设通道地址， 并在数据采集卡 被选通时将所述通道地址信号与所述预设的通道地址进行比较， 根据比较 结果选通对应的数据通道， 并将来自用户电路的输出数据信号发送至所述 被选通的数据通道， 或从所述被选通的数据通道采集输入数据信号并将其 发送至用户电路。
10、 根据权利要求 9所述的数据采集卡， 其特征在于： 所述板卡选通 模块和通道地址生成模块中均设有计数器；
所述板卡选通模块中的计数器， 用于根据所述板卡节拍信号的个数生 成对应的板卡地址信号；
所述通道地址生成模块中的计数器， 用于根据所述通道节拍信号的个 数生成对应的通道地址信号。
11、 一种数据采集卡的扩展控制系统， 包括用户电路和并联设置的数 据采集卡， 其特征在于： 所述用户电路包括节拍信号控制模块， 所述数据 采集卡包括板卡选通模块、 通道地址生成模块和信号处理模块； 其中， 所述节拍信号控制模块， 用于向数据采集卡发送板卡节拍信号和通道 节拍信号；
所述板卡选通模块， 用于为所述数据采集卡预设板卡地址， 接收来自 所述节拍信号控制模块的板卡节拍信号并生成对应的板卡地址信号， 还用 于将所述板卡地址信号与所述预设的板卡地址进行比较， 根据比较结果判 断所述数据采集卡是否被选通；
所述通道地址生成模块， 用于接收来自所述节拍信号控制模块的通道 节拍信号后生成对应的通道地址信号， 并将其发送至信号处理模块；
所述信号处理模块， 用于为所述数据采集卡中的数据通道预设通道地 址， 并且在数据采集卡被选通时将所述通道地址信号与所述预设的通道地 址进行比较， 根据比较结果选通对应的数据通道， 并将来自用户电路的输 出数据信号发送至所述被选通的数据通道， 或从所述被选通的数据通道采 集输入数据信号并将其发送至用户电路。
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