WO2012067409A3 - Thin film transistor substrate having hybrid cmos structure and optical sensor array using the substrate - Google Patents

Thin film transistor substrate having hybrid cmos structure and optical sensor array using the substrate Download PDF

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Publication number
WO2012067409A3
WO2012067409A3 PCT/KR2011/008721 KR2011008721W WO2012067409A3 WO 2012067409 A3 WO2012067409 A3 WO 2012067409A3 KR 2011008721 W KR2011008721 W KR 2011008721W WO 2012067409 A3 WO2012067409 A3 WO 2012067409A3
Authority
WO
WIPO (PCT)
Prior art keywords
thin film
film transistor
substrate
optical sensor
cmos structure
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/KR2011/008721
Other languages
French (fr)
Other versions
WO2012067409A2 (en
Inventor
Moon Hyo Kang
Ji Ho Hur
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SILICON DISPLAY CO Ltd
Original Assignee
SILICON DISPLAY CO Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SILICON DISPLAY CO Ltd filed Critical SILICON DISPLAY CO Ltd
Publication of WO2012067409A2 publication Critical patent/WO2012067409A2/en
Publication of WO2012067409A3 publication Critical patent/WO2012067409A3/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/471—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having different architectures, e.g. having both top-gate and bottom-gate TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85—Complementary IGFETs, e.g. CMOS
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/011—Manufacture or treatment of image sensors covered by group H10F39/12
    • H10F39/016—Manufacture or treatment of image sensors covered by group H10F39/12 of thin-film-based image sensors

Landscapes

  • Thin Film Transistor (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

The present invention relates to a thin film transistor substrate in which a polycrystalline silicon thin film transistor having a coplanar structure with an insulating interlayer and an amorphous silicon thin film transistor having an inverted staggered structure with a gate insulating layer are formed on one substrate and the insulating interlayer and the gate insulating layer are formed as the same layer. When a hybrid CMOS structure is used, the manufacturing process is simplified and a characteristic of the amorphous silicon thin film transistor and the characteristic of the polycrystalline silicon thin film transistor can be simultaneously obtained with one substrate, and, as a result, the applicability of the thin film transistor is increased.
PCT/KR2011/008721 2010-11-15 2011-11-15 Thin film transistor substrate having hybrid cmos structure and optical sensor array using the substrate Ceased WO2012067409A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1020100113380A KR20120051979A (en) 2010-11-15 2010-11-15 Thin film transistor substrate having hybrid cmos structure and optical sensor array using the substrate
KR10-2010-0113380 2010-11-15

Publications (2)

Publication Number Publication Date
WO2012067409A2 WO2012067409A2 (en) 2012-05-24
WO2012067409A3 true WO2012067409A3 (en) 2012-08-09

Family

ID=46084505

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/KR2011/008721 Ceased WO2012067409A2 (en) 2010-11-15 2011-11-15 Thin film transistor substrate having hybrid cmos structure and optical sensor array using the substrate

Country Status (2)

Country Link
KR (1) KR20120051979A (en)
WO (1) WO2012067409A2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10116886B2 (en) 2015-09-22 2018-10-30 JENETRIC GmbH Device and method for direct optical image capture of documents and/or live skin areas without optical imaging elements

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102134142B1 (en) * 2013-12-20 2020-07-16 엘지디스플레이 주식회사 Coplanar thin film transistor, gate driver having the same and fabricating method thereof
CN115207011A (en) * 2022-05-23 2022-10-18 深圳市华星光电半导体显示技术有限公司 A backplane, photosensitive circuit and display panel

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05232506A (en) * 1992-02-20 1993-09-10 Seiko Epson Corp Liquid crystal display device
JPH05299653A (en) * 1991-04-05 1993-11-12 Fuji Xerox Co Ltd Semiconductor device and manufacturing method thereof
KR950033613A (en) * 1994-05-10 1995-12-26 이헌조 TFT-LCD and its manufacturing method

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05299653A (en) * 1991-04-05 1993-11-12 Fuji Xerox Co Ltd Semiconductor device and manufacturing method thereof
JPH05232506A (en) * 1992-02-20 1993-09-10 Seiko Epson Corp Liquid crystal display device
KR950033613A (en) * 1994-05-10 1995-12-26 이헌조 TFT-LCD and its manufacturing method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10116886B2 (en) 2015-09-22 2018-10-30 JENETRIC GmbH Device and method for direct optical image capture of documents and/or live skin areas without optical imaging elements

Also Published As

Publication number Publication date
WO2012067409A2 (en) 2012-05-24
KR20120051979A (en) 2012-05-23

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