WO2013096507A1

WO2013096507A1 - System and method for controlling output ripple of dc-dc converters with leading edge modulation control using current injection

Info

Publication number: WO2013096507A1
Application number: PCT/US2012/070724
Authority: WO
Inventors: Robert Jewell TAYLOR; Louis R. Hunt; Vikas V. PADUVALLI
Original assignee: University of Texas System; Cirasys Inc; University of Texas at Austin
Current assignee: University of Texas System; Cirasys Inc; University of Texas at Austin
Priority date: 2011-12-20
Filing date: 2012-12-19
Publication date: 2013-06-27
Anticipated expiration: 2014-06-20
Also published as: JP2015501133A; CN104169825A; EP2795419A1; EP2795419A4; US20130154586A1; US9690308B2

Abstract

In a preferred embodiment, a voltage converter comprises a voltage converter circuit, an output adjuster and a controller. The controller provides a control signal at a duty ratio determined dynamically by a set of input signals. The dynamic output adjuster determines the set of input signals by adjusting the ac component of an output voltage based on a gain Q. The dynamic output adjuster alleviates dependence on the value of Rc under leading edge modulation in either analog or digital converter systems. In addition to delivering the desired left half plane zero effects, dynamic output adjustment reduces the value of the output ripple. As a result, modern control methods such as input-output linearization can be used to design both boost and buck-boost PWM converters if only left half plane zero effects are present.

Description

SYSTEM AND METHOD FOR CONTROLLING OUTPUT RIPPLE OF DC-DC CONVERTERS WITH LEADING EDGE MODULATION CONTROL USING

CURRENT INJECTION

CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application claims priority benefit from U.S . Patent Application No. 13/720,850 filed with the United States Patent and Trademark Office on December 1 , 2012, which claims priority from U.S. Provisional Patent Application No. 61/578,137 filed December 20, 2011.

FIELD OF THE INVENTION [0002] The present invention relates generally to providing modulation signals to electrical circuits and, more particularly, to a system and method for controlling output ripple of DC/DC converters with leading edge modulation ("LEM") control.

BACKGROUND OF THE INVENTION

[0003J Power converters are used to convert one form of energy to another (e.g., AC to AC, AC to DC, DC to AC, and DC to DC) thereby making it usable to the end equipment, such as computers, automobiles, electronics, telecommunications, space systems and satellites, and motors. Every application of power electronics involves some aspect of control. Converters are typically identified by their capability and/or configurations, such as, buck converters, boost converters, buck-boost converters, boost-buck converters (Cuk), etc. For example, DC-DC converters belong to a family of converters known as "switching converters" or "switching regulators." This family of converters is the most efficient because the conversion elements switch from one state to another, rather than needlessly dissipating power during the conversion process. Essentially there is a circuit with switches and two configurations (each can be modeled ratio (d) is the ratio indicating the time in which a chosen switch is in the "on" position while the other switch is in the "off" position, and this d is considered to be the control input. Input d is usually driven by pulse-width-modulation ("PWM") techniques.

[0004] Switching from one state to another and the accompanying nonlinearity of the system causes problems. State space averaging reduces the switching problems to make the system, in general, a nonlinear averaged system for a boost converter or a buck-boost converter. But, control of the system under these nonlinear effects becomes difficult when certain performance objectives must be met. Linearization is mostly accomplished through a Taylor series expansion. Nonlinear terms of higher orders are thrown away and a linear approximation replaces the nonlinear system. This linearization method has proven effective for stabilizing control loops at a specific operating point. However, use of this method requires making several assumptions, one of them being so-called "small signal operation." This works well for asymptotic stability in the neighborhood of the operating point, but ignores large signal effects which can result in nonlinear operation of the control loop when, for example, an amplifier saturates during startup, or during transient modes, such as load or input voltage changes. Once nonlinear operation sets in, the control loop can have equilibrium points unaccounted for in the linearization.

[0005] One of the most widely used methods of pulse-width modulation is trailing- edge modulation ("TEM"), wherein the on-time pulse begins on the clock and terminates in accordance with a control law. Unstable zero dynamics associated with TEM with switch on- time sampling in the continuous conduction mode ("CCM") prevent the use of an input-output feedback linearization because it would result in an unstable operating point for boost and buck- boost converters. The other control method is LEM, wherein the on-time pulse begins in accordance with a control law and terminates on the clock. The difference between LEM and TEM is that in TEM the pulse-width is determined by the instantaneous control voltage v_c prior to switch turn-off, whereas in LEM the pulse-width is determined by v_c prior to switch turn-on.

[0006] Further, it is well known in the art that pulse-width modulation ("PWM") boost and buck-boost power converters exhibit right half plane zero effects when trailing edge modulation with on time switch sampling is employed. This makes control design extremely difficult. It has been shown that if leading edge modulation with off time switch sampling is used with a sufficiently large equivalent series resistance ("ESR") R_c of the output capacitor, then left half plane zero effects emerge. This enables much easier control design.

[0007] Therefore, there is a need for a system and method for controlling ripple of DC-DC converters with LEM control to alleviate dependence on the value of R_c under LEM in either analog or digital converter systems while delivering left plane zero effects.

SUMMARY OF THE INVENTION

[0008] The present disclosure includes a voltage converter controlled by applying a control signal based on an adjusted output voltage of a voltage converter circuit. The adjusted output voltage depends on inductor current ripple in an inductor of the voltage converter circuit.

[0009] In a preferred method of voltage conversion an input voltage is converted into an output voltage by providing a voltage converter circuit having the input voltage as a voltage source and producing the output voltage across a load resistance. An inductor current flows through an inductor in the voltage converter circuit, the inductor current having a steady-state component and a time varying component. An output adjuster is connected to the voltage converter circuit, the output adjuster generating an adjusted output voltage which depends on the output voltage and the time varying component of the inductor current scaled by a first gain factor. A controller is connected to the output adjuster and to the voltage converter circuit, the controller generating a control signal with a duty ratio that controls the voltage converter circuit. The duty ratio is dynamically determined from the adjusted output voltage, the input voltage, a desired output voltage, a second gain factor, the inductor current and the first gain factor. The voltage converter circuit operates to match the output voltage to the desired output voltage.

[0010] In a preferred embodiment, the adjusted output voltage is a linear function of the time varying component of the inductor current.

[0011] In a preferred embodiment, the control signal is determined based on leading edge modulation of the voltage converter circuit and the control signal is based on input-output feedback linearization of a set of state variables with stable zero dynamics, where the set of state variables includes the adjusted output voltage. However, any suitable control method is compatible with the method. [0012] In further aspect of the present disclosure, the controller utilizes proportional, integral and derivative gain for the second gain.

[0013] In a first embodiment, the voltage converter comprises a boost converter circuit, an output adjuster and a controller. A suitable duty ratio is generated by the controller and applied to the boost converter based on an adjusted output voltage from the output adjuster where the adjusted output voltage is determined from the output voltage of the boost converter and an inductor current ripple.

[0014] In a second embodiment, the voltage converter comprises a buck-boost converter circuit, an output adjuster and a controller. A suitable duty ratio is generated by the controller and applied to the buck-boost converter based on an adjusted output voltage from the output adjuster where the adjusted output voltage is determined from the output voltage of the buck-boost converter and an inductor current ripple.

[0015] In a third embodiment, the voltage converter comprises a buck converter circuit, an output adjuster and a controller. A suitable duty ratio is generated by the controller and applied to the buck converter based on an adjusted output voltage from the output adjuster where the adjusted output voltage is detennined from the output voltage of the buck converter and an inductor current ripple.

BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 is a circuit diagram of a boost converter of a preferred embodiment.

[0017] Figure 2 is a circuit diagram of a buck-boost converter of a preferred embodiment.

[0018] Figure 3 is a circuit diagram of a buck converter of a preferred embodiment.

[0019] Figure 4 is a block diagram of a preferred embodiment of a voltage converter including a converter circuit, an output adjuster and a controller.

[0020] Figure 5 is a flow chart of a method of operation for a preferred embodiment of a voltage converter.

DETAILED DESCRIPTION

[0021] In the disclosed embodiments of a boost and a buck-boost converter with PWM control, the inductor current is measured and a difference current is formed between the measured inductor current and a measured output current. The difference current represents an inductor current ripple, which is further scaled and then injected into the converter state equations. A method for altering the converter state equations based on inductor current ripple is disclosed.

[0022] In a preferred embodiment, the method of the present disclosure can be used to alleviate dependence on the value of output capacitor equivalent series resistance ("ESR") (R_c) when used with leading edge modulation ("LEM") and switch off time sampling in either analog or digital converter systems.

[0023] Figure 1 illustrates a preferred embodiment boost converter circuit 100 having a single output voltage 110 (y). The boost converter comprises a series resistor 102 (R_s) connected in series with an inductor 103 (I), a switch 104 (Si) and a DC voltage input 101 (UQ). A capacitive circuit comprises a switch 105 (_¾), connected in series to inductor 103, further connected in series to a capacitor 106 (C) and DC series resistance 107 (Rc) associated with capacitor 106_. Load resistance 108 (R) is connected in parallel with capacitor 106 and DC series resistance 107. Output voltage 110 (y) is taken across load resistance 108. The inductor current 112 (x_/) is measured as the current through inductor 103 and series resistor 102.

[0024] Figure 2 illustrates a preferred embodiment buck-boost converter circuit 200 having a single output voltage 210 (y). The buck-boost converter comprises a switch 204 (Si) connected in series with series resistor 202 (R_s) which is further connected to an inductor 203 (L). Inductor 203 and switch 204 are connected to DC voltage input 201 (UQ) to complete a series circuit. A capacitive circuit comprises a switch 205 (¾) connected between switch 204 and a capacitor 206 ( ), and further connected in series with DC series resistance 207 (Re) associated with capacitor 206. Load resistance 208 (i?) is connected in parallel with the capacitor 206 and DC series resistance 207. Output voltage 210 (y) is taken across load resistance 208. The inductor current 212 (xf) is measured as the current through inductor 203 and series resistor 202.

[0025] Figure 3 illustrates a preferred embodiment buck converter circuit 300 having a single output voltage 310 (y). The buck converter comprises a switch 304 (Si) connected in series with a series resistor 302 connected to inductor 303 (L) which is further connected to load resistance 308 (R). Switch 304 and load resistance 308 further connect to DC voltage input 301 (UQ) to complete a series circuit. A switch 305 (¾) is connected between switch 304 and DC voltage input 301. A capacitive circuit is connected in parallel with load resistance 308 and comprises a capacitor 306 (Q connected to a DC series resistance 307 (R_c) associated with capacitor 306. The output voltage 310 (y) is taken across load resistance 308, The inductor current 312 (xj) is measured as the current through inductor 303 and series resistor 302.

[0026] In general, for the boost, buck-boost and buck voltage converter circuits, the system is characterized by the state equations for state variables xj (inductor current), X2

(capacitor voltage) and y (output voltage). A control signal is applied to the (Si) switch characterized by its instantaneous duty ratio d. The steady-state output voltage of a boost voltage converter is 1/(1 D) times the input voltage where D is the steady-state value of the

instantaneous duty ratio d. The steady-state output voltage of a buck-boost converter is D/(1~D) times the input voltage and the steady- state output voltage of a buck converter is D times the input voltage. [0027] Figure 4 shows a preferred embodiment of a control circuit 400 suitable for controlling the voltage converter circuits of Figures 1, 2 and 3. Control circuit 400 is amenable to input-output linearization methods that do not constrain stability to one operating point, but rather to a set of operating points spanning the expected range of operation during startup and transient modes of operation. A voltage converter circuit 402 is connected to a DC input voltage 401 (uo) and produces output voltage 410 (y) in response to control signal 409 characterized by the duty ratio d. An output adjuster circuit 405 senses load resistance 406 (R) and inductor current 412 (xi) of voltage converter circuit 402 to adjust output voltage 410 to an adjusted output voltage 415 (γ') according to a deltaE gain factor 416 (Q). Adjusted output voltage 415 and deltaE gain factor 416 is communicated to controller 420. Controller 420 produces control signal 409 from adjusted output voltage 415, deltaE gain factor 416, DC input voltage 401, a desired output voltage 419 (y₀) and circuit parameters 413 including, for example, the load resistance R and the inductor current x;. Controller 420 adjusts control signal 409 to match output voltage 410 to desired output voltage 419.

[0028] Controller 420 and output adjuster 405 are preferably implemented in one or more digital devices, implemented with programmable software instructions stored in memory and executed by a processor to carry out the converter control functions including output adjustment. In alternate embodiments, an analog implementation is used instead of a digital implementation. The output adjuster methods as described below are then implemented as hardware functions, including analog adders and multipliers.

[0029] Controller 420 can implement any desired control method. For example, a pulse width modulated (PWM) controller is suitably constructed. The P WM controller produces the control signal which drives the switch (S of a voltage converter with the duty ratio d. [0030] Voltage converters operating in the continuous conduction mode with trailing edge modulation (TEM) and switch on-time sampling give rise to unstable zero dynamics for boost and buck-boost converters where the linear segment of the system about an operating point has a right half plane zero. In a preferred control embodiment, leading-edge modulation (LEM) with switch off time sampling is implemented by controller 420 that changes the zero dynamics, so that the linear part of the system has only left half plane zeros. Since the resulting nonlinear system possesses stable zero dynamics, input-output feedback linearization can be employed wherein a linearizing transformation is performed and used to define control signal inputs to a converter. This transformation is local in nature, but it can be applied in a neighborhood of any state space operating point for multiple DC-DC conversions.

[0031] In a preferred embodiment of a boost converter, boost converter circuit 100 is substituted for voltage converter circuit 402, and controller 420 uses LEM with switch off time sampling of the state variables. When output adjuster is off, Q = 0,y' = y, and the dynamic state equations for the boost converter are

^{[RCXL + XZ D}

R _F

y = _{R + R} [fl_c*i + x_z]

(Eqs. 1) where x₁ is the inductor current, x₂ is the voltage across capacitor C, u₀ is the input voltage, y is the output voltage and duty ratio d is the instantaneous duty ratio of the control signal. The dot above a variable means the time derivative of the variable.

[0032] Given a desired output voltage y₀, the equations x = 0, x₂ = 0 and y = y₀ are solved to find the corresponding steady-state values x_1Q, x₂o, with steady-state duty ratio D . The state space equilibrium point is x₁₀, x₂₀) ; asymptotically stabilizing the system to this equilibrium point sends y asymptotically to y₀.

Next, a Taylor series linearization is performed on Eqs. 1 about x₁₀, X₂Q, and D. Using the approximations R_s = 0, R = 0, x₁₀ = ^~^_> and x₂₀ = ^- ^me resulting transfer function has a zero in the open left half plane if and only if:

L

^{Rc C >} R (l - D) -

(Eq. 4)

This is the well-known Ridley condition for the boost converter.

[0033] Under the Ridley condition, the input-output feedback linearization is employed using proportional control, generally with controller gain factor k > 0. The input- output feedback linearization yields the formula for duty ratio d:

(RR_CC + l)y - (L - R_sR_cC)Rx₁ - RR_cCu_Q + (R + R_c)LCk(y_Q - y)

d =

(Eq. 5)

The Ridley condition holds if the denominator is positive and the approximations x and = 1 are valid in Eq. 5.

R+R_C ^N

[0034] Generally, integral and derivative gain can also be implemented by the controller so that the controller gain factor takes the form

where k_p, kj, and k_d are the gains of the proportional, integral, and derivative terms of the controller and s is a complex variable. For example, an integral gain can be included to reduce steady state error.

[0035] When the output adjuster is on with deltaE gain factor Q > 0, the output adjuster changes the output y' used by the controller for control purposes according to

(Eq. 7) where y is the output voltage in the state equations (Eqs. 1). xj represents the AC + DC terms of inductor current. Since is equal to the DC term near steady state, x — represents the

AC term which is the inductor ripple current. The output adjuster does not change the DC component of output voltage y of the physical plant which matches the desired output voltage y₀: instead the output adjuster changes the signal presented to the controller which affects the dynamics of the output voltage y.

[0036] The state equations, modified by the output adjuster with Q > 0, become: lig R%2 %1 ^

= T ^~ L(R + B_C) ^{" [RS +} r¥T^)^] T ⁺ L(R + R_C) ^{[RCXL + X2] D} ^{2 =} - ο Τ^) ^x> ⁺ c(fi ¾) ^[Xl(1 - ^{d ]}

y' = ^_c l^R -^Rc + Q⁾ i + (R - <?)¾]·

(Eqs. 8)

[0037] A Taylor series linearization is performed on Eqs. 8 about the steady state XiO' ^x2o ^and D resulting in a transfer function G(s using the approximations R_S = 0, x₁₀ = (_I-_{D A}' ^ ^{%2a =} c¾" ^{With tlie} *^urther approximations: R = 0 and R_CQ = 0, and with the additional assumption that R > Q, it is easily shown that the transfer function G(s) has the open left half plane if and only if

(Eq. 9)

Eq. 9 is the Ridley condition for a boost converter modified by an output adjuster with Q chosen so that R > Q. From Eq. 9, the output adjustment has a least two implications. First, the value of R_c required by the usual Ridley condition is lowered. Second, the output ripple due to R_c is reduced.

[0038] When the Ridley condition in Eq. 9 holds, then input-output linearization is used to design the control condition for a boost converter. Using a controller with controller gain factor k > 0, the input-output linearization results in a duty ratio d =

V

(Eq. 10) where

R (R_c + (?) (R + Rc) (Rc + Q)^z]

S = (-R_s(R + R_c) - RR_c-) + + R²

R + R_c L C L(R - Q) \ ' R

U = (R_c + <?) , and

L(R + R_C)

[0039] As output voltage ripple increases (or decreases) at particular desired output voltage y₀, higher (or lower) then the value of Q can be adjusted to stabilize the system.

[0040] In a preferred embodiment, the duty ratio d of Eq. 10 is applied as the control signal for the boost converter. In other embodiments, various approximations to Eq. 10 can be used to determine the duty ratio d for the control signal.

[0041] In one embodiment of the boost converter, a first approximation, including Rc = 0, R_CQ = 0 and Q² = 0 , is applied to Eq.lO to arrive at a duty ratio d given by the formula:

(Eq. 11)

[0042] In another embodiment of the boost converter, a second approximation including— - = 1 is applied to Eq. 11 to arrive at a duty ratio d given by the formula:

R—Q

[R{R_C + Q)C + L)y' - (I - R_S(R_C + Q) R_Xl - R(R_C + Q)Cu₀ + (fi + R^LCkjy^ - y')]

R((R_C + Q)Cy' - L _{R ^R _{Rc) Xl}

(Eq. 12)

Eq. 12 is valid when Q«R. (0043] In another set of embodiments of a boost converter, Q is replaced by

R

Q→ Q >

(R + R_c)

(Eq. 13) in Eq. 10, Eq. 11 and Eq. 12 to determine the duty ratio d and the adjusted output voltage is replaced by

(Eq. 14)

In these embodiments, Q is chosen so that Q < (R + Rc ).

[0044] In a preferred embodiment of a buck-boost converter, buck-boost converter circuit 200 is substituted for voltage converter circuit 402, and controller 420 uses LEM with switch off time sampling of the state variables. When output adjuster is off, Q = 0, y' = y, and the dynamic state equations for the boost converter are

Rx₂ Γ RR_C 1 ¾ R _{r Ί} _, u₀

= ^~WTRT) ^~ [^{RS +} ( M^]T ⁺ W R ) ^{[RCXL + X2]D +} T^D

(Eqs. 15) where x is the inductor current, x₂ is the voltage across capacitor C, u₀ is the input voltage, y is the output voltage and duty ratio d is the instantaneous duty ratio of the control signal. The dot above a variable means the time derivative of the variable.

[0045] Given a desired output voltage y₀, the equations j = 0, x₂ ⁼ 0 y ⁼ Ύο are solved to find the corresponding steady-state values x₁₀, x₂o, with steady-state duty ratio D. The state space equilibrium point is (x_10t x₂₀); asymptotically stabilizing the system to this equilibrium point sends y asymptotically to y₀.

[0046] Next, a Taylor series linearization is performed on Eqs. 15 about ^lO' ^o- ^ana" D- Using the approximations R_s = 0, R = 0, x₁₀ = ^u _g ⁰ _Zj! and x₂₀ = 7j^ ^me resulting transfer function has a zero in the open left half plane if and only if:

LD

^{RcC >} W→ -

(Eq. 16)

This is the Ridley condition for the buck-boost converter.

[0047] Under the Ridley condition, the input-output feedback linearization is employed using proportional control, generally with proportional, integral and derivative gain with controller gain factor k > 0. The input-output feedback linearization yields the formula for duty ratio d

(RR_CC + L)y + (L - R_sR_cC)Rx₁ + _R + R_c)LCk y₀ - y)

d =

LR

R(R_cCy + P 4- P - R-C^^Uo)

(Eq. 17)

The Ridley condition holds if the denominator is negative and the approximations

i ¹ are valid in Eq. 17.

[0048] Generally, integral and derivative gain can also be implemented by the controller so that the controller gain factor takes the form k = (k_p + ^ki/_s + k_ds^ , (Eq. 18) where k_pj k¾, and k^ are the gains of the proportional, integral, and derivative terms of the controller and s is a complex variable. For example, an integral gain can be included to reduce steady state error.

[0049] When the output adjuster is on with deltaE gain factor Q > 0, the output adjuster changes the output y' used by the controller for control purposes according to y' = y + Q _x₁ + ^)

(Eq. 19) where y is the output voltage in the state equations (Eqs. 15). xi represents both the ac and dc terms of inductor current. Since (— is equal to the dc term near steady state,

(x + represents the ac term which is the inductor ripple current.

[0050] The state equations, modified by the output adjuster with Q > 0, become:

RRc

X| = R_s +

L(R + Rc) (R + R_c) 1 R + R_C) ^{1 c 1 2}

(Eqs. 20)

[0051] A Taylor series linearization is performed on Eqs. 20 about the steady state ^xio_> ^x2o ^and D resulting in a transfer function G{s), using the approximations R_s = 0,

io = ^y_R> ^m& ^x20 ⁼ °_Dy With ^me further approximations: R = 0 and R_CQ = 0, with the additional assumption that R > Q, it is easily shown that the transfer function G(s) has a zero in the open left half plane if and only if

(Eq. 21)

Eq. 21 is the Ridley condition for a buck-boost converter modified by an output adjuster with Q chosen so that R > Q. From Eq. 21, the output adjustment has a least two implications. First, the value of R_c required by the usual Ridley condition is lowered. Second, the output ripple due to R_c is reduced.

[0052] When the Ridley condition in Eq. 21 holds, then input-output feedback linearization is used to design the control condition for a buck-boost converter. Using a controller with controller gain factor k > 0, the input-output feedback linearization results in a duty ratio

-Py' - Sx₁ ~ Uu_Q - k{y' - y_Q')

d =

V

(Eq. 22) where

1 R² (R_C + Q) _, 1

P = -

R + R_C [ L R ~ Q) C

U = 0 , and

[0053] As output voltage ripple increases (or decreases) at particular desired output voltage y₀, higher (or lower) then the value of Q can be adjusted to stabilize the system.

[0054] In a preferred embodiment, the duty ratio d of Eq. 22 is applied as the control signal for the buck-boost converter. In other embodiments, various approximations to Eq. 22 can be used to determine the duty ratio d for the control signal.

[0055] In one embodiment of the buck-boost converter, a first approximation, including R² = 0, R_CQ = 0 and Q² = 0 , is applied to Eq. 22 to arrive at a duty ratio d given by the formula:

(Eq. 23)

[0056] In another embodiment of the buck-boost converter, a second approximation including ^-^ = 1 is applied to Eq. 23 to arrive at a duty ratio d given by the formula: R{R_C + Q)C + L)y' + (L - R_S(R_C + Q)C Rx₁ + (fi + R_c)LCk(y_Q' - y')j

R ((R_c + Q)Cy' + L _(R K _{Rc ¾1} - (/?_c + Q) Cu₀^

(Eq. 24)

Eq. 24 is valid when Q « .

[0057] In another set of embodiments of a buck-boost converter, Q is replaced by R

Q→ Q .

(R + R_c)

(Eq. 25) in Eq. 22, Eq. 23 and Eq. 24 to determine the duty ratio d and the adjusted output voltage is replaced by

(Eq. 26)

In these embodiments, Q is chosen so that Q < (R + Rc ).

[0058] In a preferred embodiment of a buck converter, buck converter circuit 300 is substituted for voltage converter circuit 402, and controller 420 uses LEM with switch off time sampling of the state variables. When the output adjuster is off, Q = 0, y' = y, and the dynamic state equations for the buck converter are

^{1 R}

^X2 ~ ^~ C{R + R_C) ^{%2 +} C(R + R_c) ^Xl R

³ R + R_c

(Eqs. 27) where x₁ is the inductor current, x₂ is the voltage across capacitor C, ₀ is the input voltage, y is the output voltage and duty ratio d is the instantaneous duty ratio of the control signal. The dot above a variable means the time derivative of the variable.

[0059] Given a desired output voltage y_Q, the equations x = 0, x₂ = 0 and y = y₀ are solved to find the corresponding steady-state values ¾₀, x₂₀, with steady-state duty ratio D. The state space equilibrium point is x₁₀, x₂o),' asymptotically stabilizing the system to this equilibrium point sends y asymptotically to y₀.

[0060] The buck converter is a linear system with an open left half plane zero at - 1/RcC in its transfer function under LEM with switch off time sampling or TEM with switch on- time sampling. Input-output feedback linearization is employed using proportional control, generally with proportional, integral and derivative gain with controller gain factor k > 0. For LEM with switch off time sampling, the input-output feedback linearization yields the formula for duty ratio:

(Eq. 28)

[0061] Generally, integral and derivative gain can also be implemented by the controller so that the controller gain factor takes the form

[0062] where k_p, ¾, and ka are the gains of the proportional, integral, and derivative terms of the controller and s is a complex variable. For example, an integral gain can be included to reduce steady state error. When the output adjuster is on with deltaE gain factor

Q > 0, the output adjuster changes the output; used by the controller for control purposes according to

(Eq. 30) where y is the output voltage in the state equations (Eqs. 27). x_/ represents both the ac and dc terms of inductor current. Since y/R is equal to the dc term near steady state, then x _/ - y/R represents the ac term which is the inductor ripple current.

[0063] The state equations, modified by the output adjuster on with Q > 0, become:

y^{' ^} Έ τ ^ + ^Q»^{Xi + (R} - ^^]·

(Eqs. 31)

[0064] This buck converter has an open left half plane zero in its transfer function at

1

(Eq. 32)

[0065] Then input-output feedback linearization is used to design the control condition for a buck converter. Using a controller with controller gain factor k > 0, the input- output feedback linearization results in a duty ratio

-Py' - Sx₁ - Uu₀ - k(y' - y_Q')

d =

(Eq. 33) where y_Q' = y₀,

R ( c + (R + R_c) _{i n2} (R_c + QY

S = 0)

(-R_S(R + R_c-) - RR_C) + V R

C L R - Q) U = 0 , and

R (R_C + Q u₀

V =

L(R + R_C

[0066] As output voltage ripple increases (or decreases) at particular desired output voltage y_Q, higher (or lower) then the value of Q can be adjusted to stabilize the system.

[0067] In a preferred embodiment, the duty ratio d of Eq. 33 is applied as the control signal for the buck converter. In other embodiments, various approximations to Eq. 33 can be used to determine the duty ratio d for the control signal.

[0068] In one embodiment of the buck converter, a first approximation, including Rc = 0, R_CQ = 0 and Q² = 0 , is applied to Eq. 33 to arrive at a duty ratio d given by the formula:

(Eq. 34)

In another embodiment of the buck converter, a second approximation 1 is applied to Eq. 34 to arrive at a duty ratio d given by the formula:

(R(R_C + Q)C + L)y - (L - R_S(R_C + Q)C)Rx₁ + ( R + R_c)LCk(y₀ - y)]

R (R_C + Q)Cu₀

(Eq. 35)

Eq. 35 is valid when Q « R.

[0070] · In another set of embodiments of a buck converter, Q is replaced by R

Q→ Q >

(Eq. 36) in Eq. 33, Eq. 34 and Eq. 35 to determine the duty ratio d and the adjusted output voltage is replaced by

(Eq. 37)

In these embodiments, Q is chosen so that Q < (R + R_c).

[0071] In an alternate embodiment for a buck converter, buck converter circuit 300 uses TEM with switch on time sampling of the state variables. The state equations 27 and 31 and d equations 28, 33, 34, and 35 remain the same.

[0072] Referring to Figure 5, a method 500 for operation of a voltage converter is provided. The voltage converter includes a voltage converter circuit, an output adjuster, a controller and a voltage source supplying input voltage u₀. The method begins at step 502 where a set of parameters for the voltage converter circuit are determined including a load resistance. At step 503, an initial controller gain k is set to a pre-defined (proportional, integral and derivative) gain value and an initial value for the deltaE gain factor Q < R is set where R is the load resistance. For the embodiments of Eqs. 13, 25 and 36, Q < (R+R_c). At step 505, the controller is started applying the control signal to the voltage converter circuit using the initial duty ratio d and the initial value of the deltaE gain factor Q.

[0073] At step 506, the set of circuit parameters are dynamically measured. At step 507, the duty ratio d is dynamically adjusted based on the set of parameters, the controller gain factor k, and the deltaE gain factor Q. At step 508, Q may be dynamically adjusted, for example, based on any changes to the load resistance or based on inductor ripple. At step 509, a determination of a stop condition is made. If the stop condition is true, then at step 510, the voltage converter is stopped. If the stop condition is false, then the method continues performing steps 506, 507 and 508.

[0074] For a boost converter without an output adjuster, the Ridley condition in Eq,4 should be satisfied. In the condition that (7 - D) and R take on mirirmum values, the boost converter should operate at the highest output power the plant can support and a suitable value for Rc. The value for R_c can be reduced only as the output voltage and output current are reduced.

[0075] In another embodiment for the boost converter, at step 503, Q is adjusted as follows. With Rc being the equivalent series resistance (ESR) rating for the capacitor, Q satisfies the condition

(R_c + Q)C >

(Eq. 38) where y

l - D u₀ ' The inequality Eq.38 is met, for example, if

Ly max

nmin ^uO

(Eq. 39) for some value of β > 1. From Eq. 39, it is easily seen that the value of Q can be adjusted to a new value of Q, Q_new, while keeping β constant, for Ύτηαχ Λ

(Eq. 40)

Eq. 40 accounts for variation in the output voltage and in the output load current while

maintaining the same factor β.

[0076] For a buck boost converter without an output adjuster, the Ridley condition in Eq.16 should be satisfied. In the condition that D takes on a maximum value and R takes on a minimum value, the buck boost converter should operate at the highest output power the plant can support and a suitable value for Rc- The value for Rc can be reduced only as the output voltage and output current are reduced,

[0077] In another embodiment for the buck boost converter, at step 503, Q is adjusted as follows. With Rc being the equivalent series resistance (ESR) rating for the capacitor, Q satisfies the condition

(¾ + Q)C >

(Eq. 41) where

D

1— D u_Q '

The inequality Eq.41 is met, for example, if

Rmin o

(Eq. 42) for some value of β > 1. From Eq. 42, it is easily seen that the value of Q can be adjusted to a new value of Q, Q_new, while keeping ? constant, for

(Eq. 43)

Eq. 40 accounts for variation in the output voltage and in the output load current while maintaining the same factor β.

[0078] In deriving equations 40 and 43, the approximation Q « R is made and changes in the input voltage u₀ are not accounted for. Where the input voltage is not constant, the value of D will change which also affects the adjustment of Q, A suitable analysis similar to the analysis provided in Equations 38-43 will yield equations for the adjustment of Q when input voltage changes.

[0079] The controller is implemented according to one of a group of: a discrete electronics circuit; a set of programmed instructions embodied in an FPGA; a set of programmed instructions embodied in a digital signal processor; a microcontroller; a set of programmed instructions embodied in an ASIC; and combinations thereof. A suitable hardware platform includes clocking circuits, a CPU (if required), a non- volatile memory for storing the

programmed instructions, a volatile memory for storing intermediate results and for storing calculated parameters for the controller and suitable input/output controls for starting, stopping and entering parameters related to the function of the controller.

[0080] The output adjuster is also implemented according to one of a group of: a discrete electronics circuit; a set of programmed instructions embodied in an FPGA; a set of programmed instructions embodied in a digital signal processor; a microcontroller; a set of programmed instructions embodied in an ASIC; and combinations thereof. A suitable hardware platform includes clocking circuits, a CPU (if required), a non- volatile memory for storing the programmed instructions, a volatile memory for storing intermediate results and for storing calculated parameters for the output adjuster and suitable input/output controls for starting, stopping and entering parameters related to the function of the output adjuster.

[0081] For example, in a preferred embodiment, a digital signal processor and a computer program stored on a computer readable medium is provided for programming the digital signal processor to implement the controller and the output adjuster as disclosed. The digital signal processor in operation performs the function of determining the adjusted output y determining Q and providing the control signal at the duty ratio d according to the equations for duty ratio disclosed, the gain k and the type of voltage converter implemented.

[0082] In an embodiment utilizing analog control instead of digital control, the controller is replaced by an analog PID controller with analog inputs for u_Q, y_Q} ;_; Q, and . Output adjuster is replaced by an analog circuit implementing Eq. 7 for a boost converter, Eq. 19 for a buck-boost converter and Eq. 37 for a buck controller where the load resistance R and current / is measured and converted to corresponding voltages.

[0083] It should also be understood, that the output adjuster of the present disclosure can be made as an add-on component for power control circuits to reduce ripple where the output adjuster is added at design time or as a retrofit to an existing power control circuit.

[0084] The embodiments presented in this disclosure are intended to provide implementable examples of the present invention, but are not intended to limit the present invention. For instance, the control method provided by input-output feedback linearization with leading edge modulation with switch off time sampling is meant as an example control method. The controller can utilize any control method based on many different control theories.

Claims

1. A voltage converter for converting an input voltage to an output voltage across a load resistance comprising:

a voltage converter circuit having an inductor;

an output adjuster, connected to the voltage converter circuit, configured to generate an adjusted output voltage based on the output voltage and a time varying component of an inductor current through the inductor, scaled by a first gain factor;

a controller, connected to the output adjuster and the voltage converter circuit, configured to generate a control signal to the voltage converter circuit;

the control signal having a duty ratio based on the adjusted output voltage, the input voltage, a desired output voltage, a second gain factor, the inductor current and the first gain factor; and,

whereby the voltage converter circuit changes the output voltage to match the desired output voltage.

2. The voltage converter of claim 1 wherein the controller is configured to generate the control signal for leading edge modulation.

3. The voltage converter of claim 1 wherein the controller is configured to generate the control signal based on input-output feedback linearization of a set of state variables with stable zero dynamics, the set of state variables including the adjusted output voltage.

4. The voltage converter of claim 1 wherein the adjusted output voltage is a linear function of the time varying component.

5. The voltage converter of claim 1 wherein the second gain factor includes at least one of the group consisting of a proportional gain, an integral gain and a derivative gain.

6. The voltage converter of claim 1 wherein the voltage converter circuit comprises a boost converter circuit.

7. The voltage converter of claim 1 wherein the voltage converter circuit comprises a buck converter circuit.

8. The voltage converter of claim 1 wherein the voltage converter circuit comprises a buck- boost converter circuit.

9. The voltage converter of claim 1 wherein the adjusted output voltage is generated according to

where y' is the adjusted output voltage, y is the output voltage, Q is the first gain factor, xi is the inductor current and R is the load resistance.

10. The voltage converter of claim 9 wherein the voltage converter circuit comprises:

a boost converter circuit where the inductor is connected to a first polarity of the input voltage in series with a series resistance;

the boost converter circuit further comprising:

a first switch connected in series with the inductor and a second polarity of the input voltage and controlled by the control signal;

a second switch connected between the inductor and a capacitor;

the capacitor connected by a capacitive resistance to the second polarity of the input voltage;

the load resistance connected in parallel to the capacitor and the capacitive resistance; and,

the duty ratio of the control signal is given by the formula:

j

where R is the load resistance, R_c is the capacitive resistance, Q is the first gain factor, k is the second gain factor, C is the capacitance of the capacitor, L is the inductance of the inductor, R_s is the series resistance, i¾ is the input voltage, y' is the adjusted output voltage, xi is the inductor current,

and y₀ is the desired output voltage.

11. The voltage converter of claim 10 wherein the duty ratio of the control signal is given by the formula:

d =

12. The voltage converter of claim 10 wherein the duty ratio of the control signal is given by the formula:

-Py' - Sx - Uu₀ - k{y' - yj)

d =

V

where

R

U = (R_c + Q) , and

L(R + R_C)

R R (Rc + Q)Q (R + Rc) , (R - Q)\ , R _R_C + Q) {R + R_c) ,

V =

(R + R_c L(R - Q) L(R - Q)

The voltage converter of claim 9 wherein the voltage converter circuit comprises:

a buck converter circuit further comprising:

a first switch connected in series with a first polarity of the input voltage and controlled by the control signal;

the inductor having a series resistance connected in series with the first switch and a second polarity of the input voltage;

a second switch connected between the first switch and a capacitor; the capacitor connected by a capacitive resistance to the second polarity of the input voltage;

the duty ratio of the control signal is given by the formula:

RQlc + Q)C + L)y' - (L - R_S(R_C + Q) C)R_Xl + (R + R_c)LCk(yj - y')}

R{R_c + Q)Cu₀

where R is the load resistance, R_c is the capacitive resistance, Q is the first gain factor, k is the second gain factor, C is the capacitance of the capacitor, L is the inductance of the inductor, R_s is the series resistance, UQ is the input voltage, y' is the adjusted output voltage, x is the inductor current, and y_Q' is equal to the desired output voltage.

14. The voltage converter of claim 13 wherein the duty ratio of the control signal is given by the formula:

((/t -² <?) ⁺ ®^c + *·) / - (£ - ¾(i?_c + + (R + R_c)LCk (y₀' - /) d^~ R(R_e + Q)Cu₀ ^'

15. The voltage converter of claim 13 wherein the duty ratio of the control signal is given by the formula:

-Py' - Sx₁ - Uu_Q - k{y' - y^

d = where

R

5 = (-R_S(R + R_c) - RR_C) + + R² ,— Cfi_c + Q)²

—

L{R - Q

U - 0 , and R(R_C + Q)u₀

v =

16. The voltage converter of claim 1 wherein:

the voltage converter circuit further comprises a capacitor having a capacitive resistance and connected in parallel to the load resistance; and,

the adjusted output voltage is generated according to

where y' is the adjusted output voltage, y is the output voltage, Q is the first gain factor, i is the inductor current, R is the load resistance and R_c is the capacitive resistance.

17. The voltage converter of claim 1 wherein the adjusted output voltage is generated according to

where y' is the adjusted output voltage, y is the output voltage, Q is the first gain factor, i is the inductor current and R is the load resistance.

The voltage converter of claim 17 wherein the voltage converter circuit comprises:

a buck-boost converter circuit further comprising:

the duty ratio of the control signal is given by the formula:

where R is the load resistance, Rc is the capacitive resistance, Q is the first gain factor, k is the second gain factor, C is the capacitance of the capacitor, L is the inductance of the inductor, R_s is the series resistance, uo is the input voltage, y' is the adjusted output voltage, x is the inductor current,

and y₀ is the desired output voltage.

19. The voltage converter of claim 18 wherein the duty ratio of the control signal is given by the formula:

d =

(fi_c + Q)C + L y' + - R_S(R_C + Q)C)R_Xl + (R + R_c)LCk(yi - /)

^R b¾) ^{RC + Q)CYL + L}(S+ R ^{XI ~ {R + FIC)CU}°]

20. The voltage converter of claim 18 wherein the duty ratio of the control signal is given by the formula:

~Py' - S_Xl - Uu₀ - k(y' - y₀)

d =

V

where

0 , and

21. A method of converting an input voltage into an output voltage across a load resistance comprising:

providing a voltage converter circuit having the input voltage as a voltage source and producing the output voltage;

providing an inductor current flowing through an inductor in the voltage converter circuit, the inductor current having a time varying component;

providing an output adjuster connected to the voltage converter circuit;

generating an adjusted output voltage which depends on the output voltage and the time varying component of the inductor current scaled by a first gain factor;

providing a controller connected to the output adjuster and to the voltage converter circuit; generating a control signal with a duty ratio that controls the voltage converter circuit; dynamically determining the duty ratio from the adjusted output voltage, the input voltage, a desired output voltage, a second gain factor, the mductor current and the first gain factor; and,

whereby the voltage converter circuit produces the output voltage to match the desired output voltage.

22. The method of claim 22 further comprising:

generating the control signal based on a leading edge modulation of the voltage converter circuit.

23. The method of claim 22 further comprising:

generating the control signal based on an input-output feedback linearization of a set of state variables with stable zero dynamics, where the set of state vai'iables includes the adjusted output voltage.

24. The method of claim 22 further comprising:

detemining the adjusted output voltage to be a linear function of the time varying component.

25. The method of claim 22 further comprising:

generating the adjusted output voltage according to

where y' is the adjusted output voltage, y is the output voltage, Q is the first gain factor, x\ is the inductor current and R is the load resistance.

26. The method of claim 22 further comprising:

generating the adjusted output voltage according to

where y' is the adjusted output voltage, y is the output voltage, Q is the first gain factor, X] is the inductor current and R is the load resistance.

27. The method of claim 22 further comprising:

generating the adjusted output voltage according to

where y' is the adjusted output voltage, y is the output voltage, Q is the first gain factor, i is the inductor current, R is the load resistance and R_c is a capacitive resistance of a capacitor in parallel with the load resistance.

28. The method of claim 22 further comprising:

generating the adjusted output voltage according to

where y¹ is the adjusted output voltage, y is the output voltage, Q is the first gain factor, x_f is the inductor current, R is the load resistance and R_c is a capacitive resistance of a capacitor in parallel with the load resistance.

29. The method of claim 22 further comprising:

dynamically determining the second gain factor from at least one of the group consisting of a proportional gain, an integral gain and a derivative gain.

30. The method of claim 22 further providing a boost converter circuit for the voltage converter circuit.

31. The method of claim 22 further providing a buck-boost converter circuit for the voltage converter circuit.

32. The method of claim 22 further providing a buck converter circuit for the voltage converter circuit.

33. The method of claim 22 further comprising controlling the voltage converter circuit to produce the adjusted output voltage to match an adjusted desired output voltage.

34. The method of claim 22 further comprising:

measuring a set of circuit parameters for the voltage converter circuit;

determining the first gain based on the set of circuit parameters;

deternrining the second gain;

repeatedly applying the control signal with the duty ratio to the voltage converter circuit; repeatedly measuring the set of circuit parameters;

repeatedly adjusting the duty ratio based on the set of circuit parameters; and, stopping the method if a directive to stop the controller is received.

The method of claim 35 further comprising adjusting the first gain.