WO2015124107A1 - Ldpc码字的交织映射方法及解交织解映射方法 - Google Patents
Ldpc码字的交织映射方法及解交织解映射方法 Download PDFInfo
- Publication number
- WO2015124107A1 WO2015124107A1 PCT/CN2015/073162 CN2015073162W WO2015124107A1 WO 2015124107 A1 WO2015124107 A1 WO 2015124107A1 CN 2015073162 W CN2015073162 W CN 2015073162W WO 2015124107 A1 WO2015124107 A1 WO 2015124107A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- bit
- ldpc codeword
- interleaving
- value data
- soft value
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2792—Interleaver wherein interleaving is performed jointly with another technique such as puncturing, multiplexing or routing
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/033—Theoretical methods to calculate these checking codes
- H03M13/036—Heuristic code construction methods, i.e. code construction or code search based on using trial-and-error
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
- H03M13/1165—QC-LDPC codes as defined for the digital video broadcasting [DVB] specifications, e.g. DVB-Satellite [DVB-S2]
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
- H03M13/255—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with Low Density Parity Check [LDPC] codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
- H03M13/271—Row-column interleaver with permutations, e.g. block interleaving with inter-row, inter-column, intra-row or intra-column permutations
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2778—Interleaver using block-wise interleaving, e.g. the interleaving matrix is sub-divided into sub-matrices and the permutation is performed in blocks of sub-matrices
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6522—Intended application, e.g. transmission or communication standard
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0041—Arrangements at the transmitter end
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0057—Block codes
- H04L1/0058—Block-coded modulation
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0071—Use of interleaving
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
- H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
- H03M13/152—Bose-Chaudhuri-Hocquenghem [BCH] codes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0057—Block codes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
- H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
- H04L27/3405—Modifications of the signal space to increase the efficiency of transmission, e.g. reduction of the bit error rate, bandwidth, or average power
Definitions
- the present invention relates to the field of digital television technologies, and in particular, to an interleaving mapping method and a de-interleaving demapping method for an LDPC codeword.
- LDPC coding, bit interleaving, and constellation mapping are the most common coding modulation methods.
- LDPC coding, bit interleaving and constellation mapping need to be designed separately and jointly debugged to achieve the best channel performance. Therefore, how to form a targeted bit interleaving by theoretical analysis and optimization of a better constellation mapping method for different LDPC codewords to reduce the receiving threshold of the receiving end is a technical problem in the field.
- the problem solved by the present invention is to reduce the reception threshold of the receiving end.
- an embodiment of the present invention provides an interleaving mapping method for an LDPC codeword, which includes the following steps: performing a first bit interleaving on a check portion in the LDPC codeword to obtain a parity bit stream;
- the embodiment of the present invention further provides a de-interleaving and demapping method for an LDPC codeword, which includes the following steps: performing soft demapping processing on a symbol stream soft value data according to a corresponding constellation diagram to obtain bit soft value data; wherein the symbol The stream soft value data is a symbol stream obtained by the receiving end receiving the interleaving mapping method of the LDPC codeword as described above;
- bit soft value data after the first bit deinterleaving into consecutive plurality of bit soft value data sub-blocks according to a predetermined length, and transforming the order of the bit soft value data sub-blocks according to a corresponding bit exchange pattern to Forming bit soft value data after the second bit deinterleaving;
- bit soft value data corresponding to the check portion in the LDPC codeword in the bit soft value data after the second bit deinterleaving to obtain the bit softness after the third bit deinterleaving Value data
- bit soft value data stream is subjected to LDPC decoding processing to obtain decoded bit stream data.
- code rates and corresponding LDPC code tables theoretically analyze and optimize the design of better interleaving mapping and de-interleaving demapping methods to reduce the receiving threshold of the receiving end, so that the system performance is better improved.
- the embodiment of the present invention further provides a corresponding irregular 16QAM constellation and bit interleaving pattern for an LDPC code table with a code rate of 4/15 and a code length of 64800, for a code rate of 7/15 and a code length.
- Corresponding non-regular 16QAM constellation and bit interleaving pattern are provided for the LDPC code table of 64800.
- the corresponding QPSK constellation and bit interleaving pattern are provided for the LDPC code table with the code rate of 4/15 and the code length of 16200.
- the LDPC code table with a ratio of 8/15 and a code length of 16200 provides a corresponding QPSK constellation and bit interleaving pattern, and provides a corresponding QPSK constellation for an LDPC code table with a code rate of 11/15 and a code length of 16,200.
- the bit interleaving pattern provides a corresponding QPSK constellation and bit interleaving pattern for an LDPC code table with a code rate of 12/15 and a code length of 16,200, and provides an LDPC code table with a code rate of 8/15 and a code length of 16,200.
- the corresponding irregular 16QAM constellation and bit interleaving pattern can effectively reduce the receiving threshold of the receiving end in practice, thereby improving system performance.
- FIG. 1 is a schematic flow chart of a specific implementation manner of an interleaving mapping method for an LDPC codeword according to the present invention
- FIG. 2 is a schematic flow chart of a specific implementation manner of a method for deinterleaving demapping of an LDPC codeword according to the present invention
- FIG. 3 is a schematic diagram of performing a first bit interleaving on a check portion in an LDPC codeword to obtain a parity bit stream in an interleaving mapping method of an LDPC codeword according to the present invention
- FIG. 4 is a schematic diagram showing an arrangement order of transforming the bit sub-blocks according to a bit exchange pattern in an interleaving mapping method of an LDPC codeword according to the present invention.
- the inventors have provided an interleaving mapping method and de-interleaving demapping method for LDPC codewords.
- the mapping and de-interleaving demapping methods reduce the receiving threshold of the receiving end, so that the system performance is better improved.
- the transmitter end is: first, the source coded, BCH-encoded bit stream is input to the LDPC encoder to encode the LDPC codeword of a specific code rate code length, and then input into the bit interleaver, according to a certain A specific bit interleaving pattern method performs interleaving processing, and then performs bit constellation processing on the bit interleaved data, and then modulates, transmits, and experiences the channel.
- the receiver end is: demodulate the data after passing through the channel, and then input the demodulated data into the demapping module for demapping.
- bit soft value information output by the demapping module is input to the deinterleave module for deinterleaving, and then output to the LDPC decoder, which performs decoding based on the specific LDPC codeword, and finally decodes the output bit stream.
- FIG. 1 is a schematic flowchart diagram of a specific implementation manner of an interleaving mapping method for an LDPC codeword according to the present invention.
- an interleaving mapping method of an LDPC codeword includes the following steps:
- Step S11 Perform a first bit interleaving on the check portion in the LDPC codeword to obtain a check bit stream.
- Step S12 splicing the information bit portion in the LDPC codeword and the parity bit stream into an LDPC codeword after the first bit interleaving;
- Step S13 dividing the first bit-interleaved LDPC codeword into consecutive multiple bit sub-blocks according to a predetermined length, and transforming the order of the bit sub-blocks according to a corresponding bit-switching pattern to form a second bit.
- Interleaved LDPC codewords
- Step S14 dividing the LDPC codeword after the second bit interleaving into two parts, writing the first part into the storage space in column order and reading out from the storage space in a row order, and then ordering the second part in column order Writing to the storage space and reading out from the storage space in a row order, splicing the results of the two readouts to obtain the LDPC codeword after the third bit interleaving;
- Step S15 performing constellation mapping on the third bit-interleaved LDPC codeword according to the corresponding constellation diagram to obtain a symbol stream; wherein the LDPC code table for different code rates and code lengths is theoretically analyzed and optimized.
- the bit swapping pattern and the constellation diagram are subjected to interleaving mapping processing.
- the LDPC codeword after the first bit interleaving is divided into consecutive plurality of bit sub-blocks by a predetermined length, wherein the predetermined length is 360. Further, the order of arrangement of the bit sub-blocks is transformed according to a corresponding bit exchange pattern to form an LDPC codeword after the second bit interleaving.
- the specific process is shown in FIG. 4.
- (m 0 , m 1 , . . . , m N/360-1 ) is a bit swap pattern of 360-length bit sub-blocks.
- bit exchange pattern and a constellation diagram designed and optimized are provided.
- the code length is 64800 and the code rate is 4/15.
- the corresponding bit swap pattern is:
- each value in the bit exchange pattern refers to a position of the bit sub-block before the bit exchange.
- the meaning of the first value 165 in the bit swapping pattern is that the 166th bit subblock before the bit swapping is changed to the first bit subblock after the bit swapping.
- the corresponding constellation diagram is an irregular 16-QAM:
- the corresponding bit swap pattern is:
- the corresponding constellation diagram is an irregular 16-QAM:
- the corresponding bit swap pattern is:
- the code length is 16200 and the code rate is 8/15.
- the corresponding bit swap pattern is:
- the code length is 16200 and the code rate is 11/15.
- the corresponding bit swap pattern is QPSK:
- the code length is 16200 and the code rate is 12/15.
- the corresponding bit swap pattern is:
- the code length is 16200 and the code rate is 8/15.
- the corresponding bit swap pattern is:
- the corresponding constellation diagram is an irregular 16-QAM:
- the first portion and the second portion are divided, wherein the length of the first portion is 15840 bits.
- the second portion has a length of 360 bits, and both portions are written to the storage space in column order and read out from the storage space in the row order.
- the first part has 7920 bits per column, a total of 2 columns, and the second part has 180 bits per column, for a total of 2 columns.
- irregular 16-QAM is used, the first part has 3960 bits per column, a total of 4 columns, and the second part has 90 bits per column, for a total of 4 columns.
- each column has 16200 bits and a total of 4 columns.
- bit stream data (b 0 , b 1 , . . . , b N-1 ) after the bit interleaving is mapped to one of the decimal numbers corresponding to each of the two binary bit sequences in the case of QPSK according to the constellation diagram.
- Constellation point in the case of irregular 16-QAM, the decimal number corresponding to every 4 binary bit sequences is mapped to a certain constellation point, thereby obtaining a symbol stream (each complex symbol corresponds to one constellation point).
- the input 4 bits '0110' correspond to a decimal number of 6, which corresponds to -0.5072+1.1980i in the constellation diagram.
- the constellation point, the constellation point on the real axis and the imaginary axis is displayed as a real axis -0.5072 and an imaginary axis of 1.1980.
- the LDPC codeword is obtained by encoding a bitstream after the source is encoded by a specific LDPC, where the specific LDPC encoding can be implemented by using a prior art.
- the steps to encode are:
- S (s 0 , s 1 , ..., s K-1 )
- N K + M 1 + M 2 .
- ⁇ can also be expressed as,
- the steps to encode are:
- x is the parity address associated with ⁇ 0 , as shown in Table 5, where x is the number 460 792 1007 4580 11452 13130 26882 27020 32439 in the first row of the code table.
- the check bits are accumulated according to the second row of digital addresses in the code table. Similarly, for the next L-1 information bits, the check bits are continuously accumulated according to the formula in step 3). At this time, the x of the three formulas is the number of the second line in the code table.
- the check bits are accumulated according to the addresses of the 3rd, 4th, 5th, ..., (i+1)L.... lines in the code table respectively.
- the L-1 information bits after the information bits are respectively accumulated according to the formula in step 3), and it is noted that the x of the formula of the third step corresponds to the current i-th information bit.
- the row in the code table for example, L-1 bits after the i-th information bit, when the formula in step 3) is applied, the corresponding address of x is the (i+1)th row in the code table.
- step 5 After completing step 5), do the following:
- FIG. 2 is a schematic flowchart diagram of a specific implementation manner of a deinterleaving and demapping method for an LDPC codeword according to the present invention.
- the de-interleaving demapping method of the LDPC codeword includes the following steps:
- Step S21 performing soft demapping processing on the symbol stream soft value data according to the corresponding constellation diagram to obtain bit soft value data; wherein the symbol stream soft value data is a symbol obtained by the receiving end receiving the LDPC codeword interleaving mapping method.
- Step S22 dividing the bit soft value data into a first part and a second part, and writing the two parts into the storage space in a row order and reading out from the storage space in column order to obtain the first bit deinterleaving.
- Post bit soft value data
- Step S23 dividing the first bit deinterleaved bit soft value data into consecutive multiple bit soft value data sub-blocks according to a predetermined length, and transforming the bit soft value data sub-block according to a corresponding bit exchange pattern. Arranging the order to form bit soft value data after the second bit deinterleaving;
- Step S24 dividing the check portion corresponding to the LDPC codeword in the bit soft value data after the second bit deinterleaving into the first check portion bit soft value data and the second check portion bit soft value data;
- Step S25 performing third-order bit deinterleaving on the first check partial bit soft value data and the second check partial bit soft value data respectively to obtain a first check portion after the third bit deinterleaving Bit soft value data and second check portion bit soft value data;
- Step S26 The bit-soft value data corresponding to the information bit portion in the LDPC code word and the first check portion bit soft value data after deinterleaving the information bit portion in the LDPC code word
- the second check portion bit soft value data is spliced into a bit soft value data stream
- Step S27 Perform LDPC decoding processing on the bit soft value data stream to obtain decoded bit stream data.
- the size of the first portion, the second portion, and the corresponding storage space in the step S22 are respectively different from the sizes of the first portion, the second portion, and the corresponding storage space in step S14 in FIG. correspond.
- the predetermined length and the bit swap pattern in the step S23 correspond to the predetermined length and the bit swap pattern in the step S 13 in FIG. 1,
- the first check portion bit soft value data and the second check portion bit soft value data in the step S24 correspond to the first partial check bit and the second partial check bit in step S11 in FIG. 1, respectively.
- the step S25 specifically includes: respectively writing the first check portion bit soft value data and the second check portion bit soft value data into a storage space in a row order and reading out from the storage space in a column order. Obtaining a first parity partial bit soft value data and a second parity partial bit soft value data after the third bit deinterleaving, wherein the size of the storage space corresponds to the size of the storage space in step S11 in FIG. .
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Theoretical Computer Science (AREA)
- Mathematical Physics (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Multimedia (AREA)
- Error Detection And Correction (AREA)
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
- Detection And Correction Of Errors (AREA)
Abstract
Description
| 星座点 | 复数符号 |
| 0 | 1+i |
| 1 | 1-i |
| 2 | -1+i |
| 3 | -1-i |
| 星座点 | 复数符号 |
| 0 | 1+i |
| 1 | 1-i |
| 2 | -1+i |
| 3 | -1-i |
| 星座点 | 复数符号 |
| 0 | 1+i |
| 1 | 1-i |
| 2 | -1+i |
| 3 | -1-i |
| 星座点 | 复数符号 |
| 0 | 1+i |
| 1 | 1-i |
| 2 | -1+i |
| 3 | -1-i |
| 星座点 | 复数符号 |
| 0 | 0.2535+0.4923i |
| 1 | 0.4923+0.2535i |
| 2 | 0.4927+1.2044i |
| 3 | 1.2044+0.4927i |
| 4 | -0.2535+0.4923i |
| 5 | -0.4923+0.2535i |
| 6 | -0.4927+1.2044i |
| 7 | -1.2044+0.4927i |
| 8 | 0.2535-0.4923i |
| 9 | 0.4923-0.2535i |
| 10 | 0.4927-1.2044i |
| 11 | 1.2044-0.4927i |
| 12 | -0.2535-0.4923i |
| 13 | -0.4923-0.2535i |
| 14 | -0.4927-1.2044i |
| 15 | -1.2044-0.4927i |
Claims (20)
- 一种LDPC码字的交织映射方法,其特征在于,包括如下步骤:将所述LDPC码字中的校验部分进行第一次比特交织以得到校验比特流;将所述LDPC码字中的信息比特部分与所述校验比特流拼接成第一次比特交织后的LDPC码字;将所述第一次比特交织后的LDPC码字按预定长度分成连续的多个比特子块,并按照相应的比特交换图案变换所述比特子块的排列顺序以形成第二次比特交织后的LDPC码字;将所述第二次比特交织后的LDPC码字分成两部分,将第一部分按列顺序写入存储空间并按行顺序从该存储空间内读出,再将第二部分按列顺序写入存储空间并按行顺序从该存储空间读出,将两次读出的结果拼接,以得到第三次比特交织后的LDPC码字;对所述第三次比特交织后的LDPC码字依照相应的星座图进行星座映射以得到符号流;其中,针对不同码率的LDPC码表采用通过理论分析与优化设计出的比特交换图案和星座图进行交织映射处理。
- 如权利要求1所述的LDPC码字的交织映射方法,其特征在于,所述预定长度为360比特。
- 如权利要求2所述的LDPC码字的交织映射方法,其特征在于,所述LDPC码表中LDPC码字的码长为64800比特、码率为4/15;码表为:相应的比特交换图案为:165 8 136 2 58 30 127 64 38 164 123 45 78 17 47 105 159 134 124 147 148 109 67 98 157 57 156 170 46 12 172 29 9 3 144 97 83 151 26 52 10 39 50 104 92 163 72 125 36 14 55 48 1 149 33 110 6 130 140 89 77 22 171 139 112 113 152 16 7 85 11 28 153 73 62 44 135 116 4 61 117 53 111 178 94 81 68 114 173 75 101 88 65 99 126 141 43 15 18 90 35 24 142 25 120 19 154 0 174 93 167 150 107 86 129 175 87 21 66 106 82 179 118 41 95 145 37 23 168 166 49 103 108 56 91 69 128 121 96 133 100 161 143 119 102 59 20 40 70 79 80 51 13 177 131 132 176 155 31 63 5 162 76 42 160 115 71 158 54 137 146 32 169 122 138 84 74 60 34 27相应的星座图为一种非规则的16-QAM:
星座点 复数符号 0 0.3412+0.5241i 1 0.5241+0.3412i 2 0.5797+1.1282i 3 1.1282+0.5797i 4 -0.3412+0.5241i 5 -0.5241+0.3412i 6 -0.5797+1.1282i 7 -1.1282+0.5797i 8 0.3412-0.5241i 9 0.5241-0.3412i 10 0.5797-1.1282i 11 1.1282-0.5797i 12 -0.3412-0.5241i 13 -0.5241-0.3412i 14 -0.5797-1.1282i 15 -1.1282-0.5797i - 如权利要求2所述的LDPC码字的交织映射方法,其特征在于,所述LDPC码表中LDPC码字的码长为64800比特、码率为7/15;码表为:相应的比特交换图案为:174 148 56 168 38 7 110 9 42 153 160 15 46 21 121 88 114 85 13 83 74 81 70 27 119 118 144 31 80 109 73 141 93 45 16 77 108 57 36 78 124 79 169 143 6 58 75 67 5 104 125 140 172 8 39 17 29 159 86 87 41 99 89 47 128 43 161 154 101 163 116 94 120 71 158 145 37 112 68 95 1 113 64 72 90 92 35 167 44 149 66 28 82 178 176 152 23 115 130 98 123 102 24 129 150 34 136 171 54 107 2 3 60 69 10 117 91 157 33 105 155 62 162 40 127 14 165 26 52 19 48 137 4 22 122 173 18 11 111 106 76 53 61 147 97 175 32 59 166 179 135 177 103 100 139 50 146 134 133 96 49 126 151 84 156 30 138 164 132 12 0 20 63 170 142 65 55 25 51 131相应的星座图为一种非规则的16-QAM:
星座点 复数符号 0 0.2592+0.4888i 1 0.4888+0.2592i 2 0.5072+1.1980i 3 1.1980+0.5072i 4 -0.2592+0.4888i 5 -0.4888+0.2592i 6 -0.5072+1.1980i 7 -1.1980+0.5072i 8 0.2592-0.4888i 9 0.4888-0.2592i 10 0.5072-1.1980i 11 1.1980-0.5072i 12 -0.2592-0.4888i 13 -0.4888-0.2592i 14 -0.5072-1.1980i 15 -1.1980-0.5072i - 如权利要求2所述的LDPC码字的交织映射方法,其特征在于,所述LDPC码表中LDPC码字的码长为16200比特、码率为8/15;码表为:相应的比特交换图案为:36 5 22 26 1 13 3 33 9 6 23 20 35 10 17 41 30 15 21 42 29 11 37 4 2 38 44 0 18 19 8 31 28 43 14 34 32 25 40 12 16 24 39 27 7相应的星座图为一种非规则16-QAM:
星座点 复数符号 0 0.2535+0.4923i 1 0.4923+0.2535i 2 0.4927+1.2044i 3 1.2044+0.4927i 4 -0.2535+0.4923i 5 -0.4923+0.2535i 6 -0.4927+1.2044i 7 -1.2044+0.4927i 8 0.2535-0.4923i 9 0.4923-0.2535i 10 0.4927-1.2044i 11 1.2044-0.4927i 12 -0.2535-0.4923i 13 -0.4923-0.2535i 14 -0.4927-1.2044i 15 -1.2044-0.4927i - 如权利要求1所述的LDPC码字的交织映射方法,其特征在于,当码长为16200时,所述第二次比特交织后的第一部分为15840比特、第二部分为360比特。
- 如权利要求1所述的LDPC码字的交织映射方法,其特征在于,当码长为64800时,所述第二次比特交织后的第一部分为64800比特、第二部分为0比特。
- 如权利要求1所述的LDPC码字的交织映射方法,其特征在于,当星座映射方式为QPSK时,所述按列顺序的数目为2列。
- 如权利要求1所述的LDPC码字的交织映射方法,其特征在于,当星座映射方式为非规则16-QAM时,所述按列顺序的数目为4列。
- 一种LDPC码字的解交织解映射方法,其特征在于,包括如下步骤:对符号流软值数据依照相应的星座图进行软解映射处理以得到比特软值数据;其中所述符号流软值数据是接收端接收到如权利要求1所述的LDPC码字的交织映射方法得到的符号流;将所述比特软值数据分成第一部分和第二部分,并将这两部分都按行顺序写入存储空间并按列顺序从该存储空间内读出以得到第一次比特解交织后的比特软值数据;将所述第一次比特解交织后的比特软值数据按预定长度分成连续的多个比特软值数据子块,并按照相应的比特交换图案变换所述比特软值数据子块的排列顺序以形成第二次比特解交织后的比特软值数据;将所述第二次比特解交织后的比特软值数据中对应于LDPC码字中的校验部分的比特软值数据进行第三次比特解交织以得到第三次比特解交织后的比特软值数据;将所述第二次比特解交织后的比特软值数据中与所述第三次比特解交织后的比特软值数据拼接成比特软值数据流;对所述比特软值数据流进行LDPC译码处理以得到解码后的比特流数据。
- 如权利要求15所述的LDPC码字的解交织解映射方法,其特征在于,当码长为16200时,所述第一部分的比特软值的长度为15840,第二部分的长度为360。
- 如权利要求15所述的LDPC码字的解交织解映射方法,其特征在于,当码长为64800时,所述第一部分的比特软值的长度为64800,第二部分的长度为为0。
- 如权利要求15所述的LDPC码字的解交织解映射方法,其特征在于,当星座映射方式为QPSK时,所述按列顺序的数目为2列.
- 如权利要求15所述的LDPC码字的解交织解映射方法,其特征在于,当星座映射方式为非规则16-QAM时,所述按列顺序的数目为4列。
- 如权利要求15所述的LDPC码字的解交织解映射方法,其特征在于,所述将所述第二次比特解交织后的比特软值数据中对应于LDPC码字中的校验部分的比特软值数据进行第三次比特解交织以得到第三次比特解交织后的比特软值数据包括:
Priority Applications (15)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| EP15752210.3A EP3110054A4 (en) | 2014-02-20 | 2015-02-16 | Interleaving and mapping method and deinterleaving and demapping method for ldpc codeword |
| KR1020167025880A KR101792806B1 (ko) | 2014-02-20 | 2015-02-16 | Ldpc 코드워드 인터리빙 매핑 방법 및 디인터리빙 디매핑 방법 |
| KR1020177030997A KR101908352B1 (ko) | 2014-02-20 | 2015-02-16 | Ldpc 코드워드 인터리빙 매핑 방법 및 디인터리빙 디매핑 방법 |
| EP21212927.4A EP3985879A1 (en) | 2014-02-20 | 2015-02-16 | Multi-stage interleaving for ldpc codes |
| KR1020177031044A KR101884272B1 (ko) | 2014-02-20 | 2015-02-16 | Ldpc 코드워드 인터리빙 매핑 방법 및 디인터리빙 디매핑 방법 |
| KR1020177030995A KR101908349B1 (ko) | 2014-02-20 | 2015-02-16 | Ldpc 코드워드 인터리빙 매핑 방법 및 디인터리빙 디매핑 방법 |
| KR1020177030999A KR101884273B1 (ko) | 2014-02-20 | 2015-02-16 | Ldpc 코드워드 인터리빙 매핑 방법 및 디인터리빙 디매핑 방법 |
| KR1020187002813A KR101884257B1 (ko) | 2014-02-20 | 2015-02-16 | Ldpc 코드워드 인터리빙 매핑 방법 및 디인터리빙 디매핑 방법 |
| KR1020177031046A KR101908357B1 (ko) | 2014-02-20 | 2015-02-16 | Ldpc 코드워드 인터리빙 매핑 방법 및 디인터리빙 디매핑 방법 |
| CA2940197A CA2940197C (en) | 2014-02-20 | 2015-02-16 | Interleaving and mapping method and deinterleaving and demapping method for ldpc codeword |
| KR1020187002812A KR101884270B1 (ko) | 2014-02-20 | 2015-02-16 | Ldpc 코드워드 인터리빙 매핑 방법 및 디인터리빙 디매핑 방법 |
| US15/242,412 US10097209B2 (en) | 2014-02-20 | 2016-08-19 | Interleaving and mapping method and deinterleaving and demapping method for LDPC codeword |
| US16/122,893 US10833709B2 (en) | 2014-02-20 | 2018-09-06 | Interleaving and mapping method and deinterleaving and demapping method for LDPC codeword |
| US16/122,896 US10374635B2 (en) | 2014-02-20 | 2018-09-06 | Interleaving and mapping method and deinterleaving and demapping method for LDPC codeword |
| US17/033,795 US11296728B2 (en) | 2014-02-20 | 2020-09-27 | Interleaving and mapping method and deinterleaving and demapping method for LDPC codeword |
Applications Claiming Priority (6)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410058280.1A CN104868970B (zh) | 2014-02-20 | 2014-02-20 | Ldpc码字的交织映射方法及解交织解映射方法 |
| CN201410058280.1 | 2014-02-20 | ||
| CN201410219229.4A CN105099615B (zh) | 2014-05-22 | 2014-05-22 | Ldpc码字的交织映射方法及解交织解映射方法 |
| CN201410219229.4 | 2014-05-22 | ||
| CN201410219204.4A CN105099614B (zh) | 2014-05-22 | 2014-05-22 | Ldpc码字的交织映射方法及解交织解映射方法 |
| CN201410219204.4 | 2014-05-22 |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| US15/242,412 Continuation US10097209B2 (en) | 2014-02-20 | 2016-08-19 | Interleaving and mapping method and deinterleaving and demapping method for LDPC codeword |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO2015124107A1 true WO2015124107A1 (zh) | 2015-08-27 |
Family
ID=53877641
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/CN2015/073162 Ceased WO2015124107A1 (zh) | 2014-02-20 | 2015-02-16 | Ldpc码字的交织映射方法及解交织解映射方法 |
Country Status (5)
| Country | Link |
|---|---|
| US (4) | US10097209B2 (zh) |
| EP (2) | EP3985879A1 (zh) |
| KR (8) | KR101908352B1 (zh) |
| CA (4) | CA3158081C (zh) |
| WO (1) | WO2015124107A1 (zh) |
Families Citing this family (26)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP2525497A1 (en) | 2011-05-18 | 2012-11-21 | Panasonic Corporation | Bit-interleaved coding and modulation (BICM) with quasi-cyclic LDPC codes |
| CN109560892B (zh) * | 2013-12-27 | 2021-04-30 | 松下电器(美国)知识产权公司 | 发送方法、接收方法及发送装置、接收装置 |
| WO2015124107A1 (zh) * | 2014-02-20 | 2015-08-27 | 上海数字电视国家工程研究中心有限公司 | Ldpc码字的交织映射方法及解交织解映射方法 |
| JP6885030B2 (ja) * | 2016-11-18 | 2021-06-09 | ソニーグループ株式会社 | 送信装置、及び、送信方法 |
| JP6885029B2 (ja) * | 2016-11-18 | 2021-06-09 | ソニーグループ株式会社 | 送信装置、及び、送信方法 |
| JP6885028B2 (ja) * | 2016-11-18 | 2021-06-09 | ソニーグループ株式会社 | 送信装置、及び、送信方法 |
| JP6891519B2 (ja) * | 2017-02-06 | 2021-06-18 | ソニーグループ株式会社 | 送信装置、送信方法、受信装置、及び、受信方法 |
| JP6891518B2 (ja) * | 2017-02-06 | 2021-06-18 | ソニーグループ株式会社 | 送信装置、送信方法、受信装置、及び、受信方法 |
| JP6880791B2 (ja) * | 2017-02-06 | 2021-06-02 | ソニーグループ株式会社 | 送信装置、送信方法、受信装置、及び、受信方法 |
| JP6852427B2 (ja) * | 2017-02-06 | 2021-03-31 | ソニー株式会社 | 送信装置、送信方法、受信装置、及び、受信方法 |
| JP6852428B2 (ja) * | 2017-02-06 | 2021-03-31 | ソニー株式会社 | 送信装置、送信方法、受信装置、及び、受信方法 |
| JP6880792B2 (ja) * | 2017-02-06 | 2021-06-02 | ソニーグループ株式会社 | 送信装置、送信方法、受信装置、及び、受信方法 |
| JP6895052B2 (ja) * | 2017-02-20 | 2021-06-30 | ソニーグループ株式会社 | 送信装置、送信方法、受信装置、及び、受信方法 |
| JP6897205B2 (ja) * | 2017-02-20 | 2021-06-30 | ソニーグループ株式会社 | 送信装置、送信方法、受信装置、及び、受信方法 |
| JP6895053B2 (ja) * | 2017-02-20 | 2021-06-30 | ソニーグループ株式会社 | 送信装置、送信方法、受信装置、及び、受信方法 |
| JP6903979B2 (ja) * | 2017-02-20 | 2021-07-14 | ソニーグループ株式会社 | 送信装置、送信方法、受信装置、及び、受信方法 |
| JP6897204B2 (ja) * | 2017-02-20 | 2021-06-30 | ソニーグループ株式会社 | 送信装置、送信方法、受信装置、及び、受信方法 |
| JP6895070B2 (ja) * | 2017-08-22 | 2021-06-30 | ソニーグループ株式会社 | 送信装置、送信方法、受信装置、及び、受信方法 |
| CN111371528A (zh) * | 2018-12-26 | 2020-07-03 | 上海交通大学 | Ldpc码字的交织映射方法及解交织解映射方法 |
| DE102019128646B4 (de) * | 2019-10-23 | 2021-06-17 | Deutsches Zentrum für Luft- und Raumfahrt e.V. | Verfahren zur Übertragung von Daten zwischen zwei Benutzerendgeräten und Benutzerendgerät für die Übertragung von Daten |
| KR102478169B1 (ko) | 2020-04-03 | 2022-12-16 | 한국전자통신연구원 | 디인터리빙 방법 및 이를 수행하는 디인터리빙 시스템 |
| KR20220098952A (ko) | 2021-01-05 | 2022-07-12 | 한국전자통신연구원 | 랜섬웨어 공격 데이터 복원 장치 및 방법 |
| CN112821895B (zh) * | 2021-04-16 | 2021-07-09 | 成都戎星科技有限公司 | 一种实现信号高误码率下的编码识别方法 |
| CN113726476B (zh) * | 2021-07-26 | 2024-11-01 | 上海明波通信技术股份有限公司 | 信道交织处理方法和处理模块 |
| CN116015541B (zh) * | 2022-12-06 | 2024-12-03 | 西北工业大学 | 一种用于noma的交织bch编码译码方法 |
| CN120934695B (zh) * | 2025-09-16 | 2026-03-06 | 中南民族大学 | 一种高频谱效率的r16qam结构化比特选择器的选择方法及系统 |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101018105A (zh) * | 2006-10-22 | 2007-08-15 | 北京创毅视讯科技有限公司 | 一种分级调制移动数字多媒体广播信号传输系统和方法 |
| CN101043483A (zh) * | 2006-03-20 | 2007-09-26 | 松下电器产业株式会社 | 一种基于低密度校验码的高阶编码调制方法 |
| CN101047840A (zh) * | 2006-04-18 | 2007-10-03 | 华为技术有限公司 | 一种手持电视系统中的信道交织方法及系统 |
| CN101325474A (zh) * | 2007-06-12 | 2008-12-17 | 中兴通讯股份有限公司 | Ldpc码的混合自动请求重传的信道编码及调制映射方法 |
| CN101399554A (zh) * | 2007-09-30 | 2009-04-01 | 华为技术有限公司 | 一种基于ldpc码的交织方法和解交织方法及其装置 |
| CN101902230A (zh) * | 2009-05-29 | 2010-12-01 | 索尼公司 | 接收装置、接收方法、程序和接收系统 |
Family Cites Families (33)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7774675B1 (en) * | 2005-12-05 | 2010-08-10 | Marvell International Ltd. | LDPC codes and expansion method |
| KR101492634B1 (ko) * | 2007-08-28 | 2015-02-17 | 삼성전자주식회사 | 저밀도 패리티 검사 부호를 사용하는 통신 시스템에서 데이터 송수신 장치 및 방법 |
| PL2056464T3 (pl) * | 2007-10-30 | 2013-04-30 | Sony Corp | Urządzenie i sposób przetwarzania danych |
| KR101426558B1 (ko) * | 2007-11-05 | 2014-08-06 | 삼성전자주식회사 | 저밀도 패리티 검사 부호를 사용하는 통신 시스템에서데이터 송수신 장치 및 방법 |
| TWI427937B (zh) * | 2007-11-26 | 2014-02-21 | Sony Corp | Data processing device and data processing method |
| TWI497920B (zh) * | 2007-11-26 | 2015-08-21 | Sony Corp | Data processing device and data processing method |
| TWI410055B (zh) * | 2007-11-26 | 2013-09-21 | Sony Corp | Data processing device, data processing method and program product for performing data processing method on computer |
| WO2010024914A1 (en) | 2008-08-29 | 2010-03-04 | Thomson Licensing | System and method for reusing dvb-s2 ldpc codes in dvb-c2 |
| JP5584219B2 (ja) | 2008-10-03 | 2014-09-03 | トムソン ライセンシング | 2元消失サロゲート・チャネルを用いたawgnチャネル条件下でビット・インタリーバをldpc符号および変調に適合させる方法および装置 |
| CN102349257B (zh) * | 2009-01-14 | 2015-02-25 | 汤姆森特许公司 | 设计用于多边型低密度奇偶校验编码调制的多路分用器的方法和装置 |
| CN102301705B (zh) * | 2009-01-29 | 2014-02-12 | Lg电子株式会社 | 用于发送和接收信号的装置以及用于发送和接收信号的方法 |
| US8588623B2 (en) * | 2009-10-12 | 2013-11-19 | Nec Laboratories America, Inc. | Coded polarization-multiplexed iterative polar modulation |
| US8589755B2 (en) * | 2010-06-16 | 2013-11-19 | Nec Laboratories America, Inc. | Reduced-complexity LDPC decoding |
| US8381065B2 (en) * | 2010-10-01 | 2013-02-19 | Nec Laboratories America, Inc. | Modified progressive edge-growth LDPC codes for ultra-high-speed serial optical transport |
| JP5630278B2 (ja) * | 2010-12-28 | 2014-11-26 | ソニー株式会社 | データ処理装置、及びデータ処理方法 |
| JP5637393B2 (ja) * | 2011-04-28 | 2014-12-10 | ソニー株式会社 | データ処理装置、及び、データ処理方法 |
| EP2525498A1 (en) * | 2011-05-18 | 2012-11-21 | Panasonic Corporation | Bit-interleaved coding and modulation (BICM) with quasi-cyclic LDPC codes |
| EP2525496A1 (en) * | 2011-05-18 | 2012-11-21 | Panasonic Corporation | Bit-interleaved coding and modulation (BICM) with quasi-cyclic LDPC codes |
| EP2525497A1 (en) * | 2011-05-18 | 2012-11-21 | Panasonic Corporation | Bit-interleaved coding and modulation (BICM) with quasi-cyclic LDPC codes |
| JP5664919B2 (ja) * | 2011-06-15 | 2015-02-04 | ソニー株式会社 | データ処理装置、及び、データ処理方法 |
| EP2552043A1 (en) * | 2011-07-25 | 2013-01-30 | Panasonic Corporation | Spatial multiplexing for bit-interleaved coding and modulation with quasi-cyclic LDPC codes |
| EP2560311A1 (en) * | 2011-08-17 | 2013-02-20 | Panasonic Corporation | Cyclic-block permutations for spatial multiplexing with quasi-cyclic LDPC codes |
| WO2014017102A1 (ja) * | 2012-07-27 | 2014-01-30 | パナソニック株式会社 | 送信方法、受信方法、送信機、及び受信機 |
| US9654316B2 (en) * | 2012-07-27 | 2017-05-16 | Sun Patent Trust | Transmission method, transmitter, reception method, and receiver |
| JPWO2015045896A1 (ja) * | 2013-09-26 | 2017-03-09 | ソニー株式会社 | データ処理装置、及びデータ処理方法 |
| US10425110B2 (en) * | 2014-02-19 | 2019-09-24 | Samsung Electronics Co., Ltd. | Transmitting apparatus and interleaving method thereof |
| JP2015156530A (ja) * | 2014-02-19 | 2015-08-27 | ソニー株式会社 | データ処理装置、及び、データ処理方法 |
| WO2015124107A1 (zh) * | 2014-02-20 | 2015-08-27 | 上海数字电视国家工程研究中心有限公司 | Ldpc码字的交织映射方法及解交织解映射方法 |
| US9602245B2 (en) * | 2014-05-21 | 2017-03-21 | Samsung Electronics Co., Ltd. | Transmitting apparatus and interleaving method thereof |
| US9800269B2 (en) * | 2014-05-21 | 2017-10-24 | Samsung Electronics Co., Ltd. | Transmitting apparatus and interleaving method thereof |
| US9595978B2 (en) * | 2015-05-19 | 2017-03-14 | Samsung Electronics Co., Ltd. | Transmitting apparatus and interleaving method thereof |
| US9564927B2 (en) * | 2015-05-27 | 2017-02-07 | John P Fonseka | Constrained interleaving for 5G wireless and optical transport networks |
| JP6396592B2 (ja) * | 2015-07-17 | 2018-09-26 | エルジー エレクトロニクス インコーポレイティド | 放送信号送受信装置及び方法 |
-
2015
- 2015-02-16 WO PCT/CN2015/073162 patent/WO2015124107A1/zh not_active Ceased
- 2015-02-16 KR KR1020177030997A patent/KR101908352B1/ko active Active
- 2015-02-16 CA CA3158081A patent/CA3158081C/en active Active
- 2015-02-16 KR KR1020187002813A patent/KR101884257B1/ko active Active
- 2015-02-16 CA CA3158086A patent/CA3158086C/en active Active
- 2015-02-16 CA CA3254758A patent/CA3254758A1/en active Pending
- 2015-02-16 KR KR1020177031044A patent/KR101884272B1/ko active Active
- 2015-02-16 KR KR1020167025880A patent/KR101792806B1/ko active Active
- 2015-02-16 KR KR1020177030999A patent/KR101884273B1/ko active Active
- 2015-02-16 KR KR1020177030995A patent/KR101908349B1/ko active Active
- 2015-02-16 EP EP21212927.4A patent/EP3985879A1/en not_active Withdrawn
- 2015-02-16 KR KR1020187002812A patent/KR101884270B1/ko active Active
- 2015-02-16 CA CA2940197A patent/CA2940197C/en active Active
- 2015-02-16 EP EP15752210.3A patent/EP3110054A4/en not_active Ceased
- 2015-02-16 KR KR1020177031046A patent/KR101908357B1/ko active Active
-
2016
- 2016-08-19 US US15/242,412 patent/US10097209B2/en active Active
-
2018
- 2018-09-06 US US16/122,896 patent/US10374635B2/en active Active
- 2018-09-06 US US16/122,893 patent/US10833709B2/en active Active
-
2020
- 2020-09-27 US US17/033,795 patent/US11296728B2/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101043483A (zh) * | 2006-03-20 | 2007-09-26 | 松下电器产业株式会社 | 一种基于低密度校验码的高阶编码调制方法 |
| CN101047840A (zh) * | 2006-04-18 | 2007-10-03 | 华为技术有限公司 | 一种手持电视系统中的信道交织方法及系统 |
| CN101018105A (zh) * | 2006-10-22 | 2007-08-15 | 北京创毅视讯科技有限公司 | 一种分级调制移动数字多媒体广播信号传输系统和方法 |
| CN101325474A (zh) * | 2007-06-12 | 2008-12-17 | 中兴通讯股份有限公司 | Ldpc码的混合自动请求重传的信道编码及调制映射方法 |
| CN101399554A (zh) * | 2007-09-30 | 2009-04-01 | 华为技术有限公司 | 一种基于ldpc码的交织方法和解交织方法及其装置 |
| CN101902230A (zh) * | 2009-05-29 | 2010-12-01 | 索尼公司 | 接收装置、接收方法、程序和接收系统 |
Non-Patent Citations (1)
| Title |
|---|
| See also references of EP3110054A4 * |
Also Published As
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| WO2015124107A1 (zh) | Ldpc码字的交织映射方法及解交织解映射方法 | |
| CN104868971B (zh) | Ldpc码字的交织映射方法及解交织解映射方法 | |
| CN105376008A (zh) | Ldpc码字的交织映射方法及解交织解映射方法 | |
| CN105099615B (zh) | Ldpc码字的交织映射方法及解交织解映射方法 | |
| CN105450333A (zh) | Ldpc码字的交织映射方法及解交织解映射方法 | |
| CN104901774B (zh) | Ldpc码字的交织映射方法及解交织解映射方法 | |
| CN108667556B (zh) | 比特交织编码调制方法 | |
| CN104868970B (zh) | Ldpc码字的交织映射方法及解交织解映射方法 | |
| CN105356965A (zh) | Ldpc码字的交织映射方法及解交织解映射方法 | |
| CN105450342A (zh) | Ldpc码字的交织和映射方法及解交织解映射方法 | |
| CN105450354A (zh) | Ldpc码字的交织和映射方法及解交织解映射方法 | |
| CN105450353A (zh) | Ldpc码字的交织和映射方法及解交织解映射方法 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 15752210 Country of ref document: EP Kind code of ref document: A1 |
|
| ENP | Entry into the national phase |
Ref document number: 2940197 Country of ref document: CA |
|
| NENP | Non-entry into the national phase |
Ref country code: DE |
|
| ENP | Entry into the national phase |
Ref document number: 20167025880 Country of ref document: KR Kind code of ref document: A |
|
| REEP | Request for entry into the european phase |
Ref document number: 2015752210 Country of ref document: EP |
|
| WWE | Wipo information: entry into national phase |
Ref document number: 2015752210 Country of ref document: EP |
































