WO2016078620A1 - 改善功率放大器开关谱的功率控制方法、装置及通信终端 - Google Patents

改善功率放大器开关谱的功率控制方法、装置及通信终端 Download PDF

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WO2016078620A1
WO2016078620A1 PCT/CN2015/095228 CN2015095228W WO2016078620A1 WO 2016078620 A1 WO2016078620 A1 WO 2016078620A1 CN 2015095228 W CN2015095228 W CN 2015095228W WO 2016078620 A1 WO2016078620 A1 WO 2016078620A1
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Prior art keywords
power control
drain
voltage
gate
pmos transistor
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English (en)
French (fr)
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刘希达
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Beijing Xinqi Electronic Technology Co Ltd
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Beijing Xinqi Electronic Technology Co Ltd
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Priority claimed from CN201420700624.XU external-priority patent/CN204465461U/zh
Priority claimed from CN201410669957.5A external-priority patent/CN104617886B/zh
Application filed by Beijing Xinqi Electronic Technology Co Ltd filed Critical Beijing Xinqi Electronic Technology Co Ltd
Priority to US15/528,409 priority Critical patent/US10305430B2/en
Priority to EP15860536.0A priority patent/EP3223109B1/en
Publication of WO2016078620A1 publication Critical patent/WO2016078620A1/zh
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
    • H03F1/0211—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers with control of the supply voltage or current
    • H03F1/0216—Continuous control
    • H03F1/0233—Continuous control by using a signal derived from the output signal, e.g. bootstrapping the voltage supply
    • H03F1/0238—Continuous control by using a signal derived from the output signal, e.g. bootstrapping the voltage supply using supply converters
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current 
    • G05F1/46—Regulating voltage or current  wherein the variable actually regulated by the final control device is DC
    • G05F1/56—Regulating voltage or current  wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current 
    • G05F1/46—Regulating voltage or current  wherein the variable actually regulated by the final control device is DC
    • G05F1/56—Regulating voltage or current  wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices
    • G05F1/575—Regulating voltage or current  wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices characterised by the feedback circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
    • H03F3/19—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
    • H03F3/193—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only with field-effect devices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/18—Indexing scheme relating to amplifiers the bias of the gate of a FET being controlled by a control signal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/451—Indexing scheme relating to amplifiers the amplifier being a radio frequency amplifier

Definitions

  • the present invention relates to a power control method for improving switching spectrum characteristics of a radio frequency power amplifier, and to a power control device for implementing the above power control method and a communication terminal including the power control device, belonging to the field of wireless communication technology .
  • RF power amplifiers are widely used in communication terminals such as mobile phones.
  • the RF signal generated by the modulating oscillating circuit has a small power, and a series of amplifications are required through the RF power amplifier—the buffer stage, the intermediate amplifier stage, and the final stage power amplifier stage, to obtain sufficient RF power. In the future, it can be radiated out to the antenna. In this process, precise power control is critical to ensure proper use of the communication terminal.
  • the above requirements are met by setting a voltage of the base of the bias power amplifier.
  • the voltage signal is a linear combination of a power control signal and a reference voltage.
  • a power control circuit which can dynamically adjust the base voltage of the power amplifier according to the requirements of different output powers to achieve the purpose of optimizing the current.
  • the power control circuit includes an error amplifier, a voltage regulator and a current sensing circuit.
  • the current detecting circuit detects the current flowing through the power amplifier and generates a detection signal. This signal can be voltage or current.
  • the current flowing through the power amplifier can be replicated and scaled down. Copy The subsequent current is further modulated by the input power control signal and fed back to the error amplifier.
  • the error amplifier thus produces an output voltage that is controlled at the base of the power amplifier to achieve dynamic control of the base voltage to optimize current.
  • this scheme also has the following drawbacks: when the power supply voltage of the mobile terminal is too low, the switching spectrum characteristic of the power amplifier is still deteriorated.
  • the primary technical problem to be solved by the present invention is to provide a power control method for improving the switching spectrum characteristics of a radio frequency power amplifier.
  • Another technical problem to be solved by the present invention is to provide a power control apparatus for implementing the above power control method.
  • Another technical problem to be solved by the present invention is to provide a communication terminal including the power control device.
  • a power control method for improving a switching spectrum of a radio frequency power amplifier includes the following steps:
  • the gate voltage of the over-current component and the power supply voltage are detected, and when the difference between the gate voltage and the power supply voltage reaches a set value, charging the gate of the over-current component to prevent saturation Too low.
  • a power control apparatus for improving a switching spectrum of a radio frequency power amplifier for implementing the power control method described above comprising: a linear regulator circuit and a dynamic current source; wherein the linear regulator module further includes an error amplifier 102 and feedback Circuit 104 and pass element 105;
  • the error amplifier 102 is an operational amplifier, the inverting input terminal is connected to the externally supplied power control signal Vramp, the non-inverting input terminal is connected to one end of the feedback circuit 104, and the output terminal 103 is connected to the gate of the overcurrent component 105;
  • the source of the pass element 105 is connected to the power supply terminal Vdd, and the drain 106 is connected to the other end of the feedback circuit; the other end of the feedback circuit 104 is connected to the gate of the pass element 105;
  • the dynamic current source 201 has three ends, the first end 2011 and the error amplifier 102
  • the output terminal 103 is connected, the second terminal 2012 is connected to the non-inverting input terminal of the error amplifier 102, and the third terminal 2013 is connected to the drain or power supply terminal Vdd of the overcurrent element 105.
  • the dynamic current source 201 does not work, when the power control signal Vramp gradually rises more than a set value or the power supply voltage Vdd decreases.
  • the set value that is, when the gate of the overcurrent element 105 falls to a set value, the dynamic current source 201 is turned on for operation.
  • the dynamic current source 201 is composed of a PMOS transistor 202 and an NMOS transistor 203; the gate of the PMOS transistor 202 is connected to the output terminal 103 of the error amplifier 102, and the drain is connected to the error.
  • the non-inverting input terminal of the amplifier 102 is connected to the drain of the pass-through element 105; the gate and the source of the NMOS transistor 203 are connected, further connected to the drain of the over-current element 105, and the drain is connected to The non-inverting input of the error amplifier 102.
  • the dynamic current source 201 is composed of a first PMOS transistor 202, a second PMOS transistor 204, and an NMOS transistor 203; a gate of the first PMOS transistor 202 is connected to an output terminal of the error amplifier 102. 103, a drain is connected to the non-inverting input terminal of the error amplifier 102, a source is connected to the gate and the source of the NMOS transistor 203, and further connected to a drain of the second PMOS transistor 204; the NMOS transistor The drain of 203 is coupled to the non-inverting input of the error amplifier 102; the gate of the PMOS transistor 204 is coupled to the gate of the pass-through component 105, and the source is coupled to the source of the pass-through component 105.
  • one end of the dynamic clamp 301 is connected to the power supply terminal Vdd; the other end is connected to the output end 103 of the error amplifier 102.
  • the dynamic clamp 301 does not work; when the power control signal Vramp exceeds the set value, The voltage at the output 103 of the error amplifier 102 is reduced, and the dynamic clamp 301 has a current passing through to charge the gate of the overcurrent element 105 to prevent excessive voltage drop.
  • the dynamic clamp 301 can be composed of one or more PMOS transistors connected in series, wherein the gate of each PMOS transistor is connected to its own drain, and the drain of the previous PMOS transistor is connected to the next PMOS. Source of the tube;
  • the source of the first PMOS transistor is connected to the power supply terminal Vdd, the drain is connected to the source of the other PMOS transistor, and so on, and the drain of the last PMOS transistor is connected to the error The output 103 of the amplifier 102.
  • the invention adopts a simple and ingenious circuit design, can reduce the rate of change of the output voltage, prevent it from approaching the power supply voltage quickly, maintain the saturation of the over-current component, and significantly improve the switching spectrum of the RF power amplifier. characteristic.
  • the invention is particularly suitable for use at low supply voltages.
  • FIG. 1 is a schematic diagram of a linear regulator circuit for implementing the present invention
  • FIG. 2 is a schematic diagram of a power control apparatus for improving switching spectrum characteristics of a radio frequency power amplifier in an embodiment of the present invention
  • FIG. 3 is a schematic diagram of a power control device employing a first type of dynamic current source in an embodiment of the present invention
  • FIG. 4 is a schematic diagram of a power control device employing a second dynamic current source in an embodiment of the present invention
  • Figure 5 is a schematic diagram of the power control device for adding a dynamic clamp based on Figure 2;
  • FIG. 6 is a schematic diagram of a power control device for adding a dynamic clamp based on FIG. 3;
  • Figure 7 is a schematic diagram of the power control device for adding a dynamic clamp based on Figure 4.
  • a linear regulator circuit 101 for implementing the present invention includes an error amplifier 102, a feedback circuit 104, and an overcurrent element 105.
  • the error amplifier 102 is an operational amplifier, the inverting input terminal is connected to the externally supplied power control signal Vramp, the non-inverting input terminal is connected to one end of the feedback circuit 104, the output terminal 103 is connected to the gate of the overcurrent component 105, and the pass-through component 105 is connected.
  • the source is connected to the power supply terminal Vdd, and the drain 106 is connected to the other end of the feedback circuit, and is also connected to the collector of one or more RF power amplifiers, which is represented by a load in FIG.
  • the linear regulator circuit 101 has two outputs: one output is the drain 106 of the pass-through component 105, where the voltage is Vcc; the other output is the output terminal 103 of the error amplifier. Due to the negative feedback characteristic of the linear regulator circuit 101, the voltage Vcc at the drain 106 of the pass element 105 is responsive to the power control signal Vramp. The output voltage signal Vcc of the linear regulator circuit 101 is linearly responsive to the work The rate control signal Vramp controls the collector of the RF power amplifier, which is represented by the load in Figures 1-4.
  • the pass-through component 105 is usually a PMOS transistor. Similarly, the PMOS transistor can also be replaced by an NMOS transistor, and then a slight adjustment can be made.
  • PMOS transistors as pass-through components typically have two operating states: a linear operating region and a saturated working region.
  • the power control signal is small, the PMOS transistor is in a saturated working area.
  • the entire linear regulator circuit has a large operating bandwidth and has a strong voltage regulation function.
  • the power control signal increases, the PMOS transistor gradually leaves the saturation working region and enters the linear region. At this time, the bandwidth of the system is narrowed and the voltage stabilization function is weakened.
  • the working state of the PMOS can be determined by the relative magnitude of the voltage of each port of the PMOS transistor. Specifically, if
  • the PMOS tube is in the saturation region. Otherwise, it is in the linear region.
  • Vsg is the difference between the source voltage and the gate voltage of the PMOS transistor
  • Vsd is the difference between the source voltage and the drain voltage
  • Vtp is the threshold voltage of the PMOS transistor.
  • the saturation of the pass element 105 is critical to the switching spectrum characteristics of the RF power amplifier.
  • FIG. 2 shows a power control apparatus for improving the switching spectrum of a radio frequency power amplifier provided by the present invention, comprising: a linear regulator circuit 101 and a dynamic current source 201.
  • the dynamic current source 201 has three ends, the first end 2011 is connected to the output terminal 103 of the error amplifier 102, the second end 2012 is connected to the non-inverting input terminal of the error amplifier 102, and the third end 2013 is connected to the overcurrent element 105. Drain 106 or power supply terminal.
  • the function of the dynamic current source 201 is that when the gate voltage of the overcurrent element 105 decreases, a large current flows through the drain 106 of the overcurrent element 105, and at this time, the voltage Vcc becomes large, causing the voltage Vcc.
  • the RF switching spectrum at this time will increase the high frequency noise; when the first end of the dynamic current source 201 detects that the voltage of the output terminal 103 of the error amplifier 102 decreases instantaneously, the dynamic current source at this time 201 is turned on, shunting a large current of the drain 106 of the pass-through element 105, and the current passing through the resistor R1 is reduced, so that the voltage Vcc is lowered, that is, the instantaneous change is relieved, thereby improving the current or voltage change. Rate, reduce high frequency noise. That is to say, the purpose of lowering the rate of change of the voltage Vcc when it is close to the power supply voltage Vdd is achieved.
  • the first embodiment is composed of a PMOS transistor 202 and an NMOS transistor 203.
  • the gate of PMOS transistor 202 is coupled to the output 103 of error amplifier 102, the drain is coupled to the non-inverting input of error amplifier 102, and the source is coupled to the drain of pass-through component 105.
  • the NMOS transistor 203 has its gate connected to its source, further connected to the drain of the pass-through component 105, and its drain connected to the non-inverting input of the error amplifier 102.
  • the gate voltage of the overcurrent element 105 is higher, and at this time, a smaller current flows through the drain, that is, the output voltage Vcc is lower, and the PMOS transistor 202 and the NMOS transistor are not turned on due to the gate of the PMOS transistor.
  • the voltage is higher, and a smaller current passes; the NMOS tube has a smaller current through the lower voltage, that is, the dynamic current source 201 has a smaller current, but does not affect the normal operation of other circuits. That is to say, when Vramp is small, the dynamic current source is not turned on. This circuit does not affect the normal operation of other circuits.
  • Vramp exceeds a certain threshold, the dynamic current source is turned on, and current begins to flow; when the power control signal is gradually increased, the gate voltage of the overcurrent element 105 gradually decreases, and the current through the drain also gradually increases. That is, the output voltage Vcc gradually rises; when the over-current component 105 is about to leave the saturation region, its switching spectrum will deteriorate; at this time, the gate voltage of the PMOS transistor 202 is lower, reaches the design value, starts to work, and the output voltage Vcc is also compared.
  • the dynamic current source 201 can reduce the rate of change of the output voltage Vcc, prevent it from approaching the power supply voltage Vdd faster, maintain the saturation of the over-current component 105, and alleviate the deterioration of the switching spectrum of the radio frequency power amplifier to some extent.
  • a second embodiment of the dynamic current source is comprised of a PMOS transistor 202, a PMOS transistor 204, and an NMOS transistor 203.
  • the gate of the PMOS transistor 202 is connected to the output terminal 103 of the error amplifier 102, the drain is connected to the non-inverting input terminal of the error amplifier 102, the source is connected to the gate and source of the NMOS transistor 203, and further connected to the drain of the PMOS transistor 204.
  • the drain of the NMOS transistor 203 is connected to the non-inverting input terminal of the error amplifier 102; the gate of the PMOS transistor 204 is connected to the gate of the pass-through component 105, and the source is connected to the source of the pass-through component 105, and can also be connected to Power terminal.
  • the second embodiment adds a PMOS transistor 204 to the first embodiment.
  • the PMOS transistor 204 When the gate voltage of the PMOS transistor 204 is low and the power supply voltage Vdd is also low, the PMOS transistor 204 has a large current to pass, so that the PMOS transistor 202 and the NMOS transistor 203 also operate simultaneously.
  • the main function of the PMOS transistor 204 is to turn the power supply voltage Vdd low, and the power control signal Vramp is detected to be large, and then the PMOS transistor 202 and the NMOS transistor 203 are activated.
  • the other working processes are the same as in the first embodiment and will not be specifically described herein.
  • the present invention also provides a dynamic clamp, see FIG.
  • One end of the dynamic clamp 301 is connected to the power supply terminal, that is, one end is the power supply voltage Vdd; the other end is connected to the output terminal 103 of the error amplifier 102.
  • the function of the dynamic clamp 301 is to prevent the gate voltage of the overcurrent element 105 from becoming too low instantaneously, and to some extent alleviate the influence of the instantaneous increase of the power control signal Vramp.
  • the dynamic clamp 301 can be composed of one or more PMOS tubes, wherein the gate of each tube is connected to its drain, a plurality of PMOS tubes are connected in series, and the source of the first PMOS tube is connected to the power supply voltage Vdd, at the end
  • the drain of the PMOS transistor is coupled to the output terminal 103 of the error amplifier 102.
  • the dynamic clamp 301 includes two PMOS transistors: a PMOS transistor 3011 and a PMOS transistor 3012.
  • the gate of the PMOS transistor 3011 and the PMOS transistor 3012 is connected to the drain of the self, the source of the PMOS transistor 3011 is connected to the power supply terminal, and the voltage is the power supply voltage Vdd; the drain of the PMOS transistor 3011 is connected to the source of the PMOS transistor 3012; the PMOS transistor The drain of 3012 is coupled to the output 103 of error amplifier 102.
  • the power control signal Vramp When the power control signal Vramp is small, the voltage of the output terminal 103 of the error amplifier 102 is high, and the dynamic clamp 201 does not function, and does not affect the function of the basic circuit. When the power control signal Vramp is large, the voltage at the output terminal 103 of the error amplifier 102 is lowered, so that the dynamic clamp 201 has a current to pass, and the gate of the overcurrent element 105 is charged to prevent it from being excessively lowered.
  • the power control device shown in the above embodiment can be used in a chip.
  • the specific structure of the power control device in the chip will not be detailed here.
  • the above power control device can also be used in a communication terminal as an important component of a radio frequency circuit.
  • the term "communication terminal” as used herein refers to a computer device that can be used in a mobile environment and supports various communication systems such as GSM, EDGE, TD_SCDMA, TDD_LTE, FDD_LTE, etc., including but not limited to mobile phones, notebook computers, tablet computers, car computers, and the like.
  • the power control method and power control device are also applicable to other RF power amplifier applications, such as communication base stations compatible with various communication systems.

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  • Physics & Mathematics (AREA)
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Abstract

一种用于改善射频功率放大器开关谱的功率控制方法和装置，该方法包括如下步骤：（1）检测过通元件（105）的栅极电压与漏极电压，或者栅极电压与电源电压（Vdd），得到过通元件（105）的饱和度信息；（2）如果饱和度信息显示过通元件（105）即将脱离饱和工作区时，分流过通元件（105）的漏极电流至误差放大器（102），降低漏极输出电压。可以减小输出电压的变化率，防止其较快接近电源电压（Vdd），维持过通元件（105）的饱和度，改善射频功率放大器的开关谱特性。

Description

改善功率放大器开关谱的功率控制方法、装置及通信终端 技术领域
本发明涉及一种用于改善射频功率放大器开关谱特性的功率控制方法，同时还涉及一种用于实现上述功率控制方法的功率控制装置及包括该功率控制装置的通信终端，属于无线通信技术领域。
背景技术
射频功率放大器(RF PA)广泛应用在手机等通信终端中。在发射机的前级电路中，调制振荡电路所产生的射频信号功率很小，需要经过射频功率放大器进行一系列的放大—缓冲级、中间放大级、末级功率放大级，获得足够的射频功率以后，才能馈送到天线上辐射出去。在这个过程中，精确的功率控制对确保通信终端的正常使用是至关重要的。
目前，市面上存在多种移动通信标准或无线通信标准，例如GSM、TD-LTE、WCDMA、Wi-Fi等。各种通信标准都要求在很大的动态范围内实现精确的功率控制。射频功率放大器的输出特性必须遵守相关的通信标准，例如输出功率控制必须满足突发时罩(Burst Mask)的要求。为了满足这一要求，功率控制电路中通常加有一个专门电路探测饱和度，但其实现方法往往过于复杂。
例如在现有的一种功率控制电路中，通过设置一个偏置功率放大器基极的电压来满足上述要求。该电压信号由一个功率控制信号和一个参考电压的线性组合而成。虽然在低功率情况下，该方案使功率附加效率有所提高，但在高功率情况下，尤其是高功率和低电源电压情况下，该方案容易出现开关谱恶化的现象。
在公布号为CN102354242A的中国专利申请中，公开了一种功率控制电路，可以根据不同输出功率的要求来动态调整功率放大器的基极电压从而达到优化电流的目的。该功率控制电路包括一个误差放大器，稳压器和一个电流检测电路。电流检测电路检测流过功率放大器的电流，并产生一个检测信号。这种信号可以是电压或电流。在一个具体实现中，流过功率放大器的电流可以被复制和按一定比例缩小。复制 后的电流经输入功率控制信号的进一步调制并反馈到误差放大器上。误差放大器由此产生输出电压来控制在功率放大器的基极，从而达到动态控制基极电压进而优化电流的目的。但是，该方案也存在如下缺陷：当移动终端的电源电压过低时，功率放大器的开关谱特性仍然会存在恶化的情况。
发明内容
针对现有技术的不足，本发明所解决的首要技术问题在于提供一种用于改善射频功率放大器开关谱特性的功率控制方法。
本发明所解决的另一技术问题在于提供一种用于实现上述功率控制方法的功率控制装置。
本发明所解决的又一技术问题在于提供一种包括该功率控制装置的通信终端。
为实现上述发明目的，本发明采用下述的技术方案：
一种用于改善射频功率放大器开关谱的功率控制方法，包括以下步骤：
(1)检测过通元件的栅极电压与漏极电压，或者栅极电压与电源电压，得到过通元件的饱和度信息；
(2)如果所述饱和度信息显示过通元件即将脱离饱和工作区时，分流所述过通元件的漏极电流至误差放大器，降低漏极输出电压。
其中较优地，检测所述过通元件的栅极电压与电源电压，当所述栅极电压与电源电压之差达到设定值时，向所述过通元件的栅极充电以防止饱和度过低。
一种用于改善射频功率放大器开关谱的功率控制装置，用于实现上述的功率控制方法，包括：线性稳压电路和动态电流源；其中，所述线性稳压模块还包括误差放大器102、反馈电路104和过通元件105；
所述误差放大器102是一个运算放大器，反相输入端连接外界提供的功率控制信号Vramp，同相输入端与反馈电路104一端相连，输出端103与过通元件105的栅极相连接；所述过通元件105的源极连接至电源端Vdd上，漏极106连接至反馈电路的另一端；反馈电路104的另一端与过通元件105的栅极相连接；
所述动态电流源201具有三端，第一端2011与误差放大器102的 输出端103相连接，第二端2012与误差放大器102的同相输入端相连接，第三端2013连接至过通元件105的漏极或者电源端Vdd。
其中较优地，当所述功率控制信号Vramp较低或电源电压Vdd较大时，所述动态电流源201不工作，当所述功率控制信号Vramp逐渐升高大于设定值或电源电压Vdd降低到设定值时，即所述过通元件105的栅极降至设定的值时，所述动态电流源201导通进行工作。
其中较优地，所述动态电流源201由一个PMOS管202和一个NMOS管203组成；所述PMOS管202的栅极连接至所述误差放大器102的输出端103，漏极连接至所述误差放大器102的同相输入端，源极连接至过通元件105的漏极；所述NMOS管203的栅极和源极相连接，进一步连接至所述过通元件105的漏极，漏极连接至所述误差放大器102的同相输入端。
其中较优地，所述动态电流源201由第一PMOS管202、第二PMOS管204和一个NMOS管203组成；所述第一PMOS管202的栅极连接至所述误差放大器102的输出端103，漏极连接至所述误差放大器102的同相输入端，源极连接至所述NMOS管203的栅极和源极，进一步连接至所述第二PMOS管204的漏极；所述NMOS管203的漏极连接至所述误差放大器102的同相输入端；所述PMOS管204的栅极连接至过通元件105的栅极，源极连接至所述过通元件105的源极。
其中较优地，动态钳位器301的一端连接至电源端Vdd；另一端与所述误差放大器102的输出端103相连接。
其中较优地，所述功率控制信号Vramp较小时，所述误差放大器102的输出端103的电压较高，所述动态钳位器301不工作；所述功率控制信号Vramp超过设定值时，所述误差放大器102的输出端103的电压降低，所述动态钳位器301有电流通过，对所述过通元件105的栅极进行充电以防电压过度降低。
其中较优地，所述动态钳位器301可由一个或多个PMOS管串联构成，其中每一个PMOS管的栅极都连接至自身的漏极，上一个PMOS管的漏极连到下一个PMOS管的源极；
第一个PMOS管的源极连接至电源端Vdd，漏极与另一个PMOS管的源极相连接，依此类推，最后一个PMOS管的漏极连接至所述误差放 大器102的输出端103。
一种具有射频功率放大器的通信终端，所述通信终端中包括有前述任意一种功率控制装置。
与现有技术相比较，本发明采用简洁、巧妙的电路设计，可以减小输出电压的变化率，防止其较快接近电源电压，维持过通元件的饱和度，显著改善射频功率放大器的开关谱特性。本发明特别适合在低电源电压情况下使用。
附图说明
图1是用于实施本发明的线性稳压电路的示意图；
图2是本发明的一个实施例中，一种用于改善射频功率放大器开关谱特性的功率控制装置原理图；
图3是本发明的一个实施例中，采用第一种动态电流源的功率控制装置原理图；
图4是本发明的一个实施例中，采用第二种动态电流源的功率控制装置原理图；
图5是图2基础上增加动态钳位器的功率控制装置原理图；
图6是图3基础上增加动态钳位器的功率控制装置原理图；
图7是图4基础上增加动态钳位器的功率控制装置原理图。
具体实施方式
下面结合附图和具体实施例对本发明的技术内容作进一步的说明。
如图1所示，用于实施本发明的线性稳压电路101包括误差放大器102、反馈电路104、过通元件105。误差放大器102是一个运算放大器，反相输入端连接外界提供的功率控制信号Vramp，同相输入端与反馈电路104一端相连，输出端103与过通元件105的栅极相连接；过通元件105的源极连接至电源端Vdd上，漏极106连接至反馈电路的另一端，同时还连接至一个或多个射频功率放大器的集电极，在图1中以负载表示。线性稳压电路101有两个输出：一个输出为过通元件105的漏极106，此处电压为Vcc；另一个输出为误差放大器的输出端103。由于线性稳压电路101的负反馈特性，过通元件105的漏极106处的电压Vcc响应于功率控制信号Vramp。线性稳压电路101的输出电压信号Vcc线性响应于功 率控制信号Vramp，控制射频功率放大器的集电极，图1～4中用负载表示。过通元件105通常是PMOS管，同理，PMOS管也可采用NMOS管进行替代，再做稍微的调整即可。
众所周知，作为过通元件的PMOS管通常有两种工作状态：线性工作区和饱和工作区。当功率控制信号较小时，PMOS管处在饱和工作区。此时，整个线性稳压电路有较大的工作带宽，具有很强的稳压功能。当功率控制信号增大时，PMOS管逐渐脱离饱和工作区而进入线性区。此时系统的带宽变窄，稳压功能减弱。PMOS处于何种工作状态，可以由PMOS管各端口电压的相对大小来确定。具体来说，如果
Vsg〈Vsd+|Vtp|  (1)
那么，PMOS管处在饱和区。反之，则在线性区。这里的Vsg是PMOS管的源极电压和栅电压之差，Vsd是源极电压和漏极电压之差。Vtp是PMOS管的阈值电压。当功率控制信号很大时，Vsg远远大于Vsd+|Vtp|，PMOS管处于深度线性区，其饱和度就很小，开关谱特性很差。
由于在线性稳压电路中，过通元件105的饱和度对于射频功率放大器的开关谱特性来说很关键。其饱和度越小，射频功率放大器的开关谱特性越差。因此，本发明中引入一个动态电流源以及一个动态钳位器来提高低电源电压下开关谱的性能。
图2所示是本发明提供的一种用于改善射频功率放大器开关谱的功率控制装置，包括：线性稳压电路101、动态电流源201。其中，动态电流源201具有三端，第一端2011与误差放大器102的输出端103相连接，第二端2012与误差放大器102的同相输入端相连接，第三端2013连接至过通元件105的漏极106或者电源端。动态电流源201的作用是，当过通元件105的栅极电压降低时，过通元件105的漏极106会有很大的电流通过，此时电压Vcc会变得很大，引起电压Vcc的跃升，对整个电路系统来说，此时的射频开关谱会增加高频噪声；当动态电流源201的第一端2011测得误差放大器102的输出端103电压瞬间降低时，此时动态电流源201导通，对过通元件105的漏极106的较大电流进行分流，通过电阻R1的电流会变小，使得电压Vcc降低，即瞬间变化会得到一定的缓解，从而改善电流或者电压的变化率，降低高频噪声。也就是说，实现了电压Vcc在接近电源电压Vdd的时候，降低其变化速率的目的。
动态电流源可以有几种实施方案。参见图3，第一种实施方案是由一个PMOS管202和一个NMOS管203组成。PMOS管202的栅极连接至误差放大器102的输出端103，漏极连接至误差放大器102的同相输入端，源极连接至过通元件105的漏极。NMOS管203的栅极和源极相连，进一步连接至过通元件105的漏极，其漏极连接至误差放大器102的同相输入端。
当功率控制信号较小时，过通元件105的栅极电压较高，此时有较小的电流通过漏极，即输出电压Vcc较低，PMOS管202和NMOS管不导通由于PMOS管栅极电压较高，有较小的电流通过；NMOS管由于电压较低，也有较小的电流通过，即动态电流源201有较小的电流通过，但是不影响其他电路的正常工作。也就是说，当Vramp较小时，动态电流源不导通。该电路不影响其他电路的正常工作。当Vramp超过一定的阈值，动态电流源导通，开始有电流流过；当功率控制信号逐渐增加的过程中，过通元件105的栅极电压逐渐降低，通过漏极的电流也逐渐增大，即输出电压Vcc逐渐升高；当过通元件105即将脱离饱和区时，其开关谱会恶化；此时PMOS管202的栅极电压较低，达到设计值，开始工作，并且输出电压Vcc也较高，会有较大电流通过PMOS管202；而NMOS管203的栅极电压较高，漏极电压即输出电压Vcc也较高，开始工作会有较大电流通过NMOS管203。由于Vcc＝Vramp*R1/R2+Vramp*R2/R2,即输出电压Vcc等于电阻R1的电压Vramp*R1/R2与电阻R2的电压Vramp*R2/R2之和，当动态电流源201工作时，由于动态电流源201的分流作用，流过电阻R1的电流会小于流过电阻R2的电流，因此，输出电压Vcc变小。即动态电流源201可以减小输出电压Vcc的变化率，防止其较快接近电源电压Vdd，维持过通元件105的饱和度，在一定程度上缓解射频功率放大器的开关谱恶化情况。
参见图4，动态电流源的第二种实施方案是由PMOS管202、PMOS管204和一个NMOS管203组成。PMOS管202的栅极连接至误差放大器102的输出端103，漏极连接至误差放大器102的同相输入端，源极连接至NMOS管203的栅极和源极，进一步连接至PMOS管204的漏极；NMOS管203漏极连接至误差放大器102的同相输入端；PMOS管204的栅极连接至过通元件105的栅极，源极连接至过通元件105的源极，也可连接至 电源端。
第二种实施方案是在第一种实施方案的基础上增加了一个PMOS管204。当PMOS管204的栅极电压较低，并且电源电压Vdd也较低时，PMOS管204会有较大电流通过，使得PMOS管202和NMOS管203也同时工作。PMOS管204的主要作用是将电源电压Vdd变低，而功率控制信号Vramp又较大的情况检测出来，然后触发PMOS管202和NMOS管203工作。其他的工作过程与第一种实施方案相同，在此就不具体说明了。
为进一步优化本功率控制装置的实施效果，本发明还提供了一种动态钳位器，参见图5。动态钳位器301的一端与电源端连接，即一端为电源电压Vdd；另一端与误差放大器102的输出端103相连接。该动态钳位器301的作用是：防止过通元件105的栅极电压瞬间变得太低，一定程度上缓解功率控制信号Vramp的瞬时变大所带来的影响。
动态钳位器301可由一个或多个PMOS管构成，其中每一个管子的栅极都连接至其漏极，多个PMOS管进行串联，并且首个PMOS管的源极连接到电源电压Vdd，末尾的PMOS管的漏极连接到误差放大器102的输出端103。参见图6和图7，在本发明的一个实施例中，动态钳位器301包括两个PMOS管：PMOS管3011和PMOS管3012。PMOS管3011、PMOS管3012的栅极连接至自身漏极，PMOS管3011的源极连接电源端，其电压为电源电压Vdd；PMOS管3011的漏极连接至PMOS管3012的源极；PMOS管3012的漏极连接至误差放大器102的输出端103。
在功率控制信号Vramp较小时，误差放大器102的输出端103的电压较高，动态钳位器201不起作用，不影响基本电路的功能。在功率控制信号Vramp较大时，误差放大器102的输出端103的电压降低，使得动态钳位器201有电流通过，对过通元件105的栅极进行充电，防止其过度降低。
上述实施例中所示出的功率控制装置可以被用在芯片中。对该芯片中的功率控制装置的具体结构，在此就不一一详述了。
另外，上述功率控制装置还可以被用在通信终端中，作为射频电路的重要组成部分。这里所说的通信终端指可以在移动环境中使用、支持GSM，EDGE、TD_SCDMA、TDD_LTE、FDD_LTE等多种通信制式的计算机设备，包括但不限于移动电话、笔记本电脑、平板电脑、车载电脑等。此外， 该功率控制方法及功率控制装置也适用于其他射频功率放大器应用的场合，例如兼容多种通信制式的通信基站等。
以上对本发明所提供的改善功率放大器开关谱的功率控制方法、装置及通信终端进行了详细的说明。对本领域的一般技术人员而言，在不背离本发明实质精神的前提下对它所做的任何显而易见的改动，都将构成对本发明专利权的侵犯，将承担相应的法律责任。

Claims (11)

  1. 一种用于改善射频功率放大器开关谱的功率控制方法，其特征在于包括以下步骤：
    (1)检测过通元件的栅极电压与漏极电压，或者栅极电压与电源电压，得到过通元件的饱和度信息；
    (2)如果所述饱和度信息显示过通元件即将脱离饱和工作区时，分流所述过通元件的漏极电流至误差放大器，降低漏极输出电压。
  2. 如权利要求1所述的功率控制方法，其特征在于进一步包括如下步骤：
    检测所述过通元件的栅极电压与电源电压，
    当所述栅极电压与电源电压之差达到设定值时，向所述过通元件的栅极充电以防止饱和度过低。
  3. 一种用于改善射频功率放大器开关谱的功率控制装置，用于实现权利要求1或2所述的功率控制方法，其特征在于包括：线性稳压电路和动态电流源；所述线性稳压模块还包括误差放大器(102)、反馈电路(104)和过通元件(105)；其中，
    所述误差放大器(102)的反相输入端连接外界提供的功率控制信号(Vramp)，同相输入端与反馈电路(104)一端相连，输出端(103)与过通元件(105)的栅极相连接；过通元件(105)的源极连接至电源端(Vdd)上，漏极(106)连接至反馈电路的另一端；反馈电路(104)的另一端与过通元件(105)的栅极相连接；
    所述动态电流源(201)具有三端，第一端(2011)与误差放大器102的输出端(103)相连接，第二端(2012)与误差放大器(102)的同相输入端相连接，第三端(2013)连接至过通元件(105)的漏极或者电源端(Vdd)。
  4. 如权利要求3所述的功率控制装置，其特征在于：
    当所述功率控制信号(Vramp)较低或电源电压(Vdd)较大时，所述动态电流源(201)不工作，当所述功率控制信号(Vramp)逐渐升高大于设定值或电源电压(Vdd)降低到设定值时，即所述过通元件(105)的栅极降至设定的值时，所述动态电流源(201)导通进行工作。
  5. 如权利要求4所述的功率控制装置，其特征在于：
    所述动态电流源(201)由一个PMOS管(202)和一个NMOS管(203)组成；所述PMOS管(202)的栅极连接至所述误差放大器(102)的输出端(103)，漏极连接至所述误差放大器(102)的同相输入端，源极连接至所述过通元件(105)的漏极；所述NMOS管(203)的栅极和源极相连接，进一步连接至所述过通元件(105)的漏极，漏极连接至所述误差放大器(102)的同相输入端。
  6. 如权利要求4所述的功率控制装置，其特征在于：
    所述动态电流源(201)由第一PMOS管(202)、第二PMOS管(204)和一个NMOS管(203)组成；所述第一PMOS管(202)的栅极连接至所述误差放大器(202)的输出端(103)，漏极连接至所述误差放大器(102)的同相输入端，源极连接至所述NMOS管(203)的栅极和源极，进一步连接至所述第二PMOS管(204)的漏极；所述NMOS管(203)的漏极连接至所述误差放大器(102)的同相输入端；所述PMOS管(204)的栅极连接至过通元件(105)的栅极，源极连接至所述过通元件(105)的源极。
  7. 如权利要求5或6所述的功率控制装置，其特征在于还包括动态钳位器(301)；
    所述动态钳位器(301)的一端连接至电源端(Vdd)；另一端与所述误差放大器(102)的输出端(103)相连接。
  8. 如权利要求7所述的功率控制装置，其特征在于：
    所述功率控制信号(Vramp)较小时，所述误差放大器(102)的输出端(103)的电压较高，所述动态钳位器(301)不工作；所述功率控制信号(Vramp)超过设定值时，所述误差放大器(102)的输出端(103)的电压降低，所述动态钳位器(301)有电流通过，对所述过通元件(105)的栅极进行充电以防电压过度降低。
  9. 如权利要求7所述的功率控制装置，其特征在于：
    所述动态钳位器(301)由一个或多个PMOS管串联构成，其中每一个PMOS管的栅极都连接至自身的漏极；
    第一个PMOS管的源极连接至电源端(Vdd)，漏极与下一个PMOS管的源极相连接，依此类推，最后一个PMOS管的漏极连接至所述误差放大 器(102)的输出端(103)。
  10. 一种具有射频功率放大器的芯片，其特征在于：
    所述芯片中包括有所述权利要求3～9中任意一种功率控制装置。
  11. 一种具有射频功率放大器的通信终端，其特征在于：
    所述通信终端中包括有所述权利要求3～9中任意一种功率控制装置。
PCT/CN2015/095228 2014-11-20 2015-11-20 改善功率放大器开关谱的功率控制方法、装置及通信终端 Ceased WO2016078620A1 (zh)

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CN201410669957.5A CN104617886B (zh) 2014-11-20 2014-11-20 一种用于改善功率放大器开关谱的功率控制方法及其电路

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