WO2016112757A1 - 一种n型双面电池及其制作方法 - Google Patents

一种n型双面电池及其制作方法 Download PDF

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WO2016112757A1
WO2016112757A1 PCT/CN2015/096630 CN2015096630W WO2016112757A1 WO 2016112757 A1 WO2016112757 A1 WO 2016112757A1 CN 2015096630 W CN2015096630 W CN 2015096630W WO 2016112757 A1 WO2016112757 A1 WO 2016112757A1
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reflection film
silicon nitride
type
passivation
type double
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French (fr)
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魏青竹
陆俊宇
连维飞
倪志春
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Zhongli Talesun Solar Co Ltd
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Zhongli Talesun Solar Co Ltd
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F77/00—Constructional details of devices covered by this subclass
    • H10F77/30—Coatings
    • H10F77/306—Coatings for devices having potential barriers
    • H10F77/311—Coatings for devices having potential barriers for photovoltaic cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F10/00—Individual photovoltaic cells, e.g. solar cells
    • H10F10/10—Individual photovoltaic cells, e.g. solar cells having potential barriers
    • H10F10/14—Photovoltaic cells having only PN homojunction potential barriers
    • H10F10/148—Double-emitter photovoltaic cells, e.g. bifacial photovoltaic cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F19/00—Integrated devices, or assemblies of multiple devices, comprising at least one photovoltaic cell covered by group H10F10/00, e.g. photovoltaic modules
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F71/00—Manufacture or treatment of devices covered by this subclass
    • H10F71/121—The active layers comprising only Group IV materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F71/00—Manufacture or treatment of devices covered by this subclass
    • H10F71/137—Batch treatment of the devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F77/00—Constructional details of devices covered by this subclass
    • H10F77/10—Semiconductor bodies
    • H10F77/14—Shape of semiconductor bodies; Shapes, relative sizes or dispositions of semiconductor regions within semiconductor bodies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F77/00—Constructional details of devices covered by this subclass
    • H10F77/30—Coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F77/00—Constructional details of devices covered by this subclass
    • H10F77/30—Coatings
    • H10F77/306—Coatings for devices having potential barriers
    • H10F77/311—Coatings for devices having potential barriers for photovoltaic cells
    • H10F77/315—Coatings for devices having potential barriers for photovoltaic cells the coatings being antireflective or having enhancing optical properties
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
    • H10P32/16—Diffusion of dopants within, into or out of semiconductor bodies or layers between a solid phase and a liquid phase
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/547—Monocrystalline silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the present invention relates to the field of solar energy technology, and in particular to an N-type double-sided battery and a method of fabricating the same.
  • N-type batteries and P-type batteries belong to solar cells.
  • N-type batteries have higher lifespan, higher battery efficiency, and no photo-induced attenuation effect than P-type batteries.
  • the back side can also absorb the scattered light, which generates extra power. Therefore, the N-type double-sided battery generates much more power than the conventional P-type single-sided battery.
  • the gas is carried by the method of carrying boron tribromide vapor to diffuse, and in order to ensure that the boron source has sufficient space to spread on the silicon wafer, the production capacity is limited. Further, in the above diffusion method, the boron source is inevitably contaminated on the non-expanded boron surface to form a PN junction. Therefore, additional cleaning steps are required in the later stage, which affects the efficiency of production and processing.
  • passivation and anti-reflection of the P-type surface are mainly achieved by fabricating silicon nitride or silicon oxide.
  • silicon nitride method since the silicon nitride has a positive charge, the passivation effect on the P-type surface is poor; the silicon oxide adopts a thermal silicon oxide method, which is a high-temperature process of 800 ° C or higher. The consumption is high and it is easy to destroy the formed PN junction morphology, and the process is difficult to control.
  • the present invention provides an N-type double-sided battery and a method of fabricating the same to overcome the deficiencies in the prior art.
  • the technical solution of the N-type double-sided electric power supply method provided by the present invention is as follows:
  • a method for manufacturing an N-type double-sided battery comprising the following steps:
  • Electrodes are formed on the passivation anti-reflection film formed by the aluminum oxide and silicon nitride and the silicon nitride passivation anti-reflection film, respectively, to obtain the N-type double-sided battery.
  • the damaged layer is removed by using a NaOH solution, and the upper and lower surfaces of the N-type silicon wafer are subjected to a texturing treatment.
  • step S2 boron diffusion in the furnace tube is performed under a mixed gas atmosphere formed by oxygen and nitrogen, wherein the volume ratio of oxygen to nitrogen is It is 1:5 ⁇ 1:20;
  • diffusion temperature is 850 to 1100 ° C
  • diffusion time is 45 min to 2 h
  • diffusion square resistance is 40 to 100 ⁇ .
  • the borosilicate glass is removed by washing with an HF solution, and a mask formed of silicon oxide or silicon nitride is formed on the surface of the diffused boron by PECVD. .
  • the conditions for performing phosphorus diffusion are: a diffusion temperature of 800 to 900 ° C, a diffusion time of 30 min to 2 h, and a diffusion square resistance of 20 to 60 ⁇ . .
  • a passivation anti-reflection film formed by alumina and silicon nitride is formed by PECVD or ALD, and silicon nitride passivation is performed by PECVD. Anti-reflection film.
  • the passivation anti-reflection film formed by the aluminum oxide and the silicon nitride and the silicon nitride blunt respectively are formed by screen printing.
  • a grid-shaped electrode is formed on the anti-reflection film and sintered.
  • the N-type double-sided electric technical solution provided by the present invention is as follows:
  • An N-type double-sided battery comprising: an N-type silicon substrate, a P-type layer, a first passivation anti-reflection film, N+ layer, second passivation anti-reflection film, gate line electrode;
  • the P-type layer and the first passivation anti-reflection film are sequentially disposed on an upper surface of the N-type silicon wafer substrate, and the first passivation anti-reflection film includes aluminum oxide and silicon nitride, and the aluminum oxide and Silicon nitride is sequentially stacked on the P-type layer;
  • the N+ layer and the second passivation anti-reflection film are sequentially disposed on a lower surface of the N-type silicon wafer substrate, and the second passivation anti-reflection film is a silicon nitride passivation anti-reflection film;
  • the gate line electrode is a plurality of strips, and the gate line electrodes are respectively distributed on the first passivation anti-reflection film and the second passivation anti-reflection film, and the gate line electrode comprises a main gate line electrode and a sub-gate line The electrode is symmetrically disposed on the main gate line electrode on the first passivation anti-reflection film and the second passivation anti-reflection film.
  • the thickness of the first passivation anti-reflection film is 70-90 nm, and the thickness of the aluminum oxide in the first passivation anti-reflection film is 5-30 nm, silicon nitride The thickness is 40 to 85 nm.
  • the gate line electrodes are a plurality of strips, and the gate line electrodes are respectively distributed on the first passivation anti-reflection film and the second passivation anti-reflection film
  • the gate line electrode includes a main gate line electrode and a sub-gate line electrode, and the main gate line electrodes on the first passivation anti-reflection film and the second passivation anti-reflection film are symmetrically disposed.
  • the invention has the beneficial effects that the manufacturing method of the N-type double-sided battery of the invention is simple in process and effectively improves the efficiency of the battery. It ensures uniformity of diffusion and increases the productivity of the furnace tube during diffusion. At the same time, it can effectively control the coating range of the boron source, and it will not be contaminated with the boron source in the non-diffusion region, eliminating the need for additional cleaning steps in the later stage.
  • the method for fabricating the passivation layer of the N-type double-sided battery of the present invention belongs to a low temperature process and does not damage the PN junction.
  • the passivation effect of the aluminum oxide and silicon nitride stack passivation method is better, wherein the aluminum oxide acts as a passivation, and the silicon nitride functions to protect and adjust the optical parameters and reduce the reflectivity.
  • FIG. 1 is a schematic plan view of an N-type silicon wafer in a process of fabricating an N-type double-sided battery of the present invention
  • FIG. 2 is a schematic plan view showing the upper surface of the N-type silicon wafer uniformly coated with a boron source in the process of fabricating the N-type double-sided battery of the present invention
  • FIG. 3 is a schematic plan view showing a P-type layer formed on an upper surface of an N-type silicon wafer in the process of fabricating an N-type double-sided battery according to the present invention
  • FIG. 4 is a schematic plan view showing a mask formed on a P-type layer in the process of fabricating the N-type double-sided battery of the present invention
  • FIG. 5 is a schematic plan view showing the N+ layer formed on the lower surface of the N-type silicon wafer in the process of fabricating the N-type double-sided battery of the present invention
  • FIG. 6 is a schematic plan view showing the mask after removing the mask in the manufacturing process of the N-type double-sided battery of the present invention.
  • FIG. 7 is a schematic plan view showing a passivation anti-reflection film formed by forming aluminum oxide and silicon nitride on the surface of diffused boron in the process of fabricating the N-type double-sided battery of the present invention
  • Figure 8 is an enlarged schematic view showing a portion of the structure of Figure 7;
  • FIG. 9 is a schematic plan view showing a silicon nitride passivation anti-reflection film formed on a surface of a diffused phosphor in the process of fabricating an N-type double-sided battery according to the present invention
  • Fig. 10 is a plan view showing the electrode after the electrode is produced in the process of fabricating the N-type double-sided battery of the present invention.
  • the manufacturing method of the N-type double-sided battery of the present invention comprises the following steps:
  • Electrodes are formed on the passivation anti-reflection film formed by the aluminum oxide and silicon nitride and the silicon nitride passivation anti-reflection film, respectively, to obtain the N-type double-sided battery.
  • step S1 the purpose of step S1 is to perform a texturing process on the N-type silicon wafer 10 to improve the light trapping property of the produced N-type double-sided battery and the utilization of sunlight.
  • the damaged layer is removed by using a NaOH solution, and the upper and lower surfaces of the N-type silicon wafer are subjected to a texturing treatment.
  • the upper and lower surfaces of the N-type silicon wafer are respectively formed with a pile surface, and the pile surface has a pyramid structure.
  • S2 is uniformly coated with a boron source 12 on the upper surface of the N-type silicon wafer 10 by spin coating or screen printing, and boron diffusion is performed in the furnace tube, thereby being N-type.
  • a P-type layer 20 is formed on the upper surface of the silicon wafer.
  • boron diffusion when boron diffusion is performed in the furnace tube, it is carried out under a mixed gas atmosphere formed by oxygen and nitrogen, wherein the volume ratio of oxygen to nitrogen is 1:5 to 1:20. Further, the conditions for boron diffusion in the furnace tube are: diffusion temperature is 850 to 1100 ° C, diffusion time is 45 min to 2 h, diffusion resistance It is 40 to 100 ⁇ .
  • borosilicate glass is a by-product formed during boron diffusion, and borosilicate glass can be removed by HF solution cleaning.
  • a mask formed of silicon oxide or silicon nitride is formed on the surface of the diffused boron by PECVD to protect the surface of the diffused boron, and the subsequent fabrication step is prevented from affecting the surface of the diffused boron.
  • the high-low junction structure is the N+ layer of the N-type double-sided battery, and further, the phosphorus diffusion is carried out using liquid phosphorus oxychloride as the phosphorus source.
  • the conditions for phosphorus diffusion are as follows: the diffusion temperature is 800 to 900 ° C, the diffusion time is 30 min to 2 h, and the diffusion square resistance is 20 to 60 ⁇ .
  • S5. removes the phosphosilicate glass, and the mask 22 produced in the step S3.
  • the phosphosilicate glass is a by-product formed during the phosphorus diffusion process, and the borosilicate glass can be removed by washing with an HF solution. Further, while removing the phosphosilicate glass, the mask prepared in the step S3 is also removed together with the HF solution, thereby exposing the produced P-type layer.
  • a passivation anti-reflection film 30 formed of alumina 31 and silicon nitride 32 is formed on the surface of the diffusion boron 20, and a silicon nitride passivation anti-reflection film 50 is formed on the surface of the diffusion phosphor 40. .
  • a method of laminating passivation of the aluminum oxide 31 and the silicon nitride 32 is adopted.
  • the aluminum oxide serves as a passivation function
  • the silicon nitride functions to protect and adjust the optical parameters and reduce the reflectance.
  • the passivation anti-reflection film 30 formed of aluminum oxide and silicon nitride can be formed by PECVD or ALD
  • the silicon nitride passivation anti-reflection film 50 can be formed by PECVD.
  • the thickness of the passivation anti-reflection film 30 formed of aluminum oxide and silicon nitride is 70 to 90 nm, wherein the thickness of the aluminum oxide 31 is 5 to 30 nm, and the thickness of the silicon nitride 32 is 40 to 85 nm.
  • an electrode 60 is formed on the passivation anti-reflection film 30 and the silicon nitride passivation anti-reflection film 50 formed of the aluminum oxide and silicon nitride, respectively, to obtain the N-type double-sided battery.
  • the passivation of the aluminum oxide and silicon nitride respectively is reduced.
  • a grid-shaped electrode is formed on the anti-film and the silicon nitride passivation anti-reflection film, and sintered.
  • the passivation anti-reflection film formed of aluminum oxide and silicon nitride and the positions of the electrodes on the silicon nitride passivation anti-reflection film are disposed opposite each other.
  • the present invention further provides an N-type double-sided battery fabricated according to the manufacturing method as described above, comprising: an N-type silicon wafer substrate 10, a P-type layer 20 The first passivation anti-reflection film 30, the N+ layer 40, the second passivation anti-reflection film 50, and the gate line electrode 60.
  • the upper and lower surfaces of the N-type silicon wafer substrate 10 have a pile surface having a pyramid structure.
  • the P-type layer 20 and the first passivation anti-reflection film 30 are sequentially disposed on the upper surface of the N-type silicon wafer substrate 10.
  • the first passivation anti-reflection film 30 includes aluminum oxide 31 and silicon nitride 32.
  • the alumina 31 and the silicon nitride 32 are sequentially stacked on the P-type layer 20.
  • the first passivation anti-reflection film 30 formed by lamination of the alumina 31 and the silicon nitride 32 has a good passivation effect.
  • the thickness of the first passivation anti-reflection film 30 is 70-90 nm
  • the thickness of the alumina 31 in the first passivation anti-reflection film 30 is 5-30 nm
  • the thickness of the silicon nitride 32 is 40 to 85 nm.
  • the N+ layer 40 and the second passivation anti-reflection film 50 are sequentially disposed on the lower surface of the N-type silicon wafer substrate 10, that is, the back surface of the N-type silicon wafer substrate 10.
  • the second passivation anti-reflection film 50 may be a silicon nitride passivation anti-reflection film.
  • the gate line electrodes 60 are a plurality of strips, and the gate line electrodes 60 are respectively distributed on the first passivation anti-reflection film 30 and the second passivation anti-reflection film 50 to extract a current formed.
  • the gate line electrode 60 specifically includes a main gate line electrode and a sub gate line electrode.
  • the gate line electrodes 60 on the first passivation anti-reflection film 30 and the second passivation anti-reflection film 50 are symmetrically disposed.
  • the number of the main gate line electrodes is 2 to 5, and the width is 0.5 mm to 2.5 mm; the number of the sub-gate line electrodes is 50 to 150, and the width is 30 um to 150 um.
  • the method for fabricating the N-type double-sided battery of the present invention is simple in process and effectively improves the efficiency of the battery. It ensures uniformity of diffusion and increases the productivity of the furnace tube during diffusion. At the same time, it can effectively control the coating range of the boron source, and it will not be contaminated with the boron source in the non-diffusion region, eliminating the need for additional cleaning steps in the later stage.
  • the method for fabricating the passivation layer of the N-type double-sided battery of the present invention belongs to a low temperature process. Will not destroy the PN junction.
  • the passivation effect of the aluminum oxide and silicon nitride stack passivation method is better, wherein the aluminum oxide acts as a passivation, and the silicon nitride functions to protect and adjust the optical parameters and reduce the reflectivity.

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Abstract

提供了一种N型双面电池的制作方法，包括如下步骤：S1.制绒处理；S2.通过旋涂或丝网印刷的方式在所述N型硅片的上表面均匀涂上硼源，并在炉管中进行硼扩散；S3.制作掩膜；S4.在N型硅片的下表面进行磷扩散，在下表面形成高低结结构；S5.去除磷硅玻璃，以及所述步骤S3中制作的掩膜；S6.在扩散硼的表面制作氧化铝和氮化硅形成的钝化减反膜，在扩散磷的表面制作氮化硅钝化减反膜；S7.制作电极。该N型双面电池的制作方法工艺简单，有效地提高了电池的效率。此外，还提供了一种N型双面电池，该N型双面电池的钝化层制作方法属于低温工艺，不会破坏PN结。

Description

一种N型双面电池及其制作方法 技术领域
本发明涉及一种太阳能技术领域，具体地，涉及一种N型双面电池及其制作方法。
背景技术
N型电池和P型电池都属于太阳能电池，其中，N型电池相对于P型电池具有寿命高，电池效率更高，无光致衰减效应的优点。对于双面透光的N型电池，其背面也能吸收周围散射的光线，从而产生额外的电能，因此N型双面电池的发电量要远高于传统的P型单面电池。
目前，N型双面电池工艺中，采用气体携带三溴化硼蒸汽的方式进行扩散，为了保证硼源有足够的空间散布到硅片上，将会导致产能受到限制。且上述扩散方式中，在非扩硼面也会不可避免的沾染到硼源，形成PN结。从而，后期需要额外的清洗步骤去除，影响了生产加工的效率。
另外，对于P型表面(扩硼面)的钝化及减反射，主要通过制作氮化硅或氧化硅实现的。但是，其中，氮化硅的方式由于氮化硅带正电荷，对P型表面的钝化效果很差；氧化硅采用的是热氧化硅的方式，该方式是800℃以上的高温过程，能耗高且容易破坏已形成的PN结形貌，工艺较难把控。
因此，针对上述问题，有必要提出进一步的解决方案。
发明内容
有鉴于此，本发明提供了一种N型双面电池及其制作方法，以克服现有技术中存在的不足。
为了实现上述目的，本发明提供的N型双面电的制作方法的技术方案如下：
一种N型双面电池的制作方法，其包括如下步骤：
S1.利用碱溶液对N型硅片的上、下表面进行处理；
S2.通过旋涂或丝网印刷的方式在所述N型硅片的上表面均匀涂上硼源， 并在炉管中进行硼扩散；
S3.去除硼硅玻璃，并在扩散硼的表面制作掩膜；
S4.在N型硅片的下表面进行磷扩散，在下表面形成高低结结构；
S5.去除磷硅玻璃，以及所述步骤S3中制作的掩膜；
S6.在扩散硼的表面制作氧化铝和氮化硅形成的钝化减反膜，在扩散磷的表面制作氮化硅钝化减反膜；
S7.分别在所述氧化铝和氮化硅形成的钝化减反膜以及氮化硅钝化减反膜上制作电极，获得所述N型双面电池。
作为本发明的N型双面电池的制作方法的改进，所述步骤S1中，利用NaOH溶液去除损伤层，并在N型硅片的上、下表面进行制绒处理。
作为本发明的N型双面电池的制作方法的改进，所述步骤S2中，在炉管中进行硼扩散是在氧气和氮气形成的混合气气氛下进行的，其中，氧气与氮气的体积比为1:5～1:20；
在炉管中进行硼扩散的条件为：扩散温度为850～1100℃，扩散时间为45min～2h，扩散方阻为40～100Ω。
作为本发明的N型双面电池的制作方法的改进，所述步骤S3中，采用HF溶液清洗去除硼硅玻璃，并采用PECVD法在扩散硼的表面制作氧化硅或氮化硅形成的掩膜。
作为本发明的N型双面电池的制作方法的改进，所述步骤S4中，进行磷扩散的条件为：扩散温度为800～900℃，扩散时间为30min～2h，扩散方阻为20～60Ω。
作为本发明的N型双面电池的制作方法的改进，所述步骤S6中，采用PECVD或ALD法制作氧化铝和氮化硅形成的钝化减反膜，采用PECVD法制作氮化硅钝化减反膜。
作为本发明的N型双面电池的制作方法的改进，所述步骤S7中，采用丝网印刷的方式，分别在所述氧化铝和氮化硅形成的钝化减反膜以及氮化硅钝化减反膜上制作栅线状的电极，并烧结。
为了实现上述目的，本发明提供的N型双面电技术方案如下：
一种N型双面电池，其包括：N型硅片衬底、P型层、第一钝化减反膜、 N+层、第二钝化减反膜、栅线电极；
所述P型层、第一钝化减反膜依次设置于所述N型硅片衬底的上表面，所述第一钝化减反膜包括氧化铝和氮化硅，所述氧化铝和氮化硅依次层叠设置于所述P型层上；
所述N+层、第二钝化减反膜依次设置于所述N型硅片衬底的下表面，所述第二钝化减反膜为氮化硅钝化减反膜；
所述栅线电极为若干条，所述栅线电极分别分布于所述第一钝化减反膜和第二钝化减反膜上，所述栅线电极包括主栅线电极和副栅线电极，位于第一钝化减反膜和第二钝化减反膜上的主栅线电极对称设置。
作为本发明的N型双面电池的改进，所述第一钝化减反膜的厚度为70～90nm，所述第一钝化减反膜中氧化铝的厚度为5～30nm，氮化硅的厚度为40～85nm。
作为本发明的N型双面电池的改进，所述栅线电极为若干条，所述栅线电极分别分布于所述第一钝化减反膜和第二钝化减反膜上，所述栅线电极包括主栅线电极和副栅线电极，位于第一钝化减反膜和第二钝化减反膜上的主栅线电极对称设置。
与现有技术相比，本发明的有益效果是：本发明的N型双面电池的制作方法工艺简单，有效地提高了电池的效率。其能够保证扩散的均匀性，且使得扩散时炉管的产能得到提高。同时，还能够有效控制硼源的涂布范围，在非扩散区域不会沾染到硼源，省去了后期的额外清洗步骤。
此外，此外，本发明的N型双面电池的钝化层制作方法属于低温工艺，不会破坏PN结。且其采用钝化效果更好的氧化铝与氮化硅叠层钝化的方式，其中，氧化铝起到钝化作用，氮化硅起到保护及调整光学参数，降低反射率的作用。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的实施例，对于本领域普通技术人员来讲，在不 付出创造性劳动的前提下，还可以根据提供的附图获得其他的附图。
图1为本发明的N型双面电池的制作过程中N型硅片的平面示意图；
图2为本发明的N型双面电池的制作过程中N型硅片上表面均匀涂上硼源后的平面示意图；
图3为本发明的N型双面电池的制作过程中N型硅片上表面形成P型层后的平面示意图；
图4为本发明的N型双面电池的制作过程中P型层上制作掩膜后的平面示意图；
图5为本发明的N型双面电池的制作过程中N型硅片下表面形成N+层后的平面示意图；
图6为本发明的N型双面电池的制作过程中去除掩膜后的平面示意图；
图7为本发明的N型双面电池的制作过程中在扩散硼的表面制作氧化铝和氮化硅形成的钝化减反膜后的平面示意图；
图8为图7中部分结构的放大示意图；
图9为本发明的N型双面电池的制作过程中扩散磷的表面制作氮化硅钝化减反膜后的平面示意图；
图10为本发明的N型双面电池的制作过程中制作电极后的平面示意图。
具体实施方式
下面将对本发明实施例中的技术方案进行详细的描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动的前提下所获得的所有其他实施例，都属于本发明保护的范围。
本发明的N型双面电池的制作方法包括如下步骤：
S1.利用碱溶液对N型硅片的上、下表面进行处理；
S2.通过旋涂或丝网印刷的方式在所述N型硅片的上表面均匀涂上硼源，并在炉管中进行硼扩散；
S3.去除硼硅玻璃，并在扩散硼的表面制作掩膜；
S4.在N型硅片的下表面进行磷扩散，在下表面形成高低结结构；
S5.去除磷硅玻璃，以及所述步骤S3中制作的掩膜；
S6.在扩散硼的表面制作氧化铝和氮化硅形成的钝化减反膜，在扩散磷的表面制作氮化硅钝化减反膜；
S7.分别在所述氧化铝和氮化硅形成的钝化减反膜以及氮化硅钝化减反膜上制作电极，获得所述N型双面电池。
下面针对如上所述各个步骤进行详细说明。
如图1所示，S1.利用碱溶液对N型硅片10的上、下表面进行处理。
其中，步骤S1的目的在于在N型硅片10上进行制绒处理，以提高制作的N型双面电池陷光性以及对于太阳光的利用率。具体地，所述步骤S1中，利用NaOH溶液去除损伤层，并在N型硅片的上、下表面进行制绒处理。经过制绒处理，N型硅片的上、下表面上分别形成绒面，该绒面具有金字塔结构。
如图2、3所示，S2.通过旋涂或丝网印刷的方式在所述N型硅片10的上表面均匀涂上硼源12，并在炉管中进行硼扩散，从而在N型硅片的上表面形成P型层20。
其中，由于采用旋涂或丝网印刷的方式，如此保证了每片硅片的相应表面上能够均匀覆盖等量硼源，保证了扩散的均匀性。同时，本实施方式中，当存在多个硅片时，多个硅片在炉管中进行硼扩散，各个硅片之间无需保留大量的空间，如此保证了所在炉管具有较高的产能。
进一步地，在炉管中进行硼扩散时，是在氧气和氮气形成的混合气气氛下进行的，其中，氧气与氮气的体积比为1:5～1:20。进一步地，在炉管中进行硼扩散的条件为：扩散温度为850～1100℃，扩散时间为45min～2h，扩散方阻 为40～100Ω。
如图4所示，S3.去除硼硅玻璃，并在扩散硼20的表面制作掩膜22。
其中，硼硅玻璃是在进行硼扩散过程中形成的副产物，可采用HF溶液清洗去除硼硅玻璃。并采用PECVD法在扩散硼的表面制作氧化硅或氮化硅形成的掩膜，以对扩散硼的表面进行保护，防止后续制作步骤影响到扩散硼的表面。
如图5所示，S4.在N型硅片的下表面进行磷扩散，在下表面形成高低结结构40。
其中，高低结结构为N型双面电池的N+层，进一步地，进行磷扩散采用液态三氯氧磷作为磷源。进行磷扩散的条件为：扩散温度为800～900℃，扩散时间为30min～2h，扩散方阻为20～60Ω。
如图6所示，S5.去除磷硅玻璃，以及所述步骤S3中制作的掩膜22。
其中，磷硅玻璃是在进行磷扩散过程中形成的副产物，可采用HF溶液清洗去除硼硅玻璃。此外，在去除磷硅玻璃的同时，HF溶液将步骤S3中制作的掩膜也一同去除，从而暴露出制作的P型层。
如图7-9所示，S6.在扩散硼20的表面制作氧化铝31和氮化硅32形成的钝化减反膜30，在扩散磷40的表面制作氮化硅钝化减反膜50。
其中，本实施方式采用氧化铝31与氮化硅32的叠层钝化的方式，其中，氧化铝起到钝化作用，氮化硅起到保护及调整光学参数，降低反射率的作用。具体地，可采用PECVD或ALD法制作氧化铝和氮化硅形成的钝化减反膜30，采用PECVD法制作氮化硅钝化减反膜50。进一步地，氧化铝和氮化硅形成的钝化减反膜30的厚度为70～90nm，其中氧化铝31的厚度为5～30nm，氮化硅32的厚度为40～85nm。
如图10所示，S7.分别在所述氧化铝和氮化硅形成的钝化减反膜30以及氮化硅钝化减反膜50上制作电极60，获得所述N型双面电池。
其中，采用丝网印刷的方式，分别在所述氧化铝和氮化硅形成的钝化减 反膜以及氮化硅钝化减反膜上制作栅线状的电极，并烧结。优选地，氧化铝和氮化硅形成的钝化减反膜以及氮化硅钝化减反膜上的电极的位置相对设置。
进一步如图8、10所示，基于相同的技术构思，本发明还提供一种根据如上所述制作方法制作的N型双面电池，其包括：N型硅片衬底10、P型层20、第一钝化减反膜30、N+层40、第二钝化减反膜50、栅线电极60。
具体地，N型硅片衬底10的上下表面具有绒面，该绒面具有金字塔结构。
所述P型层20、第一钝化减反膜30依次设置于所述N型硅片衬底10的上表面，所述第一钝化减反膜30包括氧化铝31和氮化硅32，所述氧化铝31和氮化硅32依次层叠设置于所述P型层20上。氧化铝31和氮化硅32通过层叠方式形成的第一钝化减反膜30具有较好的钝化效果。本实施方式中，所述第一钝化减反膜30的厚度为70～90nm，所述第一钝化减反膜30中氧化铝31的厚度为5～30nm，氮化硅32的厚度为40～85nm。
所述N+层40、第二钝化减反膜50依次设置于所述N型硅片衬底10的下表面，也即述N型硅片衬底10的背面。且所述第二钝化减反膜50可以为氮化硅钝化减反膜。
所述栅线电极60为若干条，所述栅线电极60分别分布于所述第一钝化减反膜30和第二钝化减反膜50上，以便引出形成的电流。所述栅线电极60具体包括主栅线电极和副栅线电极优选地，位于第一钝化减反膜30和第二钝化减反膜50上的栅线电极60对称设置。其中，所述主栅线电极的根数为2～5根，宽度为0.5mm～2.5mm；所述副栅线电极的根数为50～150根，宽度为30um～150um。
综上所述，本发明的N型双面电池的制作方法工艺简单，有效地提高了电池的效率。其能够保证扩散的均匀性，且使得扩散时炉管的产能得到提高。同时，还能够有效控制硼源的涂布范围，在非扩散区域不会沾染到硼源，省去了后期的额外清洗步骤。
此外，此外，本发明的N型双面电池的钝化层制作方法属于低温工艺， 不会破坏PN结。且其采用钝化效果更好的氧化铝与氮化硅叠层钝化的方式，其中，氧化铝起到钝化作用，氮化硅起到保护及调整光学参数，降低反射率的作用。
对于本领域技术人员而言，显然本发明不限于上述示范性实施例的细节，而且在不背离本发明的精神或基本特征的情况下，能够以其他的具体形式实现本发明。因此，无论从哪一点来看，均应将实施例看作是示范性的，而且是非限制性的，本发明的范围由所附权利要求而不是上述说明限定，因此旨在将落在权利要求的等同要件的含义和范围内的所有变化囊括在本发明内。
此外，应当理解，虽然本说明书按照实施方式加以描述，但并非每个实施方式仅包含一个独立的技术方案，说明书的这种叙述方式仅仅是为清楚起见，本领域技术人员应当将说明书作为一个整体，各实施例中的技术方案也可以经适当组合，形成本领域技术人员可以理解的其他实施方式。

Claims (10)

  1. 一种N型双面电池的制作方法，其特征在于，所述N型双面电池的制作方法包括如下步骤：
    S1.利用碱溶液对N型硅片的上、下表面进行处理；
    S2.通过旋涂或丝网印刷的方式在所述N型硅片的上表面均匀涂上硼源，并在炉管中进行硼扩散；
    S3.去除硼硅玻璃，并在扩散硼的表面制作掩膜；
    S4.在N型硅片的下表面进行磷扩散，在下表面形成高低结结构；
    S5.去除磷硅玻璃，以及所述步骤S3中制作的掩膜；
    S6.在扩散硼的表面制作氧化铝和氮化硅形成的钝化减反膜，在扩散磷的表面制作氮化硅钝化减反膜；
    S7.分别在所述氧化铝和氮化硅形成的钝化减反膜以及氮化硅钝化减反膜上制作电极，获得所述N型双面电池。
  2. 根据权利要求1所述的N型双面电池的制作方法，其特征在于，所述步骤S1中，利用NaOH溶液去除损伤层，并在N型硅片的上、下表面进行制绒处理。
  3. 根据权利要求1所述的N型双面电池的制作方法，其特征在于，所述步骤S2中，在炉管中进行硼扩散是在氧气和氮气形成的混合气气氛下进行的，其中，氧气与氮气的体积比为1:5～1:20；
    在炉管中进行硼扩散的条件为：扩散温度为850～1100℃，扩散时间为45min～2h，扩散方阻为40～100Ω。
  4. 根据权利要求1所述的N型双面电池的制作方法，其特征在于，所述步骤S3中，采用HF溶液清洗去除硼硅玻璃，并采用PECVD法在扩散硼的表面制作氧化硅或氮化硅形成的掩膜。
  5. 根据权利要求1所述的N型双面电池的制作方法，其特征在于，所述步骤S4中，进行磷扩散的条件为：扩散温度为800～900℃，扩散时间为30min～2h，扩散方阻为20～60Ω。
  6. 根据权利要求1所述的N型双面电池的制作方法，其特征在于，所述步骤S6中，采用PECVD或ALD法制作氧化铝和氮化硅形成的钝化减反 膜，采用PECVD法制作氮化硅钝化减反膜。
  7. 根据权利要求1所述的N型双面电池的制作方法，其特征在于，所述步骤S7中，采用丝网印刷的方式，分别在所述氧化铝和氮化硅形成的钝化减反膜以及氮化硅钝化减反膜上制作栅线状的电极，并烧结。
  8. 一种N型双面电池，其特征在于，包括：N型硅片衬底、P型层、第一钝化减反膜、N+层、第二钝化减反膜、栅线电极；
    所述P型层、第一钝化减反膜依次设置于所述N型硅片衬底的上表面，所述第一钝化减反膜包括氧化铝和氮化硅，所述氧化铝和氮化硅依次层叠设置于所述P型层上；
    所述N+层、第二钝化减反膜依次设置于所述N型硅片衬底的下表面，所述第二钝化减反膜为氮化硅钝化减反膜；
    所述栅线电极为若干条，所述栅线电极分别分布于所述第一钝化减反膜和第二钝化减反膜上，所述栅线电极包括主栅线电极和副栅线电极，位于第一钝化减反膜和第二钝化减反膜上的主栅线电极对称设置。
  9. 根据权利要求8所述的N型双面电池，其特征在于，所述第一钝化减反膜的厚度为70～90nm，所述第一钝化减反膜中氧化铝的厚度为5～30nm，氮化硅的厚度为40～85nm。
  10. 根据权利要求8所述的N型双面电池，其特征在于，所述主栅线电极的根数为2～5根，宽度为0.5mm～2.5mm；所述副栅线电极的根数为50～150根，宽度为30um～150um。
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