WO2017000822A1 - 一种直接内存访问的传输控制方法及装置 - Google Patents

一种直接内存访问的传输控制方法及装置 Download PDF

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Publication number
WO2017000822A1
WO2017000822A1 PCT/CN2016/086758 CN2016086758W WO2017000822A1 WO 2017000822 A1 WO2017000822 A1 WO 2017000822A1 CN 2016086758 W CN2016086758 W CN 2016086758W WO 2017000822 A1 WO2017000822 A1 WO 2017000822A1
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Prior art keywords
dma
target
task
channel
priority
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English (en)
French (fr)
Inventor
陈昊
许慧锋
郭海涛
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Huawei Technologies Co Ltd
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Huawei Technologies Co Ltd
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Priority to EP16817186.6A priority Critical patent/EP3255553B1/en
Publication of WO2017000822A1 publication Critical patent/WO2017000822A1/zh
Priority to US15/797,605 priority patent/US10120820B2/en
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/18—Handling requests for interconnection or transfer for access to memory bus based on priority control
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • G06F13/30—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal with priority control
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/74—Selecting or encoding within a word the position of one or more bits having a specified value, e.g. most or least significant one or zero detection, priority encoders
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/76—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/76—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data
    • G06F7/78—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data for changing the order of data flow, e.g. matrix transposition or LIFO buffers; Overflow or underflow handling therefor
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5027—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
    • G06F9/5038—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals considering the execution order of a plurality of tasks, e.g. taking priority or time dependency constraints into consideration
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/28—DMA
    • G06F2213/2802—DMA using DMA transfer descriptors

Definitions

  • the present invention relates to the field of computer technologies, and in particular, to a transmission control method and apparatus for direct memory access.
  • Direct Memory Access is a fast data exchange mode that can be used between external devices and memory without going through a Central Processing Unit (CPU) and without CPU intervention. Direct data transfer.
  • the CPU In the DMA mode, the CPU only has to issue an instruction to the DMA transfer control device to allow the DMA transfer control device to process the data transfer, and then return the transfer end information to the CPU after the data transfer is completed, thus greatly reducing the CPU resource occupancy rate. Can greatly save system resources.
  • the DMA transfer control device performs data transmission through the DMA channel.
  • the DMA channel is provided with an input queue and an output queue.
  • the input queue and the output queue are each composed of a series of parameter registers for recording the transmission parameters of the target DMA task ( For example, data transfer size, destination address, source address, transfer progress, etc.), transfer data, etc., for example, if a data block of an external device is transferred to the memory, the DMA transfer control device transmits the data block to be transferred from the DMA channel.
  • the input queue input, and then the data block is output from the output queue of the DMA channel to the external device, and the data transmission has been completed. Since the CPU can perform other tasks in the process of data transfer by the DMA transfer control device, the processing efficiency of the computer system is also improved.
  • the existing DMA transfer control device is only a hardware unit responsible for data transfer. It performs tasks according to the input time sequence of the DMA task. For the DMA tasks with different priorities in the transfer process, even the emergency DMA appears. In the case of a task, the DMA task in the front row needs to be processed to process the higher priority DMA task or emergency DMA task. Therefore, the existing DMA technology cannot adjust the data transmission sequence according to the importance of the actual task. The order, which leads to a reduction in computer system processing efficiency and quality of service.
  • Embodiments of the present invention provide a transmission control method and apparatus for direct memory access, which can improve processing efficiency and service quality of a computer system.
  • a first aspect of the embodiments of the present invention provides a transmission control method for direct memory access, including:
  • the receiving, by the DMA, the DMA transmission request, before the DMA transmission request carries the target DMA task the method further includes:
  • Querying the priority of the target DMA task, and selecting, according to the priority of the target DMA task, a DMA channel corresponding to the priority of the target DMA from the DMA channel as the target channel including:
  • the DMA channel corresponding to the priority corresponds to the DMA channel corresponding to the priority of the target DMA task as the target channel.
  • the method further includes:
  • the determining, after the DMA task of the occupied channel, is different from the task type of the target DMA task include:
  • the determining, in the DMA task that is different from the task type of the target DMA task, whether there is a priority lower than the target DMA task After the level of DMA tasks it also includes:
  • the target data corresponding to the target DMA task is acquired, and the target data is obtained.
  • Input is performed through an input queue of the target channel, and the target data is output through an output queue of the target channel.
  • a second aspect of the embodiments of the present invention provides a transmission control method for direct memory access, including:
  • the receiving, by the DMA, the DMA transmission request, before the DMA transmission request carries the target DMA task the method further includes:
  • Querying the priority of the target DMA task, and selecting, according to the priority of the target DMA task, a DMA channel corresponding to the priority of the target DMA from the DMA channel as the target channel including:
  • Querying a priority of the target DMA task in a priority list of the DMA task and querying, by the DMA task priority and the DMA channel mapping relationship table, a DMA channel corresponding to a priority of the target DMA task, A DMA channel corresponding to the priority of the target DMA task is used as the target channel.
  • a third aspect of the embodiments of the present invention provides a direct memory access transmission control apparatus, including:
  • a receiving unit configured to receive a DMA transmission request, where the DMA transmission request carries a target DMA task
  • a first query unit configured to query a priority of the target DMA task, and select, according to a priority of the target DMA task, a DMA channel corresponding to a priority of the target DMA from the DMA channel as a target channel;
  • a first determining unit configured to determine whether there is a channel in the DMA channel that has been occupied by another DMA task
  • a second query unit configured to query a task type of the DMA task of the occupied channel and a task type of the target DMA task when there is a channel in the DMA channel that has been occupied by another DMA task;
  • a second determining unit configured to determine whether there is a DMA task that is different from the task type of the target DMA task in the DMA task of the occupied channel;
  • a third query unit configured to query, when the DMA task of the occupied channel is different from the task type of the target DMA task, the task type of the target DMA task is different The priority of the DMA task;
  • a third determining unit configured to determine whether there is a DMA task lower than a priority of the target DMA task in the DMA task that is different from the task type of the target DMA task;
  • a suspending unit configured to suspend the lower than the target DMA when there is a DMA task lower than a priority of the target DMA task in the DMA task different from the task type of the target DMA task Data transfer of the task's priority DMA task;
  • a first transmission unit configured to acquire target data of a target DMA task, input the target data through an input queue of the target channel, and pass the target data through the priority lower than the target DMA task
  • the output queue of the occupied channel corresponding to the DMA task is output.
  • the device further includes:
  • a pre-stored unit for pre-storing a priority list of DMA tasks, and a DMA task priority and DMA channel mapping relationship table
  • the first query unit is configured to query a priority of the target DMA task in a priority list of the DMA task, and query the target DMA from the DMA task priority and DMA channel mapping relationship table.
  • the DMA channel corresponding to the priority of the task uses the DMA channel corresponding to the priority of the target DMA task as the target channel.
  • the device further includes:
  • a second transmission unit configured to: when the DMA channel does not have a channel that has been occupied by another DMA task, acquire target data corresponding to the target DMA task, and input the target data through an input queue of the target channel, And outputting the target data through an output queue of the target channel.
  • the device further includes:
  • a third transmission unit configured to: when there is no DMA task that is different from the task type of the target DMA task in the DMA task of the occupied channel, acquire target data corresponding to the target DMA task, and use the target data Input through the input queue of the target channel, and The target data is output through an output queue of the target channel.
  • the device further includes:
  • a fourth transmission unit configured to acquire a target corresponding to the target DMA task when there is no DMA task lower than the priority of the target DMA task in the DMA task that is different from the task type of the target DMA task Data, inputting the target data through an input queue of the target channel, and outputting the target data through an output queue of the target channel.
  • a fourth aspect of the embodiments of the present invention provides a direct memory access transmission control apparatus, including:
  • a receiving unit configured to receive a DMA transmission request, where the DMA transmission request carries a target DMA task
  • a first query unit configured to query a priority of the target DMA task, and select, according to a priority of the target DMA task, a DMA channel corresponding to a priority of the target DMA from the DMA channel as a target channel;
  • a first determining unit configured to determine whether there is a channel in the DMA channel that has been occupied by another DMA task
  • a second query unit configured to query a priority of a DMA task of the occupied channel when there is a channel in the DMA channel that has been occupied by another DMA task;
  • a second determining unit configured to determine whether there is a DMA task lower than a priority of the target DMA task in the DMA task of the occupied channel
  • a suspending unit configured to suspend data of the DMA task lower than the priority of the target DMA task when there is a DMA task lower than the priority of the target DMA task in the DMA task of the occupied channel transmission;
  • a transmission unit configured to acquire target data of a target DMA task, input the target data through an input queue of the target channel, and pass the target data to the DMA that is lower than a priority of the target DMA task
  • the output queue of the occupied channel corresponding to the task is output.
  • the device further includes:
  • a pre-stored unit for pre-storing a priority list of DMA tasks, and a DMA task priority and DMA channel mapping relationship table
  • the first query unit is specifically configured to query a priority of the target DMA task in a priority list of the DMA task, from the DMA task priority and DMA channel mapping relationship table.
  • the DMA channel corresponding to the priority of the target DMA task is queried, and the DMA channel corresponding to the priority of the target DMA task is used as the target channel.
  • a target channel is selected according to the priority corresponding to the target DMA task, and in the case that there are other DMA tasks in the DMA channel, the query has been performed.
  • the task type, priority, and task type of the other DMA task occupying the channel, and compare the task type, priority, and task type and priority of the other DMA task of the occupied channel, according to the comparison.
  • the transmission data of the DMA channel is controlled, and the data transmission can be reasonably planned according to the priority of the DMA task and the task type. Even if an emergency DMA task is encountered, the processing can be prioritized, and the processing efficiency and service quality of the computer system are improved.
  • FIG. 1 is a structural diagram of a transmission control apparatus for direct memory access according to an embodiment of the present invention
  • FIG. 2 is a schematic flowchart of a transmission control method for direct memory access according to an embodiment of the present invention
  • FIG. 3 is a schematic flowchart of another direct memory access transmission control method according to an embodiment of the present invention.
  • FIG. 4 is a schematic flowchart of still another transmission control method for direct memory access according to an embodiment of the present invention.
  • FIG. 5 is a schematic flowchart of still another transmission control method for direct memory access according to an embodiment of the present invention.
  • FIG. 6 is a schematic structural diagram of a transmission control apparatus for direct memory access according to an embodiment of the present invention.
  • FIG. 7 is a schematic structural diagram of another transmission control device for direct memory access according to an embodiment of the present invention.
  • FIG. 8 is a schematic structural diagram of another transmission control apparatus for direct memory access according to an embodiment of the present invention.
  • FIG. 9 is a schematic structural diagram of another transmission control apparatus for direct memory access according to an embodiment of the present invention.
  • FIG. 1 is a structural diagram of a transmission control apparatus for direct memory access according to an embodiment of the present invention.
  • the direct memory access transmission control apparatus 1 of this embodiment includes a DMA channel 11, and the DMA channel 11 includes at least one DMA channel for data transmission, and each DMA channel includes an input queue 111. And output queue 112.
  • the input queue 111 and the output queue 112 are each composed of a series of parameter registers for recording transmission parameters of the target DMA task (for example, data transmission size, destination address, source address, transmission progress, etc.), transmission of data, etc., where feasible.
  • the specific process of data transmission is: the transmission control device 1 of the direct memory access receives the DMA transmission request, the DMA transmission request carries the target DMA task, and the transmission control device 1 of the direct memory access queries the target DMA task Priority, and according to the priority of the target DMA task, select a DMA channel corresponding to the priority of the target DMA from the DMA channel 11 as a target channel, and acquire target data of the target DMA task,
  • the target data is input from the input queue of the target channel, and the target data is output from the output queue of the target channel, that is, the data transmission corresponding to the DMA transmission request is completed.
  • FIG. 1 is a schematic flowchart diagram of a transmission control method for direct memory access according to an embodiment of the present invention. As shown in FIG. 1, the method of the embodiment of the present invention may include the following steps S201 to S208.
  • the transmission control device of the direct memory access receives the DMA transfer request, the DMA The transfer request carries a target DMA task, and the target DMA task is obtained from the DMA transfer request.
  • the external device wants to directly transfer data to the memory through the bus, the external device first sends a DMA transmission request signal to the CPU through the transmission control device of the direct memory access, that is, the transmission control device of the direct memory access.
  • the CPU is requested to take over the control of the bus, and when the CPU receives the request and responds to the DMA transfer request, it gives up control of the bus.
  • the transmission control device of the direct memory access can process the DMA transfer request and acquire the The target DMA task carried in the DMA transfer request is used for data transmission.
  • S202 Query a priority of the target DMA task, and select, according to a priority of the target DMA task, a DMA channel corresponding to a priority of the target DMA from the DMA channel as a target channel.
  • the transmission control device of the direct memory access queries the priority of the target DMA task, and selects a DMA corresponding to the priority of the target DMA from the DMA channel according to the priority of the target DMA task.
  • the channel acts as the target channel.
  • the transmission control device for the direct memory access may set different priorities for different DMA tasks of different applications in advance.
  • the DMA task with a large amount of data transmission has a lower priority, and the DMA with a small amount of data is transmitted.
  • the task setting has a higher priority, so that the DMA task with a small amount of data transmission can be completed in time, and the processing efficiency of the computer system is improved.
  • the transmission control device of the direct memory access selects a DMA channel corresponding to the priority of the target DMA from the DMA channel as a target channel according to the priority of the target DMA task, to pass the target channel pair
  • the target DMA task performs data transmission.
  • the transmission control device of the direct memory access determines whether there is a channel in the DMA channel that has been occupied by other DMA tasks.
  • the DMA channel includes at least one DMA channel for data transmission, and the transmission control device of the direct memory access determines whether there are channels occupied by other DMA tasks in the channel other than the target channel.
  • the transmission control device of the direct memory access queries the task type of the DMA task of the occupied channel to And the task type of the target DMA task.
  • the task type can be divided into a bandwidth type task and a time delay type task, the bandwidth type task pays attention to the data amount processed per unit time, and the time delay type task pays attention to the processing time of the unit task.
  • the task type can also be divided into Online Transaction Processing (OLTP) and Online Analytical Processing (OLAP), where OLTP is based on small tasks and small queries.
  • the performance parameters of the OLTP system are single-task response time, such as online booking of online systems.
  • OLAP is mainly for large tasks, mainly for multi-dimensional statistical analysis of historical data.
  • the processing time of tasks is very long, measuring OLAP.
  • the performance parameter of the system is the total amount of data processed per unit time.
  • the transmission control device of the direct memory access has recorded the task types of different DMA tasks of different applications, and can record the task type corresponding to the DMA task by recording.
  • the transmission control device of the direct memory access determines whether there is a DMA task in the occupied channel according to the queried task type of the DMA task of the occupied channel and the task type of the target DMA task.
  • the DMA task of the target DMA task has a different task type.
  • the transmission control device of the direct memory access queries the target DMA task The priority of DMA tasks with different task types.
  • the transmission control device of the direct memory access determines the priority processing order of the DMA task according to the task type and priority.
  • the transmission control device of the direct memory access determines whether there is a DMA task lower than the priority of the target DMA task in the DMA task that is different from the task type of the target DMA task.
  • the transmission control device of the direct memory access is suspended.
  • the DMA task lower than the priority of the target DMA task is divided into multiple small tasks, the current time is even if the DMA task is lower than the priority of the target DMA task.
  • the transmission control device of the direct memory access acquires target data of the target DMA task, inputs the target data through an input queue of the target channel, and passes the target data through the target DMA task
  • the output queue of the occupied channel corresponding to the priority DMA task is output. It can be understood that, after the output of the target DMA task is completed, a signal for outputting the data transmission corresponding to the target DMA task is sent to the CPU, so that the bus control is returned to the CPU.
  • the transmission control method for direct memory access introduced in the embodiment of the present invention may be applied to a case where an external device is connected to one of the DMA channels of the direct memory access transmission control device, that is, if The external device receives data and can only receive data from the output queue of the DMA transmission channel. If the external device transmits data, data can only be transmitted from the input queue of the DMA channel. For example, when the external device A is connected to the DMA channel 1 and the external device B is connected to the DMA channel 1, the external device A issues a transfer request of the DMA task 1, and the DMA task 1 transmits the data of the memory to the external device according to the DMA task 1.
  • the priority is assigned to the target channel (the target channel is not limited to DMA channel 1 because the data is transferred from the memory to the DMA channel, so the channel for data input is not limited), and the DMA task 2 corresponding to the external device B Processing in DMA channel 1, and DMA task 1 task type and DMA task 2
  • the task type is different, the priority of DMA task 1 is higher than the priority of DMA task 2. Since the priority of DMA task 1 and the output queue of the two tasks are the same, the data transmission of DMA task 2 is suspended, and DMA task 1 is acquired. The data is input through the input queue of the target channel, and the target data is output through the output queue of the DMA channel 1.
  • a target channel is selected according to the priority corresponding to the target DMA task, and in the case that there are other DMA tasks in the DMA channel, the query has been performed.
  • the task type, priority, and task type of the other DMA task occupying the channel, and compare the task type, priority, and task type and priority of the other DMA task of the occupied channel, according to the comparison.
  • the transmission data of the DMA channel is controlled, and the data transmission can be reasonably planned according to the priority of the DMA task and the task type. Even if an emergency DMA task is encountered, the processing can be prioritized, and the processing efficiency and service quality of the computer system are improved.
  • FIG. 3 is a schematic flowchart diagram of a transmission control method for direct memory access according to an embodiment of the present invention. As shown in FIG. 3, the method in the embodiment of the present invention may include the following steps S301 to S310.
  • S301 Pre-save a priority list of the DMA task, and a DMA task priority and a DMA channel mapping relationship table.
  • the transmission control device for direct memory access pre-stores the priority list of the DMA task, and the DMA task priority and DMA channel mapping relationship table.
  • the direct memory access transmission control device sets different priorities for different DMA tasks, sets different priorities for different DMA channels, and can receive changes to the DMA task priority and the DMA channel priority.
  • the DMA channel includes at least one channel for data transmission.
  • the transmission control device of the direct memory access sets a priority for each channel, and the priority of the DMA task may be determined according to the size of the transmitted data, and the priority of the data volume is small, and the data volume is high.
  • the large priority is high, and the data is divided into different priorities according to the size of the data, and the priority corresponding to the data amount is matched with the priority set by the DMA channel, and the priority list of the DMA task and the DMA task priority are The DMA channel mapping relationship table is saved.
  • the transmission control device of the direct memory access receives a DMA transfer request, and the DMA transfer request carries a target DMA task, and acquires a target DMA task from the DMA transfer request.
  • the external device wants to directly transfer data to the memory through the bus, the external device first sends a DMA transmission request signal to the CPU through the transmission control device of the direct memory access, that is, the transmission control device of the direct memory access.
  • the CPU is requested to take over the control of the bus, and when the CPU receives the request and responds to the DMA transfer request, it gives up control of the bus.
  • the transmission control device of the direct memory access can process the DMA transfer request and acquire the The target DMA task carried in the DMA transfer request is used for data transmission.
  • S303 Query a priority of the target DMA task, and select, according to a priority of the target DMA task, a DMA channel corresponding to a priority of the target DMA from the DMA channel as a target channel.
  • the transmission control device of the direct memory access queries the priority of the target DMA task in the priority list of the DMA task, and queries and queries from the DMA task priority and DMA channel mapping relationship table.
  • the DMA channel corresponding to the priority of the target DMA task uses the DMA channel corresponding to the priority of the target DMA task as the target channel.
  • the transmission control device of the direct memory access determines whether there is a channel in the DMA channel that has been occupied by other DMA tasks.
  • the DMA channel includes at least one DMA channel for data transmission, and the transmission control device of the direct memory access determines whether there are channels occupied by other DMA tasks in the channel other than the target channel. If there is a channel in the DMA channel that has been occupied by other DMA tasks, step S305 is performed. If there is no channel in the DMA channel that has been occupied by other DMA tasks, step S310 is performed.
  • the transmission control device of the direct memory access queries the task type of the DMA task of the occupied channel and the task type of the target DMA task.
  • the task type can be divided into a bandwidth type task and a time delay type task, the bandwidth type task pays attention to the amount of data processed per unit time, and the time delay type task pays attention to the single type.
  • the processing time of the bit task In the feasible solution, the task type can also be divided into OLTP and OLAP.
  • OLTP is mainly based on small tasks and small queries.
  • the performance parameter of the OLTP system is measured as the response time of a single task, such as online booking of online systems.
  • OLAP is based on large tasks, mainly for multi-dimensional statistical analysis of historical data, the processing time of tasks is very long, measuring the performance parameters of OLAP system is the total amount of data processed per unit time.
  • the transmission control device of the direct memory access has recorded the task types of different DMA tasks of different applications, and can record the task type corresponding to the DMA task by recording.
  • the transmission control device of the direct memory access determines whether there is a DMA task in the occupied channel according to the queried task type of the DMA task of the occupied channel and the task type of the target DMA task.
  • the DMA task of the target DMA task has a different task type. If there is a DMA task that is different from the task type of the target DMA task in the DMA task of the occupied channel, step S307 is performed, if the target is not present in the DMA task of the occupied channel If the task type of the DMA task is different from the DMA task, step S310 is performed.
  • the transmission control device of the direct memory access queries the target DMA task The priority of DMA tasks with different task types.
  • the transmission control device of the direct memory access determines the priority processing order of the DMA task according to the task type and priority.
  • the transmission control device of the direct memory access determines whether there is a DMA task lower than the priority of the target DMA task in the DMA task that is different from the task type of the target DMA task. If there is a DMA task lower than the priority of the target DMA task in the DMA task that is different from the task type of the target DMA task, step S309 is performed, If not, step S310 is performed.
  • the transmission control device of the direct memory access is suspended.
  • the DMA task lower than the priority of the target DMA task is divided into multiple small tasks, the current time is even if the DMA task is lower than the priority of the target DMA task.
  • the transmission control device of the direct memory access acquires target data of the target DMA task, inputs the target data through an input queue of the target channel, and passes the target data through the target DMA task
  • the output queue of the occupied channel corresponding to the priority DMA task is output. It can be understood that, after the output of the target DMA task is completed, a signal for outputting the data transmission corresponding to the target DMA task is sent to the CPU, so that the bus control is returned to the CPU.
  • the transmission control method for direct memory access introduced in the embodiment of the present invention may be applied to a case where an external device is connected to one of the DMA channels of the direct memory access transmission control device, that is, if The external device receives data and can only receive data from the output queue of the DMA transmission channel. If the external device transmits data, data can only be transmitted from the input queue of the DMA channel. For example, when the external device A is connected to the DMA channel 1 and the external device B is connected to the DMA channel 1, the external device A issues a transfer request of the DMA task 1, and the DMA task 1 transmits the data of the memory to the external device according to the DMA task 1.
  • the priority is assigned to the target channel (the target channel is not limited to DMA channel 1 because the data is transferred from the memory to the DMA channel, so the channel for data input is not limited), and the DMA task 2 corresponding to the external device B Being processed in DMA channel 1, and the task type of DMA task 1 is different from the task type of DMA task 2, the priority of DMA task 1 is higher than the priority of DMA task 2, due to the need
  • DMA task 1 and the output queues of the two tasks are the same, thus suspending the data transfer of DMA task 2, and acquiring the data of DMA task 1, inputting the data of DMA task 1 through the input queue of the target channel, and The target data is output through the output queue of the DMA channel 1.
  • S310 Input the target data through an input queue of the target channel, and output the target data through an output queue of the target channel.
  • the transmission control device of the direct memory access inputs the target data through an input queue of the target channel, and outputs the target data through an output queue of the target channel.
  • the transmission control device of the direct memory access acquires target data corresponding to the target DMA task, and passes the target data through the An input queue of the target channel is input, and the target data is output through an output queue of the target channel.
  • the direct memory access transmission control device acquires the target DMA task.
  • the target data is input through an input queue of the target channel, and the target data is output through an output queue of the target channel.
  • the direct memory access The transmission control device acquires target data corresponding to the target DMA task, inputs the target data through an input queue of the target channel, and outputs the target data through an output queue of the target channel.
  • a target channel is selected according to the priority corresponding to the target DMA task, and in the case that there are other DMA tasks in the DMA channel, the query has been performed.
  • the task type, priority, and task type of the other DMA task occupying the channel, and compare the task type, priority, and task type and priority of the other DMA task of the occupied channel, according to the comparison.
  • the transmission data of the DMA channel is controlled, and the data transmission can be reasonably planned according to the priority of the DMA task and the task type. Even if an emergency DMA task is encountered, the processing can be prioritized, and the processing efficiency and service quality of the computer system are improved.
  • FIG. 4 it is a schematic flowchart of a transmission control method for direct memory access according to an embodiment of the present invention. As shown in FIG. 4, the method of the embodiment of the present invention may include the following steps S401-S406.
  • the transmission control device of the direct memory access receives the DMA transfer request, and the DMA transfer request carries the target DMA task, and acquires the target DMA task from the DMA transfer request.
  • the external device wants to directly transfer data to the memory through the bus, the external device first sends a DMA transmission request signal to the CPU through the transmission control device of the direct memory access, that is, the transmission control device of the direct memory access.
  • the CPU is requested to take over the control of the bus, and when the CPU receives the request and responds to the DMA transfer request, it gives up control of the bus.
  • the transmission control device of the direct memory access can process the DMA transfer request and acquire the The target DMA task carried in the DMA transfer request is used for data transmission.
  • S402. Query the priority of the target DMA task, and select a DMA channel corresponding to the priority of the target DMA from the DMA channel as the target channel according to the priority of the target DMA task.
  • the transmission control device of the direct memory access queries the priority of the target DMA task, and selects a DMA corresponding to the priority of the target DMA from the DMA channel according to the priority of the target DMA task.
  • the channel acts as the target channel.
  • the transmission control device for the direct memory access may set different priorities for different DMA tasks of different applications in advance.
  • the DMA task with a large amount of data transmission has a lower priority, and the DMA with a small amount of data is transmitted.
  • the task setting has a higher priority, so that the DMA task with a small amount of data transmission can be completed in time, and the processing efficiency of the computer system is improved.
  • the transmission control device of the direct memory access selects a DMA channel corresponding to the priority of the target DMA from the DMA channel as a target channel according to the priority of the target DMA task, to pass the target channel pair
  • the target DMA task performs data transmission.
  • the transmission control device of the direct memory access determines whether there is a channel in the DMA channel that has been occupied by other DMA tasks.
  • the DMA channel includes at least one for data
  • the transmission control device of the direct memory access determines whether there are channels occupied by other DMA tasks in the channel other than the target channel.
  • the transmission control device of the direct memory access queries the priority of the DMA task of the occupied channel.
  • the transmission control device of the direct memory access determines the processing order of the DMA task according to the priority.
  • the transmission control device of the direct memory access determines whether there is a DMA task lower than the priority of the target DMA task in the DMA task of the occupied channel.
  • the transmission control device of the direct memory access suspends the lower than the target DMA task.
  • Priority DMA task data transfer when the DMA task lower than the priority of the target DMA task is divided into multiple small tasks, the current time is even if the DMA task is lower than the priority of the target DMA task.
  • the transmission control device of the direct memory access acquires target data of the target DMA task, inputs the target data through an input queue of the target channel, and passes the target data through the target DMA task
  • the output queue of the occupied channel corresponding to the priority DMA task is output. It can be understood that, after the output of the target DMA task is completed, a signal for outputting the data transmission corresponding to the target DMA task is sent to the CPU, so that the bus control is returned to the CPU.
  • the transmission control method for direct memory access introduced in the embodiment of the present invention may be applied to a case where an external device is connected to one of the DMA channels of the direct memory access transmission control device, that is, if The external device receives data and can only receive data from the output queue of the DMA transmission channel. If the external device transmits data, data can only be transmitted from the input queue of the DMA channel. For example, when the external device A is connected to the DMA channel 1 and the external device B is connected to the DMA channel 1, the external device A issues a transfer request of the DMA task 1, and the DMA task 1 transmits the data of the memory to the external device according to the DMA task 1.
  • the priority is assigned to the target channel (the target channel is not limited to DMA channel 1 because the data is transferred from the memory to the DMA channel, so the channel for data input is not limited), and the DMA task 2 corresponding to the external device B Is being processed in DMA channel 1, and the priority of DMA task 1 is higher than the priority of DMA task 2. Since DMA task 1 needs to be processed first and the output queues of the two tasks are the same, data transmission of DMA task 2 is suspended, and The data of the DMA task 1 is acquired, the data of the DMA task 1 is input through the input queue of the target channel, and the target data is output through the output queue of the DMA channel 1.
  • a target channel is selected according to the priority corresponding to the target DMA task, and in the case that there are other DMA tasks in the DMA channel, the query has been performed.
  • the priority of other DMA tasks occupying the channel, and the priority of other DMA tasks of the occupied channel and the priority of the target DMA task are compared, and the transmission data of the DMA channel is controlled according to the comparison result, which can be implemented according to the DMA task.
  • the data is transmitted with reasonable priority, and even if it encounters urgent DMA tasks, it can be prioritized, which improves the processing efficiency and service quality of the computer system.
  • FIG. 5 is a schematic flowchart of a transmission control method for direct memory access according to an embodiment of the present invention. As shown in FIG. 5, the method in the embodiment of the present invention may include the following steps S501 to S507.
  • S501 Pre-save the priority list of the DMA task, and the DMA task priority and DMA channel mapping relationship table.
  • the transmission control device for direct memory access pre-stores the priority list of the DMA task, and the DMA task priority and DMA channel mapping relationship table. Transmission control of the direct memory access The device sets different priorities for different DMA tasks, sets different priorities for different DMA channels, and can receive changes to DMA task priorities and DMA channel priorities.
  • the DMA channel includes at least one channel for data transmission.
  • the transmission control device of the direct memory access sets a priority for each channel, and the priority of the DMA task may be determined according to the size of the transmitted data, and the priority of the data volume is small, and the data volume is high.
  • the large priority is high, and the data is divided into different priorities according to the size of the data, and the priority corresponding to the data amount is matched with the priority set by the DMA channel, and the priority list of the DMA task and the DMA task priority are The DMA channel mapping relationship table is saved.
  • the transmission control device of the direct memory access receives a DMA transfer request, and the DMA transfer request carries a target DMA task, and acquires a target DMA task from the DMA transfer request.
  • the external device wants to directly transfer data to the memory through the bus, the external device first sends a DMA transmission request signal to the CPU through the transmission control device of the direct memory access, that is, the transmission control device of the direct memory access.
  • the CPU is requested to take over the control of the bus, and when the CPU receives the request and responds to the DMA transfer request, it gives up control of the bus.
  • the transmission control device of the direct memory access can process the DMA transfer request and acquire the The target DMA task carried in the DMA transfer request is used for data transmission.
  • the transmission control device of the direct memory access queries the priority of the target DMA task in the priority list of the DMA task, and queries and queries from the DMA task priority and DMA channel mapping relationship table.
  • the DMA channel corresponding to the priority of the target DMA task uses the DMA channel corresponding to the priority of the target DMA task as the target channel.
  • the transmission control device of the direct memory access determines whether there is a channel in the DMA channel that has been occupied by other DMA tasks.
  • the DMA channel includes at least one DMA channel for data transmission, and the transmission control device of the direct memory access determines whether there are channels occupied by other DMA tasks in the channel other than the target channel.
  • the transmission control device of the direct memory access queries the priority of the DMA task of the occupied channel.
  • the transmission control device of the direct memory access determines the processing order of the DMA task according to the priority.
  • S506. Determine whether there is a DMA task lower than a priority of the target DMA task in the DMA task of the occupied channel.
  • the transmission control device of the direct memory access determines whether there is a DMA task lower than the priority of the target DMA task in the DMA task of the occupied channel.
  • the transmission control device of the direct memory access suspends the lower than the target DMA task.
  • Priority DMA task data transfer when the DMA task lower than the priority of the target DMA task is divided into multiple small tasks, the current time is even if the DMA task is lower than the priority of the target DMA task.
  • the transmission control device of the direct memory access acquires target data of the target DMA task, inputs the target data through an input queue of the target channel, and passes the target data through the target DMA task
  • the output queue of the occupied channel corresponding to the priority DMA task is output. It can be understood that, after the output of the target DMA task is completed, a signal for outputting the data transmission corresponding to the target DMA task is sent to the CPU, so that the bus control is returned to the CPU.
  • the target data corresponding to the target DMA task is acquired, and the target data is passed.
  • An input queue of the target channel is input, and the target data is output through an output queue of the target channel.
  • the target data corresponding to the target DMA task is acquired, and the target data is obtained. Input is performed through an input queue of the target channel, and the target data is output through an output queue of the target channel.
  • the transmission control method for direct memory access introduced in the embodiment of the present invention may be applied to a case where an external device is connected to one of the DMA channels of the direct memory access transmission control device, that is, if The external device receives data and can only receive data from the output queue of the DMA transmission channel. If the external device transmits data, data can only be transmitted from the input queue of the DMA channel. For example, when the external device A is connected to the DMA channel 1 and the external device B is connected to the DMA channel 1, the external device A issues a transfer request of the DMA task 1, and the DMA task 1 transmits the data of the memory to the external device according to the DMA task 1.
  • the priority is assigned to the target channel (the target channel is not limited to DMA channel 1 because the data is transferred from the memory to the DMA channel, so the channel for data input is not limited), and the DMA task 2 corresponding to the external device B Is being processed in DMA channel 1, and the priority of DMA task 1 is higher than the priority of DMA task 2. Since DMA task 1 needs to be processed first and the output queues of the two tasks are the same, data transmission of DMA task 2 is suspended, and The data of the DMA task 1 is acquired, the data of the DMA task 1 is input through the input queue of the target channel, and the target data is output through the output queue of the DMA channel 1.
  • a target channel is selected according to the priority corresponding to the target DMA task, and in the case that there are other DMA tasks in the DMA channel, the query has been performed.
  • the priority of other DMA tasks occupying the channel, and the priority of other DMA tasks of the occupied channel and the priority of the target DMA task are compared, and the transmission data of the DMA channel is controlled according to the comparison result, which can be implemented according to the DMA task.
  • the data is transmitted with reasonable priority, and even if it encounters urgent DMA tasks, it can be prioritized, which improves the processing efficiency and service quality of the computer system.
  • the transmission control device for direct memory access provided by the embodiment of the present invention will be described in detail below with reference to FIG. 6 to FIG. It should be noted that the direct memory access shown in FIG. 4 to FIG. 5 is transmitted.
  • the control device for performing the method of the embodiment shown in FIG. 2 to FIG. 5 of the present invention For the convenience of description, only the parts related to the embodiment of the present invention are shown. For the specific technical details not disclosed, please refer to the figure of the present invention. 2-The embodiment shown in FIG.
  • FIG. 6 is a schematic structural diagram of a transmission control apparatus for direct memory access according to an embodiment of the present invention.
  • the direct memory access transmission control apparatus 6 of the embodiment of the present invention may include: a receiving unit 601, a first query unit 602, a first determining unit 603, a second query unit 604, and a second determining unit. 605.
  • the receiving unit 601 is configured to receive a DMA transmission request, where the DMA transmission request carries a target DMA task.
  • the receiving unit 601 receives a DMA transmission request, where the DMA transmission request carries a target DMA task, and acquires a target DMA task from the DMA transmission request.
  • the external device wants to directly transfer data to the memory through the bus, the external device first sends a DMA transmission request signal to the CPU through the transmission control device of the direct memory access, that is, requests the CPU to take over the control of the bus.
  • the transfer control device of the direct memory access may process the DMA transfer request to acquire the target DMA carried in the DMA transfer request. Task for data transfer.
  • the first query unit 602 is configured to query a priority of the target DMA task, and select, according to the priority of the target DMA task, a DMA channel corresponding to the priority of the target DMA from the DMA channel as a target channel. .
  • the first query unit 602 queries the priority of the target DMA task, and selects a DMA channel corresponding to the priority of the target DMA from the DMA channel according to the priority of the target DMA task. As the target channel.
  • the first query unit 602 can set different priorities for different DMA tasks of different applications in advance. In the alternative scheme, the DMA task with a large amount of data transmission has a lower priority, and the DMA task with a small amount of data is set. The priority is higher, so that the DMA task with a small amount of data transmission can be completed in time, and the processing efficiency of the computer system is improved.
  • the first query unit 602 selects, according to the priority of the target DMA task, a DMA channel corresponding to the priority of the target DMA from the DMA channel as a target channel, Data transmission is performed on the target DMA task through the target channel.
  • the first determining unit 603 is configured to determine whether there is a channel in the DMA channel that has been occupied by other DMA tasks.
  • the first determining unit 603 determines whether there is a channel in the DMA channel that has been occupied by other DMA tasks.
  • the DMA channel includes at least one DMA channel for data transmission, and the transmission control device of the direct memory access determines whether there are channels occupied by other DMA tasks in the channel other than the target channel.
  • the second query unit 604 is configured to query a task type of the DMA task of the occupied channel and a task type of the target DMA task when there is a channel in the DMA channel that has been occupied by other DMA tasks.
  • the second query unit 604 queries the task type of the DMA task of the occupied channel and the target.
  • the task type of the DMA task can be divided into a bandwidth type task and a time delay type task, the bandwidth type task pays attention to the data amount processed per unit time, and the time delay type task pays attention to the processing time of the unit task.
  • the task type can also be divided into OLTP and OLAP.
  • OLTP is mainly based on small tasks and small queries.
  • the performance parameter of the OLTP system is measured as the response time of a single task, such as online booking of online systems.
  • OLAP is based on large tasks, mainly for multi-dimensional statistical analysis of historical data, the processing time of tasks is very long, measuring the performance parameters of OLAP system is the total amount of data processed per unit time.
  • the task types of different DMA tasks for different applications have been recorded, and the second query unit 604 can query the task type corresponding to the DMA task by recording.
  • the second determining unit 605 is configured to determine whether there is a DMA task that is different from the task type of the target DMA task in the DMA task of the occupied channel.
  • the second determining unit 605 determines whether there is a DMA task in the occupied channel.
  • the DMA task of the target DMA task has different task types.
  • the third query unit 606 is configured to query, when the DMA task of the occupied channel has a DMA task that is different from the task type of the target DMA task, querying the task type of the target DMA task is different. The priority of the DMA task.
  • the third query unit 606 queries the The priority of the DMA task that is different from the task type of the target DMA task is used to determine the priority processing order of the DMA task according to the task type and priority.
  • the third determining unit 607 is configured to determine whether there is a DMA task lower than the priority of the target DMA task in the DMA task that is different from the task type of the target DMA task.
  • the third determining unit 607 determines whether there is a DMA task lower than the priority of the target DMA task in the DMA task that is different from the task type of the target DMA task.
  • a suspending unit 608 configured to suspend the lower than the target when there is a DMA task lower than a priority of the target DMA task in the DMA task different from the task type of the target DMA task Data transfer of DMA tasks with priority of DMA tasks.
  • the suspend unit 608 suspends data transfer of the DMA task that is lower than the priority of the target DMA task.
  • the DMA task lower than the priority of the target DMA task is divided into multiple small tasks, the current time is even if the DMA task is lower than the priority of the target DMA task.
  • the first transmission unit 609 is configured to acquire target data of the target DMA task, input the target data through an input queue of the target channel, and pass the target data through the priority lower than the target DMA task.
  • the output queue of the occupied channel corresponding to the DMA task of the level is output.
  • the first transmission unit 609 acquires target data of the target DMA task, and passes the target data through the target. Inputting an input queue of the channel, and passing the target data through the occupied channel corresponding to the priority of the target DMA task Out of the queue for output. It can be understood that, after the output of the target DMA task is completed, a signal for outputting the data transmission corresponding to the target DMA task is sent to the CPU, so that the bus control is returned to the CPU.
  • the transmission control method for direct memory access introduced in the embodiment of the present invention may be applied to a case where an external device is connected to one of the DMA channels of the direct memory access transmission control device, that is, if The external device receives data and can only receive data from the output queue of the DMA transmission channel. If the external device transmits data, data can only be transmitted from the input queue of the DMA channel. For example, when the external device A is connected to the DMA channel 1 and the external device B is connected to the DMA channel 1, the external device A issues a transfer request of the DMA task 1, and the DMA task 1 transmits the data of the memory to the external device according to the DMA task 1.
  • the priority is assigned to the target channel (the target channel is not limited to DMA channel 1 because the data is transferred from the memory to the DMA channel, so the channel for data input is not limited), and the DMA task 2 corresponding to the external device B Being processed in DMA channel 1, and the task type of DMA task 1 is different from the task type of DMA task 2, the priority of DMA task 1 is higher than the priority of DMA task 2, because DMA task 1 and two tasks need to be processed first.
  • the output queues are the same, so the data transfer of DMA task 2 is suspended, and the data of DMA task 1 is acquired, the data of DMA task 1 is input through the input queue of the target channel, and the target data is passed through DMA channel 1.
  • the output queue is output.
  • a target channel is selected according to the priority corresponding to the target DMA task, and in the case that there are other DMA tasks in the DMA channel, the query has been performed.
  • the task type, priority, and task type of the other DMA task occupying the channel, and compare the task type, priority, and task type and priority of the other DMA task of the occupied channel, according to the comparison.
  • the transmission data of the DMA channel is controlled, and the data transmission can be reasonably planned according to the priority of the DMA task and the task type. Even if an emergency DMA task is encountered, the processing can be prioritized, and the processing efficiency and service quality of the computer system are improved.
  • FIG. 7 is a schematic structural diagram of a transmission control apparatus for direct memory access according to an embodiment of the present invention.
  • the direct memory access transmission control device of the embodiment of the present invention 7 may include: a pre-stored unit 701, a receiving unit 702, a first query unit 703, a first determining unit 704, a second transmitting unit 705, a second query unit 706, a second determining unit 707, a third transmitting unit 708, and a third The inquiry unit 709, the third determination unit 710, the fourth transmission unit 711, the suspension unit 712, and the first transmission unit 713.
  • a pre-stored unit 701 configured to pre-store a priority list of the DMA task, and a DMA task priority and a DMA channel mapping relationship table;
  • the pre-stored unit 701 pre-stores a priority list of the DMA task, and a DMA task priority and a DMA channel mapping relationship table.
  • the direct memory access transmission control device sets different priorities for different DMA tasks, sets different priorities for different DMA channels, and can receive changes to the DMA task priority and the DMA channel priority.
  • the DMA channel includes at least one channel for data transmission.
  • the transmission control device of the direct memory access sets a priority for each channel, and the priority of the DMA task may be determined according to the size of the transmitted data, and the priority of the data volume is small, and the data volume is high.
  • the large priority is high, and the data is divided into different priorities according to the size of the data, and the priority corresponding to the data amount is matched with the priority set by the DMA channel, and the priority list of the DMA task and the DMA task priority are The DMA channel mapping relationship table is saved.
  • the receiving unit 702 is configured to receive a DMA transmission request, where the DMA transmission request carries a target DMA task;
  • the receiving unit 702 receives a DMA transmission request, where the DMA transmission request carries a target DMA task, and acquires a target DMA task from the DMA transmission request.
  • the external device wants to directly transfer data to the memory through the bus, the external device first sends a DMA transmission request signal to the CPU through the transmission control device of the direct memory access, that is, the transmission control device of the direct memory access.
  • the CPU is requested to take over the control of the bus, and when the CPU receives the request and responds to the DMA transfer request, it gives up control of the bus.
  • the transmission control device of the direct memory access can process the DMA transfer request and acquire the The target DMA task carried in the DMA transfer request is used for data transmission.
  • the first query unit 703 is configured to query a priority of the target DMA task, and select, according to the priority of the target DMA task, a DMA channel corresponding to the priority of the target DMA from the DMA channel as a target channel. ;
  • the first query unit 703 queries the priority of the target DMA task in the priority list of the DMA task, and queries and targets the target from the DMA task priority and DMA channel mapping relationship table.
  • a DMA channel corresponding to the priority of the DMA task, and a DMA channel corresponding to the priority of the target DMA task is used as the target channel.
  • the first determining unit 704 is configured to determine whether there is a channel in the DMA channel that has been occupied by another DMA task;
  • the first determining unit 704 determines whether there is a channel in the DMA channel that has been occupied by other DMA tasks.
  • the DMA channel includes at least one DMA channel for data transmission, and the first determining unit 704 determines whether there are channels occupied by other DMA tasks in the channels other than the target channel. If there is a channel in the DMA channel that has been occupied by other DMA tasks, the second transmission unit 705 is executed. If there is no channel in the DMA channel that has been occupied by other DMA tasks, the second query unit 706 is executed.
  • the second transmission unit 705 is configured to: when there is no channel in the DMA channel that has been occupied by another DMA task, acquire target data corresponding to the target DMA task, and input the target data through the input queue of the target channel. And outputting the target data through an output queue of the target channel.
  • the second transmission unit 705 acquires target data corresponding to the target DMA task, and the target is Data is input through an input queue of the target channel, and the target data is output through an output queue of the target channel.
  • the second query unit 706 is configured to query a task type of the DMA task of the occupied channel and a task type of the target DMA task when there is a channel in the DMA channel that has been occupied by another DMA task;
  • the second query unit 706 queries the task type of the DMA task of the occupied channel and the target.
  • the task type of the DMA task can be divided into a bandwidth type task and a time delay type task, the bandwidth type task pays attention to the data amount processed per unit time, and the time delay type task pays attention to the processing time of the unit task.
  • the task type can also be divided into OLTP and OLAP. Among them, OLTP is mainly based on small tasks and small queries, measuring OLTP.
  • the performance parameters of the system are the response time of single tasks, such as online booking of online systems.
  • OLAP is mainly for large tasks, mainly for multi-dimensional statistical analysis of historical data.
  • the processing time of tasks is very long, and the OLAP system is measured.
  • the performance parameter is the total amount of data processed per unit time.
  • the task types of different DMA tasks for different applications have been recorded, and the second query unit 706 can query the task type corresponding to the DMA task by recording.
  • the second determining unit 707 is configured to determine whether there is a DMA task that is different from the task type of the target DMA task in the DMA task of the occupied channel;
  • the second determining unit 707 determines, according to the queried task type of the DMA task of the occupied channel and the task type of the target DMA task, whether there is a DMA task in the occupied channel.
  • the DMA task of the target DMA task has different task types. If there is a DMA task that is different from the task type of the target DMA task in the DMA task of the occupied channel, the third transmission unit 708 is executed, if the DMA task of the occupied channel does not exist and The third query unit 709 is executed when the task type of the target DMA task is different from the DMA task.
  • the third transmission unit 708 is configured to: when there is no DMA task that is different from the task type of the target DMA task in the DMA task of the occupied channel, acquire target data corresponding to the target DMA task, and target the target Data is input through an input queue of the target channel, and the target data is output through an output queue of the target channel.
  • the third transmitting unit 708 acquires the target DMA task.
  • the target data is input through an input queue of the target channel, and the target data is output through an output queue of the target channel.
  • the third query unit 709 is configured to query, when the DMA task of the occupied channel is different from the task type of the target DMA task, the task type of the target DMA task is different. Priority of the DMA task;
  • the third query unit 709 queries the DMA task. a DMA task that is different from the task type of the target DMA task Priority for determining the priority order of DMA tasks based on task type and priority.
  • the third determining unit 710 is configured to determine whether there is a DMA task lower than the priority of the target DMA task in the DMA task that is different from the task type of the target DMA task;
  • the third determining unit 710 determines whether there is a DMA task lower than the priority of the target DMA task in the DMA task that is different from the task type of the target DMA task. If there is a DMA task lower than the priority of the target DMA task in the DMA task different from the task type of the target DMA task, executing the fourth transmission unit 711, if not, executing the pause unit 712.
  • the fourth transmission unit 711 is configured to: when there is no DMA task lower than the priority of the target DMA task in the DMA task that is different from the task type of the target DMA task, acquire the target DMA task corresponding to Target data, inputting the target data through an input queue of the target channel, and outputting the target data through an output queue of the target channel.
  • the fourth transmission unit 711 acquires target data corresponding to the target DMA task, inputs the target data through an input queue of the target channel, and outputs the target data through an output queue of the target channel.
  • a suspending unit 712 configured to suspend the lower than the target when there is a DMA task lower than a priority of the target DMA task in the DMA task different from the task type of the target DMA task Data transfer of DMA tasks with priority of DMA tasks;
  • the pause unit 712 suspends the lowering Data transfer of the DMA task of the priority of the target DMA task.
  • the DMA task lower than the priority of the target DMA task is divided into multiple small tasks, the current time is even if the DMA task is lower than the priority of the target DMA task.
  • a first transmission unit 713 configured to acquire target data of a target DMA task, input the target data through an input queue of the target channel, and pass the target data through the priority lower than the target DMA task
  • the output queue of the occupied channel corresponding to the DMA task of the level is output.
  • the first transmission unit 713 acquires target data of the target DMA task, and passes the target data through the target.
  • the input queue of the channel is input, and the target data is output through an output queue of the occupied channel corresponding to the DMA task lower than the priority of the target DMA task.
  • the transmission control method for direct memory access introduced in the embodiment of the present invention may be applied to a case where an external device is connected to one of the DMA channels of the direct memory access transmission control device, that is, if The external device receives data and can only receive data from the output queue of the DMA transmission channel. If the external device transmits data, data can only be transmitted from the input queue of the DMA channel. For example, when the external device A is connected to the DMA channel 1 and the external device B is connected to the DMA channel 1, the external device A issues a transfer request of the DMA task 1, and the DMA task 1 transmits the data of the memory to the external device according to the DMA task 1.
  • the priority is assigned to the target channel (the target channel is not limited to DMA channel 1 because the data is transferred from the memory to the DMA channel, so the channel for data input is not limited), and the DMA task 2 corresponding to the external device B Being processed in DMA channel 1, and the task type of DMA task 1 is different from the task type of DMA task 2, the priority of DMA task 1 is higher than the priority of DMA task 2, because DMA task 1 and two tasks need to be processed first.
  • the output queues are the same, so the data transfer of DMA task 2 is suspended, and the data of DMA task 1 is acquired, the data of DMA task 1 is input through the input queue of the target channel, and the target data is passed through DMA channel 1.
  • the output queue is output.
  • a target channel is selected according to the priority corresponding to the target DMA task, and in the case that there are other DMA tasks in the DMA channel, the query has been performed.
  • the type of task for other DMA tasks that occupy the channel The priority and the task type of the target DMA task, and compare the task type, priority, and task type and priority of the other DMA task of the occupied channel, and control the transmission data of the DMA channel according to the comparison result.
  • the data transmission can be reasonably planned according to the priority of the DMA task and the task type, and the priority can be processed even if the emergency DMA task is encountered, thereby improving the processing efficiency and service quality of the computer system.
  • FIG. 8 is a schematic structural diagram of a transmission control apparatus for direct memory access according to an embodiment of the present invention.
  • the direct memory access transmission control apparatus 8 of the embodiment of the present invention may include: a receiving unit 801, a first query unit 802, a first determining unit 803, a second query unit 804, and a second determining unit. 805. Suspending unit 806 and transmitting unit 807.
  • the receiving unit 801 is configured to receive a DMA transmission request, where the DMA transmission request carries a target DMA task.
  • the receiving unit 801 receives a DMA transmission request, where the DMA transmission request carries a target DMA task, and acquires a target DMA task from the DMA transmission request.
  • the external device wants to directly transfer data to the memory through the bus, the external device first sends a DMA transmission request signal to the CPU through the transmission control device of the direct memory access, that is, requests the CPU to take over the control of the bus.
  • the transfer control device of the direct memory access may process the DMA transfer request to acquire the target DMA carried in the DMA transfer request. Task for data transfer.
  • the first query unit 802 is configured to query the priority of the target DMA task, and select, according to the priority of the target DMA task, a DMA channel corresponding to the priority of the target DMA from the DMA channel as a target channel. .
  • the first query unit 802 queries the priority of the target DMA task, and selects a DMA channel corresponding to the priority of the target DMA from the DMA channel according to the priority of the target DMA task.
  • the target channel Different priorities of different DMA tasks of different applications can be set in advance.
  • the DMA task with a large amount of data transmission has a lower priority, and the DMA task with a smaller amount of data has a higher priority.
  • the DMA task of transmitting a small amount of data can be completed in time to improve the processing efficiency of the computer system.
  • the first determining unit 803 is configured to determine whether there is a channel in the DMA channel that has been occupied by other DMA tasks.
  • the first determining unit 803 determines whether there is a channel in the DMA channel that has been occupied by other DMA tasks.
  • the DMA channel includes at least one DMA channel for data transmission, and the transmission control device of the direct memory access determines whether there are channels occupied by other DMA tasks in the channel other than the target channel.
  • the second query unit 804 is configured to query the priority of the DMA task of the occupied channel when there is a channel in the DMA channel that has been occupied by other DMA tasks.
  • the second query unit 804 queries the priority of the DMA task of the occupied channel, according to the priority.
  • the priority determines the processing order of the DMA task.
  • the second determining unit 805 is configured to determine whether there is a DMA task lower than the priority of the target DMA task in the DMA task of the occupied channel.
  • the second determining unit 805 determines whether there is a DMA task lower than the priority of the target DMA task in the DMA task of the occupied channel.
  • a suspending unit 806, configured to suspend the DMA task of the priority lower than the target DMA task when there is a DMA task lower than the priority of the target DMA task in the DMA task of the occupied channel data transmission.
  • the suspending unit 806 suspends the lowering station. Data transfer of the DMA task of the priority of the target DMA task.
  • the DMA task lower than the priority of the target DMA task is divided into multiple small tasks, the current time is even if the DMA task is lower than the priority of the target DMA task.
  • the transmitting unit 807 is configured to acquire target data of the target DMA task, input the target data through an input queue of the target channel, and pass the target data through the priority lower than the target DMA task.
  • the output queue of the occupied channel corresponding to the DMA task is output.
  • the transmitting unit 807 acquires target data of a target DMA task, inputs the target data through an input queue of the target channel, and passes the target data through the target DMA task.
  • the output queue of the occupied channel corresponding to the priority DMA task is output. It can be understood that, after the output of the target DMA task is completed, a signal for outputting the data transmission corresponding to the target DMA task is sent to the CPU, so that the bus control is returned to the CPU.
  • the transmission control method for direct memory access introduced in the embodiment of the present invention may be applied to a case where an external device is connected to one of the DMA channels of the direct memory access transmission control device, that is, if The external device receives data and can only receive data from the output queue of the DMA transmission channel. If the external device transmits data, data can only be transmitted from the input queue of the DMA channel. For example, when the external device A is connected to the DMA channel 1 and the external device B is connected to the DMA channel 1, the external device A issues a transfer request of the DMA task 1, and the DMA task 1 transmits the data of the memory to the external device according to the DMA task 1.
  • the priority is assigned to the target channel (the target channel is not limited to DMA channel 1 because the data is transferred from the memory to the DMA channel, so the channel for data input is not limited), and the DMA task 2 corresponding to the external device B Is being processed in DMA channel 1, and the priority of DMA task 1 is higher than the priority of DMA task 2. Since DMA task 1 needs to be processed first and the output queues of the two tasks are the same, data transmission of DMA task 2 is suspended, and The data of the DMA task 1 is acquired, the data of the DMA task 1 is input through the input queue of the target channel, and the target data is output through the output queue of the DMA channel 1.
  • a target channel is selected according to the priority corresponding to the target DMA task, and in the case that there are other DMA tasks in the DMA channel, the query has been performed.
  • the priority of other DMA tasks occupying the channel, and the priority of other DMA tasks of the occupied channel and the priority of the target DMA task are compared, and the transmission data of the DMA channel is controlled according to the comparison result, which can be implemented according to the DMA task.
  • FIG. 9 is a schematic structural diagram of a transmission control apparatus for direct memory access according to an embodiment of the present invention.
  • the transmission control device 9 of the direct memory access in the embodiment of the present invention may include: a pre-storage unit 901, a receiving unit 902, a first query unit 903, a first determining unit 904, and a second query unit 905.
  • the pre-stored unit 901 is configured to pre-store a priority list of the DMA task, and a DMA task priority and DMA channel mapping relationship table.
  • the pre-stored unit 901 pre-stores a priority list of the DMA task, and a DMA task priority and a DMA channel mapping relationship table.
  • the direct memory access transmission control device sets different priorities for different DMA tasks, sets different priorities for different DMA channels, and can receive changes to the DMA task priority and the DMA channel priority.
  • the DMA channel includes at least one channel for data transmission.
  • the transmission control device of the direct memory access sets a priority for each channel, and the priority of the DMA task may be determined according to the size of the transmitted data, and the priority of the data volume is small, and the data volume is high.
  • the large priority is high, and the data is divided into different priorities according to the size of the data, and the priority corresponding to the data amount is matched with the priority set by the DMA channel, and the priority list of the DMA task and the DMA task priority are The DMA channel mapping relationship table is saved.
  • the receiving unit 902 is configured to receive a DMA transmission request, where the DMA transmission request carries a target DMA task.
  • the receiving unit 902 receives a DMA transmission request, where the DMA transmission request carries a target DMA task, and acquires a target DMA task from the DMA transmission request.
  • the external device wants to directly transfer data to the memory through the bus, the external device first sends a DMA transmission request signal to the CPU through the transmission control device of the direct memory access, that is, the transmission control device of the direct memory access.
  • the CPU is requested to take over the control of the bus, and when the CPU receives the request and responds to the DMA transfer request, it gives up control of the bus.
  • the transmission control device of the direct memory access can process the DMA transfer request and acquire the The target DMA task carried in the DMA transfer request is used for data transmission.
  • a first query unit 903 configured to query a priority of the target DMA task, and according to the The priority of the target DMA task is selected from the DMA channel as the target channel corresponding to the priority of the target DMA.
  • the first query unit 903 queries the priority of the target DMA task in the priority list of the DMA task, and queries the target from the DMA task priority and the DMA channel mapping relationship table.
  • a DMA channel corresponding to the priority of the DMA task, and a DMA channel corresponding to the priority of the target DMA task is used as the target channel.
  • the first determining unit 904 is configured to determine whether there is a channel in the DMA channel that has been occupied by other DMA tasks.
  • the first determining unit 904 determines whether there is a channel in the DMA channel that has been occupied by other DMA tasks.
  • the DMA channel includes at least one DMA channel for data transmission, and the first determining unit 904 determines whether there are channels occupied by other DMA tasks in the channels other than the target channel.
  • the second query unit 905 is configured to query the priority of the DMA task of the occupied channel when there is a channel in the DMA channel that has been occupied by other DMA tasks.
  • the second query unit 905 queries the priority of the DMA task of the occupied channel, according to the priority.
  • the priority determines the processing order of the DMA task.
  • the second determining unit 906 is configured to determine whether there is a DMA task lower than the priority of the target DMA task in the DMA task of the occupied channel.
  • the second determining unit 906 determines whether there is a DMA task lower than the priority of the target DMA task in the DMA task of the occupied channel.
  • a suspending unit 907 configured to suspend the DMA task of the priority lower than the target DMA task when there is a DMA task lower than the priority of the target DMA task in the DMA task of the occupied channel data transmission.
  • the suspending unit 907 suspends the lowering Data transfer of the DMA task of the priority of the target DMA task.
  • the DMA task lower than the priority of the target DMA task is divided into multiple small tasks, the current time is even the DMA task lower than the priority of the target DMA task.
  • the transmitting unit 908 is configured to acquire target data of the target DMA task, input the target data through an input queue of the target channel, and pass the target data through the priority lower than the target DMA task.
  • the output queue of the occupied channel corresponding to the DMA task is output.
  • the transmission unit 908 acquires target data of a target DMA task, inputs the target data through an input queue of the target channel, and passes the target data through the target DMA task.
  • the output queue of the occupied channel corresponding to the priority DMA task is output. It can be understood that, after the output of the target DMA task is completed, a signal for outputting the data transmission corresponding to the target DMA task is sent to the CPU, so that the bus control is returned to the CPU.
  • the first determining unit 904 determines that there is no channel in the DMA channel that has been occupied by another DMA task, acquiring target data corresponding to the target DMA task, and passing the target data through the An input queue of the target channel is input, and the target data is output through an output queue of the target channel.
  • the second determining unit 906 determines that there is no DMA task lower than the priority of the target DMA task in the DMA task of the occupied channel, acquiring the target DMA task corresponding to Target data, inputting the target data through an input queue of the target channel, and outputting the target data through an output queue of the target channel.
  • the transmission control method for direct memory access introduced in the embodiment of the present invention may be applied to a case where an external device is connected to one of the DMA channels of the direct memory access transmission control device, that is, if The external device receives data and can only receive data from the output queue of the DMA transmission channel. If the external device transmits data, data can only be transmitted from the input queue of the DMA channel. For example, when the external device A is connected to the DMA channel 1 and the external device B is connected to the DMA channel 1, the external device A issues a transfer request of the DMA task 1, and the DMA task 1 transmits the data of the memory to the external device according to the DMA task 1.
  • the priority is assigned to the target channel (the target channel is not limited to DMA channel 1 because the data is transferred from the memory to the DMA channel, so the channel for data input is not limited), and the DMA task 2 corresponding to the external device B Is being processed in DMA channel 1, and the priority of DMA task 1 is higher than the priority of DMA task 2. Since DMA task 1 needs to be processed first and the output queues of the two tasks are the same, data transmission of DMA task 2 is suspended, and The data of the DMA task 1 is acquired, the data of the DMA task 1 is input through the input queue of the target channel, and the target data is output through the output queue of the DMA channel 1.
  • a target channel is selected according to the priority corresponding to the target DMA task, and in the case that there are other DMA tasks in the DMA channel, the query has been performed.
  • the priority of other DMA tasks occupying the channel, and the priority of other DMA tasks of the occupied channel and the priority of the target DMA task are compared, and the transmission data of the DMA channel is controlled according to the comparison result, which can be implemented according to the DMA task.
  • the data is transmitted with reasonable priority, and even if it encounters urgent DMA tasks, it can be prioritized, which improves the processing efficiency and service quality of the computer system.
  • the embodiment of the present invention further provides a computer storage medium, wherein the computer storage medium may store a program, and the program includes some or all of the steps of the transmission control method of any direct memory access described in the foregoing method embodiments. .
  • the disclosed apparatus may be implemented in other ways.
  • the device embodiments described above are merely illustrative.
  • the division of the above units is only a logical function division. In actual implementation, there may be another division manner. For example, multiple units or components may be combined or integrated. Go to another system, or some features can be ignored or not executed.
  • the mutual coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection through some interface, device or unit, and may be electrical or otherwise.
  • the units described above as separate components may or may not be physically separated.
  • the components displayed as units may or may not be physical units, that is, may be located in one place, or may be distributed to multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of the embodiment.
  • each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.
  • the above integrated unit can be implemented in the form of hardware or in the form of a software functional unit.
  • the above-described integrated unit if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a computer readable storage medium.
  • the technical solution of the present invention which is essential or contributes to the prior art, or all or part of the technical solution, may be embodied in the form of a software product stored in a storage medium.
  • the instructions include a plurality of instructions for causing a computer device (which may be a personal computer, server or network device, etc., and in particular a processor in a computer device) to perform all or part of the steps of the above-described methods of various embodiments of the present invention.
  • the foregoing storage medium may include: a U disk, a mobile hard disk, a magnetic disk, an optical disk, a read only memory (English: Read-Only Memory, abbreviation: ROM) or a random access memory (English: Random Access Memory, abbreviation: RAM) and other media that can store program code.

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Abstract

本发明实施例公开一种直接内存访问的传输控制方法及装置。该直接内存访问的传输控制方法是当接收到传输目标DMA任务的DMA传输请求时，根据目标DMA任务对应的优先级为其选择一目标通道，在DMA通道中存在其他DMA任务的情况下，通过查询已占用通道的其他DMA任务的任务类型、优先级以及目标DMA任务的任务类型，并对已占用通道的其他DMA任务的任务类型、优先级以及目标DMA任务的任务类型、优先级进行对比，根据对比结果对DMA通道的传输数据进行控制。采用本发明，可以实现根据DMA任务的优先级、任务类型合理规划数据传输，即使遇到紧急DMA任务也可以优先处理，提高了计算机系统处理效率和服务质量。

Description

一种直接内存访问的传输控制方法及装置 技术领域
本发明涉及计算机技术领域，尤其涉及一种直接内存访问的传输控制方法及装置。
背景技术
直接内存访问(Direct Memory Access，DMA)是一种快速数据交换模式，它在不通过中央处理器(CPU，Central Processing Unit)且不需要CPU干预的情况下，即可完成外部设备和存储器之间的直接数据传输。在DMA模式下，CPU只须向DMA传输控制装置下达指令，让DMA传输控制装置处理数据的传输，数据传输完毕再把传输结束信息反馈给CPU，这样就很大程度上减轻了CPU资源占有率，可以大大节省系统资源。其中，DMA传输控制装置是通过DMA通道进行数据传输的，DMA通道中设置有输入队列和输出队列，输入队列和输出队列均是由一系列参数寄存器组成，用于记录目标DMA任务的传输参数(例如，数据传输大小、目的地址、源地址、传输进度等)、传输数据等，例如：若将外部设备的数据块传输至存储器中时，DMA传输控制装置将所需传输的数据块从DMA通道的输入队列输入，再将数据块从DMA通道的输出队列输出至外部设备，已完成数据传输。由于在DMA传输控制装置进行数据传输的过程衡中，CPU可以执行其他任务，因此，也提高了计算机系统处理效率。
但是，现有的DMA传输控制装置仅仅是作为一个负责数据传输的硬件单元，它是按照DMA任务的输入时间顺序执行任务的，对于传输过程中存在不同优先级的DMA任务，甚至于出现紧急DMA任务的情况，需要将排在前面的DMA任务处理完毕才能处理排在后面的优先级较高的DMA任务或者紧急DMA任务，因此，现有DMA技术不能根据实际任务的重要程度调整数据传输的先后顺序，从而导致降低了计算机系统处理效率和服务质量。
发明内容
本发明实施例提供一种直接内存访问的传输控制方法及装置，可提高计算机系统处理效率和服务质量。
本发明实施例第一方面提供了一种直接内存访问的传输控制方法，包括：
接收DMA传输请求，所述DMA传输请求携带目标DMA任务；
查询所述目标DMA任务的优先级，并根据所述目标DMA任务的优先级，从DMA通道中选择与所述目标DMA的优先级相对应的DMA通道作为目标通道；
判断所述DMA通道中是否存在已经被其他DMA任务占用的通道；
当所述DMA通道中存在已经被其他DMA任务占用的通道时，查询已占用通道的DMA任务的任务类型以及所述目标DMA任务的任务类型；
判断在所述已占用通道的DMA任务中是否存在与所述目标DMA任务的任务类型不相同的DMA任务；
当在所述已占用通道的DMA任务中存在与所述目标DMA任务的任务类型不相同的DMA任务时，查询所述与所述目标DMA任务的任务类型不相同的DMA任务的优先级；
判断在所述与所述目标DMA任务的任务类型不相同的DMA任务中是否存在低于所述目标DMA任务的优先级的DMA任务；
当在所述与所述目标DMA任务的任务类型不相同的DMA任务中，存在低于所述目标DMA任务的优先级的DMA任务时，暂停所述低于所述目标DMA任务的优先级的DMA任务的数据传输，并获取目标DMA任务的目标数据，将所述目标数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过所述低于所述目标DMA任务的优先级的DMA任务对应的已占用通道的输出队列进行输出。
在本发明实施例第一方面的第一种可能的实现方式中，所述接收DMA传输请求，所述DMA传输请求携带目标DMA任务之前，还包括：
预先保存DMA任务的优先级列表，以及DMA任务优先级与DMA通道映射关系表；
所述查询所述目标DMA任务的优先级，并根据所述目标DMA任务的优先级，从DMA通道中选择与所述目标DMA的优先级相对应的DMA通道作为目标通道，包括：
在所述DMA任务的优先级列表中查询所述目标DMA任务的优先级，从所述DMA任务优先级与DMA通道映射关系表中查询与所述目标DMA任务 的优先级相对应的DMA通道，将与所述目标DMA任务的优先级相对应的DMA通道作为目标通道。
在本发明实施例第一方面的第二种可能的实现方式中，所述判断所述DMA通道中是否存在已经被其他DMA任务占用的通道之后，还包括：
当所述DMA通道中不存在已经被其他DMA任务占用的通道时，获取目标DMA任务对应的目标数据，将所述目标数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过所述目标通道的输出队列进行输出。
在本发明实施例第一方面的第三种可能的实现方式中，所述判断在所述已占用通道的DMA任务中是否存在与所述目标DMA任务的任务类型不相同的DMA任务之后，还包括：
当在所述已占用通道的DMA任务中不存在与所述目标DMA任务的任务类型不相同的DMA任务时，获取目标DMA任务对应的目标数据，将所述目标数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过所述目标通道的输出队列进行输出。
在本发明实施例第一方面的第四种可能的实现方式中，所述判断在所述与所述目标DMA任务的任务类型不相同的DMA任务中是否存在低于所述目标DMA任务的优先级的DMA任务之后，还包括：
当在所述与所述目标DMA任务的任务类型不相同的DMA任务中不存在低于所述目标DMA任务的优先级的DMA任务时，获取目标DMA任务对应的目标数据，将所述目标数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过所述目标通道的输出队列进行输出。
本发明实施例第二方面提供了一种直接内存访问的传输控制方法，包括：
接收DMA传输请求，所述DMA传输请求携带目标DMA任务；
查询所述目标DMA任务的优先级，并根据所述目标DMA任务的优先级，从DMA通道中选择与所述目标DMA的优先级相对应的DMA通道作为目标通道；
判断所述DMA通道中是否存在已经被其他DMA任务占用的通道；
当DMA通道中存在已经被其他DMA任务占用的通道时，查询已占用通道的DMA任务的优先级；
判断在所述已占用通道的DMA任务中是否存在低于所述目标DMA任务的优先级的DMA任务；
当在所述已占用通道的DMA任务中存在低于所述目标DMA任务的优先级的DMA任务时，暂停所述低于所述目标DMA任务的优先级的DMA任务的数据传输，并获取目标DMA任务的目标数据，将所述目标数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过所述低于所述目标DMA任务的优先级的DMA任务对应的已占用通道的输出队列进行输出。
在本发明实施例第二方面的第一种可能的实现方式中，所述接收DMA传输请求，所述DMA传输请求携带目标DMA任务之前，还包括：
预先保存DMA任务的优先级列表，以及DMA任务优先级与DMA通道映射关系表；
所述查询所述目标DMA任务的优先级，并根据所述目标DMA任务的优先级，从DMA通道中选择与所述目标DMA的优先级相对应的DMA通道作为目标通道，包括：
在所述DMA任务的优先级列表中查询所述目标DMA任务的优先级，从所述DMA任务优先级与DMA通道映射关系表中查询与所述目标DMA任务的优先级相对应的DMA通道，将与所述目标DMA任务的优先级相对应的DMA通道作为目标通道。
本发明实施例第三方面提供了一种直接内存访问传输控制装置，包括：
接收单元，用于接收DMA传输请求，所述DMA传输请求携带目标DMA任务；
第一查询单元，用于查询所述目标DMA任务的优先级，并根据所述目标DMA任务的优先级，从DMA通道中选择与所述目标DMA的优先级相对应的DMA通道作为目标通道；
第一判断单元，用于判断所述DMA通道中是否存在已经被其他DMA任务占用的通道；
第二查询单元，用于当所述DMA通道中存在已经被其他DMA任务占用的通道时，查询已占用通道的DMA任务的任务类型以及所述目标DMA任务的任务类型；
第二判断单元，用于判断在所述已占用通道的DMA任务中是否存在与所述目标DMA任务的任务类型不相同的DMA任务；
第三查询单元，用于当在所述已占用通道的DMA任务中存在与所述目标DMA任务的任务类型不相同的DMA任务时，查询所述与所述目标DMA任务的任务类型不相同的DMA任务的优先级；
第三判断单元，用于判断在所述与所述目标DMA任务的任务类型不相同的DMA任务中是否存在低于所述目标DMA任务的优先级的DMA任务；
暂停单元，用于当在所述与所述目标DMA任务的任务类型不相同的DMA任务中，存在低于所述目标DMA任务的优先级的DMA任务时，暂停所述低于所述目标DMA任务的优先级的DMA任务的数据传输；
第一传输单元，用于获取目标DMA任务的目标数据，将所述目标数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过所述低于所述目标DMA任务的优先级的DMA任务对应的已占用通道的输出队列进行输出。
在本发明实施例第三方面的第一种可能的实现方式中，所述装置还包括：
预存单元，用于预先保存DMA任务的优先级列表，以及DMA任务优先级与DMA通道映射关系表；
所述第一查询单元，具体用于在所述DMA任务的优先级列表中查询所述目标DMA任务的优先级，从所述DMA任务优先级与DMA通道映射关系表中查询与所述目标DMA任务的优先级相对应的DMA通道，将与所述目标DMA任务的优先级相对应的DMA通道作为目标通道。
在本发明实施例第三方面的第二种可能的实现方式中，所述装置还包括：
第二传输单元，用于当所述DMA通道中不存在已经被其他DMA任务占用的通道时，获取目标DMA任务对应的目标数据，将所述目标数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过所述目标通道的输出队列进行输出。
在本发明实施例第三方面的第三种可能的实现方式中，所述装置还包括：
第三传输单元，用于当在所述已占用通道的DMA任务中不存在与所述目标DMA任务的任务类型不相同的DMA任务时，获取目标DMA任务对应的目标数据，将所述目标数据通过所述目标通道的输入队列进行输入，以及将所 述目标数据通过所述目标通道的输出队列进行输出。
在本发明实施例第三方面的第四种可能的实现方式中，所述装置还包括：
第四传输单元，用于当在所述与所述目标DMA任务的任务类型不相同的DMA任务中不存在低于所述目标DMA任务的优先级的DMA任务时，获取目标DMA任务对应的目标数据，将所述目标数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过所述目标通道的输出队列进行输出。
本发明实施例第四方面提供了一种直接内存访问传输控制装置，包括：
接收单元，用于接收DMA传输请求，所述DMA传输请求携带目标DMA任务；
第一查询单元，用于查询所述目标DMA任务的优先级，并根据所述目标DMA任务的优先级，从DMA通道中选择与所述目标DMA的优先级相对应的DMA通道作为目标通道；
第一判断单元，用于判断所述DMA通道中是否存在已经被其他DMA任务占用的通道；
第二查询单元，用于当DMA通道中存在已经被其他DMA任务占用的通道时，查询已占用通道的DMA任务的优先级；
第二判断单元，用于判断在所述已占用通道的DMA任务中是否存在低于所述目标DMA任务的优先级的DMA任务；
暂停单元，用于当在所述已占用通道的DMA任务中存在低于所述目标DMA任务的优先级的DMA任务时，暂停所述低于所述目标DMA任务的优先级的DMA任务的数据传输；
传输单元，用于获取目标DMA任务的目标数据，将所述目标数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过所述低于所述目标DMA任务的优先级的DMA任务对应的已占用通道的输出队列进行输出。
在本发明实施例第四方面的第一种可能的实现方式中，所述装置还包括：
预存单元，用于预先保存DMA任务的优先级列表，以及DMA任务优先级与DMA通道映射关系表；
所述第一查询单元具体用于在所述DMA任务的优先级列表中查询所述目标DMA任务的优先级，从所述DMA任务优先级与DMA通道映射关系表中 查询与所述目标DMA任务的优先级相对应的DMA通道，将与所述目标DMA任务的优先级相对应的DMA通道作为目标通道。
在本发明实施例中，当接收到传输目标DMA任务的DMA传输请求时，根据目标DMA任务对应的优先级为其选择一目标通道，在DMA通道中存在其他DMA任务的情况下，通过查询已占用通道的其他DMA任务的任务类型、优先级以及目标DMA任务的任务类型，并对已占用通道的其他DMA任务的任务类型、优先级以及目标DMA任务的任务类型、优先级进行对比，根据对比结果对DMA通道的传输数据进行控制，可以实现根据DMA任务的优先级、任务类型合理规划数据传输，即使遇到紧急DMA任务也可以优先处理，提高了计算机系统处理效率和服务质量。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1是本发明实施例提供的一种直接内存访问的传输控制装置的结构图；
图2是本发明实施例提供的一种直接内存访问的传输控制方法的流程示意图；
图3是本发明实施例提供的另一种直接内存访问的传输控制方法的流程示意图；
图4是本发明实施例提供的又一种直接内存访问的传输控制方法的流程示意图；
图5是本发明实施例提供的又一种直接内存访问的传输控制方法的流程示意图；
图6是本发明实施例提供的一种直接内存访问的传输控制装置的结构示意图；
图7是本发明实施例提供的另一种直接内存访问的传输控制装置的结构示意图；
图8是本发明实施例提供的又一种直接内存访问的传输控制装置的结构示意图；
图9是本发明实施例提供的又一种直接内存访问的传输控制装置的结构示意图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有付出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
请参见图1，为本发明实施例提供了一种直接内存访问的传输控制装置的结构图。如图1所述，本实施例的直接内存访问的传输控制装置1的包括DMA通道11，所述DMA通道11中包括至少一个用于数据传输的DMA通道，每一个DMA通道均包括输入队列111和输出队列112。输入队列111和输出队列112均是由一系列参数寄存器组成，用于记录目标DMA任务的传输参数(例如，数据传输大小、目的地址、源地址、传输进度等)、传输数据等，在可行的方案中，数据传输的具体过程是：直接内存访问的传输控制装置1接收DMA传输请求，所述DMA传输请求携带目标DMA任务，所述直接内存访问的传输控制装置1查询所述目标DMA任务的优先级，并根据所述目标DMA任务的优先级，从DMA通道11中选择与所述目标DMA的优先级相对应的DMA通道作为目标通道，获取所述目标DMA任务的目标数据，将所述目标数据从目标通道的输入队列进行输入，再将所述目标数据从目标通道的输出队列进行输出，即完成了对所述DMA传输请求对应的数据传输。
下面将结合附图2-附图5，对本发明实施例提供的直接内存访问的传输控制方法进行详细介绍。
请参见图1，为本发明实施例提供了一种直接内存访问的传输控制方法的流程示意图。如图1所示，本发明实施例的所述方法可以包括以下步骤S201-步骤S208。
S201，接收DMA传输请求，所述DMA传输请求携带目标DMA任务。
具体的，直接内存访问的传输控制装置接收DMA传输请求，所述DMA 传输请求携带目标DMA任务，从所述DMA传输请求中获取目标DMA任务。可以理解的是，外部设备如果想要通过总线直接向存储器传输数据时，外部设备先通过所述直接内存访问的传输控制装置向CPU发送DMA传输请求信号，即所述直接内存访问的传输控制装置向CPU提出接管总线控制权的请求，CPU收到请求并响应DMA传输请求时，会让出总线控制权，此时，所述直接内存访问的传输控制装置可对DMA传输请求进行处理，获取所述DMA传输请求中携带的目标DMA任务，用以进行数据传输。
S202，查询所述目标DMA任务的优先级，并根据所述目标DMA任务的优先级，从DMA通道中选择与所述目标DMA的优先级相对应的DMA通道作为目标通道。
具体的，所述直接内存访问的传输控制装置查询所述目标DMA任务的优先级，并根据所述目标DMA任务的优先级，从DMA通道中选择与所述目标DMA的优先级相对应的DMA通道作为目标通道。所述直接内存访问的传输控制装置可以预先对不同应用的不同DMA任务设定不同优先级，可选的方案中，传输数据量大的DMA任务设置的优先级较低，传输数据量小的DMA任务设置的优先级较高，这样可以及时完成传输数据量小的DMA任务，提高计算机系统的处理效率。所述直接内存访问的传输控制装置并根据所述目标DMA任务的优先级，从DMA通道中选择与所述目标DMA的优先级相对应的DMA通道作为目标通道，用以通过所述目标通道对所述目标DMA任务进行数据传输。
S203，判断所述DMA通道中是否存在已经被其他DMA任务占用的通道。
具体的，所述直接内存访问的传输控制装置判断所述DMA通道中是否存在已经被其他DMA任务占用的通道。所述DMA通道包括至少一个用于数据传输的DMA通道，所述直接内存访问的传输控制装置判断除了目标通道之外的通道中是否有其他DMA任务占用的通道。
S204，当所述DMA通道中存在已经被其他DMA任务占用的通道时，查询已占用通道的DMA任务的任务类型以及所述目标DMA任务的任务类型。
具体的，当所述DMA通道中存在已经被其他DMA任务占用的通道时，所述直接内存访问的传输控制装置查询已占用通道的DMA任务的任务类型以 及所述目标DMA任务的任务类型。其中，所述任务类型可以划分为带宽型任务和延时型任务，带宽型任务注重单位时间处理的数据量，延时型任务注重单位任务的处理时间。可行的方案中，也可以将任务类型划分为联机事务处理(Online Transaction Processing，OLTP)和联机分析处理(Online Analytical Processing，OLAP)，其中，OLTP是以小的任务以及小的查询为主，衡量OLTP系统的性能参数是单任务的响应时间，例如在线系统的网上订票等，OLAP是以大任务为主，主要是对历史数据进行多维度的统计分析，任务的处理时间很长，衡量OLAP系统的性能参数是单位时间处理数据的总量。所述直接内存访问的传输控制装置对不同应用的不同DMA任务的任务类型都已进行了记录，可通过记录查询DMA任务对应的任务类型。
S205，判断在所述已占用通道的DMA任务中是否存在与所述目标DMA任务的任务类型不相同的DMA任务。
具体的，所述直接内存访问的传输控制装置根据所查询到的所述已占用通道的DMA任务的任务类型和目标DMA任务的任务类型，判断在所述已占用通道的DMA任务中是否存在与所述目标DMA任务的任务类型不相同的DMA任务。
S206，当在所述已占用通道的DMA任务中存在与所述目标DMA任务的任务类型不相同的DMA任务时，查询所述与所述目标DMA任务的任务类型不相同的DMA任务的优先级。
具体的，当在所述已占用通道的DMA任务中存在与所述目标DMA任务的任务类型不相同的DMA任务时，所述直接内存访问的传输控制装置查询所述与所述目标DMA任务的任务类型不相同的DMA任务的优先级。所述直接内存访问的传输控制装置根据任务类型和优先级确定DMA任务的优先处理顺序。
S207，判断在所述与所述目标DMA任务的任务类型不相同的DMA任务中是否存在低于所述目标DMA任务的优先级的DMA任务。
具体的，所述直接内存访问的传输控制装置判断在所述与所述目标DMA任务的任务类型不相同的DMA任务中是否存在低于所述目标DMA任务的优先级的DMA任务。
S208，当在所述与所述目标DMA任务的任务类型不相同的DMA任务中，存在低于所述目标DMA任务的优先级的DMA任务时，暂停所述低于所述目标DMA任务的优先级的DMA任务的数据传输，并获取目标DMA任务的目标数据，将所述目标数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过所述低于所述目标DMA任务的优先级的DMA任务对应的已占用通道的输出队列进行输出。
具体的，当在所述与所述目标DMA任务的任务类型不相同的DMA任务中，存在低于所述目标DMA任务的优先级的DMA任务时，所述直接内存访问的传输控制装置暂停所述低于所述目标DMA任务的优先级的DMA任务的数据传输。可行的方案中，当所述低于所述目标DMA任务的优先级的DMA任务被划分为多个小任务时，当前时刻即使所述低于所述目标DMA任务的优先级的DMA任务中有一些小任务已从输出队列输出，但仍有其他小任务仍未被传输时或者已从所述已占用通道的输入队列输入时，暂停所述其他小任务的处理，优先对所述目标DMA任务进行数据传输。所述直接内存访问的传输控制装置获取目标DMA任务的目标数据，将所述目标数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过所述低于所述目标DMA任务的优先级的DMA任务对应的已占用通道的输出队列进行输出。可以理解的是，在完成对所述目标DMA任务的输出后，向CPU发送输出目标DMA任务对应的数据传输完毕的信号，以使将总线控制权还给CPU。
需要说明的是，本发明实施例中所介绍的直接内存访问的传输控制方法可以应用于外部设备与所述直接内存访问的传输控制装置的其中的一个DMA通道进行连接的情况，即，若所述外部设备接收数据，只能从该DMA传输通道的输出队列接收数据，若所述外部设备发送数据，只能从该DMA通道的输入队列发送数据。例如：外部设备A连接于DMA通道1以及外部设备B连接于DMA通道1的情况，外部设备A发出DMA任务1的传输请求，DMA任务1是将存储器的数据传输至外部设备，根据DMA任务1的优先级分配目标通道(所述目标通道并不限定于DMA通道1，是因为所述数据是从存储器传输至DMA通道，因此不限定数据输入的通道)，而外部设备B对应的DMA任务2正在DMA通道1中正在处理，并且DMA任务1的任务类型和DMA任务2 的任务类型不同，DMA任务1的优先级高于DMA任务2的优先级，由于需要优先处理DMA任务1和两个任务的输出队列相同，因此暂停DMA任务2的数据传输，并获取DMA任务1的数据，将DMA任务1的数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过DMA通道1的输出队列进行输出。
在本发明实施例中，当接收到传输目标DMA任务的DMA传输请求时，根据目标DMA任务对应的优先级为其选择一目标通道，在DMA通道中存在其他DMA任务的情况下，通过查询已占用通道的其他DMA任务的任务类型、优先级以及目标DMA任务的任务类型，并对已占用通道的其他DMA任务的任务类型、优先级以及目标DMA任务的任务类型、优先级进行对比，根据对比结果对DMA通道的传输数据进行控制，可以实现根据DMA任务的优先级、任务类型合理规划数据传输，即使遇到紧急DMA任务也可以优先处理，提高了计算机系统处理效率和服务质量。
请参见图3，为本发明实施例提供了一种直接内存访问的传输控制方法的流程示意图。如图3所示，本发明实施例的所述方法可以包括以下步骤S301-步骤S310。
S301，预先保存DMA任务的优先级列表，以及DMA任务优先级与DMA通道映射关系表。
具体的，直接内存访问的传输控制装置预先保存DMA任务的优先级列表，以及DMA任务优先级与DMA通道映射关系表。所述直接内存访问的传输控制装置对不同DMA任务设定不同优先级，对不同的DMA通道设定不同优先级，并可以接收对DMA任务优先级和DMA通道优先级进行更改。所述DMA通道包括至少一个用于数据传输的通道。可选的方案中，所述直接内存访问的传输控制装置对各个通道设定优先级，DMA任务的优先级可根据传输的数据量大小确定优先级，数据量较小的优先级高，数据量大的优先级高，按照数据量大小分为各个不同的优先级，将数据量对应的优先级与DMA通道设定的优先级进行对应，并将DMA任务的优先级列表、DMA任务优先级与DMA通道映射关系表进行保存。
S302，接收DMA传输请求，所述DMA传输请求携带目标DMA任务。
具体的，所述直接内存访问的传输控制装置接收DMA传输请求，所述DMA传输请求携带目标DMA任务，从所述DMA传输请求中获取目标DMA任务。可以理解的是，外部设备如果想要通过总线直接向存储器传输数据时，外部设备先通过所述直接内存访问的传输控制装置向CPU发送DMA传输请求信号，即所述直接内存访问的传输控制装置向CPU提出接管总线控制权的请求，CPU收到请求并响应DMA传输请求时，会让出总线控制权，此时，所述直接内存访问的传输控制装置可对DMA传输请求进行处理，获取所述DMA传输请求中携带的目标DMA任务，用以进行数据传输。
S303，查询所述目标DMA任务的优先级，并根据所述目标DMA任务的优先级，从DMA通道中选择与所述目标DMA的优先级相对应的DMA通道作为目标通道。
具体的，所述直接内存访问的传输控制装置在所述DMA任务的优先级列表中查询所述目标DMA任务的优先级，从所述DMA任务优先级与DMA通道映射关系表中查询与所述目标DMA任务的优先级相对应的DMA通道，将与所述目标DMA任务的优先级相对应的DMA通道作为目标通道。
S304，判断所述DMA通道中是否存在已经被其他DMA任务占用的通道。
具体的，所述直接内存访问的传输控制装置判断所述DMA通道中是否存在已经被其他DMA任务占用的通道。所述DMA通道包括至少一个用于数据传输的DMA通道，所述直接内存访问的传输控制装置判断除了目标通道之外的通道中是否有其他DMA任务占用的通道。若所述DMA通道中存在已经被其他DMA任务占用的通道，则执行步骤S305，若所述DMA通道中不存在已经被其他DMA任务占用的通道，则执行步骤S310。
S305，查询已占用通道的DMA任务的任务类型以及所述目标DMA任务的任务类型。
具体的，当所述DMA通道中存在已经被其他DMA任务占用的通道时，所述直接内存访问的传输控制装置查询已占用通道的DMA任务的任务类型以及所述目标DMA任务的任务类型。其中，所述任务类型可以划分为带宽型任务和延时型任务，带宽型任务注重单位时间处理的数据量，延时型任务注重单 位任务的处理时间。可行的方案中，也可以将任务类型划分为OLTP和OLAP，其中，OLTP是以小的任务以及小的查询为主，衡量OLTP系统的性能参数是单任务的响应时间，例如在线系统的网上订票等，OLAP是以大任务为主，主要是对历史数据进行多维度的统计分析，任务的处理时间很长，衡量OLAP系统的性能参数是单位时间处理数据的总量。所述直接内存访问的传输控制装置对不同应用的不同DMA任务的任务类型都已进行了记录，可通过记录查询DMA任务对应的任务类型。
S306，判断在所述已占用通道的DMA任务中是否存在与所述目标DMA任务的任务类型不相同的DMA任务。
具体的，所述直接内存访问的传输控制装置根据所查询到的所述已占用通道的DMA任务的任务类型和目标DMA任务的任务类型，判断在所述已占用通道的DMA任务中是否存在与所述目标DMA任务的任务类型不相同的DMA任务。若在所述已占用通道的DMA任务中存在与所述目标DMA任务的任务类型不相同的DMA任务，则执行步骤S307，若在所述已占用通道的DMA任务中是不存在与所述目标DMA任务的任务类型不相同的DMA任务，则执行步骤S310。
S307，查询所述与所述目标DMA任务的任务类型不相同的DMA任务的优先级。
具体的，当在所述已占用通道的DMA任务中存在与所述目标DMA任务的任务类型不相同的DMA任务时，所述直接内存访问的传输控制装置查询所述与所述目标DMA任务的任务类型不相同的DMA任务的优先级。所述直接内存访问的传输控制装置根据任务类型和优先级确定DMA任务的优先处理顺序。
S308，判断在所述与所述目标DMA任务的任务类型不相同的DMA任务中是否存在低于所述目标DMA任务的优先级的DMA任务。
具体的，所述直接内存访问的传输控制装置判断在所述与所述目标DMA任务的任务类型不相同的DMA任务中是否存在低于所述目标DMA任务的优先级的DMA任务。若在所述与所述目标DMA任务的任务类型不相同的DMA任务中存在低于所述目标DMA任务的优先级的DMA任务，则执行步骤S309， 若不存在，则执行步骤S310。
S309，暂停所述低于所述目标DMA任务的优先级的DMA任务的数据传输，并获取目标DMA任务的目标数据，将所述目标数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过所述低于所述目标DMA任务的优先级的DMA任务对应的已占用通道的输出队列进行输出。
具体的，当在所述与所述目标DMA任务的任务类型不相同的DMA任务中，存在低于所述目标DMA任务的优先级的DMA任务时，所述直接内存访问的传输控制装置暂停所述低于所述目标DMA任务的优先级的DMA任务的数据传输。可行的方案中，当所述低于所述目标DMA任务的优先级的DMA任务被划分为多个小任务时，当前时刻即使所述低于所述目标DMA任务的优先级的DMA任务中有一些小任务已从输出队列输出，但仍有其他小任务仍未被传输时或者已从所述已占用通道的输入队列输入时，暂停所述其他小任务的处理，优先对所述目标DMA任务进行数据传输。所述直接内存访问的传输控制装置获取目标DMA任务的目标数据，将所述目标数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过所述低于所述目标DMA任务的优先级的DMA任务对应的已占用通道的输出队列进行输出。可以理解的是，在完成对所述目标DMA任务的输出后，向CPU发送输出目标DMA任务对应的数据传输完毕的信号，以使将总线控制权还给CPU。
需要说明的是，本发明实施例中所介绍的直接内存访问的传输控制方法可以应用于外部设备与所述直接内存访问的传输控制装置的其中的一个DMA通道进行连接的情况，即，若所述外部设备接收数据，只能从该DMA传输通道的输出队列接收数据，若所述外部设备发送数据，只能从该DMA通道的输入队列发送数据。例如：外部设备A连接于DMA通道1以及外部设备B连接于DMA通道1的情况，外部设备A发出DMA任务1的传输请求，DMA任务1是将存储器的数据传输至外部设备，根据DMA任务1的优先级分配目标通道(所述目标通道并不限定于DMA通道1，是因为所述数据是从存储器传输至DMA通道，因此不限定数据输入的通道)，而外部设备B对应的DMA任务2正在DMA通道1中正在处理，并且DMA任务1的任务类型和DMA任务2的任务类型不同，DMA任务1的优先级高于DMA任务2的优先级，由于需 要优先处理DMA任务1和两个任务的输出队列相同，因此暂停DMA任务2的数据传输，并获取DMA任务1的数据，将DMA任务1的数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过DMA通道1的输出队列进行输出。
S310，将所述目标数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过所述目标通道的输出队列进行输出。
具体的，所述直接内存访问的传输控制装置将所述目标数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过所述目标通道的输出队列进行输出。一种可行的方案中，当所述DMA通道中不存在已经被其他DMA任务占用的通道时，所述直接内存访问的传输控制装置获取目标DMA任务对应的目标数据，将所述目标数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过所述目标通道的输出队列进行输出。另一种可行的方案中，当在所述已占用通道的DMA任务中不存在与所述目标DMA任务的任务类型不相同的DMA任务时，所述直接内存访问的传输控制装置获取目标DMA任务对应的目标数据，将所述目标数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过所述目标通道的输出队列进行输出。又一种可行的方案中，当在所述与所述目标DMA任务的任务类型不相同的DMA任务中不存在低于所述目标DMA任务的优先级的DMA任务时，所述直接内存访问的传输控制装置获取目标DMA任务对应的目标数据，将所述目标数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过所述目标通道的输出队列进行输出。
在本发明实施例中，当接收到传输目标DMA任务的DMA传输请求时，根据目标DMA任务对应的优先级为其选择一目标通道，在DMA通道中存在其他DMA任务的情况下，通过查询已占用通道的其他DMA任务的任务类型、优先级以及目标DMA任务的任务类型，并对已占用通道的其他DMA任务的任务类型、优先级以及目标DMA任务的任务类型、优先级进行对比，根据对比结果对DMA通道的传输数据进行控制，可以实现根据DMA任务的优先级、任务类型合理规划数据传输，即使遇到紧急DMA任务也可以优先处理，提高了计算机系统处理效率和服务质量。
请参见图4，为本发明实施例提供了一种直接内存访问的传输控制方法的流程示意图。如图4所示，本发明实施例的所述方法可以包括以下步骤S401-步骤S406。
S401，接收DMA传输请求，所述DMA传输请求携带目标DMA任务。
具体的，直接内存访问的传输控制装置接收DMA传输请求，所述DMA传输请求携带目标DMA任务，从所述DMA传输请求中获取目标DMA任务。可以理解的是，外部设备如果想要通过总线直接向存储器传输数据时，外部设备先通过所述直接内存访问的传输控制装置向CPU发送DMA传输请求信号，即所述直接内存访问的传输控制装置向CPU提出接管总线控制权的请求，CPU收到请求并响应DMA传输请求时，会让出总线控制权，此时，所述直接内存访问的传输控制装置可对DMA传输请求进行处理，获取所述DMA传输请求中携带的目标DMA任务，用以进行数据传输。
S402，查询所述目标DMA任务的优先级，并根据所述目标DMA任务的优先级，从DMA通道中选择与所述目标DMA的优先级相对应的DMA通道作为目标通道。
具体的，所述直接内存访问的传输控制装置查询所述目标DMA任务的优先级，并根据所述目标DMA任务的优先级，从DMA通道中选择与所述目标DMA的优先级相对应的DMA通道作为目标通道。所述直接内存访问的传输控制装置可以预先对不同应用的不同DMA任务设定不同优先级，可选的方案中，传输数据量大的DMA任务设置的优先级较低，传输数据量小的DMA任务设置的优先级较高，这样可以及时完成传输数据量小的DMA任务，提高计算机系统的处理效率。所述直接内存访问的传输控制装置并根据所述目标DMA任务的优先级，从DMA通道中选择与所述目标DMA的优先级相对应的DMA通道作为目标通道，用以通过所述目标通道对所述目标DMA任务进行数据传输。
S403，判断所述DMA通道中是否存在已经被其他DMA任务占用的通道。
具体的，所述直接内存访问的传输控制装置判断所述DMA通道中是否存在已经被其他DMA任务占用的通道。所述DMA通道包括至少一个用于数据 传输的DMA通道，所述直接内存访问的传输控制装置判断除了目标通道之外的通道中是否有其他DMA任务占用的通道。
S404，当DMA通道中存在已经被其他DMA任务占用的通道时，查询已占用通道的DMA任务的优先级。
具体的，当所述DMA通道中存在已经被其他DMA任务占用的通道时，所述直接内存访问的传输控制装置查询已占用通道的DMA任务的优先级。所述直接内存访问的传输控制装置根据优先级确定DMA任务的处理顺序。
S405，判断在所述已占用通道的DMA任务中是否存在低于所述目标DMA任务的优先级的DMA任务。
具体的，所述直接内存访问的传输控制装置判断在所述已占用通道的DMA任务中是否存在低于所述目标DMA任务的优先级的DMA任务。
S406，当在所述已占用通道的DMA任务中存在低于所述目标DMA任务的优先级的DMA任务时，暂停所述低于所述目标DMA任务的优先级的DMA任务的数据传输，并获取目标DMA任务的目标数据，将所述目标数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过所述低于所述目标DMA任务的优先级的DMA任务对应的已占用通道的输出队列进行输出。
具体的，当在所述已占用通道的DMA任务中存在低于所述目标DMA任务的优先级的DMA任务时，所述直接内存访问的传输控制装置暂停所述低于所述目标DMA任务的优先级的DMA任务的数据传输。可行的方案中，当所述低于所述目标DMA任务的优先级的DMA任务被划分为多个小任务时，当前时刻即使所述低于所述目标DMA任务的优先级的DMA任务中有一些小任务已从输出队列输出，但仍有其他小任务仍未被传输时或者已从所述已占用通道的输入队列输入时，暂停所述其他小任务的处理，优先对所述目标DMA任务进行数据传输。所述直接内存访问的传输控制装置获取目标DMA任务的目标数据，将所述目标数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过所述低于所述目标DMA任务的优先级的DMA任务对应的已占用通道的输出队列进行输出。可以理解的是，在完成对所述目标DMA任务的输出后，向CPU发送输出目标DMA任务对应的数据传输完毕的信号，以使将总线控制权还给CPU。
需要说明的是，本发明实施例中所介绍的直接内存访问的传输控制方法可以应用于外部设备与所述直接内存访问的传输控制装置的其中的一个DMA通道进行连接的情况，即，若所述外部设备接收数据，只能从该DMA传输通道的输出队列接收数据，若所述外部设备发送数据，只能从该DMA通道的输入队列发送数据。例如：外部设备A连接于DMA通道1以及外部设备B连接于DMA通道1的情况，外部设备A发出DMA任务1的传输请求，DMA任务1是将存储器的数据传输至外部设备，根据DMA任务1的优先级分配目标通道(所述目标通道并不限定于DMA通道1，是因为所述数据是从存储器传输至DMA通道，因此不限定数据输入的通道)，而外部设备B对应的DMA任务2正在DMA通道1中正在处理，并且DMA任务1的优先级高于DMA任务2的优先级，由于需要优先处理DMA任务1和两个任务的输出队列相同，因此暂停DMA任务2的数据传输，并获取DMA任务1的数据，将DMA任务1的数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过DMA通道1的输出队列进行输出。
在本发明实施例中，当接收到传输目标DMA任务的DMA传输请求时，根据目标DMA任务对应的优先级为其选择一目标通道，在DMA通道中存在其他DMA任务的情况下，通过查询已占用通道的其他DMA任务的优先级，并对已占用通道的其他DMA任务的优先级以及目标DMA任务的优先级进行对比，根据对比结果对DMA通道的传输数据进行控制，可以实现根据DMA任务的优先级合理规划数据传输，即使遇到紧急DMA任务也可以优先处理，提高了计算机系统处理效率和服务质量。
请参见图5，为本发明实施例提供了一种直接内存访问的传输控制方法的流程示意图。如图5所示，本发明实施例的所述方法可以包括以下步骤S501-步骤S507。
S501，预先保存DMA任务的优先级列表，以及DMA任务优先级与DMA通道映射关系表。
具体的，直接内存访问的传输控制装置预先保存DMA任务的优先级列表，以及DMA任务优先级与DMA通道映射关系表。所述直接内存访问的传输控 制装置对不同DMA任务设定不同优先级，对不同的DMA通道设定不同优先级，并可以接收对DMA任务优先级和DMA通道优先级进行更改。所述DMA通道包括至少一个用于数据传输的通道。可选的方案中，所述直接内存访问的传输控制装置对各个通道设定优先级，DMA任务的优先级可根据传输的数据量大小确定优先级，数据量较小的优先级高，数据量大的优先级高，按照数据量大小分为各个不同的优先级，将数据量对应的优先级与DMA通道设定的优先级进行对应，并将DMA任务的优先级列表、DMA任务优先级与DMA通道映射关系表进行保存。
S502，接收DMA传输请求，所述DMA传输请求携带目标DMA任务。
具体的，所述直接内存访问的传输控制装置接收DMA传输请求，所述DMA传输请求携带目标DMA任务，从所述DMA传输请求中获取目标DMA任务。可以理解的是，外部设备如果想要通过总线直接向存储器传输数据时，外部设备先通过所述直接内存访问的传输控制装置向CPU发送DMA传输请求信号，即所述直接内存访问的传输控制装置向CPU提出接管总线控制权的请求，CPU收到请求并响应DMA传输请求时，会让出总线控制权，此时，所述直接内存访问的传输控制装置可对DMA传输请求进行处理，获取所述DMA传输请求中携带的目标DMA任务，用以进行数据传输。
S503，查询所述目标DMA任务的优先级，并根据所述目标DMA任务的优先级，从DMA通道中选择与所述目标DMA的优先级相对应的DMA通道作为目标通道。
具体的，所述直接内存访问的传输控制装置在所述DMA任务的优先级列表中查询所述目标DMA任务的优先级，从所述DMA任务优先级与DMA通道映射关系表中查询与所述目标DMA任务的优先级相对应的DMA通道，将与所述目标DMA任务的优先级相对应的DMA通道作为目标通道。
S504，判断所述DMA通道中是否存在已经被其他DMA任务占用的通道。
具体的，所述直接内存访问的传输控制装置判断所述DMA通道中是否存在已经被其他DMA任务占用的通道。所述DMA通道包括至少一个用于数据传输的DMA通道，所述直接内存访问的传输控制装置判断除了目标通道之外的通道中是否有其他DMA任务占用的通道。
S505，当DMA通道中存在已经被其他DMA任务占用的通道时，查询已占用通道的DMA任务的优先级。
具体的，当所述DMA通道中存在已经被其他DMA任务占用的通道时，所述直接内存访问的传输控制装置查询已占用通道的DMA任务的优先级。所述直接内存访问的传输控制装置根据优先级确定DMA任务的处理顺序。
S506，判断在所述已占用通道的DMA任务中是否存在低于所述目标DMA任务的优先级的DMA任务。
具体的，所述直接内存访问的传输控制装置判断在所述已占用通道的DMA任务中是否存在低于所述目标DMA任务的优先级的DMA任务。
S507，当在所述已占用通道的DMA任务中存在低于所述目标DMA任务的优先级的DMA任务时，暂停所述低于所述目标DMA任务的优先级的DMA任务的数据传输，并获取目标DMA任务的目标数据，将所述目标数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过所述低于所述目标DMA任务的优先级的DMA任务对应的已占用通道的输出队列进行输出。
具体的，当在所述已占用通道的DMA任务中存在低于所述目标DMA任务的优先级的DMA任务时，所述直接内存访问的传输控制装置暂停所述低于所述目标DMA任务的优先级的DMA任务的数据传输。可行的方案中，当所述低于所述目标DMA任务的优先级的DMA任务被划分为多个小任务时，当前时刻即使所述低于所述目标DMA任务的优先级的DMA任务中有一些小任务已从输出队列输出，但仍有其他小任务仍未被传输时或者已从所述已占用通道的输入队列输入时，暂停所述其他小任务的处理，优先对所述目标DMA任务进行数据传输。所述直接内存访问的传输控制装置获取目标DMA任务的目标数据，将所述目标数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过所述低于所述目标DMA任务的优先级的DMA任务对应的已占用通道的输出队列进行输出。可以理解的是，在完成对所述目标DMA任务的输出后，向CPU发送输出目标DMA任务对应的数据传输完毕的信号，以使将总线控制权还给CPU。
进一步，一种可行的方案中，当DMA通道中不存在已经被其他DMA任务占用的通道时，获取目标DMA任务对应的目标数据，将所述目标数据通过 所述目标通道的输入队列进行输入，以及将所述目标数据通过所述目标通道的输出队列进行输出。另一种可行的方案中，当在所述已占用通道的DMA任务中不存在低于所述目标DMA任务的优先级的DMA任务时，获取目标DMA任务对应的目标数据，将所述目标数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过所述目标通道的输出队列进行输出。
需要说明的是，本发明实施例中所介绍的直接内存访问的传输控制方法可以应用于外部设备与所述直接内存访问的传输控制装置的其中的一个DMA通道进行连接的情况，即，若所述外部设备接收数据，只能从该DMA传输通道的输出队列接收数据，若所述外部设备发送数据，只能从该DMA通道的输入队列发送数据。例如：外部设备A连接于DMA通道1以及外部设备B连接于DMA通道1的情况，外部设备A发出DMA任务1的传输请求，DMA任务1是将存储器的数据传输至外部设备，根据DMA任务1的优先级分配目标通道(所述目标通道并不限定于DMA通道1，是因为所述数据是从存储器传输至DMA通道，因此不限定数据输入的通道)，而外部设备B对应的DMA任务2正在DMA通道1中正在处理，并且DMA任务1的优先级高于DMA任务2的优先级，由于需要优先处理DMA任务1和两个任务的输出队列相同，因此暂停DMA任务2的数据传输，并获取DMA任务1的数据，将DMA任务1的数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过DMA通道1的输出队列进行输出。
在本发明实施例中，当接收到传输目标DMA任务的DMA传输请求时，根据目标DMA任务对应的优先级为其选择一目标通道，在DMA通道中存在其他DMA任务的情况下，通过查询已占用通道的其他DMA任务的优先级，并对已占用通道的其他DMA任务的优先级以及目标DMA任务的优先级进行对比，根据对比结果对DMA通道的传输数据进行控制，可以实现根据DMA任务的优先级合理规划数据传输，即使遇到紧急DMA任务也可以优先处理，提高了计算机系统处理效率和服务质量。
下面将结合附图6-附图9，对本发明实施例提供的直接内存访问的传输控制装置进行详细介绍。需要说明的是，附图4-附图5所示的直接内存访问的传 输控制装置，用于执行本发明图2-图5所示实施例的方法，为了便于说明，仅示出了与本发明实施例相关的部分，具体技术细节未揭示的，请参照本发明图2-图5所示的实施例。
请参见图6，为本发明实施例提供了一种直接内存访问的传输控制装置的结构示意图。如图6所示，本发明实施例的所述直接内存访问的传输控制装置6可以包括：接收单元601、第一查询单元602、第一判断单元603、第二查询单元604、第二判断单元605、第三查询单元606、第三判断单元607、暂停单元608和第一传输单元609。
接收单元601，用于接收DMA传输请求，所述DMA传输请求携带目标DMA任务。
具体实现中，所述接收单元601接收DMA传输请求，所述DMA传输请求携带目标DMA任务，从所述DMA传输请求中获取目标DMA任务。可以理解的是，外部设备如果想要通过总线直接向存储器传输数据时，外部设备先通过所述直接内存访问的传输控制装置向CPU发送DMA传输请求信号，即向CPU提出接管总线控制权的请求，CPU收到请求并响应DMA传输请求时，会让出总线控制权，此时，所述直接内存访问的传输控制装置可对DMA传输请求进行处理，获取所述DMA传输请求中携带的目标DMA任务，用以进行数据传输。
第一查询单元602，用于查询所述目标DMA任务的优先级，并根据所述目标DMA任务的优先级，从DMA通道中选择与所述目标DMA的优先级相对应的DMA通道作为目标通道。
具体实现中，所述第一查询单元602查询所述目标DMA任务的优先级，并根据所述目标DMA任务的优先级，从DMA通道中选择与所述目标DMA的优先级相对应的DMA通道作为目标通道。所述第一查询单元602可以预先对不同应用的不同DMA任务设定不同优先级，可选的方案中，传输数据量大的DMA任务设置的优先级较低，传输数据量小的DMA任务设置的优先级较高，这样可以及时完成传输数据量小的DMA任务，提高计算机系统的处理效率。所述第一查询单元602并根据所述目标DMA任务的优先级，从DMA通道中选择与所述目标DMA的优先级相对应的DMA通道作为目标通道，用以 通过所述目标通道对所述目标DMA任务进行数据传输。
第一判断单元603，用于判断所述DMA通道中是否存在已经被其他DMA任务占用的通道。
具体实现中，所述第一判断单元603判断所述DMA通道中是否存在已经被其他DMA任务占用的通道。所述DMA通道包括至少一个用于数据传输的DMA通道，所述直接内存访问的传输控制装置判断除了目标通道之外的通道中是否有其他DMA任务占用的通道。
第二查询单元604，用于当所述DMA通道中存在已经被其他DMA任务占用的通道时，查询已占用通道的DMA任务的任务类型以及所述目标DMA任务的任务类型。
具体实现中，当所述第一判断单元603判断所述DMA通道中存在已经被其他DMA任务占用的通道时，所述第二查询单元604查询已占用通道的DMA任务的任务类型以及所述目标DMA任务的任务类型。其中，所述任务类型可以划分为带宽型任务和延时型任务，带宽型任务注重单位时间处理的数据量，延时型任务注重单位任务的处理时间。可行的方案中，也可以将任务类型划分为OLTP和OLAP，其中，OLTP是以小的任务以及小的查询为主，衡量OLTP系统的性能参数是单任务的响应时间，例如在线系统的网上订票等，OLAP是以大任务为主，主要是对历史数据进行多维度的统计分析，任务的处理时间很长，衡量OLAP系统的性能参数是单位时间处理数据的总量。通过对不同应用的不同DMA任务的任务类型都已进行了记录，所述第二查询单元604可通过记录查询DMA任务对应的任务类型。
第二判断单元605，用于判断在所述已占用通道的DMA任务中是否存在与所述目标DMA任务的任务类型不相同的DMA任务。
具体实现中，根据所查询到的所述已占用通道的DMA任务的任务类型和目标DMA任务的任务类型，所述第二判断单元605判断在所述已占用通道的DMA任务中是否存在与所述目标DMA任务的任务类型不相同的DMA任务。
第三查询单元606，用于当在所述已占用通道的DMA任务中存在与所述目标DMA任务的任务类型不相同的DMA任务时，查询所述与所述目标DMA任务的任务类型不相同的DMA任务的优先级。
具体实现中，当所述第二判断单元605判断在所述已占用通道的DMA任务中存在与所述目标DMA任务的任务类型不相同的DMA任务时，所述第三查询单元606查询所述与所述目标DMA任务的任务类型不相同的DMA任务的优先级，用以根据任务类型和优先级确定DMA任务的优先处理顺序。
第三判断单元607，用于判断在所述与所述目标DMA任务的任务类型不相同的DMA任务中是否存在低于所述目标DMA任务的优先级的DMA任务。
具体实现中，所述第三判断单元607判断在所述与所述目标DMA任务的任务类型不相同的DMA任务中是否存在低于所述目标DMA任务的优先级的DMA任务。
暂停单元608，用于当在所述与所述目标DMA任务的任务类型不相同的DMA任务中，存在低于所述目标DMA任务的优先级的DMA任务时，暂停所述低于所述目标DMA任务的优先级的DMA任务的数据传输。
具体实现中，当所述第三判断单元607判断在所述与所述目标DMA任务的任务类型不相同的DMA任务中，存在低于所述目标DMA任务的优先级的DMA任务时，所述暂停单元608暂停所述低于所述目标DMA任务的优先级的DMA任务的数据传输。可行的方案中，当所述低于所述目标DMA任务的优先级的DMA任务被划分为多个小任务时，当前时刻即使所述低于所述目标DMA任务的优先级的DMA任务中有一些小任务已从输出队列输出，但仍有其他小任务仍未被传输时或者已从所述已占用通道的输入队列输入时，所述暂停单元608暂停所述其他小任务的处理，优先对所述目标DMA任务进行数据传输。
第一传输单元609，用于获取目标DMA任务的目标数据，将所述目标数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过所述低于所述目标DMA任务的优先级的DMA任务对应的已占用通道的输出队列进行输出。
具体实现中，在暂停所述低于所述目标DMA任务的优先级的DMA任务的数据传输之后，所述第一传输单元609获取目标DMA任务的目标数据，将所述目标数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过所述低于所述目标DMA任务的优先级的DMA任务对应的已占用通道的输 出队列进行输出。可以理解的是，在完成对所述目标DMA任务的输出后，向CPU发送输出目标DMA任务对应的数据传输完毕的信号，以使将总线控制权还给CPU。
需要说明的是，本发明实施例中所介绍的直接内存访问的传输控制方法可以应用于外部设备与所述直接内存访问的传输控制装置的其中的一个DMA通道进行连接的情况，即，若所述外部设备接收数据，只能从该DMA传输通道的输出队列接收数据，若所述外部设备发送数据，只能从该DMA通道的输入队列发送数据。例如：外部设备A连接于DMA通道1以及外部设备B连接于DMA通道1的情况，外部设备A发出DMA任务1的传输请求，DMA任务1是将存储器的数据传输至外部设备，根据DMA任务1的优先级分配目标通道(所述目标通道并不限定于DMA通道1，是因为所述数据是从存储器传输至DMA通道，因此不限定数据输入的通道)，而外部设备B对应的DMA任务2正在DMA通道1中正在处理，并且DMA任务1的任务类型和DMA任务2的任务类型不同，DMA任务1的优先级高于DMA任务2的优先级，由于需要优先处理DMA任务1和两个任务的输出队列相同，因此暂停DMA任务2的数据传输，并获取DMA任务1的数据，将DMA任务1的数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过DMA通道1的输出队列进行输出。
在本发明实施例中，当接收到传输目标DMA任务的DMA传输请求时，根据目标DMA任务对应的优先级为其选择一目标通道，在DMA通道中存在其他DMA任务的情况下，通过查询已占用通道的其他DMA任务的任务类型、优先级以及目标DMA任务的任务类型，并对已占用通道的其他DMA任务的任务类型、优先级以及目标DMA任务的任务类型、优先级进行对比，根据对比结果对DMA通道的传输数据进行控制，可以实现根据DMA任务的优先级、任务类型合理规划数据传输，即使遇到紧急DMA任务也可以优先处理，提高了计算机系统处理效率和服务质量。
请参见图7，为本发明实施例提供了一种直接内存访问的传输控制装置的结构示意图。如图7所示，本发明实施例的所述直接内存访问的传输控制装置 7可以包括：预存单元701、接收单元702、第一查询单元703、第一判断单元704、第二传输单元705、第二查询单元706、第二判断单元707、第三传输单元708、第三查询单元709、第三判断单元710、第四传输单元711、暂停单元712和第一传输单元713。
预存单元701，用于预先保存DMA任务的优先级列表，以及DMA任务优先级与DMA通道映射关系表；
具体实现中，所述预存单元701预先保存DMA任务的优先级列表，以及DMA任务优先级与DMA通道映射关系表。所述直接内存访问的传输控制装置对不同DMA任务设定不同优先级，对不同的DMA通道设定不同优先级，并可以接收对DMA任务优先级和DMA通道优先级进行更改。所述DMA通道包括至少一个用于数据传输的通道。可选的方案中，所述直接内存访问的传输控制装置对各个通道设定优先级，DMA任务的优先级可根据传输的数据量大小确定优先级，数据量较小的优先级高，数据量大的优先级高，按照数据量大小分为各个不同的优先级，将数据量对应的优先级与DMA通道设定的优先级进行对应，并将DMA任务的优先级列表、DMA任务优先级与DMA通道映射关系表进行保存。
接收单元702，用于接收DMA传输请求，所述DMA传输请求携带目标DMA任务；
具体实现中，所述接收单元702接收DMA传输请求，所述DMA传输请求携带目标DMA任务，从所述DMA传输请求中获取目标DMA任务。可以理解的是，外部设备如果想要通过总线直接向存储器传输数据时，外部设备先通过所述直接内存访问的传输控制装置向CPU发送DMA传输请求信号，即所述直接内存访问的传输控制装置向CPU提出接管总线控制权的请求，CPU收到请求并响应DMA传输请求时，会让出总线控制权，此时，所述直接内存访问的传输控制装置可对DMA传输请求进行处理，获取所述DMA传输请求中携带的目标DMA任务，用以进行数据传输。
第一查询单元703，用于查询所述目标DMA任务的优先级，并根据所述目标DMA任务的优先级，从DMA通道中选择与所述目标DMA的优先级相对应的DMA通道作为目标通道；
具体实现中，所述第一查询单元703在所述DMA任务的优先级列表中查询所述目标DMA任务的优先级，从所述DMA任务优先级与DMA通道映射关系表中查询与所述目标DMA任务的优先级相对应的DMA通道，将与所述目标DMA任务的优先级相对应的DMA通道作为目标通道。
第一判断单元704，用于判断所述DMA通道中是否存在已经被其他DMA任务占用的通道；
具体实现中，所述第一判断单元704判断所述DMA通道中是否存在已经被其他DMA任务占用的通道。所述DMA通道包括至少一个用于数据传输的DMA通道，所述第一判断单元704判断除了目标通道之外的通道中是否有其他DMA任务占用的通道。若所述DMA通道中存在已经被其他DMA任务占用的通道，则执行第二传输单元705，若所述DMA通道中不存在已经被其他DMA任务占用的通道，则执行第二查询单元706。
第二传输单元705，用于当所述DMA通道中不存在已经被其他DMA任务占用的通道时，获取目标DMA任务对应的目标数据，将所述目标数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过所述目标通道的输出队列进行输出。
具体实现中，当所述第一判断单元704判断所述DMA通道中不存在已经被其他DMA任务占用的通道时，所述第二传输单元705获取目标DMA任务对应的目标数据，将所述目标数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过所述目标通道的输出队列进行输出。
第二查询单元706，用于当所述DMA通道中存在已经被其他DMA任务占用的通道时，查询已占用通道的DMA任务的任务类型以及所述目标DMA任务的任务类型；
具体实现中，当所述第一判断单元704判断所述DMA通道中存在已经被其他DMA任务占用的通道时，所述第二查询单元706查询已占用通道的DMA任务的任务类型以及所述目标DMA任务的任务类型。其中，所述任务类型可以划分为带宽型任务和延时型任务，带宽型任务注重单位时间处理的数据量，延时型任务注重单位任务的处理时间。可行的方案中，也可以将任务类型划分为OLTP和OLAP，其中，OLTP是以小的任务以及小的查询为主，衡量OLTP 系统的性能参数是单任务的响应时间，例如在线系统的网上订票等，OLAP是以大任务为主，主要是对历史数据进行多维度的统计分析，任务的处理时间很长，衡量OLAP系统的性能参数是单位时间处理数据的总量。通过对不同应用的不同DMA任务的任务类型都已进行了记录，所述第二查询单元706可通过记录查询DMA任务对应的任务类型。
第二判断单元707，用于判断在所述已占用通道的DMA任务中是否存在与所述目标DMA任务的任务类型不相同的DMA任务；
具体实现中，所述第二判断单元707根据所查询到的所述已占用通道的DMA任务的任务类型和目标DMA任务的任务类型，判断在所述已占用通道的DMA任务中是否存在与所述目标DMA任务的任务类型不相同的DMA任务。若在所述已占用通道的DMA任务中存在与所述目标DMA任务的任务类型不相同的DMA任务，则执行第三传输单元708，若在所述已占用通道的DMA任务中是不存在与所述目标DMA任务的任务类型不相同的DMA任务，则执行第三查询单元709。
第三传输单元708，用于当在所述已占用通道的DMA任务中不存在与所述目标DMA任务的任务类型不相同的DMA任务时，获取目标DMA任务对应的目标数据，将所述目标数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过所述目标通道的输出队列进行输出。
具体实现中，当所述第二判断单元707判断在所述已占用通道的DMA任务中不存在与所述目标DMA任务的任务类型不相同的DMA任务时，第三传输单元708获取目标DMA任务对应的目标数据，将所述目标数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过所述目标通道的输出队列进行输出。
第三查询单元709，用于当在所述已占用通道的DMA任务中存在与所述目标DMA任务的任务类型不相同的DMA任务时，查询所述与所述目标DMA任务的任务类型不相同的DMA任务的优先级；
具体实现中，当所述第二判断单元707判断在所述已占用通道的DMA任务中存在与所述目标DMA任务的任务类型不相同的DMA任务时，所述第三查询单元709查询所述与所述目标DMA任务的任务类型不相同的DMA任务 的优先级，用以根据任务类型和优先级确定DMA任务的优先处理顺序。
第三判断单元710，用于判断在所述与所述目标DMA任务的任务类型不相同的DMA任务中是否存在低于所述目标DMA任务的优先级的DMA任务；
具体实现中，所述第三判断单元710判断在所述与所述目标DMA任务的任务类型不相同的DMA任务中是否存在低于所述目标DMA任务的优先级的DMA任务。若在所述与所述目标DMA任务的任务类型不相同的DMA任务中存在低于所述目标DMA任务的优先级的DMA任务，则执行第四传输单元711，若不存在，则执行暂停单元712。
第四传输单元711，用于当在所述与所述目标DMA任务的任务类型不相同的DMA任务中不存在低于所述目标DMA任务的优先级的DMA任务时，获取目标DMA任务对应的目标数据，将所述目标数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过所述目标通道的输出队列进行输出。
具体实现中，当所述第三判断单元710判断在所述与所述目标DMA任务的任务类型不相同的DMA任务中不存在低于所述目标DMA任务的优先级的DMA任务时，所述第四传输单元711获取目标DMA任务对应的目标数据，将所述目标数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过所述目标通道的输出队列进行输出。
暂停单元712，用于当在所述与所述目标DMA任务的任务类型不相同的DMA任务中，存在低于所述目标DMA任务的优先级的DMA任务时，暂停所述低于所述目标DMA任务的优先级的DMA任务的数据传输；
具体实现中，当在所述与所述目标DMA任务的任务类型不相同的DMA任务中，存在低于所述目标DMA任务的优先级的DMA任务时，所述暂停单元712暂停所述低于所述目标DMA任务的优先级的DMA任务的数据传输。可行的方案中，当所述低于所述目标DMA任务的优先级的DMA任务被划分为多个小任务时，当前时刻即使所述低于所述目标DMA任务的优先级的DMA任务中有一些小任务已从输出队列输出，但仍有其他小任务仍未被传输时或者已从所述已占用通道的输入队列输入时，暂停所述其他小任务的处理，优先对所述目标DMA任务进行数据传输。
第一传输单元713，用于获取目标DMA任务的目标数据，将所述目标数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过所述低于所述目标DMA任务的优先级的DMA任务对应的已占用通道的输出队列进行输出。
具体实现中，在暂停所述低于所述目标DMA任务的优先级的DMA任务的数据传输之后，所述第一传输单元713获取目标DMA任务的目标数据，将所述目标数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过所述低于所述目标DMA任务的优先级的DMA任务对应的已占用通道的输出队列进行输出。可以理解的是，在完成对所述目标DMA任务的输出后，向CPU发送输出目标DMA任务对应的数据传输完毕的信号，以使将总线控制权还给CPU。
需要说明的是，本发明实施例中所介绍的直接内存访问的传输控制方法可以应用于外部设备与所述直接内存访问的传输控制装置的其中的一个DMA通道进行连接的情况，即，若所述外部设备接收数据，只能从该DMA传输通道的输出队列接收数据，若所述外部设备发送数据，只能从该DMA通道的输入队列发送数据。例如：外部设备A连接于DMA通道1以及外部设备B连接于DMA通道1的情况，外部设备A发出DMA任务1的传输请求，DMA任务1是将存储器的数据传输至外部设备，根据DMA任务1的优先级分配目标通道(所述目标通道并不限定于DMA通道1，是因为所述数据是从存储器传输至DMA通道，因此不限定数据输入的通道)，而外部设备B对应的DMA任务2正在DMA通道1中正在处理，并且DMA任务1的任务类型和DMA任务2的任务类型不同，DMA任务1的优先级高于DMA任务2的优先级，由于需要优先处理DMA任务1和两个任务的输出队列相同，因此暂停DMA任务2的数据传输，并获取DMA任务1的数据，将DMA任务1的数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过DMA通道1的输出队列进行输出。
在本发明实施例中，当接收到传输目标DMA任务的DMA传输请求时，根据目标DMA任务对应的优先级为其选择一目标通道，在DMA通道中存在其他DMA任务的情况下，通过查询已占用通道的其他DMA任务的任务类型、 优先级以及目标DMA任务的任务类型，并对已占用通道的其他DMA任务的任务类型、优先级以及目标DMA任务的任务类型、优先级进行对比，根据对比结果对DMA通道的传输数据进行控制，可以实现根据DMA任务的优先级、任务类型合理规划数据传输，即使遇到紧急DMA任务也可以优先处理，提高了计算机系统处理效率和服务质量。
请参见图8，为本发明实施例提供了一种直接内存访问的传输控制装置的结构示意图。如图8所示，本发明实施例的所述直接内存访问的传输控制装置8可以包括：接收单元801、第一查询单元802、第一判断单元803、第二查询单元804、第二判断单元805、暂停单元806和传输单元807。
接收单元801，用于接收DMA传输请求，所述DMA传输请求携带目标DMA任务。
具体实现中，所述接收单元801接收DMA传输请求，所述DMA传输请求携带目标DMA任务，从所述DMA传输请求中获取目标DMA任务。可以理解的是，外部设备如果想要通过总线直接向存储器传输数据时，外部设备先通过所述直接内存访问的传输控制装置向CPU发送DMA传输请求信号，即向CPU提出接管总线控制权的请求，CPU收到请求并响应DMA传输请求时，会让出总线控制权，此时，所述直接内存访问的传输控制装置可对DMA传输请求进行处理，获取所述DMA传输请求中携带的目标DMA任务，用以进行数据传输。
第一查询单元802，用于查询所述目标DMA任务的优先级，并根据所述目标DMA任务的优先级，从DMA通道中选择与所述目标DMA的优先级相对应的DMA通道作为目标通道。
具体实现中，所述第一查询单元802查询所述目标DMA任务的优先级，并根据所述目标DMA任务的优先级，从DMA通道中选择与所述目标DMA的优先级相对应的DMA通道作为目标通道。可以预先对不同应用的不同DMA任务设定不同优先级，可选的方案中，传输数据量大的DMA任务设置的优先级较低，传输数据量小的DMA任务设置的优先级较高，这样可以及时完成传输数据量小的DMA任务，提高计算机系统的处理效率。所述直接内存访问的 传输控制装置并根据所述目标DMA任务的优先级，从DMA通道中选择与所述目标DMA的优先级相对应的DMA通道作为目标通道，用以通过所述目标通道对所述目标DMA任务进行数据传输。
第一判断单元803，用于判断所述DMA通道中是否存在已经被其他DMA任务占用的通道。
具体实现中，所述第一判断单元803判断所述DMA通道中是否存在已经被其他DMA任务占用的通道。所述DMA通道包括至少一个用于数据传输的DMA通道，所述直接内存访问的传输控制装置判断除了目标通道之外的通道中是否有其他DMA任务占用的通道。
第二查询单元804，用于当DMA通道中存在已经被其他DMA任务占用的通道时，查询已占用通道的DMA任务的优先级。
具体实现中，当所述第一判断单元803判断所述DMA通道中存在已经被其他DMA任务占用的通道时，所述第二查询单元804查询已占用通道的DMA任务的优先级，用以根据优先级确定DMA任务的处理顺序。
第二判断单元805，用于判断在所述已占用通道的DMA任务中是否存在低于所述目标DMA任务的优先级的DMA任务。
具体实现中，所述第二判断单元805判断在所述已占用通道的DMA任务中是否存在低于所述目标DMA任务的优先级的DMA任务。
暂停单元806，用于当在所述已占用通道的DMA任务中存在低于所述目标DMA任务的优先级的DMA任务时，暂停所述低于所述目标DMA任务的优先级的DMA任务的数据传输。
具体实现中，当所述第二判断单元805判断在所述已占用通道的DMA任务中存在低于所述目标DMA任务的优先级的DMA任务时，所述暂停单元806暂停所述低于所述目标DMA任务的优先级的DMA任务的数据传输。可行的方案中，当所述低于所述目标DMA任务的优先级的DMA任务被划分为多个小任务时，当前时刻即使所述低于所述目标DMA任务的优先级的DMA任务中有一些小任务已从输出队列输出，但仍有其他小任务仍未被传输时或者已从所述已占用通道的输入队列输入时，所述暂停单元806暂停所述其他小任务的处理，优先对所述目标DMA任务进行数据传输。
传输单元807，用于获取目标DMA任务的目标数据，将所述目标数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过所述低于所述目标DMA任务的优先级的DMA任务对应的已占用通道的输出队列进行输出。
具体实现中，所述传输单元807获取目标DMA任务的目标数据，将所述目标数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过所述低于所述目标DMA任务的优先级的DMA任务对应的已占用通道的输出队列进行输出。可以理解的是，在完成对所述目标DMA任务的输出后，向CPU发送输出目标DMA任务对应的数据传输完毕的信号，以使将总线控制权还给CPU。
需要说明的是，本发明实施例中所介绍的直接内存访问的传输控制方法可以应用于外部设备与所述直接内存访问的传输控制装置的其中的一个DMA通道进行连接的情况，即，若所述外部设备接收数据，只能从该DMA传输通道的输出队列接收数据，若所述外部设备发送数据，只能从该DMA通道的输入队列发送数据。例如：外部设备A连接于DMA通道1以及外部设备B连接于DMA通道1的情况，外部设备A发出DMA任务1的传输请求，DMA任务1是将存储器的数据传输至外部设备，根据DMA任务1的优先级分配目标通道(所述目标通道并不限定于DMA通道1，是因为所述数据是从存储器传输至DMA通道，因此不限定数据输入的通道)，而外部设备B对应的DMA任务2正在DMA通道1中正在处理，并且DMA任务1的优先级高于DMA任务2的优先级，由于需要优先处理DMA任务1和两个任务的输出队列相同，因此暂停DMA任务2的数据传输，并获取DMA任务1的数据，将DMA任务1的数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过DMA通道1的输出队列进行输出。
在本发明实施例中，当接收到传输目标DMA任务的DMA传输请求时，根据目标DMA任务对应的优先级为其选择一目标通道，在DMA通道中存在其他DMA任务的情况下，通过查询已占用通道的其他DMA任务的优先级，并对已占用通道的其他DMA任务的优先级以及目标DMA任务的优先级进行对比，根据对比结果对DMA通道的传输数据进行控制，可以实现根据DMA任务的优先级合理规划数据传输，即使遇到紧急DMA任务也可以优先处理， 提高了计算机系统处理效率和服务质量。
请参见图9，为本发明实施例提供了一种直接内存访问的传输控制装置的结构示意图。如图9所示，本发明实施例的所述直接内存访问的传输控制装置9可以包括：预存单元901、接收单元902、第一查询单元903、第一判断单元904、第二查询单元905、第二判断单元906、暂停单元907和第一传输单元908。
预存单元901，用于预先保存DMA任务的优先级列表，以及DMA任务优先级与DMA通道映射关系表。
具体实现中，所述预存单元901预先保存DMA任务的优先级列表，以及DMA任务优先级与DMA通道映射关系表。所述直接内存访问的传输控制装置对不同DMA任务设定不同优先级，对不同的DMA通道设定不同优先级，并可以接收对DMA任务优先级和DMA通道优先级进行更改。所述DMA通道包括至少一个用于数据传输的通道。可选的方案中，所述直接内存访问的传输控制装置对各个通道设定优先级，DMA任务的优先级可根据传输的数据量大小确定优先级，数据量较小的优先级高，数据量大的优先级高，按照数据量大小分为各个不同的优先级，将数据量对应的优先级与DMA通道设定的优先级进行对应，并将DMA任务的优先级列表、DMA任务优先级与DMA通道映射关系表进行保存。
接收单元902，用于接收DMA传输请求，所述DMA传输请求携带目标DMA任务。
具体实现中，所述接收单元902接收DMA传输请求，所述DMA传输请求携带目标DMA任务，从所述DMA传输请求中获取目标DMA任务。可以理解的是，外部设备如果想要通过总线直接向存储器传输数据时，外部设备先通过所述直接内存访问的传输控制装置向CPU发送DMA传输请求信号，即所述直接内存访问的传输控制装置向CPU提出接管总线控制权的请求，CPU收到请求并响应DMA传输请求时，会让出总线控制权，此时，所述直接内存访问的传输控制装置可对DMA传输请求进行处理，获取所述DMA传输请求中携带的目标DMA任务，用以进行数据传输。
第一查询单元903，用于查询所述目标DMA任务的优先级，并根据所述 目标DMA任务的优先级，从DMA通道中选择与所述目标DMA的优先级相对应的DMA通道作为目标通道。
具体实现中，所述第一查询单元903在所述DMA任务的优先级列表中查询所述目标DMA任务的优先级，从所述DMA任务优先级与DMA通道映射关系表中查询与所述目标DMA任务的优先级相对应的DMA通道，将与所述目标DMA任务的优先级相对应的DMA通道作为目标通道。
第一判断单元904，用于判断所述DMA通道中是否存在已经被其他DMA任务占用的通道。
具体实现中，所述第一判断单元904判断所述DMA通道中是否存在已经被其他DMA任务占用的通道。所述DMA通道包括至少一个用于数据传输的DMA通道，所述第一判断单元904判断除了目标通道之外的通道中是否有其他DMA任务占用的通道。
第二查询单元905，用于当DMA通道中存在已经被其他DMA任务占用的通道时，查询已占用通道的DMA任务的优先级。
具体实现中，当所述第一判断单元904判断所述DMA通道中存在已经被其他DMA任务占用的通道时，所述第二查询单元905查询已占用通道的DMA任务的优先级，用以根据优先级确定DMA任务的处理顺序。
第二判断单元906，用于判断在所述已占用通道的DMA任务中是否存在低于所述目标DMA任务的优先级的DMA任务。
具体实现中，所述第二判断单元906判断在所述已占用通道的DMA任务中是否存在低于所述目标DMA任务的优先级的DMA任务。
暂停单元907，用于当在所述已占用通道的DMA任务中存在低于所述目标DMA任务的优先级的DMA任务时，暂停所述低于所述目标DMA任务的优先级的DMA任务的数据传输。
具体实现中，当所述第二判断单元906判断在所述已占用通道的DMA任务中存在低于所述目标DMA任务的优先级的DMA任务时，所述暂停单元907暂停所述低于所述目标DMA任务的优先级的DMA任务的数据传输。可行的方案中，当所述低于所述目标DMA任务的优先级的DMA任务被划分为多个小任务时，当前时刻即使所述低于所述目标DMA任务的优先级的DMA任务 中有一些小任务已从输出队列输出，但仍有其他小任务仍未被传输时或者已从所述已占用通道的输入队列输入时，所述暂停单元907暂停所述其他小任务的处理，优先对所述目标DMA任务进行数据传输。
传输单元908，用于获取目标DMA任务的目标数据，将所述目标数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过所述低于所述目标DMA任务的优先级的DMA任务对应的已占用通道的输出队列进行输出。
具体实现中，所述传输单元908获取目标DMA任务的目标数据，将所述目标数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过所述低于所述目标DMA任务的优先级的DMA任务对应的已占用通道的输出队列进行输出。可以理解的是，在完成对所述目标DMA任务的输出后，向CPU发送输出目标DMA任务对应的数据传输完毕的信号，以使将总线控制权还给CPU。
进一步，一种可行的方案中，当所述第一判断单元904判断DMA通道中不存在已经被其他DMA任务占用的通道时，获取目标DMA任务对应的目标数据，将所述目标数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过所述目标通道的输出队列进行输出。另一种可行的方案中，当所述第二判断单元906判断在所述已占用通道的DMA任务中不存在低于所述目标DMA任务的优先级的DMA任务时，获取目标DMA任务对应的目标数据，将所述目标数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过所述目标通道的输出队列进行输出。
需要说明的是，本发明实施例中所介绍的直接内存访问的传输控制方法可以应用于外部设备与所述直接内存访问的传输控制装置的其中的一个DMA通道进行连接的情况，即，若所述外部设备接收数据，只能从该DMA传输通道的输出队列接收数据，若所述外部设备发送数据，只能从该DMA通道的输入队列发送数据。例如：外部设备A连接于DMA通道1以及外部设备B连接于DMA通道1的情况，外部设备A发出DMA任务1的传输请求，DMA任务1是将存储器的数据传输至外部设备，根据DMA任务1的优先级分配目标通道(所述目标通道并不限定于DMA通道1，是因为所述数据是从存储器传输至DMA通道，因此不限定数据输入的通道)，而外部设备B对应的DMA任务2 正在DMA通道1中正在处理，并且DMA任务1的优先级高于DMA任务2的优先级，由于需要优先处理DMA任务1和两个任务的输出队列相同，因此暂停DMA任务2的数据传输，并获取DMA任务1的数据，将DMA任务1的数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过DMA通道1的输出队列进行输出。
在本发明实施例中，当接收到传输目标DMA任务的DMA传输请求时，根据目标DMA任务对应的优先级为其选择一目标通道，在DMA通道中存在其他DMA任务的情况下，通过查询已占用通道的其他DMA任务的优先级，并对已占用通道的其他DMA任务的优先级以及目标DMA任务的优先级进行对比，根据对比结果对DMA通道的传输数据进行控制，可以实现根据DMA任务的优先级合理规划数据传输，即使遇到紧急DMA任务也可以优先处理，提高了计算机系统处理效率和服务质量。
本发明实施例还提供一种计算机存储介质，其中，该计算机存储介质可存储有程序，该程序执行时包括上述方法实施例中记载的任意一种直接内存访问的传输控制方法的部分或全部步骤。
在上述实施例中，对各个实施例的描述都各有侧重，某个实施例中没有详述的部分，可以参见其他实施例的相关描述。
需要说明的是，对于前述的各方法实施例，为了简单描述，故将其都表述为一系列的动作组合，但是本领域技术人员应该知悉，本发明并不受所描述的动作顺序的限制，因为依据本发明，某些步骤可能可以采用其他顺序或者同时进行。其次，本领域技术人员也应该知悉，说明书中所描述的实施例均属于优选实施例，所涉及的动作和模块并不一定是本发明所必须的。
在本申请所提供的几个实施例中，应该理解到，所揭露的装置，可通过其它的方式实现。例如，以上所描述的装置实施例仅仅是示意性的，例如上述单元的划分，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，例如多个单元或组件可以结合或者可以集成到另一个系统，或一些特征可以忽略，或不执行。另一点，所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口，装置或单元的间接耦合或通信连接，可以是电性或其它的形式。
上述作为分离部件说明的单元可以是或者也可以不是物理上分开的，作为单元显示的部件可以是或者也可以不是物理单元，即可以位于一个地方，或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部单元来实现本实施例方案的目的。
另外，在本发明各实施例中的各功能单元可以集成在一个处理单元中，也可以是各个单元单独物理存在，也可以两个或两个以上单元集成在一个单元中。上述集成的单元既可以采用硬件的形式实现，也可以采用软件功能单元的形式实现。
上述集成的单元如果以软件功能单元的形式实现并作为独立的产品销售或使用时，可以存储在一个计算机可读取存储介质中。基于这样的理解，本发明的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的全部或部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质中，包括若干指令用以使得一台计算机设备(可以为个人计算机、服务器或者网络设备等，具体可以是计算机设备中的处理器)执行本发明各个实施例上述方法的全部或部分步骤。其中，而前述的存储介质可包括：U盘、移动硬盘、磁碟、光盘、只读存储器(英文：Read-Only Memory，缩写：ROM)或者随机存取存储器(英文：Random Access Memory，缩写：RAM)等各种可以存储程序代码的介质。
以上所述，以上实施例仅用以说明本发明的技术方案，而非对其限制；尽管参照前述实施例对本发明进行了详细的说明，本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本发明各实施例技术方案的精神和范围。

Claims (14)

  1. 一种直接内存访问的传输控制方法。其特征在于，该方法应用于直接内存访问DMA传输控制装置中，对DMA通道的数据传输进行控制，所述DMA通道传输的数据包括外部设备和存储器之间传输数据，包括：
    接收DMA传输请求，所述DMA传输请求携带目标DMA任务；
    查询所述目标DMA任务的优先级，并根据所述目标DMA任务的优先级，从DMA通道中选择与所述目标DMA的优先级相对应的DMA通道作为目标通道；
    判断所述DMA通道中是否存在已经被其他DMA任务占用的通道；
    当所述DMA通道中存在已经被其他DMA任务占用的通道时，查询已占用通道的DMA任务的任务类型以及所述目标DMA任务的任务类型；
    判断在所述已占用通道的DMA任务中是否存在与所述目标DMA任务的任务类型不相同的DMA任务；
    当在所述已占用通道的DMA任务中存在与所述目标DMA任务的任务类型不相同的DMA任务时，查询所述与所述目标DMA任务的任务类型不相同的DMA任务的优先级；
    判断在所述与所述目标DMA任务的任务类型不相同的DMA任务中是否存在低于所述目标DMA任务的优先级的DMA任务；
    当在所述与所述目标DMA任务的任务类型不相同的DMA任务中，存在低于所述目标DMA任务的优先级的DMA任务时，暂停所述低于所述目标DMA任务的优先级的DMA任务的数据传输，并获取目标DMA任务的目标数据，将所述目标数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过所述低于所述目标DMA任务的优先级的DMA任务对应的已占用通道的输出队列进行输出。
  2. 根据权利要求1所述的方法，其特征在于，所述接收DMA传输请求，所述DMA传输请求携带目标DMA任务之前，还包括：
    预先保存DMA任务的优先级列表，以及DMA任务优先级与DMA通道映射关系表；
    所述查询所述目标DMA任务的优先级，并根据所述目标DMA任务的优先级，从DMA通道中选择与所述目标DMA的优先级相对应的DMA通道作为目标通道，包括：
    在所述DMA任务的优先级列表中查询所述目标DMA任务的优先级，从所述DMA任务优先级与DMA通道映射关系表中查询与所述目标DMA任务的优先级相对应的DMA通道，将与所述目标DMA任务的优先级相对应的DMA通道作为目标通道。
  3. 根据权利要求1所述的方法，其特征在于，所述判断所述DMA通道中是否存在已经被其他DMA任务占用的通道之后，还包括：
    当所述DMA通道中不存在已经被其他DMA任务占用的通道时，获取目标DMA任务对应的目标数据，将所述目标数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过所述目标通道的输出队列进行输出。
  4. 根据权利要求1所述的方法，其特征在于，所述判断在所述已占用通道的DMA任务中是否存在与所述目标DMA任务的任务类型不相同的DMA任务之后，还包括：
    当在所述已占用通道的DMA任务中不存在与所述目标DMA任务的任务类型不相同的DMA任务时，获取目标DMA任务对应的目标数据，将所述目标数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过所述目标通道的输出队列进行输出。
  5. 根据权利要求1所述的方法，其特征在于，所述判断在所述与所述目标DMA任务的任务类型不相同的DMA任务中是否存在低于所述目标DMA任务的优先级的DMA任务之后，还包括：
    当在所述与所述目标DMA任务的任务类型不相同的DMA任务中不存在低于所述目标DMA任务的优先级的DMA任务时，获取目标DMA任务对应的目标数据，将所述目标数据通过所述目标通道的输入队列进行输入， 以及将所述目标数据通过所述目标通道的输出队列进行输出。
  6. 一种直接内存访问的传输控制方法。其特征在于，该方法应用于直接内存访问DMA传输控制装置中，对DMA通道的数据传输进行控制，所述DMA通道传输的数据包括外部设备和存储器之间传输数据，包括：
    接收DMA传输请求，所述DMA传输请求携带目标DMA任务；
    查询所述目标DMA任务的优先级，并根据所述目标DMA任务的优先级，从DMA通道中选择与所述目标DMA的优先级相对应的DMA通道作为目标通道；
    判断所述DMA通道中是否存在已经被其他DMA任务占用的通道；
    当DMA通道中存在已经被其他DMA任务占用的通道时，查询已占用通道的DMA任务的优先级；
    判断在所述已占用通道的DMA任务中是否存在低于所述目标DMA任务的优先级的DMA任务；
    当在所述已占用通道的DMA任务中存在低于所述目标DMA任务的优先级的DMA任务时，暂停所述低于所述目标DMA任务的优先级的DMA任务的数据传输，并获取目标DMA任务的目标数据，将所述目标数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过所述低于所述目标DMA任务的优先级的DMA任务对应的已占用通道的输出队列进行输出。
  7. 根据权利要求6所述的方法，其特征在于，所述接收DMA传输请求，所述DMA传输请求携带目标DMA任务之前，还包括：
    预先保存DMA任务的优先级列表，以及DMA任务优先级与DMA通道映射关系表；
    所述查询所述目标DMA任务的优先级，并根据所述目标DMA任务的优先级，从DMA通道中选择与所述目标DMA的优先级相对应的DMA通道作为目标通道，包括：
    在所述DMA任务的优先级列表中查询所述目标DMA任务的优先级， 从所述DMA任务优先级与DMA通道映射关系表中查询与所述目标DMA任务的优先级相对应的DMA通道，将与所述目标DMA任务的优先级相对应的DMA通道作为目标通道。
  8. 一种直接内存访问传输控制装置，其特征在于，所述直接内存访问DMA传输控制装置是对DMA通道的数据传输进行控制，所述DMA通道传输的数据包括外部设备和存储器之间传输数据，包括：
    接收单元，用于接收DMA传输请求，所述DMA传输请求携带目标DMA任务；
    第一查询单元，用于查询所述目标DMA任务的优先级，并根据所述目标DMA任务的优先级，从DMA通道中选择与所述目标DMA的优先级相对应的DMA通道作为目标通道；
    第一判断单元，用于判断所述DMA通道中是否存在已经被其他DMA任务占用的通道；
    第二查询单元，用于当所述DMA通道中存在已经被其他DMA任务占用的通道时，查询已占用通道的DMA任务的任务类型以及所述目标DMA任务的任务类型；
    第二判断单元，用于判断在所述已占用通道的DMA任务中是否存在与所述目标DMA任务的任务类型不相同的DMA任务；
    第三查询单元，用于当在所述已占用通道的DMA任务中存在与所述目标DMA任务的任务类型不相同的DMA任务时，查询所述与所述目标DMA任务的任务类型不相同的DMA任务的优先级；
    第三判断单元，用于判断在所述与所述目标DMA任务的任务类型不相同的DMA任务中是否存在低于所述目标DMA任务的优先级的DMA任务；
    暂停单元，用于当在所述与所述目标DMA任务的任务类型不相同的DMA任务中，存在低于所述目标DMA任务的优先级的DMA任务时，暂停所述低于所述目标DMA任务的优先级的DMA任务的数据传输；
    第一传输单元，用于获取目标DMA任务的目标数据，将所述目标数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过所述低 于所述目标DMA任务的优先级的DMA任务对应的已占用通道的输出队列进行输出。
  9. 根据权利要求8所述的装置，其特征在于，所述装置还包括：
    预存单元，用于预先保存DMA任务的优先级列表，以及DMA任务优先级与DMA通道映射关系表；
    所述第一查询单元，具体用于在所述DMA任务的优先级列表中查询所述目标DMA任务的优先级，从所述DMA任务优先级与DMA通道映射关系表中查询与所述目标DMA任务的优先级相对应的DMA通道，将与所述目标DMA任务的优先级相对应的DMA通道作为目标通道。
  10. 根据权利要求8所述的装置，其特征在于，所述装置还包括：
    第二传输单元，用于当所述DMA通道中不存在已经被其他DMA任务占用的通道时，获取目标DMA任务对应的目标数据，将所述目标数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过所述目标通道的输出队列进行输出。
  11. 根据权利要求8所述的装置，其特征在于，所述装置还包括：
    第三传输单元，用于当在所述已占用通道的DMA任务中不存在与所述目标DMA任务的任务类型不相同的DMA任务时，获取目标DMA任务对应的目标数据，将所述目标数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过所述目标通道的输出队列进行输出。
  12. 根据权利要求8所述的装置，其特征在于，所述装置还包括：
    第四传输单元，用于当在所述与所述目标DMA任务的任务类型不相同的DMA任务中不存在低于所述目标DMA任务的优先级的DMA任务时，获取目标DMA任务对应的目标数据，将所述目标数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过所述目标通道的输出队列进行输出。
  13. 一种直接内存访问传输控制装置，其特征在于，所述直接内存访问DMA传输控制装置是对DMA通道的数据传输进行控制，所述DMA通道传输的数据包括外部设备和存储器之间传输数据，包括：
    接收单元，用于接收DMA传输请求，所述DMA传输请求携带目标DMA任务；
    第一查询单元，用于查询所述目标DMA任务的优先级，并根据所述目标DMA任务的优先级，从DMA通道中选择与所述目标DMA的优先级相对应的DMA通道作为目标通道；
    第一判断单元，用于判断所述DMA通道中是否存在已经被其他DMA任务占用的通道；
    第二查询单元，用于当DMA通道中存在已经被其他DMA任务占用的通道时，查询已占用通道的DMA任务的优先级；
    第二判断单元，用于判断在所述已占用通道的DMA任务中是否存在低于所述目标DMA任务的优先级的DMA任务；
    暂停单元，用于当在所述已占用通道的DMA任务中存在低于所述目标DMA任务的优先级的DMA任务时，暂停所述低于所述目标DMA任务的优先级的DMA任务的数据传输；
    传输单元，用于获取目标DMA任务的目标数据，将所述目标数据通过所述目标通道的输入队列进行输入，以及将所述目标数据通过所述低于所述目标DMA任务的优先级的DMA任务对应的已占用通道的输出队列进行输出。
  14. 根据权利要求13所述的装置，其特征在于，所述装置还包括：
    预存单元，用于预先保存DMA任务的优先级列表，以及DMA任务优先级与DMA通道映射关系表；
    所述第一查询单元具体用于在所述DMA任务的优先级列表中查询所述目标DMA任务的优先级，从所述DMA任务优先级与DMA通道映射关系表中查询与所述目标DMA任务的优先级相对应的DMA通道，将与所述目标DMA任务的优先级相对应的DMA通道作为目标通道。
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