WO2017008484A1 - 一种像素驱动电路及其驱动方法、显示面板和显示装置 - Google Patents

一种像素驱动电路及其驱动方法、显示面板和显示装置 Download PDF

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Publication number
WO2017008484A1
WO2017008484A1 PCT/CN2016/070881 CN2016070881W WO2017008484A1 WO 2017008484 A1 WO2017008484 A1 WO 2017008484A1 CN 2016070881 W CN2016070881 W CN 2016070881W WO 2017008484 A1 WO2017008484 A1 WO 2017008484A1
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Prior art keywords
transistor
node
level
unit
driving
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English (en)
French (fr)
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马占洁
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BOE Technology Group Co Ltd
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BOE Technology Group Co Ltd
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Priority to US15/514,821 priority Critical patent/US10229639B2/en
Priority to EP16823633.9A priority patent/EP3188174A4/en
Publication of WO2017008484A1 publication Critical patent/WO2017008484A1/zh
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3258—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3266—Details of drivers for scan electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3275—Details of drivers for data electrodes
    • G09G3/3291—Details of drivers for data electrodes in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0852—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor being a dynamic memory with more than one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K2102/00—Constructional details relating to the organic devices covered by this subclass
    • H10K2102/301—Details of OLEDs

Definitions

  • the present invention relates to the field of display technologies, and in particular, to a pixel driving circuit and a driving method thereof, a display panel, and a display device.
  • the Active Matrix Organic Light Emitting Diode (AMOLED) panel has the advantages of low energy consumption, low production cost, wide viewing angle, and fast response.
  • Organic light-emitting diodes (OLEDs) are current-driven. The working principle is that electrons and holes combine to generate radiation, that is, directly convert electrical energy into light energy, so a stable current is needed to control the illumination.
  • the OLED is driven by a driving transistor (English: Drive Thin Film Transistor, DTFT for short), and the DTFT can be a P-type switching transistor.
  • the gate of the DTFT is connected to the data input terminal V data
  • the source is connected to the constant voltage input terminal V DD
  • the drain is connected to the OLED.
  • a voltage difference V GS is generated between the V DD of the source and the V data of the gate, so that the OLED connected to the drain of the DTFT is turned on
  • the driving current I OLED K(V GS - V th ) 2 of the OLED is Where V th is the threshold voltage of the DTFT itself, and K is a constant.
  • the threshold voltage Vth of the DTFT may affect the driving current I OLED flowing through the OLED, and the threshold voltage of the DTFT in each pixel unit may be caused by manufacturing process errors, device aging, and the like. Vth drifts, causing a deviation in the driving current flowing through the OLED, thereby affecting the display effect.
  • Embodiments of the present invention provide a pixel driving circuit and a driving method thereof, a display panel, and a display device, which can avoid the influence of the threshold voltage drift of the driving transistor on the driving current of the active light emitting device, thereby improving the uniformity of the display image.
  • a pixel driving circuit including:
  • the compensation unit is connected to the first level end, the reset signal end, the control signal end, the reference signal end, the first node, the second node, and the third node, and is configured to be at the control signal end Writing the level of the first level end to the second node and the third node under the control of the reset signal end, and writing the level of the reference signal end under the control of the reset signal end
  • a data writing unit wherein the data writing unit is connected to the scanning signal end, the data signal end, and the second node, and is configured to write the signal of the data signal end to the second node under the control of the scanning signal end ;
  • the first energy storage unit is connected to the first node and the second node, and configured to store a voltage between the first node and the second node;
  • the second energy storage unit is connected to the first level end and the second node, and configured to store a voltage between the first level end and the second node;
  • the driving unit is connected to the first node, the third node, and the display unit, and configured to output a driving signal under the control of the first node and the third node;
  • a display unit that connects the driving unit and the second level terminal for displaying gray scales under control of the driving signal and the second level terminal.
  • the compensation unit may include: a second transistor, a third transistor, and a fourth transistor;
  • a gate of the second transistor is connected to the reset signal terminal, a first pole of the second transistor is connected to the third node, and a second pole of the second transistor is connected to the second node;
  • a gate of the third transistor is connected to the control signal end, a first pole of the third transistor is connected to the first level end, and a second pole of the third transistor is connected to the third node;
  • the gate of the fourth transistor is connected to the reset signal end, the first pole of the fourth transistor is connected to the reference signal end, and the second pole of the fourth transistor is connected to the first node.
  • the data writing unit includes: a first transistor, a gate of the first transistor is connected to the scan signal end, and a first pole of the first transistor is connected to the data signal end, the first A second pole of the transistor is coupled to the second node.
  • the driving unit comprises a driving transistor, a gate of the driving transistor is connected to the first node, a first pole of the driving transistor is connected to the third node, and a second pole of the driving transistor is connected The display unit.
  • the first energy storage unit comprises a first capacitor, a first end of the first capacitor is connected to the first node, and a second end of the first capacitor is connected to the second node.
  • the second energy storage unit includes a second capacitor, a first end of the second capacitor is connected to the first level end, and a second end of the second capacitor is connected to the second node.
  • the display unit comprises an organic light emitting diode, a first pole of the light emitting diode is connected to the driving unit, and a second pole of the light emitting diode is connected to the second level end.
  • a display panel including the above pixel driving circuit is provided.
  • a display device including the above display panel is provided.
  • a driving method of the above pixel driving circuit including:
  • the compensation unit writes the level of the first level end to the second node and the third node under the control of the reset signal end and the control signal end, and outputs the power of the reference signal end under the control of the reset signal end Writing to the first node;
  • the second node is discharged by the driving unit and the display unit, and the first energy storage unit stores a threshold voltage of the driving unit;
  • the data writing unit writes the signal of the data signal end to the second node under the control of the scanning signal end;
  • the compensation unit writes the level of the first level end to the third node under the control of the control signal end;
  • the second energy storage unit stores the voltage between the second node and the first level end, the first storage
  • the energy unit stores a voltage between the second node and the first node, and the driving unit outputs a driving signal to the display unit, the display unit being under the control of the driving signal and the second level end Show grayscale.
  • the compensation unit includes: a second transistor, a third transistor, and a fourth transistor;
  • the second transistor, the third transistor, and the fourth transistor are turned on, thereby writing the level of the first level terminal to the third through the third transistor a node, writing a level of the first level terminal to the second node through the second transistor and a third transistor, and writing a level of the reference signal terminal to the first through the fourth transistor Node
  • the second transistor and the fourth transistor are in an on state, and the third transistor is turned off;
  • the second transistor, the third transistor, and the fourth transistor are turned off;
  • the second transistor and the fourth transistor are turned off, and the third transistor is turned on, thereby writing the level of the first level terminal to the first transistor through the third transistor Three nodes.
  • the data writing unit includes a first transistor, and in the first stage, the first transistor is turned off;
  • the first transistor is turned off
  • the first transistor is turned on, so that the signal of the data signal end is written into the second node through the first transistor;
  • the first switching transistor is turned off.
  • Embodiments of the present invention provide a pixel driving circuit and a driving method thereof, a display panel, and a display device capable of performing threshold voltage compensation on a driving unit by a compensation unit to avoid threshold voltage drift of a driving transistor of the driving unit to an active light emitting device The effect of the drive current, which in turn improves the uniformity of the displayed image.
  • FIG. 1 is a schematic structural diagram of a pixel driving circuit according to an embodiment of the present invention.
  • FIG. 2 is a schematic circuit configuration diagram of the pixel driving circuit shown in FIG. 1;
  • FIG. 3 is a schematic diagram showing a signal timing state of the pixel driving circuit shown in FIG. 2;
  • 4a is an equivalent circuit diagram of the pixel driving circuit shown in FIG. 2 in a first period of time
  • 4b is an equivalent circuit diagram of the pixel driving circuit shown in FIG. 2 in a second period of time
  • 4c is an equivalent circuit diagram of the pixel driving circuit shown in FIG. 2 in a third period of time;
  • 4d is an equivalent circuit diagram of the pixel driving circuit shown in FIG. 2 in a fourth period of time;
  • FIG. 5 is a schematic diagram of a threshold voltage compensation effect of a pixel driving circuit according to an embodiment of the present invention.
  • the transistors employed in all embodiments of the present invention may each be a thin film transistor or a field effect transistor or other device having the same characteristics, and the transistors employed in the embodiments of the present invention are mainly switching transistors according to their roles in the circuit. Since the source and drain of the switching transistor used here are symmetrical, the source and the drain are interchangeable. In the embodiment of the present invention, a P-type transistor is taken as an example for description, in which two poles other than the gate are referred to as a first pole and a second pole, respectively.
  • the switching transistor in the embodiment of the present invention may include a P-type switching transistor or an N-type switching transistor, wherein the P-type switching transistor is turned on when the gate is at a low level, and when the gate is at a high level.
  • the N-type switching transistor is turned on when the gate is at a high level and turned off when the gate is at a low level;
  • the driving transistor may include a P-type or an N-type, wherein the P-type driving transistor is at a low level of the gate voltage (gate) The voltage is less than the source voltage), and the absolute value of the voltage difference of the gate source is greater than the threshold voltage, and is in an amplified state or a saturated state; wherein the gate voltage of the N-type driving transistor is at a high level (the gate voltage is greater than the source voltage) And when the absolute value of the voltage difference of the gate source is greater than the threshold voltage, it is in an amplified state or a saturated state.
  • FIG. 1 is a schematic structural diagram of a pixel driving circuit according to an embodiment of the present invention.
  • a pixel driving circuit according to an embodiment of the present invention may include a compensation unit 11, a data writing unit 12, a driving unit 13, a first energy storage unit 14, a second energy storage unit 15, and a display unit 16. .
  • the compensation unit 11 is connected to the first level terminal V1, the reset signal terminal RESET, the control signal terminal EM, the reference signal terminal Vref, the first node A, the second node B, and the third node C.
  • Compensation sheet The element 11 is configured to write the level of the first level terminal V1 to the second node B and the third node C under the control of the control signal terminal EM and the reset signal terminal RESET, and the reference signal terminal under the control of the reset signal terminal RESET The level of Vref is written to the first node A.
  • the data writing unit 12 is connected to the scanning signal terminal SCAN, the data signal terminal DATA and the second node B, and is configured to write the signal of the data signal terminal DATA to the second node B under the control of the scanning signal terminal SCAN.
  • the first energy storage unit 14 is connected to the first node A and the second node B for storing the voltage between the first node A and the second node B.
  • the second energy storage unit 15 is connected to the first level terminal V1 and the second node B for storing the voltage between the first level terminal V1 and the second node B.
  • the driving unit 13 is connected to the first node A, the third node C, and the display unit 16 for outputting a driving signal to the display unit 16 under the control of the first node A and the third node C.
  • the display unit 16 is connected to the driving unit 13 and the second level terminal V2 for displaying the gray scale under the control of the driving signal 13 and the second level terminal V2.
  • each unit for threshold voltage compensation of the driving unit is as follows: First, the compensation unit is used to write the level of the first level end to the second node and the third node under the control of the reset signal end and the control signal end, And writing the level of the reference signal end to the first node under the control of the reset signal end; then, the second node is discharged through the driving unit and the display unit, the first energy storage unit stores the threshold voltage of the driving unit; then, the data writing unit Writing the signal of the data signal end to the second node under the control of the scanning signal end; finally, the compensation unit writes the level of the first level end to the third node under the control of the control signal end; the second energy storage unit stores the second node And a voltage between the first level terminal, the first energy storage unit stores a voltage between the second node and the first node, and the driving unit outputs a driving signal to the display unit, the display unit is at the driving signal and the second level end The gray scale is displayed under the control. Since the first energy storage unit stores the threshold voltage of
  • FIG. 2 is an exemplary circuit configuration of the pixel driving circuit shown in FIG. 1.
  • the compensation unit 11 of the pixel driving circuit may include a second transistor M2, a third transistor M3, and a fourth transistor M4.
  • the gate of the second transistor M2 is connected to the reset signal terminal RESET, and the second The first pole of the transistor M2 is connected to the third node C, and the second pole of the second transistor M2 is connected to the second node B.
  • the gate of the third transistor M3 is connected to the control signal terminal EM, the first electrode of the third transistor M3 is connected to the first level terminal V1, and the second electrode of the third transistor M3 is connected to the third node C.
  • the gate of the fourth transistor M4 is connected to the reset signal terminal RESET, the first electrode of the fourth transistor M4 is connected to the reference signal terminal Vref, and the second electrode of the fourth transistor M4 is connected to the first node A.
  • the data writing unit 12 may include: a first transistor M1, a gate of the first transistor M1 is connected to the scanning signal terminal SCAN, a first electrode of the first transistor M1 is connected to the data signal terminal DATA, and a second electrode of the first transistor M1 is connected. Two-node B.
  • the driving unit 13 includes a driving transistor MDT.
  • the gate of the driving transistor MDT is connected to the first node A, the first electrode of the driving transistor MDT is connected to the third node C, and the second electrode of the driving transistor MDT is connected to the display unit 16.
  • the first energy storage unit 14 includes a first capacitor C1.
  • the first end of the first capacitor C1 is connected to the first node A, and the second end of the first capacitor C1 is connected to the second node B.
  • the second energy storage unit 15 includes a second capacitor C2.
  • the first end of the second capacitor C2 is connected to the first level terminal V1, and the second end of the second capacitor C2 is connected to the second node B.
  • the display unit 16 includes an organic light emitting diode OLED.
  • the first pole of the light emitting diode OLED is connected to the driving unit 13.
  • the second pole of the light emitting diode OLED is connected to the second level terminal V2.
  • the functions of each unit are described as follows: First, the reset signal terminal control transistor M2 and the control signal terminal control M3 in the compensation unit write the level of the first level terminal to the second node and the third node. a node, the reset signal terminal control transistor M4 writes the level of the reference signal terminal to the first node; then, the second node discharges through the driving transistor MDT in the driving unit and the OLED of the display unit, and the C1 storage driving unit of the first energy storage unit The threshold voltage of the middle driving transistor MDT; then, the scanning signal terminal of the data writing unit controls the transistor M1 to write the signal of the data signal end to the second node; finally, the control signal terminal of the compensation unit controls the transistor M3 to be the first level terminal.
  • the C2 in the second energy storage unit stores the voltage between the second node and the first level terminal
  • the first energy storage unit C1 stores the voltage between the second node and the first node
  • drives The MDT in the unit outputs a driving signal to the OLED in the display unit
  • the OLED in the display unit displays gray under the control of the driving signal and the second level end Order. Since the C1 in the first energy storage unit stores the threshold voltage of the MDT in the driving unit, the driving unit can be directly passed through the stored threshold voltage during the lighting phase.
  • the MDT in the middle performs threshold voltage compensation.
  • each of the above transistors is of the same type of "N-type” or "P-type” transistor.
  • the process process is reduced, and the uniformity of device performance is ensured.
  • the above embodiment employs a "P" type transistor.
  • the light emitting device where light-emitting diode OLED may be active when the first electrode of the anode of the OLED, a second level of the end of the V2 level V 2 lower than the first level terminal V1 level V 1; preferably, The low level is the ground terminal; of course, the first very anode OLED is taken as an example in FIG. 2 .
  • the driving method may include:
  • the compensation unit writes the level of the first level end to the second node and the third node under the control of the reset signal end and the control signal end, and writes the level of the reference signal end under the control of the reset signal end.
  • the second node is discharged by the driving unit and the display unit, and the first energy storage unit stores the threshold voltage of the driving unit.
  • the data writing unit writes the signal of the data signal end to the second node under the control of the scanning signal terminal.
  • the compensation unit writes the level of the first level end to the third node under the control of the control signal end;
  • the second energy storage unit stores the voltage between the second node and the first level end, the first energy storage unit The voltage between the second node and the first node is stored, and the driving unit outputs a driving signal to the display unit, and the display unit displays the gray scale under the control of the driving signal and the second level terminal.
  • the compensation unit includes: a second transistor, a third transistor, and a fourth transistor;
  • the second transistor, the third transistor, and the fourth transistor are turned on, and the level of the first level terminal is written into the third node through the third transistor, thereby Writing a level of the flat end through the second transistor and the third transistor to the second node, writing a level of the reference signal end to the first node through the fourth transistor;
  • the second transistor and the fourth transistor are turned on, and the third transistor is turned off;
  • the second transistor, the third transistor, and the fourth transistor are both turned off;
  • the second transistor and the fourth transistor are both turned off; the third transistor is turned on, from And writing the level of the first level terminal to the third node through the third transistor.
  • the data writing unit comprises: a first transistor, in which the first transistor is turned off; in the second phase, the first transistor is turned off; in the third phase, the first transistor is turned on, thereby turning on the data signal end A signal is written to the second node through the first transistor; in a fourth phase, the first switching transistor is turned off.
  • FIG. 3 is a schematic diagram of a signal timing state of the pixel driving circuit, and an equivalent circuit diagram of the working states of the pixel driving circuit provided in FIGS. 4a to 4d, which is provided by the embodiment of the present invention.
  • a driving method of a pixel driving circuit the working principle of the circuit is divided into four parts, which are respectively a reset phase of the first phase T1, a threshold voltage writing phase of the driving transistor of the second phase T2, and a data signal writing of the third phase T3
  • the fourth stage T4 is the lighting stage.
  • RESET and EM are low voltage turn-on signals and SCAN is high voltage turn-off signal state.
  • the RESET control transistors M2 and M4 are turned on, and M2 is turned on so that the nodes B and C are connected through M2; the M4 is turned on to write the Vref signal at the Vref terminal to the node A.
  • the EM control transistor M3 is turned on to write the VDD signal to the node C. Therefore, the potentials of the nodes A and B of the capacitors C1 and C2 are reset to the Vref and VDD potentials, respectively.
  • M3 of the EM control is turned off, so that the VDD signal written by the node B in the T1 phase is discharged through the driving transistor MDT and the light emitting diode OLED until the source potential of the driving transistor MDT is low to a critical state before the MDT is turned off or Disabled.
  • the potential of the node B becomes Vref-Vth
  • Vth is the threshold voltage of the MDT.
  • the voltage across the capacitor C1 is the point A potential Vref and the point B potential Vref-Vth, respectively.
  • Capacitor C1 holds the threshold voltage of MDT on the C1 capacitor.
  • V GS is the voltage difference between the source and gate of the MDT.
  • C ox is the process constant
  • W is the MDT channel width
  • L is the channel length of the transistor
  • W and L are all selectively selectable constants, so the current magnitude is only related to SD and VDD.
  • Figure 5 shows the current variation of the threshold voltage of the drive transistor MDT in the high and low gray levels of the circuit structure.
  • the ordinate represents the current difference ratio
  • the abscissa represents the threshold voltage drift.
  • the threshold voltage drift can be controlled between -0.3V and 0.3V; in the low gray level state, the current difference ratio is 4% to -8%.
  • the threshold voltage drift can be controlled between -0.3V and 0.3V; that is, the MDT threshold voltage drift can be controlled in the high gray level or low gray level state under the condition of the current difference ratio satisfying the normal operating condition. In a small range, it can be seen that the above scheme has a good compensation effect on the Vth variation.
  • An embodiment of the present invention further provides a display panel comprising: the above pixel driving circuit.
  • An embodiment of the invention further provides a display device comprising: the above display panel.
  • the display device can also be a display device such as an electronic paper, a mobile phone, a television, a digital photo frame, or the like.
  • the display device provided by the embodiment of the invention can perform threshold voltage compensation on the driving unit by the compensation unit to avoid the influence of the threshold voltage drift of the driving transistor of the driving unit on the driving current of the active light emitting device, thereby improving the uniformity of the display image.

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Abstract

提供了一种像素驱动电路及其驱动方法、显示面板和显示装置，能够避免驱动晶体管阈值电压漂移对有源发光器件驱动电流的影响。像素驱动电路包括：补偿单元(11)、数据写入单元(12)，驱动单元(13)、第一储能单元(14)、第二储能单元(15)和显示单元(16)。

Description

一种像素驱动电路及其驱动方法、显示面板和显示装置 技术领域
本发明涉及显示技术领域，尤其涉及一种像素驱动电路及其驱动方法、显示面板和显示装置。
背景技术
有源矩阵有机发光二极管(Active Matrix Organic Light Emitting Diode，简称AMOLED)面板具有能耗低、生产成本低、视角宽、响应速度快等优点。有机发光二极管(OLED)属于电流驱动，其工作原理是电子和空穴结合产生辐射光，也就是直接把电能转化为光能，所以显示时需要稳定的电流来控制发光。
目前OLED是通过一个驱动晶体管(英文：Drive Thin Film Transistor，简称：DTFT)进行驱动，DTFT可以是P型的开关管。DTFT的栅极连接数据输入端Vdata，源极连接恒压的电源输入端VDD，漏极连接OLED。由源极的VDD与栅极的Vdata之间产生电压差VGS，从而使得与DTFT的漏极相连的OLED导通，OLED的驱动电流IOLED＝K(VGS-Vth)2，其中Vth为DTFT本身的阈值电压，K为常数。
由上述驱动电流公式可以看出，DTFT的阈值电压Vth会对流过OLED的驱动电流IOLED会产生影响，而由于制造工艺的误差、器件老化等原因，会使各个像素单元中DTFT的阈值电压Vth产生漂移，对流过OLED的驱动电流造成偏差，进而影响显示效果。
发明内容
本发明的实施例提供了一种像素驱动电路及其驱动方法、显示面板和显示装置，能够避免驱动晶体管的阈值电压漂移对有源发光器件驱动电流的影响，进而提高了显示图像的均匀性。
根据本发明的一方面，提供了一种像素驱动电路，包括：
补偿单元，所述补偿单元连接第一电平端、复位信号端、控制信号端、参考信号端、第一节点、第二节点和第三节点，用于在所述控制信号端和 所述复位信号端的控制下将所述第一电平端的电平写入所述第二节点和所述第三节点，以及在所述复位信号端的控制下将所述参考信号端的电平写入所述第一节点；
数据写入单元，所述数据写入单元连接扫描信号端、数据信号端和所述第二节点，用于在所述扫描信号端的控制下将所述数据信号端的信号写入所述第二节点；
第一储能单元，所述第一储能单元连接所述第一节点和所述第二节点，用于存储所述第一节点和所述第二节点之间的电压；
第二储能单元，所述第二储能单元连接所述第一电平端和所述第二节点，用于存储所述第一电平端和所述第二节点之间的电压；
驱动单元，所述驱动单元连接所述第一节点、第三节点和所述显示单元，用于在所述第一节点和所述第三节点的控制下输出驱动信号；
显示单元，所述显示单元连接所述驱动单元和第二电平端，用于在所述驱动信号和所述第二电平端的控制下显示灰阶。
优选地，所述补偿单元可以包括：第二晶体管、第三晶体管和第四晶体管；
所述第二晶体管的栅极连接所述复位信号端，所述第二晶体管的第一极连接所述第三节点，所述第二晶体管的第二极连接所述第二节点；
所述第三晶体管的栅极连接所述控制信号端，所述第三晶体管的第一极连接所述第一电平端，所述第三晶体管的第二极连接所述第三节点；
所述第四晶体管的栅极连接所述复位信号端，所述第四晶体管的第一极连接所述参考信号端，所述第四晶体管的第二极连接所述第一节点。
优选地，所述数据写入单元包括：第一晶体管，所述第一晶体管的栅极连接所述扫描信号端，所述第一晶体管的第一极连接所述数据信号端，所述第一晶体管的第二极连接所述第二节点。
优选地，所述驱动单元包括驱动晶体管，所述驱动晶体管的栅极连接所述第一节点，所述驱动晶体管的第一极连接所述第三节点，所述驱动晶体管的第二极连接所述显示单元。
优选地，所述第一储能单元包括第一电容，所述第一电容的第一端连接所述第一节点，所述第一电容的第二端连接所述第二节点。
优选地，所述第二储能单元包括第二电容，所述第二电容的第一端连接所述第一电平端，所述第二电容的第二端连接所述第二节点。
优选地，所述显示单元包括有机发光二极管，所述发光二极管的第一极连接所述驱动单元，所述发光二极管的第二极连接所述第二电平端。
根据本发明的另一方面，提供了一种显示面板，包括上述像素驱动电路。
根据本发明的另一方面，提供一种显示装置，包括上述显示面板。
根据本发明的另一方面，提供一种上述像素驱动电路的驱动方法，包括：
第一阶段，补偿单元在复位信号端和控制信号端的控制下将第一电平端的电平写入第二节点和第三节点，并在所述复位信号端的控制下将所述参考信号端的电平写入所述第一节点；
第二阶段，第二节点通过驱动单元和显示单元放电，第一储能单元存储所述驱动单元的阈值电压；
第三阶段，数据写入单元在扫描信号端的控制下将数据信号端的信号写入所述第二节点；
第四阶段，补偿单元在控制信号端的控制下将第一电平端的电平写入第三节点；第二储能单元存储第二节点和所述第一电平端之间的电压，第一储能单元存储保持所述第二节点和所述第一节点之间的电压，所述驱动单元向所述显示单元输出驱动信号，所述显示单元在所述驱动信号和第二电平端的控制下显示灰阶。
优选地，所述补偿单元包括：第二晶体管、第三晶体管和第四晶体管；
在所述第一阶段，所述第二晶体管、所述第三晶体管和所述第四晶体管导通，从而将所述第一电平端的电平通过所述第三晶体管写入所述第三节点，将所述第一电平端的电平通过所述第二晶体管和第三晶体管写入所述第二节点，将所述参考信号端的电平通过所述第四晶体管写入所述第一节点；
在所述第二阶段，所述第二晶体管和所述第四晶体管导通状态，所述第三晶体管截止；
在所述第三阶段，所述第二晶体管、所述第三晶体管和所述第四晶体管截止；
在所述第四阶段，所述第二晶体管和所述第四晶体管截止，所述第三晶体管导通，从而将所述第一电平端的电平通过所述第三晶体管写入所述第三节点。
优选地，所述数据写入单元包括第一晶体管，在所述第一阶段，所述第一晶体管截止；
在所述第二阶段，所述第一晶体管截止；
在所述第三阶段，所述第一晶体管导通，从而将所述数据信号端的信号通过所述第一晶体管写入所述第二节点；
在所述第四阶段，所述第一开关晶体管截止。
本发明的实施例提供了一种像素驱动电路及其驱动方法、显示面板和显示装置，能够通过补偿单元对驱动单元进行阈值电压补偿来避免驱动单元的驱动晶体管的阈值电压漂移对有源发光器件驱动电流的影响，进而提高了显示图像的均匀性。
附图说明
为了更清楚地说明本发明实施例的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本发明实施例提供的一种像素驱动电路结构示意图；
图2为图1所示像素驱动电路的一种示例电路结构图；
图3为如图2所示的像素驱动电路的信号时序状态示意图；
图4a为如图2所示的像素驱动电路在第一时间段的等效电路示意图；
图4b为如图2所示的像素驱动电路在第二时间段的等效电路示意图；
图4c为如图2所示的像素驱动电路在第三时间段的等效电路示意图；
图4d为如图2所示的像素驱动电路在第四时间段的等效电路示意图；
图5为本发明的实施例提供的像素驱动电路的阈值电压补偿效果示意图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
本发明所有实施例中采用的晶体管均可以为薄膜晶体管或场效应管或其他特性相同的器件，根据在电路中的作用本发明的实施例所采用的晶体管主要为开关晶体管。由于这里采用的开关晶体管的源极、漏极是对称的，所以其源极、漏极是可以互换的。在本发明实施例中，以P型晶体管为例进行说明，其中将除栅极之外的两极分别称为第一极和第二极。本领域技术人员可以理解，本发明实施例中的开关晶体管可以包括P型开关晶体管或N型开关晶体管两种，其中，P型开关晶体管在栅极为低电平时导通，在栅极为高电平时截止，N型开关晶体管为在栅极为高电平时导通，在栅极为低电平时截止；驱动晶体管可以包括P型或N型，其中P型驱动晶体管在栅极电压为低电平(栅极电压小于源极电压)，且栅极源极的压差的绝对值大于阈值电压时处于放大状态或饱和状态；其中N型驱动晶体管的栅极电压为高电平(栅极电压大于源极电压)，且栅极源极的压差的绝对值大于阈值电压时处于放大状态或饱和状态。
图1示出了本发明实施例提供的一种像素驱动电路结构示意图。如图1所示，根据本发明的实施例的像素驱动电路可以包括：补偿单元11、数据写入单元12，驱动单元13、第一储能单元14、第二储能单元15和显示单元16。
补偿单元11连接第一电平端V1、复位信号端RESET、控制信号端EM、参考信号端Vref、第一节点A、第二节点B和第三节点C。补偿单 元11配置为在控制信号端EM和复位信号端RESET的控制下将第一电平端V1的电平写入第二节点B和第三节点C，在复位信号端RESET的控制下将参考信号端Vref的电平写入第一节点A。
数据写入单元12连接扫描信号端SCAN、数据信号端DATA和第二节点B，配置为在扫描信号端SCAN的控制下将数据信号端DATA的信号写入第二节点B。
第一储能单元14连接第一节点A和第二节点B，用于存储第一节点A和第二节点B间的电压。
第二储能单元15连接第一电平端V1和第二节点B，用于存储第一电平端V1和第二节点B间的电压。
驱动单元13连接第一节点A、第三节点C和显示单元16，用于在第一节点A和第三节点C的控制下向显示单元16输出驱动信号。
显示单元16连接驱动单元13和第二电平端V2，用于在驱动信号13和第二电平端V2的控制下显示灰阶。
为实现对驱动单元进行阈值电压补偿各个单元的功能描述如下：首先，补偿单元用于在复位信号端和控制信号端的控制下将第一电平端的电平写入第二节点和第三节点，并在复位信号端的控制下将参考信号端的电平写入第一节点；然后，第二节点通过驱动单元和显示单元放电，第一储能单元存储驱动单元的阈值电压；然后，数据写入单元在扫描信号端的控制下将数据信号端的信号写入第二节点；最后，补偿单元在控制信号端的控制下将第一电平端的电平写入第三节点；第二储能单元存储第二节点和第一电平端之间的电压，第一储能单元存储保持第二节点和所述第一节点之间的电压，驱动单元向显示单元输出驱动信号，显示单元在驱动信号和第二电平端的控制下显示灰阶。由于第一储能单元存储了驱动单元的阈值电压，因此在发光阶段，可以直接通过该存储的阈值电压对驱动单元进行阈值电压补偿。
图2为图1所示像素驱动电路的一种示例电路结构。将结合图1和图2来描述根据本发明实施例的像素驱动电路的示例电路结构。如图2所示，像素驱动电路的补偿单元11可以包括：第二晶体管M2、第三晶体管M3和第四晶体管M4。第二晶体管M2的栅极连接复位信号端RESET，第二 晶体管M2的第一极连接第三节点C，第二晶体管M2的第二极连接第二节点B。第三晶体管M3的栅极连接控制信号端EM，第三晶体管M3的第一极连接第一电平端V1，第三晶体管M3的第二极连接第三节点C。第四晶体管M4的栅极连接复位信号端RESET，第四晶体管M4的第一极连接参考信号端Vref，第四晶体管M4的第二极连接第一节点A。
数据写入单元12可以包括：第一晶体管M1，第一晶体管M1的栅极连接扫描信号端SCAN，第一晶体管M1的第一极连接数据信号端DATA，第一晶体管M1的第二极连接第二节点B。
驱动单元13包括驱动晶体管MDT，驱动晶体管MDT的栅极连接第一节点A，驱动晶体管MDT的第一极连接第三节点C，驱动晶体管MDT的第二极连接显示单元16。
第一储能单元14包括第一电容C1，第一电容C1的第一端连接第一节点A，第一电容C1的第二端连接第二节点B。
第二储能单元15包括第二电容C2，第二电容C2的第一端连接第一电平端V1，第二电容C2的第二端连接第二节点B。
显示单元16包括有机发光二极管OLED，发光二极管OLED的第一极连接驱动单元13，发光二极管OLED的第二极连接第二电平端V2。
为实现对驱动单元进行阈值电压补偿，各个单元的功能描述如下：首先，补偿单元中复位信号端控制晶体管M2、控制信号端控制M3将第一电平端的电平写入第二节点和第三节点，复位信号端控制晶体管M4将参考信号端的电平写入第一节点；然后，第二节点通过驱动单元中的驱动晶体管MDT和显示单元的OLED放电，第一储能单元的C1存储驱动单元中驱动晶体管MDT的阈值电压；然后，数据写入单元中扫描信号端控制晶体管M1将数据信号端的信号写入第二节点；最后，补偿单元中控制信号端控制晶体管M3将第一电平端的电平写入第三节点；第二储能单元中的C2存储第二节点和第一电平端之间的电压，第一储能单元C1存储保持第二节点和第一节点之间的电压，驱动单元中的MDT向显示单元中的OLED输出驱动信号，显示单元中的OLED在驱动信号和第二电平端的控制下显示灰阶。由于第一储能单元中的C1存储了驱动单元中MDT的阈值电压，因此在发光阶段，可以直接通过该存储的阈值电压对驱动单元 中的MDT进行阈值电压补偿。
上述的各个晶体管为同一类型的“N型”或“P型”晶体管，当然在显示面板的制程工艺中，若全采用同一类型的晶体管有利于减少制程工艺，保证器件性能的统一性。以上实施例采用“P”型的晶体管。此外，这里的发光器件可以为有源发光二极管OLED，当该OLED的第一极为阳极时，第二电平端V2的电平V2低于第一电平端V1的电平V1；优选的，低电平为接地端；当然图2中是以第一极为阳极OLED为例进行描述。
参照以上实施例提供的像素驱动电路本发明实施例，还提供了以上各实施例像素驱动电路的驱动方法。所述驱动方法可以包括：
第一阶段，补偿单元在复位信号端和控制信号端的控制下将第一电平端的电平写入第二节点和第三节点，并在复位信号端的控制下将参考信号端的电平写入第一节点。
第二阶段，第二节点通过驱动单元和显示单元放电，第一储能单元存储驱动单元的阈值电压。
第三阶段，数据写入单元在扫描信号端的控制下将数据信号端的信号写入第二节点。
第四阶段，补偿单元在控制信号端的控制下将第一电平端的电平写入第三节点；第二储能单元存储第二节点和第一电平端之间的电压，第一储能单元存储保持第二节点和所述第一节点之间的电压，驱动单元向所述显示单元输出驱动信号，显示单元在驱动信号和第二电平端的控制下显示灰阶。
可选的，补偿单元包括：第二晶体管、第三晶体管和第四晶体管；
在第一阶段，第二晶体管、第三晶体管和第四晶体管导通，将所述第一电平端的电平通过所述第三晶体管写入所述第三节点，从而将所述第一电平端的电平通过所述第二晶体管和第三晶体管写入所述第二节点，将所述参考信号端的电平通过所述第四晶体管写入所述第一节点；
在第二阶段，第二晶体管和第四晶体管导通，第三晶体管截止；
在第三阶段，第二晶体管、第三晶体管和第四晶体管均截止；
在第四阶段，第二晶体管和第四晶体管均截止；第三晶体管导通，从 而将所述第一电平端的电平通过所述第三晶体管写入所述第三节点。
可选的，数据写入单元包括：第一晶体管，在第一阶段，第一晶体管截止；在第二阶段，第一晶体管截止；在第三阶段，第一晶体管导通，从而将数据信号端的信号通过所述第一晶体管写入所述第二节点；在第四阶段，第一开关晶体管截止。
这里以晶体管M1-M4以及驱动晶体管DTFT均为“P”型开关晶体管为例进行说明，V1端为高电平VDD信号，V2端为低电平VSS。参照图2提供的像素驱动电路，图3提供的像素驱动电路的信号时序状态示意图，同时参照图4a～4d所提供的像素驱动电路的各个阶段工作状态的等效电路示意图，本发明实施例提供一种像素驱动电路的驱动方法，该电路工作原理分成四个部分，他们分别是第一阶段T1的复位阶段，第二阶段T2的驱动晶体管阈值电压写入阶段，第三阶段T3是数据信号写入阶段，第四阶段T4是发光阶段。
T1的复位阶段：RESET＝0，EM＝0，SCAN＝1，需要说明的是，以下实施例中，“0”表示低电平；“1”表示高电平。参照图4a所示的等效电路图，RESET和EM为低压导通信号，SCAN为高压截止信号状态。RESET控制晶体管M2和M4导通，M2导通使得节点B和C通过M2导通连接；M4导通使得Vref端的Vref信号写入到节点A。EM控制晶体管M3导通，将VDD信号写入到节点C。因此，电容C1和C2的节点A和B节点电位分别复位成Vref和VDD电位。
T2的阈值电压写入阶段：RESET＝0，EM＝1，SCAN＝1，此阶段RESET处于低压导通信号阶段，SCAN和EM处于高压截止信号阶段。此时EM控制的M3截止，这样节点B在T1阶段写入的VDD信号通过驱动晶体管MDT和发光二极管OLED进行放电，直至驱动晶体管MDT的源极电位低至使得MDT处于关闭状态之前的临界状态或关闭状态。这样节点B的电位变成Vref-Vth，Vth为MDT的阈值电压。由此，在电容C1两端的电压分别是A点电位Vref，B点电位Vref-Vth。电容C1便将MDT的阈值电压保存在C1电容上。
T3的输出写入阶段：RESET＝1，EM＝1，SCAN＝0，此时只有SCAN处于低压导通信号阶段，RESET和EM都处于高压截止信号状态。当SCAN控制晶体管M1导通，将数据信号端DATA端的Vdata信号通过M1写入 到节点B，此时电容C1的另一节点A处于Floating(浮接)状态，根据电容电荷守恒原理，C1电容变化前的电量是(Vref-Vth-Vref)*C1，假设变化后节点A电位为X，这样变化后的电荷量是(Vdata-X)*C1，这样根据变化前后电荷量相同，即(Vref-Vth-Vref)*C1＝(Vdata-X)*C1，即X＝Vdata+Vth。
T4发光阶段：RESET＝1，EM＝0，SCAN＝1，RESET和SCAN处于高压截止信号状态，EM处于低压导通信号状态。由于M2截止，节点B和C相互间不会干扰。节点B的电位通过电容C2和V1端的VDD电位进行保存。这样节点A的电荷也间接性通过节点B和C1进行存储，以保持节点A在发光阶段电位与T3阶段相同，都是Vdata+Vth。由于驱动晶体管MDT处于饱和阶段，根据晶体管饱和区电流公式可知：
Figure PCTCN2016070881-appb-000001
其中，VGS为MDT源极和栅极之间的电压差，
Figure PCTCN2016070881-appb-000002
μ、Cox为工艺常数，W为MDT沟道宽度，L为晶体管的沟道长度，W、L都为可选择性设计的常数，因此电流大小只与SD和VDD相关联。
由上式中可以看到工作电流IOLED已经不受阈值电压Vth的影响，只与Vdata有关。彻底解决了驱动晶体管MDT由于工艺制程及长时间的操作造成阈值电压漂移的问题，消除其对IOLED的影响，保证OLED的正常工作。
图5给出了该电路结构在高、低灰阶时，随着驱动晶体管MDT阈值电压变化的电流变化情况。如图5所示，纵坐标表示电流差异比率，横坐标表示阈值电压漂移。在高灰阶状态下电流差异比例在-2％至2％时，阈值电压漂移能够控制在-0.3V至0.3V之间；在低灰阶状态下，电流差异比例在4％至-8％时，阈值电压漂移能够控制在-0.3V至0.3V之间；即无论在高灰阶还是低灰阶状态是在满足正常工况的电流差异比率条件下，MDT阈值电压漂移均能够控制在较小的范围内，因此可以看出上述方案对于Vth变化的补偿效果良好。
本发明的实施例还提供了一种显示面板，包括：上述像素驱动电路。
本发明的实施例还提供了一种显示装置，包括：上述显示面板。
另外，显示装置还可以为电子纸、手机、电视、数码相框等等显示设备。
本发明实施例提供的显示装置，能够通过补偿单元对驱动单元进行阈值电压补偿避免驱动单元的驱动晶体管的阈值电压漂移对有源发光器件驱动电流的影响，进而提高了显示图像的均匀性。
以上所述，仅为本发明的具体实施方式，但本发明的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本发明揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本发明的保护范围之内。因此，本发明的保护范围应以所述权利要求的保护范围为准。

Claims (12)

  1. 一种像素驱动电路，包括：
    补偿单元，所述补偿单元连接第一电平端、复位信号端、控制信号端、参考信号端、第一节点、第二节点和第三节点，配置为在所述控制信号端和所述复位信号端的控制下将所述第一电平端的电平写入所述第二节点和所述第三节点，以及在所述复位信号端的控制下将所述参考信号端的电平写入所述第一节点；
    数据写入单元，所述数据写入单元连接扫描信号端、数据信号端和所述第二节点，配置为在所述扫描信号端的控制下将所述数据信号端的信号写入所述第二节点；
    第一储能单元，所述第一储能单元连接所述第一节点和所述第二节点，用于存储所述第一节点和所述第二节点间的电压；
    第二储能单元，所述第二储能单元连接所述第一电平端和所述第二节点，用于存储所述第一电平端和所述第二节点间的电压；
    驱动单元，所述驱动单元连接所述第一节点、第三节点和所述显示单元，用于在所述第一节点和所述第三节点的控制下输出驱动信号；以及
    显示单元，所述显示单元连接所述驱动单元和第二电平端，用于在所述驱动信号和所述第二电平端的控制下显示灰阶。
  2. 根据权利要求1所述的像素驱动电路，其中，所述补偿单元包括：第二晶体管、第三晶体管和第四晶体管；
    所述第二晶体管的栅极连接所述复位信号端，所述第二晶体管的第一极连接所述第三节点，所述第二晶体管的第二极连接所述第二节点；
    所述第三晶体管的栅极连接所述控制信号端，所述第三晶体管的第一极连接所述第一电平端，所述第三晶体管的第二极连接所述第三节点；
    所述第四晶体管的栅极连接所述复位信号端，所述第四晶体管的第一极连接所述参考信号端，所述第四晶体管的第二极连接所述第一节点。
  3. 根据权利要求1或2所述的像素驱动电路，其特征在于，所述数据写入单元包括：第一晶体管，所述第一晶体管的栅极连接所述扫描信号端，所述第一晶体管的第一极连接所述数据信号端，所述第一晶体管的第二极连接所述第二节点。
  4. 根据权利要求1-3之一所述的像素驱动电路，其中，所述驱动单元包括驱动晶体管，所述驱动晶体管的栅极连接所述第一节点，所述驱动晶体管的第一极连接所述第三节点，所述驱动晶体管的第二极连接所述显示单元。
  5. 根据权利要求1-4之一所述的像素驱动电路，其中，所述第一储能单元包括第一电容，所述第一电容的第一端连接所述第一节点，所述第一电容的第二端连接所述第二节点。
  6. 根据权利要求1-5之一所述的像素驱动电路，其中，所述第二储能单元包括第二电容，所述第二电容的第一端连接所述第一电平端，所述第二电容的第二端连接所述第二节点。
  7. 根据权利要求1-6之一所述的像素驱动电路，其中，所述显示单元包括有机发光二极管，所述发光二极管的第一极连接所述驱动单元，所述发光二极管的第二极连接所述第二电平端。
  8. 一种显示面板，包括如权利要求1-7任一项所述的像素驱动电路。
  9. 一种显示装置，包括如权利要求8所述的显示面板。
  10. 一种入权利要求1-7之一所述的像素驱动电路的驱动方法，包括：
    第一阶段，补偿单元在复位信号端和控制信号端的控制下将第一电平端的电平写入第二节点和第三节点，并在所述复位信号端的控制下将所述参考信号端的电平写入所述第一节点；
    第二阶段，第二节点通过驱动单元和显示单元放电，第一储能单元存储所述驱动单元的阈值电压；
    第三阶段，数据写入单元在扫描信号端的控制下将数据信号端的信号写入所述第二节点；
    第四阶段，补偿单元在控制信号端的控制下将第一电平端的电平写入第三节点；第二储能单元存储第二节点和所述第一电平端之间的电压，第一储能单元存储保持所述第二节点和所述第一节点之间的电压，所述驱动单元向所述显示单元输出驱动信号，所述显示单元在所述驱动信号和第二电平端的控制下显示灰阶。
  11. 根据权利要求10所述的方法，其中，所述补偿单元包括：第二晶体管、第三晶体管和第四晶体管；
    在所述第一阶段，所述第二晶体管、所述第三晶体管和所述第四晶体管 均导通，从而将所述第一电平端的电平通过所述第三晶体管写入所述第三节点，将所述第一电平端的电平通过所述第二晶体管和第三晶体管写入所述第二节点，将所述参考信号端的电平通过所述第四晶体管写入所述第一节点；
    在所述第二阶段，所述第二晶体管和所述第四晶体管均导通，所述第三晶体管为截止；
    在所述第三阶段，所述第二晶体管、所述第三晶体管和所述第四晶体管均截止；
    在所述第四阶段，所述第二晶体管和所述第四晶体管均截止，所述第三晶体管导通，从而将所述第一电平端的电平通过所述第三晶体管写入所述第三节点。
  12. 根据权利要求10所述的方法，其中，所述数据写入单元包括：第一晶体管；
    在所述第一阶段，所述第一晶体管截止；
    在所述第二阶段，所述第一晶体管截止；
    在所述第三阶段，所述第一晶体管导通，从而将所述数据信号端的信号通过所述第一晶体管写入所述第二节点；
    在所述第四阶段，所述第一晶体管截止。
PCT/CN2016/070881 2015-07-15 2016-01-14 一种像素驱动电路及其驱动方法、显示面板和显示装置 Ceased WO2017008484A1 (zh)

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