WO2019141165A1 - 数据传输方法及装置、系统 - Google Patents
数据传输方法及装置、系统 Download PDFInfo
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/63—Joint error correction and other techniques
- H03M13/635—Error control coding in combination with rate matching
- H03M13/6362—Error control coding in combination with rate matching by puncturing
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
- H04L1/0009—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the channel coding
- H04L1/0013—Rate matching, e.g. puncturing or repetition of code symbols
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0045—Arrangements at the receiver end
- H04L1/0047—Decoding adapted to other signal detection operation
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0057—Block codes
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0061—Error detection codes
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/12—Arrangements for detecting or preventing errors in the information received by using return channel
- H04L1/16—Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals
- H04L1/1607—Details of the supervisory signal
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/12—Arrangements for detecting or preventing errors in the information received by using return channel
- H04L1/16—Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals
- H04L1/18—Automatic repetition systems, e.g. Van Duuren systems
- H04L1/1812—Hybrid protocols; Hybrid automatic repeat request [HARQ]
- H04L1/1819—Hybrid protocols; Hybrid automatic repeat request [HARQ] with retransmission of additional or different redundancy
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/12—Arrangements for detecting or preventing errors in the information received by using return channel
- H04L1/16—Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals
- H04L1/18—Automatic repetition systems, e.g. Van Duuren systems
- H04L1/1867—Arrangements specially adapted for the transmitter end
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L5/00—Arrangements affording multiple use of the transmission path
- H04L5/003—Arrangements for allocating sub-channels of the transmission path
- H04L5/0053—Allocation of signalling, i.e. of overhead other than pilot signals
- H04L5/0055—Physical resource allocation for ACK/NACK
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/12—Arrangements for detecting or preventing errors in the information received by using return channel
- H04L1/16—Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals
- H04L1/18—Automatic repetition systems, e.g. Van Duuren systems
- H04L1/1822—Automatic repetition systems, e.g. Van Duuren systems involving configuration of automatic repeat request [ARQ] with parallel processes
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/12—Arrangements for detecting or preventing errors in the information received by using return channel
- H04L1/16—Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals
- H04L1/18—Automatic repetition systems, e.g. Van Duuren systems
- H04L1/1867—Arrangements specially adapted for the transmitter end
- H04L1/1874—Buffer management
Definitions
- the present application relates to the field of communications technologies, and in particular, to a data transmission method, apparatus, and system.
- Rapid evolution of wireless communication indicates that the future fifth-generation (5 th generation, 5G) communication systems will appear in some of the new features, the most typical three communications scenarios including enhanced mobile broadband (enhance mobile broadband, eMBB), massive machine class Massive machine type of communication (mMTC) and ultra reliable low lantency (URLLC).
- enhanced mobile broadband enhanced mobile broadband
- mMTC massive machine class Massive machine type of communication
- URLLC ultra reliable low lantency
- LTE long term evolution
- channel coding is an important research object to meet the needs of 5G communication.
- the Polar code is the first good code that theoretically proves that it can achieve Shannon capacity and has low coding and decoding complexity.
- a typical scenario in 5G is that communication with high reliability, but not sensitive to delay, the most common method is to improve the reliability of communication by hybrid automatic repeat request (HARQ). Higher link throughput.
- HARQ hybrid automatic repeat request
- a HARQ scheme of a Polar code is to repeatedly transmit the same sequence every retransmission until an acknowledgment (ACK) feedback signal is received, and the receiving end combines the soft information received each time for the soft information.
- ACK acknowledgment
- the decoding performance of decoding but directly retransmitting the original information bits is poor, and the frame error rate (FER) is high during decoding.
- the present application provides a retransmission method and a communication apparatus, so that such a data transmission scheme generates additional coding gain when decoding, reduces decoded FER, and improves decoding performance.
- a data transmission method including: generating a bit sequence to be transmitted, where the bit sequence to be transmitted includes: one or more bits in a bit sequence of length (NM), wherein the N The length of the polarity coded mother code, M is the coded bit length after rate matching of the N bit sequences; N is an integer power of m, m is a positive integer greater than 1, and M is a positive integer, N ⁇ M; and transmitting the generated bit sequence.
- the data transmission scheme generates additional coding gains during decoding, reduces the decoded FER, and improves decoding performance.
- the bit sequence to be sent further includes one or more bits in a bit sequence of length N.
- the length of the bit sequence to be sent is min(m ⁇ (ceil(log m M)+) 1), Nmax); wherein P t is the threshold number of punches, and Nmax is the maximum length of the mother code.
- N should satisfy the following condition: N/2-M ⁇ P t , and NM ⁇ P t , then the length of the bit sequence to be transmitted is min(m ⁇ (ceil(log) m M)+1), Nmax); wherein P t is the threshold number of punches, and Nmax is the maximum length of the mother code.
- a data transmission apparatus including: a processing module, configured to generate a bit sequence to be transmitted, where the bit sequence to be transmitted includes: one or more bits in a bit sequence of length (NM) Wherein N is the length of the polarity coded mother code, M is the coded bit length after rate matching of the N bit sequences; N is an integer power of m, and m is a positive integer greater than 1. M is a positive integer, N ⁇ M; and a transmitting module for transmitting the generated bit sequence.
- NM bit sequence of length
- the bit sequence to be sent further includes one or more bits in a bit sequence of length N.
- the length of the bit sequence to be sent is min(m ⁇ (ceil(log m M)+) 1), Nmax); wherein P t is the threshold number of punches, and Nmax is the maximum length of the mother code.
- N should satisfy the following condition: N/2-M ⁇ P t , and NM ⁇ P t , then the length of the bit sequence to be transmitted is min(m ⁇ (ceil(log) m M)+1), Nmax); wherein P t is the threshold number of punches, and Nmax is the maximum length of the mother code.
- the device is a network device or a terminal device.
- an encoding apparatus including a processor, configured to: generate a bit sequence to be transmitted, where the bit sequence to be transmitted includes one or more of a bit sequence of length (NM) a bit, wherein the N is the length of the polarity coded mother code, M is the coded bit length after rate matching of the N bit sequences; N is an integer power of m, and m is greater than 1 Integer, M is a positive integer, N ⁇ M.
- NM bit sequence of length
- the bit sequence to be sent further includes one or more bits in a bit sequence of length N.
- the length of the bit sequence to be sent is min(m ⁇ (ceil(log m M)+) 1), Nmax); wherein P t is the threshold number of punches, and Nmax is the maximum length of the mother code.
- N should satisfy the following condition: N/2-M ⁇ P t , and NM ⁇ P t , then the length of the bit sequence to be transmitted is min(m ⁇ (ceil(log) m M)+1), Nmax); wherein P t is the threshold number of punches, and Nmax is the maximum length of the mother code.
- the apparatus further includes a memory for storing program instructions.
- the device is a network device or a terminal device.
- a data transmission apparatus including: an input interface circuit, configured to obtain a bit sequence of a length N of a mother code; and a logic circuit configured to generate a bit sequence to be transmitted, the bit sequence to be transmitted.
- the method includes: one or more bits in a bit sequence of length (NM), wherein the N is a length of a polarity coded mother code, and M is a coded bit length after performing rate matching on the N bit sequences N is an integer power of m, m is a positive integer greater than 1, M is a positive integer, N ⁇ M; and an output interface circuit for outputting a bit sequence to be transmitted.
- NM bit sequence of length
- the bit sequence to be sent further includes one or more bits in a bit sequence of length N.
- the length of the bit sequence to be sent is min(m ⁇ (ceil(log m M)+) 1), Nmax); wherein P t is the threshold number of punches, and Nmax is the maximum length of the mother code.
- N should satisfy the following condition: N/2-M ⁇ P t , and NM ⁇ P t , then the length of the bit sequence to be transmitted is min(m ⁇ (ceil(log) m M)+1), Nmax); wherein P t is the threshold number of punches, and Nmax is the maximum length of the mother code.
- the device is a network device or a terminal device.
- a data transmission system comprising: a network device and a terminal device, the network device comprising the above data transmission device; and/or the terminal device comprising the data transmission device described above .
- a chip including: a processor, the processor is configured to generate a bit sequence to be transmitted, and the bit sequence to be transmitted includes: one or more of a bit sequence of length (NM) a bit, wherein the N is a length of a polarity coded mother code, M is a coded bit length after rate matching of the N bit sequences; N is an integer power of m, and m is a positive integer greater than 1. , M is a positive integer, N ⁇ M.
- NM bit sequence of length
- the chip further includes: a memory, configured to store a program.
- a readable storage medium comprising: a readable storage medium and a computer program for implementing the encoding method of any of the above.
- a program product comprising a computer program, the computer program being stored in a readable storage medium, the at least one processor of the encoding device being readable from the readable storage medium A computer program, the at least one processor executing the computer program to cause an encoding device to implement the encoding method of any of the above.
- a decoding method including: receiving soft information corresponding to a bit sequence, where the soft information includes: soft information corresponding to one or more bits in a bit sequence of length (NM), where The N is the length of the polarity coded mother code, M is the coded bit length after rate matching of the N bit sequences; N is an integer power of m, m is a positive integer greater than 1, and M is positive Integer, N ⁇ M;
- the soft information is combined and decoded to obtain decoded bits.
- the soft information further includes: one or more bits in a bit sequence of length N.
- a decoding apparatus including: a receiving module, configured to receive soft information corresponding to a bit sequence, where the soft information includes: one or more bits in a bit sequence of length (NM) Soft information, wherein the N is the length of the polarity coded mother code, M is the coded bit length after rate matching of the N bit sequences; N is an integer power of m, and m is greater than 1 An integer, M is a positive integer, N ⁇ M; and a processing module for combining and decoding the soft information to obtain a decoded bit.
- NM bit sequence of length
- 1 is a schematic diagram of channel coding in a communication link
- FIG. 3 is a schematic diagram of a communication system according to an embodiment of the present application.
- FIG. 4 is a schematic flowchart of a data transmission method according to an embodiment of the present application.
- FIG. 5 is a schematic diagram of performance comparison between the solution of the present application and an existing retransmission scheme
- FIG. 6 is a schematic structural diagram of a data transmission apparatus according to an embodiment of the present application.
- FIG. 7 is a schematic structural diagram of an encoding apparatus according to an embodiment of the present disclosure.
- FIG. 8 is a schematic structural diagram of another coding apparatus according to an embodiment of the present disclosure.
- FIG. 9 is a schematic flowchart of a decoding method according to an embodiment of the present disclosure.
- FIG. 11 is a schematic structural diagram of a decoding apparatus according to an embodiment of the present disclosure.
- FIG. 12 is a schematic structural diagram of another decoding apparatus according to an embodiment of the present disclosure.
- FIG. 13 is a schematic structural diagram of still another encoding apparatus according to an embodiment of the present application.
- FIG. 14 is a schematic structural diagram of a network device according to an embodiment of the present disclosure.
- FIG. 15 is a schematic structural diagram of a terminal device according to an embodiment of the present disclosure.
- FIG. 1 is a schematic diagram of channel coding in a communication link.
- the transmitting end transmits information through a channel through source coding, channel coding, rate matching, and digital modulation.
- the receiving end receives signals from the channel, performs digital demodulation, de-rate matching, channel decoding, and source decoding, and finally restores the information.
- the embodiment of the present application provides a data transmission scheme, where the method of retransmission may be specifically HARQ, and of course, other retransmission modes.
- HARQ combines channel coding with automatic repeat request technology: channel coding can correct it directly for small-scale errors occurring during transmission; and for transmission errors beyond channel coding error correction capability, the receiver passes The feedback link informs the sender that the message is resent.
- NACK non-acknowledgement
- the sender will send a new piece of data. This process continues until the receiving end sends an acknowledgment (ACK) message to the sender to inform that the decoding is correct, thereby completing the transmission of the pair of information blocks.
- ACK acknowledgment
- the sender sends a new data to the receiving end, where the new data may include: one or more bits in a bit sequence of length (NM), wherein the N is a polarity encoded mother
- NM bit sequence of length
- M is the coded bit length after rate matching of the N bit sequences
- N is an integer power of m
- m is a positive integer greater than 1
- M is a positive integer, N ⁇ M.
- the receiving end can reduce the decoded FER by using additional coding gain, and improve the decoding performance.
- the data transmission scheme of the present application can be compiled and coded using a plurality of codes.
- the following focuses on the simple description of the code of the Polar code:
- the Polar code is a linear block code. Its generator matrix is G N and its encoding process is among them Is a binary line vector of length N (ie code length); G N is an N ⁇ N matrix, and Here
- a part of the bits are used to carry information, called information bits, and the set of indexes of these bits is recorded as
- the other part of the bit is set to a fixed value pre-agreed by the transceiver, which is called a fixed bit, and the index is used as a set.
- Information bit number set The following method is selected: firstly, according to the construction algorithm of the Polar code, the polarization channel error probability corresponding to the bit of the sequence number i can be obtained.
- serial cancellation (SC) decoding the most basic decoding method of the Polar code is serial cancellation (SC) decoding, but the performance of the algorithm is not ideal under a finite code length.
- SCL serial cancellation list
- SCL serial cancellation list
- the decoding algorithm can obtain better frame error rate (FER) performance than Turbo codes and low-density parity-check (LDPC) codes with comparable complexity.
- FIG. 3 is a schematic diagram of a communication system according to an embodiment of the present application.
- the communication system may include at least one network device 100 (only one shown) and one or more terminal devices 200 connected to the network device 100.
- the sender device in the present application may be a terminal device, and the receiver device may be a network device; or the sender device may be a network device, and the receiver device may be a terminal device.
- Network device 100 can be a device that can communicate with terminal device 200.
- the network device 100 may be any device having a wireless transceiving function. Including but not limited to: a base station (eg, a base station NodeB, an evolved base station eNodeB, a base station in a fifth generation (5G) communication system, a base station or network device in a future communication system, an access node in a WiFi system , wireless relay node, wireless backhaul node, etc.
- the network device 100 may also be a wireless controller in a cloud radio access network (CRAN) scenario.
- CRAN cloud radio access network
- the network device 100 may also be a network device in a 5G network or a network device in a future evolved network; it may also be a wearable device or an in-vehicle device or the like.
- the network device 100 may also be a small station, a transmission reference point (TRP) or the like. Of course, no application is not limited to this.
- the terminal device 200 is a device with wireless transceiving function that can be deployed on land, including indoor or outdoor, handheld, wearable or on-board; it can also be deployed on the water surface (such as a ship, etc.); it can also be deployed in the air (for example, an airplane, Balloons and satellites, etc.).
- the terminal device may be a mobile phone, a tablet (Pad), a computer with wireless transceiver function, a virtual reality (VR) terminal device, an augmented reality (AR) terminal device, and industrial control ( Wireless terminal in industrial control, wireless terminal in self driving, wireless terminal in remote medical, wireless terminal in smart grid, transportation safety A wireless terminal, a wireless terminal in a smart city, a wireless terminal in a smart home, and the like.
- a terminal device may also be referred to as a user equipment (UE), an access terminal device, a UE unit, a UE station, a mobile station, a mobile station, a remote station, a remote terminal device, a mobile device, a UE terminal device, and a terminal (terminal). ), terminal equipment, wireless communication equipment, UE proxy or UE device, and the like.
- system and “network” in the embodiments of the present application may be used interchangeably.
- Multiple means two or more.
- a plurality can also be understood as “at least two” in the embodiment of the present application.
- the character "/” unless otherwise specified, generally indicates that the contextual object is an "or" relationship.
- the embodiment of the present application provides a data transmission method and apparatus.
- the data transmission scheme generates an additional coding gain when decoding, reduces the decoded FER, and improves decoding performance.
- FIG. 4 is a schematic flowchart of a data transmission method according to an embodiment of the present disclosure, where the method includes the following steps:
- bit sequence to be sent includes one or more bits in a bit sequence of length (NM), where the N is a length of a polarity coded mother code, M
- NM bit sequence of length
- M The coded bit length after rate matching of the N bit sequences; N is an integer power of m, m is a positive integer greater than 1, and M is a positive integer, N ⁇ M.
- the mother code of length N is first subjected to polarity coding, and the coded bit length after rate matching is obtained as M.
- the M coded bits and (N-M) bits are sequentially transmitted. Specifically, the M coded bits are initially transmitted, and then one or more of the (N-M) bits are retransmitted, and one or more of the M initial transmission bits may also be retransmitted.
- the M coded bits and (N-M) bits may be stored in the buffer, and the bits in the buffer are sequentially read and transmitted until the transmission length of the initial transmission or the transmission length of the retransmission is reached.
- mother code is interleaved and rate matched or M coded bits are obtained.
- bit sequence to be transmitted further includes one or more bits in a bit sequence of length N. That is, in this embodiment, one or more of the N bit sequences are also transmitted before or after the (N-M) bit sequence is transmitted.
- This embodiment uses the code of the Polar code as an example to describe the data transmission scheme. specifically:
- the length N and the information bit length K to be transmitted, etc. are constructed, and a preferred polarized channel is selected by online calculation or table reading to generate a set of information bit numbers.
- the other part of the bit is set to a fixed value pre-agreed by the transceiver, which is called a fixed bit, and the index is used as a set. Complement Said.
- the value of the mother code length N of the Polar code needs to be designed.
- the value of the mother code length N is determined.
- the value of the mother code length N is min(m ⁇ (ceil(log m M)+1), N max ), where "m ⁇ ceil (log m M)" denotes the code length closest to M and greater than or equal to M, P t represents the threshold number of a number of punches, and N max is the maximum mother code length preset by the Polar code system.
- P t is the threshold number of punches
- Nmax is the maximum mother code length set by the system.
- the mother code length when designing the mother code length, it is more important to select the length of the mother code as long as possible, so that more (NM) bits can be generated for selection, applied to the retransmitted scene, and The transmission (NM) bits are used for retransmission, which can bring a certain coding gain.
- the coding FER can be reduced, and the decoded FER can be reduced to improve the decoding performance.
- the design mother code of length N should satisfy the following condition: N / 2-M ⁇ P t, and NM ⁇ P t; wherein, P t is the number of punctured threshold.
- the bit to be transmitted includes a bit greater than or equal to the threshold, and in particular, the application is applied to the retransmission application scenario, and the length N of the mother code that satisfies the above condition is selected. This makes it possible to generate more (NM) bits for retransmission, which in turn can bring a certain coding gain.
- the coding FER can be reduced, the decoded FER can be reduced, and the decoding performance can be improved.
- the number of puncturing thresholds P t is determined according to at least one of the following parameters: the code rate R, the code length M, and the rate matching manner include a manner of shortening or puncturing.
- P t may also be a fixed value agreed by the receiving end and the transmitting end, for example, 10, 20, and the like.
- the coded bits are then polar coded. Specifically, it needs to be based on And sequence to be coded Multiplying with the coding matrix G to obtain the mother code (Seq.0).
- the method further includes the steps of: interleaving and rate matching the bit sequence of length N to obtain the rate matched coded bits and (NM) untransmitted bits, wherein the (NM) unsent bits Bits can also be thought of as coded bits that are punctured. Specifically, interleaving and rate matching are performed on Seq. 0 to obtain a bit sequence. (Seq. 1).
- the mother code is interleaved according to a set interleaving manner, where the set interleaving manner includes at least one of: interleaving in bit order, interleaving in bit reverse order, and packet interleaving.
- the mother code may be interleaved according to the rate matching manner, and the interleaved memory is stored in the circular buffer, and each retransmission may be sequentially read from the next bit position of the last end position until the transmission length is reached.
- the interleaving is performed according to a predetermined rate matching interleaving method to obtain a sequence Seq.1, and the interleaved bits are arranged in a sequence of rate matching priority order.
- the specific interleaving manner may be sequential, may be bit reverse order, or may be a predetermined packet interleaving manner.
- the mother code codeword is equally divided into 32 groups and respectively labeled as 1, 2, . . . 31, each group according to a certain The order is arranged to obtain an interleaved bit sequence.
- the interleaving sequence that is, the relative position of each group, is ordered as [0 1 2 4 3 5 6 7 8 16 9 17 10 18 11 19 12 20 13 21 14 22 15 23 24 25 26 28 27 29 30 31].
- the interleaved bit sequence has a bit corresponding to the priority of the rate matching, for example, the higher or the later the bit is prioritized for rate matching.
- Sequence 1 is sequentially placed in a circular buffer for data transmission, for example, for initial transmission and retransmission of data.
- a bit is selected from the Seq. 0 to be added to the bit sequence Seq. 2 to be transmitted, a bit sequence to be transmitted is generated, and the bit sequence to be transmitted is sequentially stored in the circular buffer.
- the selected coded bit may be one or more bits in a bit sequence of length N, or may be one or more bits in a bit sequence of length (NM), or may be in a bit sequence of length N.
- the bits in the mother code of length N are stored in the buffer in a certain order.
- the coded bits of the bit sequence Seq.2 to be transmitted are sequentially read from the next bit of the end position of the transmitted sequence transmission, and the bit sequence to be transmitted is transmitted.
- One of the possible ways includes that the start and read directions of the circular buffer coincide with the start and direction of the interleaved sequence, and the remaining M bits are read by skipping the first P bits.
- the bit to be transmitted is sent, and the bit to be transmitted is located after the last bit sent last time, from the last bit that last ended. Initially, the bits to be transmitted are transmitted in sequence.
- the transmitting end may first encode all bit sequences of length N. Then, one or more bits in the bit sequence of length N are transmitted for the first time, the receiving end performs channel decoding, and performs CRC check. If the CRC does not pass, the NACK is fed back; the transmitting end sends the bit sequence to be transmitted the second time.
- the bit sequence to be transmitted includes one or more bits in a bit sequence of length (NM), and one or more bits of the first transmitted bit may also be transmitted, and the receiving end uses the first two times.
- the received signal attempts to merge and decode. If the CRC passes, the ACK is fed back. If the CRC still fails, the NACK is fed back.
- the sender sends one or more bits of the (NM) bits at the tth time, and can also send the first t-1 times.
- the receiving end uses the first t times of the received signal for combined decoding (t is greater than 2 integer), after performing t times of transmission, if the transmitting end receives the ACK, the transmission is declared successful; If the NACK is received and the maximum number of transmissions has been reached, the transmission fails.
- the communication system uses repeated retransmission at certain code length code rates, incremental code redundancy (IR) transmission is adopted at some code length code rates. Therefore, the scheme of this embodiment can be generally adopted in a hybrid automatic repeat request-incremental redundancy (HARQ-IR) mode. Therefore, in particular, it is also possible to determine whether the puncturing bits are included in the retransmission according to at least one parameter such as the code length, the code rate, the rate matching manner, and the like, and if the puncturing bits are included, the solution of the embodiment is adopted.
- HARQ-IR hybrid automatic repeat request-incremental redundancy
- the coding gain of the Polar code is fully utilized, and the accuracy of the decoding side is improved.
- FIG. 5 is a performance comparison curve of four transmissions of the solution of the present application and the existing retransmission scheme.
- the scheme of the present application is recorded as IR1
- the scheme for performing repeated transmission is recorded as CC
- each time the retransmission by the transmitting end the information with lower reliability is selected according to the reliability corresponding to each information bit in the set.
- the bit is directly retransmitted as IR2.
- the abscissa Es/N0 represents a signal to noise ratio
- the ordinate represents a block error rate (BLER).
- the set parameters include additive white gaussian noise (AWGN) channel, binary phase shift keying (BPSK) modulation, and the mother code length is 512, and the length of each transmission sequence is 412.
- AWGN additive white gaussian noise
- BPSK binary phase shift keying
- the IR1 scheme has a lower packet loss rate than the CC scheme at the same signal-to-noise ratio. Therefore, it can be seen that the CC scheme transmits the same bit for each retransmission, resulting in a small coding gain.
- the scheme of the present application transmits other coded bits in the mother code except the originally transmitted coded bits, thus generating additional coding gains during decoding, reducing the decoded FER and improving the decoding performance.
- the data transmission scheme generates an additional coding gain when decoding, reduces the decoded FER, and improves decoding performance.
- the embodiment of the present application further provides a data transmission device 6000, which is used to execute the data transmission method shown in FIG. .
- This device can be applied to the communication system shown in FIG.
- the data transmission device 6000 includes:
- the processing module 61 is configured to generate a bit sequence to be sent, where the bit sequence to be sent includes one or more bits in a bit sequence of length (NM), where the N is a polarity coded mother code Length, M is the coded bit length after rate matching of the N bit sequences; N is an integer power of m, m is a positive integer greater than 1, and M is a positive integer, N ⁇ M;
- NM bit sequence of length
- the sending module 62 is configured to send the generated bit sequence.
- the mother code of length N is first subjected to polarity coding, and the coded bit length after rate matching is obtained as M.
- the M coded bits and (N-M) bits are sequentially transmitted. Specifically, the M coded bits are initially transmitted, and then one or more of the (N-M) bits are retransmitted, and one or more of the M initial transmission bits may also be retransmitted.
- the M coded bits and (N-M) bits may be stored in the buffer, and the bits in the buffer are sequentially read and transmitted until the transmission length of the initial transmission or the transmission length of the retransmission is reached.
- mother code is interleaved and rate matched or M coded bits are obtained.
- the data transmission device 6000 further includes a construction module 63 and an encoding module 64.
- the constructing module 63 is configured to construct a set of information bit numbers according to the length of the sequence to be encoded and the length of information bits to be transmitted.
- the length N and the information bit length K to be transmitted, etc. are constructed, and a preferred polarized channel is selected by online calculation or table reading to generate a set of information bit numbers.
- the other part of the bit is set to a fixed value pre-agreed by the transceiver, which is called a fixed bit, and the index is used as a set. Complement Said.
- the encoding module 64 is configured to encode the coded bits.
- the coded bits are polar coded. Specifically, it needs to be based on And sequence to be coded Multiplying with the coding matrix G to obtain the mother code (Seq.0).
- bit sequence to be sent further includes:
- One or more bits in a sequence of bits of length N are bits in a sequence of bits of length N.
- N max the maximum mother code length preset by the Polar code system.
- P t is the threshold number of punches
- Nmax is the maximum mother code length set by the system.
- the design of the mother code length N should satisfy the following condition: N / 2-M ⁇ P t, and NM ⁇ P t; wherein, P t is the number of punctured threshold.
- the bit to be transmitted includes a bit greater than or equal to the threshold, and in particular, the application is applied to the retransmission application scenario, and the length N of the mother code that satisfies the above condition is selected.
- the coding FER can be reduced, the decoded FER can be reduced, and the decoding performance can be improved.
- the number of punching thresholds P t is determined according to at least one of the following parameters: the code rate R, the code length M, and the rate matching manner include a manner of shortening or punching.
- P t may also be a fixed value agreed by the receiving end and the transmitting end, for example, 10, 20, and the like.
- the device is a network device or a terminal device.
- the data transmission scheme generates an additional coding gain when decoding, reduces the decoded FER, and improves decoding performance.
- the embodiment of the present application further provides a data transmission system, where the data transmission system includes: a network device and a terminal device, where the network device/terminal device includes the foregoing data transmission device.
- an embodiment of the present application further provides an encoding apparatus 7000 for performing the data transmission method shown in FIG.
- This device can be applied to the communication system shown in FIG.
- Some or all of the data transmission methods shown in FIG. 4 may be implemented by hardware or by software.
- the encoding apparatus includes: an input interface circuit 71 for obtaining a length of the mother code of N.
- sequence of bits to be transmitted comprises: a sequence of bits of length (NM) One or more bits, wherein N is the length of the polarity coded mother code, M is the coded bit length after rate matching of the N bit sequences; N is an integer power of m, m is A positive integer greater than 1, M is a positive integer, N ⁇ M.
- bit sequence to be sent further includes:
- One or more bits in a sequence of bits of length N are bits in a sequence of bits of length N.
- the length of the bit sequence to be transmitted is min(m ⁇ (ceil(log m M)+1), Nmax);
- P t is the threshold number of punches and Nmax is the maximum length of the mother code.
- N should satisfy the following condition: N/2-M ⁇ P t , and NM ⁇ P t , then the length of the bit sequence to be transmitted is min(m ⁇ (ceil(log m M)+1), Nmax);
- P t is the threshold number of punches and Nmax is the maximum length of the mother code.
- the device is a network device or a terminal device.
- the encoding device may be a chip or an integrated circuit when implemented.
- the encoding apparatus 8000 includes: a memory 81 for storing a program; and a processor 82 for executing the memory 81.
- the stored program when the program is executed, causes the encoding device to acquire a bit sequence of length N of the mother code; generate a bit sequence to be transmitted; and output a bit sequence to be transmitted.
- This device can be applied to the communication system shown in FIG.
- the foregoing memory 81 may be a physically separate unit or may be integrated with the processor 82.
- the encoding apparatus 8000 may also include only the processor 82.
- the memory 81 for storing programs is located outside the encoding device 8000, and the processor 82 is connected to the memory 81 through circuits/wires for reading and executing programs stored in the memory 81.
- the processor 82 can be a central processing unit (CPU), a network processor (NP), or a combination of a CPU and an NP.
- CPU central processing unit
- NP network processor
- Processor 82 may also further include a hardware chip.
- the hardware chip may be an application-specific integrated circuit (ASIC), a programmable logic device (PLD), or a combination thereof.
- the PLD may be a complex programmable logic device (CPLD), a field-programmable gate array (FPGA), a general array logic (GAL), or any combination thereof.
- the memory 81 may include a volatile memory such as a random-access memory (RAM); the memory 81 may also include a non-volatile memory such as a flash memory (flash) Memory), hard disk drive (HDD) or solid state drive (SSD); the memory 81 may also include a combination of the above types of memories.
- RAM random-access memory
- non-volatile memory such as a flash memory (flash) Memory), hard disk drive (HDD) or solid state drive (SSD); the memory 81 may also include a combination of the above types of memories.
- FIG. 9 is a schematic flowchart of a decoding method according to an embodiment of the present disclosure, where the method may include the following steps:
- S91 Receive soft information corresponding to a bit sequence, where the soft information includes: soft information corresponding to one or more bits in a bit sequence of length (NM), where the N is a length of a polarity coded mother code.
- M is the coded bit length after rate matching of the N bit sequences; N is an integer power of m, m is a positive integer greater than 1, and M is a positive integer, N ⁇ M;
- bit sequence to be sent further includes:
- One or more bits in a sequence of bits of length N are bits in a sequence of bits of length N.
- the soft information combining at the receiving end only needs to maintain a one-dimensional matrix of size N.
- the initial value is 0.
- the soft information received by the receiving end is in accordance with the position of each bit in the mother code.
- the soft information of the corresponding position is added, that is, since the rate matching, interleaving, buffering, etc. are required when the bits are transmitted, the position of each bit in the mother code is The position in the location is not necessarily aligned. Therefore, when receiving the initial transmission or retransmission sequence, the receiver needs to locate its position in the mother code. Position alignment in .
- the receiver only needs to reserve a Seq.2 size cache for soft information merging.
- the soft information combining process of the receiving end is shown in FIG. 10.
- the bits in Seq.0 are aligned. Position in , merge Seq.0 into When receiving the first retransmission sequence (2 nd received LLR) and the second retransmission sequence (3 rd received LLR), the bits aligning each retransmission sequence are Position in , merge the received retransmission sequence into Or after receiving the initial sequence and all the retransmission sequences, they can be unified and merged into
- an additional coding gain is generated during decoding, which reduces the decoded FER and improves decoding performance.
- the embodiment of the present application further provides a decoding apparatus 1100, which can be used to perform the decoding method provided by the embodiment of the present application.
- This device can be applied to the communication system shown in FIG.
- the decoding device 1100 includes:
- the receiving module 111 is configured to receive soft information corresponding to the bit sequence
- the decoding module 112 is configured to perform combined decoding on the soft information to obtain decoded bits.
- the embodiment of the present application further provides a decoding apparatus 1200, which is used to execute the above decoding method.
- This device can be applied to the communication system shown in FIG.
- Some or all of the foregoing decoding methods may be implemented by hardware or by software.
- the decoding apparatus 1200 includes: an input interface circuit 121 for receiving soft information corresponding to a bit sequence; and a logic circuit 1102, configured to execute the above decoding method, and an output interface circuit 1103, configured to output the decoded bit.
- the decoding device 1200 may be a chip or an integrated circuit when implemented.
- the decoding apparatus 1300 includes: a memory 131 for storing a program; and a processor 132 for executing The program stored in the memory 131, when the program is executed, causes the decoding device 1300 to implement the decoding method provided by the above embodiment.
- the foregoing memory 131 may be a physically separate unit or may be integrated with the processor 132.
- the decoding apparatus 1300 may also include only the processor 132.
- This device can be applied to the communication system shown in FIG.
- the memory 131 for storing programs is located outside the decoding device 1300, and the processor 132 is connected to the memory 131 through circuits/wires for reading and executing programs stored in the memory 131.
- the processor 132 can be a central processing unit (CPU), a network processor (NP), or a combination of a CPU and an NP.
- CPU central processing unit
- NP network processor
- Processor 132 may also further include a hardware chip.
- the hardware chip may be an application-specific integrated circuit (ASIC), a programmable logic device (PLD), or a combination thereof.
- the PLD may be a complex programmable logic device (CPLD), a field-programmable gate array (FPGA), a general array logic (GAL), or any combination thereof.
- the memory 131 may include a volatile memory such as a random-access memory (RAM); the memory 131 may also include a non-volatile memory such as a flash memory (flash) Memory), hard disk drive (HDD) or solid-state drive (SSD); the memory 131 may also include a combination of the above types of memories.
- RAM random-access memory
- non-volatile memory such as a flash memory (flash) Memory), hard disk drive (HDD) or solid-state drive (SSD); the memory 131 may also include a combination of the above types of memories.
- the embodiment of the present application further provides a network device.
- the foregoing encoding device and/or decoding device may be installed in the network device 1400. This device can be applied to the communication system shown in FIG.
- the network device 1400 may further include a transceiver 142, and the bit sequence encoded by the encoding device is sent to the terminal device through the transceiver 142 after subsequent changes or processing, or the transceiver 142 is further For receiving information/data from the terminal device, the information/data is converted into a sequence to be decoded through a series of processes, and processed by the decoding device to obtain a decoded sequence.
- Network device 1400 may also include a network interface 144 for communicating with other network devices.
- the above encoding device and/or decoding device can be installed in the terminal device 1500 as shown in FIG. This device can be applied to the communication system shown in FIG.
- the terminal device 1500 may further include a transceiver 152, and the bit sequence encoded by the encoding device is sent to the network device through the transceiver 152 after subsequent changes or processing, or the transceiver 152 is further For receiving information/data from a network device, the information/data is converted into a sequence to be decoded through a series of processes, and processed by a decoding device to obtain a decoded sequence.
- the terminal 1500 may further include an input/output interface 154 for receiving information input by the user.
- the information needs to be processed by the encoder and then sent to the network device through the transceiver 152.
- the decoded data of the decoder can also be presented to the user through the input and output interface 154 after subsequent processing.
- the embodiment of the present application further provides a computer storage medium storing a computer program, the computer program comprising a data transmission method shown in FIG. 4 and a decoding method provided by the foregoing embodiment.
- the embodiment of the present application further provides a Polar code encoding apparatus, including any of the above-mentioned encoding devices of FIGS. 7 to 9 and any decoding device of FIGS. 11 to 13 .
- the embodiment of the present application further provides a computer program product comprising instructions, which when executed on a computer, causes the computer to execute the data transmission method shown in FIG. 4 and the decoding method provided by the above embodiment.
- the disclosed systems, devices, and methods may be implemented in other manners.
- the device embodiments described above are merely illustrative.
- the division of the unit is only a logical function division.
- there may be another division manner for example, multiple units or components may be combined or Can be integrated into another system, or some features can be ignored or not executed.
- the mutual coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection through some interface, device or unit, and may be in an electrical, mechanical or other form.
- each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.
- the computer program product includes one or more computer instructions.
- the computer can be a general purpose computer, a special purpose computer, a computer network, or other programmable device.
- the computer instructions can be stored in or transmitted by a computer readable storage medium.
- the computer instructions may be from a website site, computer, server or data center via a wired (eg, coaxial cable, fiber optic, digital subscriber line (DSL)) or wireless (eg, infrared, wireless, microwave, etc.) Another website site, computer, server, or data center for transmission.
- the computer readable storage medium can be any available media that can be accessed by a computer or a data storage device such as a server, data center, or the like that includes one or more available media.
- the usable medium may be a magnetic medium (eg, a floppy disk, a hard disk, a magnetic tape), an optical medium (eg, a digital versatile disc (DVD)), or a semiconductor medium (eg, a solid state disk (SSD)). )Wait.
- the foregoing storage medium includes: a read-only memory (ROM) or a random access memory (RAM), a magnetic disk, or an optical disk, and the like, which can store program code.
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Abstract
本申请公开了一种数据传输方法及装置、系统。该方法包括:生成待发送的比特序列,所述待发送的比特序列包括:长度为(N-M)的比特序列中的一个或者多个比特,其中,所述N为极性编码的母码的长度,M为对所述N个比特序列进行速率匹配之后的编码比特长度;N为m的整数次方,m为大于1的正整数,M为正整数,N<M;发送所述生成的比特序列。还公开了相应的装置及系统。在本申请中,这种数据传输的方案在译码时产生了额外的编码增益,降低了译码的FER,提高了译码的性能。
Description
本申请要求于2018年1月16日提交中国专利局、申请号为201810041373.1、发明名称为“数据传输方法及装置、系统”的中国专利申请的优先权,其全部内容通过引用结合在本申请中。
本申请涉及通信技术领域,尤其涉及一种数据传输方法及装置、系统。
无线通信的快速演进预示着未来第五代(5
th generation,5G)通信系统将呈现出一些新的特点,最典型的三个通信场景包括增强移动宽带(enhance mobile broadband,eMBB),海量机器类通信(massive machine type of communication,mMTC)和高可靠低时延通信(ultra reliable low lantency,URLLC)。这些通信场景的需求将对现有长期演进(long term evolution,LTE)技术提出新的挑战。信道编码作为最基本的无线接入技术,是满足5G通信需求的重要研究对象。而极化(Polar)码是第一个从理论上证明可以取得香农容量且具有低编译码复杂度的好码。
5G中一个典型的场景是对可靠度要求较高,但对延迟不敏感的通信,最常用的方法是通过混合自动重传请求(hybrid automatic repeat request,HARQ)来提高通信的可靠度,以达到更高的链路吞吐率。
然而,现有技术中,一种Polar码的HARQ方案是每次重传都重复发送相同的序列直到收到确认(ACK)反馈信号,接收端则将每次收到的软信息进行合并用于译码但是直接重发原始信息比特的译码性能较差,译码时误帧率(frame error rate,FER)较高。
因此,亟待提供一种能带来一定的编码增益的数据传输方案。
发明内容
本申请提供一种重传方法及通信装置,以使得这种数据传输的方案在译码时会产生额外的编码增益,降低译码的FER,提高译码的性能。
一方面,提供了一种数据传输方法,包括:生成待发送的比特序列,所述待发送的比特序列包括:长度为(N-M)的比特序列中的一个或者多个比特,其中,所述N为极性编码的母码的长度,M为对所述N个比特序列进行速率匹配之后的编码比特长度;N为m的整数次方,m为大于1的正整数,M为正整数,N<M;以及发送所述生成的比特序列。在该方面中,这种数据传输的方案在译码时产生了额外的编码增益,降低了译码的FER,提高了译码的性能。
在一种可能的实现方式中,所述待发送的比特序列还包括:长度为N的比特序列中的一个或者多个比特。
在另一种可能的实现方式中,当m^ceil(log
mM)-M<=P
t时,则所述待发送的比特序列的长度为min(m^(ceil(log
mM)+1),Nmax);其中,P
t为打孔数目阈值,Nmax为母 码的最大长度。
在又一种可能的实现方式中,N应满足以下条件:N/2-M≤P
t,且N-M≥P
t,则所述待发送的比特序列的长度为min(m^(ceil(log
mM)+1),Nmax);其中,P
t为打孔数目阈值,Nmax为母码的最大长度。
另一方面,提供了一种数据传输装置,包括:处理模块,用于生成待发送的比特序列,所述待发送的比特序列包括:长度为(N-M)的比特序列中的一个或者多个比特,其中,所述N为极性编码的母码的长度,M为对所述N个比特序列进行速率匹配之后的编码比特长度;N为m的整数次方,m为大于1的正整数,M为正整数,N<M;以及发送模块,用于发送所述生成的比特序列。
在一种可能的实现方式中,所述待发送的比特序列还包括:长度为N的比特序列中的一个或者多个比特。
在另一种可能的实现方式中,当m^ceil(log
mM)-M<=P
t时,则所述待发送的比特序列的长度为min(m^(ceil(log
mM)+1),Nmax);其中,P
t为打孔数目阈值,Nmax为母码的最大长度。
在又一种可能的实现方式中,N应满足以下条件:N/2-M≤P
t,且N-M≥P
t,则所述待发送的比特序列的长度为min(m^(ceil(log
mM)+1),Nmax);其中,P
t为打孔数目阈值,Nmax为母码的最大长度。
在又一种可能的实现方式中,所述装置为网络设备或终端设备。
又一方面,提供了一种编码装置,包括处理器,所述处理器用于:生成待发送的比特序列,所述待发送的比特序列包括:长度为(N-M)的比特序列中的一个或者多个比特,其中,所述N为极性编码的母码的长度,M为对所述N个比特序列进行速率匹配之后的编码比特长度;N为m的整数次方,m为大于1的正整数,M为正整数,N<M。
在一种可能的实现方式中,所述待发送的比特序列还包括:长度为N的比特序列中的一个或者多个比特。
在另一种可能的实现方式中,当m^ceil(log
mM)-M<=P
t时,则所述待发送的比特序列的长度为min(m^(ceil(log
mM)+1),Nmax);其中,P
t为打孔数目阈值,Nmax为母码的最大长度。
在又一种可能的实现方式中,N应满足以下条件:N/2-M≤P
t,且N-M≥P
t,则所述待发送的比特序列的长度为min(m^(ceil(log
mM)+1),Nmax);其中,P
t为打孔数目阈值,Nmax为母码的最大长度。
在又一种可能的实现方式中,所述装置还包括存储器,所述存储器用于存储程序指令。
在又一种可能的实现方式中,所述装置为网络设备或终端设备。
又一方面,提供了一种数据传输装置,包括:输入接口电路,用于获取母码的长度为N的比特序列;逻辑电路,用于生成待发送的比特序列,所述待发送的比特序列包括:长度为(N-M)的比特序列中的一个或者多个比特,其中,所述N为极性编码的母码的长度,M为对所述N个比特序列进行速率匹配之后的编码比特长度;N为m的整数次方,m为大于1的正整数,M为正整数,N<M;以及输出接口电路,用于输出待发送的比特序列。
在一种可能的实现方式中,所述待发送的比特序列还包括:长度为N的比特序列中的 一个或者多个比特。
在另一种可能的实现方式中,当m^ceil(log
mM)-M<=P
t时,则所述待发送的比特序列的长度为min(m^(ceil(log
mM)+1),Nmax);其中,P
t为打孔数目阈值,Nmax为母码的最大长度。
在又一种可能的实现方式中,N应满足以下条件:N/2-M≤P
t,且N-M≥P
t,则所述待发送的比特序列的长度为min(m^(ceil(log
mM)+1),Nmax);其中,P
t为打孔数目阈值,Nmax为母码的最大长度。
在又一种可能的实现方式中,所述装置为网络设备或终端设备。
又一方面,提供了一种数据传输系统,所述数据传输系统包括:网络设备和终端设备,所述网络设备包括上述的数据传输装置;和/或,所述终端设备包括上述的数据传输装置。
又一方面,提供了一种芯片,包括:处理器,所述处理器用于生成待发送的比特序列,所述待发送的比特序列包括:长度为(N-M)的比特序列中的一个或者多个比特,其中,所述N为极性编码的母码的长度,M为对所述N个比特序列进行速率匹配之后的编码比特长度;N为m的整数次方,m为大于1的正整数,M为正整数,N<M。
在一种可能的实现方式中,所述芯片还包括:存储器,用于存储程序。
又一方面,提供了一种可读存储介质,包括:可读存储介质和计算机程序,所述计算机程序用于实现上述任一项所述的编码方法。
又一方面,提供了一种程序产品,所述程序产品包括计算机程序,所述计算机程序存储在可读存储介质中,编码装置的至少一个处理器可以从所述可读存储介质读取所述计算机程序,所述至少一个处理器执行所述计算机程序使得编码装置实施上述任一项所述的编码方法。
又一方面,提供了一种译码方法,包括:接收比特序列对应的软信息,所述软信息包括:长度为(N-M)的比特序列中的一个或者多个比特对应的软信息,其中,所述N为极性编码的母码的长度,M为对所述N个比特序列进行速率匹配之后的编码比特长度;N为m的整数次方,m为大于1的正整数,M为正整数,N<M;对所述软信息进行合并并译码,获得译码后的比特。
在一种可能的实现方式中,所述软信息还包括:长度为N的比特序列中的一个或者多个比特。
又一方面,提供了一种译码装置,包括:接收模块,用于接收比特序列对应的软信息,所述软信息包括:长度为(N-M)的比特序列中的一个或者多个比特对应的软信息,其中,所述N为极性编码的母码的长度,M为对所述N个比特序列进行速率匹配之后的编码比特长度;N为m的整数次方,m为大于1的正整数,M为正整数,N<M;以及处理模块,用于对所述软信息进行合并并译码,获得译码后的比特。
为了更清楚地说明本申请实施例或背景技术中的技术方案,下面将对本申请实施例或背景技术中所需要使用的附图进行说明。
图1为通信链路中的信道编码示意图;
图2为HARQ传输示意图;
图3为本申请实施例提供的一种通信系统示意图;
图4为本申请实施例提供的一种数据传输方法的流程示意图;
图5为本申请方案与现有的重传方案的性能比较示意图;
图6为本申请实施例提供的一种数据传输装置的结构示意图;
图7为本申请实施例提供的一种编码装置的结构示意图;
图8为本申请实施例提供的另一种编码装置的结构示意图;
图9为本申请实施例提供的一种译码方法的流程示意图;
图10为接收端的软信息合并示意图;
图11为本申请实施例提供的一种译码装置的结构示意图;
图12为本申请实施例提供的另一种译码装置的结构示意图;
图13为本申请实施例提供的又一种编码装置的结构示意图;
图14为本申请实施例提供的一种网络设备的结构示意图;
图15为本申请实施例提供的一种终端设备的结构示意图。
下面结合本申请实施例中的附图对本申请实施例进行描述。
图1为通信链路中的信道编码示意图,发送端将信息经过信源编码、信道编码、速率匹配、数字调制,通过信道发送出去。接收端从信道接收信号,进行数字解调、解速率匹配、信道解码和信源解码,最终还原信息。
本申请实施例提供一种数据传输方案,其中涉及的重传的方式具体可以是HARQ,当然也可以是其它的重传方式。下面重点对HARQ的传输机制进行描述:
HARQ即是将信道编码与自动重传请求技术相结合:对于传输过程中发生的小规模的差错,信道编码能够直接将其纠正;而对于超出信道编码纠错能力的传输错误,接收端则通过反馈链路通知发送端,请求将该消息重新发送。
如图2所示的HARQ传输示意图,若接收端译码失败(比如无法通过循环冗余校验(cyclic redundancy check,CRC)),那么会通过一个反馈链路传输一个不确认(NACK)消息给发送端,发送端就会发送一份新的数据。这个过程一直持续到接收端发送确认(ACK)消息给发送端告知译码正确,从而完成该对信息块的传输。
其中,发送端发送一份新的数据给接收端,这里新的数据可以包括:包括:长度为(N-M)的比特序列中的一个或者多个比特,其中,所述N为极性编码的母码的长度,M为对所述N个比特序列进行速率匹配之后的编码比特长度;N为m的整数次方,m为大于1的正整数,M为正整数,N<M。基于这种数据,接收端可以通过额外的编码增益,降低译码的FER,提高译码的性能。
另外,本申请的数据传输方案可以采用多种码进行编译码。下面重点对Polar码的编译码进行简单描述:
Polar码是一种线性块码。其生成矩阵为G
N,其编码过程为
其中
是一个二进制的行矢量,长度为N(即码长);G
N是一个N×N的矩阵,且
这里
定义为log
2N个矩阵F
2的克罗内克(Kronecker)乘积;以上涉及的加法、乘法操作均为二进制伽罗华域(Galois Field)上的加法、乘法操作。
Polar码的编码过程中,
中的一部分比特用来携带信息,称为信息比特,这些比特的索引的集合记作
另外的一部分比特置为收发端预先约定的固定值,称之为固定比特,其索引的集合用
的补集
表示。信息比特序号集合
按以下方法选取:首先按照Polar码的构造算法得到可以得到序号i的比特对应的极化信道错误概率
选择
值最小的K个序号,构成集合
也可以通过离线存储一个满足包含关系的可靠度排序序列,根据K和N从序列当中读取当前母码下可靠度最高的K个极化信道序号,构成集合
Polar码最基本的译码方法是串行抵消(successive cancellation,SC)译码,但该算法在有限码长下性能并不理想。后续提出的串行抵消列表(successive cancellation list,SCL)译码算法,通过横向路径扩展以及CRC校验选择的方法,提高了短码的译码性能。该译码算法能够在复杂度相当的情况下获得比Turbo码、低密度奇偶校验(low-density parity-check,LDPC)码更优的误帧率(frame error rate,FER)性能。
图3为本申请实施例提供的一种通信系统示意图。该通信系统可以包括至少一个网络设备100(仅示出1个)以及与网络设备100连接的一个或多个终端设备200。本申请中的发送端设备可以是终端设备,则接收端设备可以是网络设备;或发送端设备可以是网络设备,则接收端设备可以是终端设备。
网络设备100可以是能和终端设备200通信的设备。网络设备100可以是可以是任意一种具有无线收发功能的设备。包括但不限于:基站(例如,基站NodeB、演进型基站eNodeB、第五代(the fifth generation,5G)通信系统中的基站、未来通信系统中的基站或网络设备、WiFi系统中的接入节点、无线中继节点、无线回传节点)等。网络设备100还可以是云无线接入网络(cloud radio access network,CRAN)场景下的无线控制器。网络设备100还可以是5G网络中的网络设备或未来演进网络中的网络设备;还可以是可穿戴设备或车载设备等。网络设备100还可以是小站,传输节点(transmission reference point,TRP)等。当然不申请不限于此。
终端设备200是一种具有无线收发功能的设备可以部署在陆地上,包括室内或室外、手持、穿戴或车载;也可以部署在水面上(如轮船等);还可以部署在空中(例如飞机、气球和卫星上等)。所述终端设备可以是手机(mobile phone)、平板电脑(Pad)、带无线收发功能的电脑、虚拟现实(Virtual Reality,VR)终端设备、增强现实(Augmented Reality,AR)终端设备、工业控制(industrial control)中的无线终端、无人驾驶(self driving)中 的无线终端、远程医疗(remote medical)中的无线终端、智能电网(smart grid)中的无线终端、运输安全(transportation safety)中的无线终端、智慧城市(smart city)中的无线终端、智慧家庭(smart home)中的无线终端等等。本申请的实施例对应用场景不做限定。终端设备有时也可以称为用户设备(user equipment,UE)、接入终端设备、UE单元、UE站、移动站、移动台、远方站、远程终端设备、移动设备、UE终端设备、终端(terminal)、终端设备、无线通信设备、UE代理或UE装置等。
需要说明的是,本申请实施例中的术语“系统”和“网络”可被互换使用。“多个”是指两个或两个以上,鉴于此,本申请实施例中也可以将“多个”理解为“至少两个”。“和/或”,描述关联对象的关联关系,表示可以存在三种关系,例如,A和/或B,可以表示:单独存在A,同时存在A和B,单独存在B这三种情况。另外,字符“/”,如无特殊说明,一般表示前后关联对象是一种“或”的关系。
本申请实施例提供一种数据传输方法及装置,这种数据传输的方案在译码时产生了额外的编码增益,降低了译码的FER,提高了译码的性能。
图4为本申请实施例提供的一种数据传输方法的流程示意图,该方法包括以下步骤:
S401、生成待发送的比特序列,所述待发送的比特序列包括:长度为(N-M)的比特序列中的一个或者多个比特,其中,所述N为极性编码的母码的长度,M为对所述N个比特序列进行速率匹配之后的编码比特长度;N为m的整数次方,m为大于1的正整数,M为正整数,N<M。
S402、发送所述生成的比特序列。
本实施例中,首先对长度为N的母码进行极性编码,得到进行速率匹配之后的编码比特长度为M。对这M个编码比特和(N-M)个比特依次进行发送。具体地,对该M个编码比特进行初传,然后重传(N-M)个比特中的一个或者多个比特,也可以重传M个初传比特中的一个或多个比特。其中,可以将M个编码比特和(N-M)个比特存入缓存中,发送时依次读取缓存中的比特进行发送,直到达到初传的发送长度或重传的发送长度。
其中,例如,上述m=2,即母码长度为2的整数次方。当然,m也可以取其它值。
进一步地,对母码进行交织和速率匹配或得到M个编码比特。
进一步地,所述待发送的比特序列还包括:长度为N的比特序列中的一个或者多个比特。即本实施例中,在发送(N-M)的比特序列之前或之后,还发送N个比特序列中的一个或多个比特。
本实施例以Polar码的编译码为例进行数据传输方案的描述。具体地:
在对Polar码进行编码前,首先根据实际参数(包括待编码序列
的长度N和待传输的信息比特长度K等)进行构造,并通过在线计算或读表的方式选择较优的极化信道,产生信息比特序号集合
另外的一部分比特置为收发端预先约定的固定值,称之为固定比特,其索引的集合用
的补集
表示。
本实施例中,需要设计Polar码的母码长度N的取值。
在一个实现方式中,对母码长度N的值进行确定。当m^ceil(log
mM)-M<=P
t,则母 码长度N的取值为min(m^(ceil(log
mM)+1),N
max),其中,“m^ceil(log
mM)”表示与M最接近且大于等于M的编码长度,P
t表示一个打孔数目的阈值数,N
max为Polar码系统预设的最大母码长度。当m^(ceil(log
mM)+1)<N
max,母码长度N的取值为m^(ceil(log
mM)+1);当m^(ceil(log
mM)+1)>N
max,则母码长度N的取值为N
max;当m^(ceil(log
mM)+1)=N
max,则母码的长度N的取值为m^(ceil(log
mM)+1),或者,N
max。其中,P
t为打孔数目阈值,Nmax为系统设定的最大母码长度。在该实现方式中,设计母码长度时,考虑更多的是选择母码的长度尽可能长一点,使得可以产生更多(N-M)个比特供选择,应用到重传的场景中,在重传时使用(N-M)个比特进行重传,进而可以带来一定的编码增益,在译码时,可以通过额外的编码增益,降低译码的FER,提高译码的性能。
在另一个实现方式中,母码的长度N的设计应满足以下条件:N/2-M≤P
t,且N-M≥P
t;其中,P
t为打孔数目阈值。在该实现方式中,设计母码长度时,使得待发送的比特中包含大于或等于阈值的比特可供选择,尤其是应用到重传的应用场景中,选择满足上述条件的母码长度N,使得可以产生更多(N-M)个比特供重传时使用,进而可以带来一定的编码增益,在译码时,可以通过额外的编码增益,降低译码的FER,提高译码的性能。
在又一个实现方式中,打孔数目阈值P
t根据以下至少一个参数进行确定:码率R、码长M和速率匹配方式包括缩短或者打孔的方式。例如:P
t是根据公式P
t=m^ceil(log
mM)/K,来确定,K大于或者等于2的正整数。P
t也可以是接收端和发送端共同约定的固定的值,例如10、20等。
进一步地,还包括步骤:对长度为N的比特序列进行交织和速率匹配,得到所述速率匹配后的编码比特和(N-M)个未发送的比特,其中,所述(N-M)个未发送的比特也可以被认为是被打孔打掉的编码比特。具体地,对Seq.0进行交织和速率匹配,得到比特序列
(Seq.1)。
在实际实现过程中,对所述母码按照设定交织方式进行交织;其中,所述设定交织方式包括以下至少一种:按比特顺序进行交织、按比特逆序进行交织和分组交织。具体实现中,可以将母码按照速率匹配的方式进行交织,并将交织后的存入循环缓存当中,每次重传可以从上一次结束位置的下一个比特顺序读取,直至达到发送长度。
例如,按照预定的速率匹配交织方式进行交织得到序列Seq.1,交织后的比特的排列为按照速率匹配优先级顺序的序列。具体的交织方式可以是顺序的,可以是比特逆序的,也可以是预定的分组交织方式,例如将母码码字平均分成32组分别标号为,1,2….31,每一组按照一定的顺序进行排列,得到交织后的比特序列。其中交织序列即每一组的相对位置排序为[0 1 2 4 3 5 6 7 8 16 9 17 10 18 11 19 12 20 13 21 14 22 15 23 24 25 26 28 27 29 30 31]。
交织后的比特序列,其比特与速率匹配的优先级对应,例如越靠前的或者越靠后的比特优先进行速率匹配。
将序列1依次放入循环缓存当中用于数据传输,例如:用于数据的初传和重传。
从Seq.0中选择比特添加到待传比特序列Seq.2,生成待发送的比特序列,将待发送 的比特序列依次存入循环缓存中。选择的编码比特可以是长度为N的比特序列中的一个或者多个比特,也可以是长度为(N-M)的比特序列中的一个或者多个比特,也可以是长度为N的比特序列中的一个或者多个比特和长度为(N-M)的比特序列中的一个或者多个比特。
将长度为N的母码中的比特按照一定的顺序存入缓存中。从发送的序列发送的结束位置的下一个比特顺序读取待传比特序列Seq.2的编码比特,发送所述待传送的比特序列。
其中一种可能的方式包括,循环缓存的起点和读取方向与交织后的序列的起点和方向一致,则跳过前P个比特读取剩下的M个比特。应用再重传的场景中,当接收端接收到重传消息,则将待传送的比特进行发送,所述待发送的比特位于上次发送的最后一个比特之后,从上一次结束的下一个比特开始,依次发送所待传送的比特。
以图2所示的HARQ流程为例,发送端可以首先对长度为N的全部比特序列进行编码。然后,首次发送长度为N的比特序列中的一个或多个比特,接收端进行信道译码,并进行CRC校验,若CRC不通过,反馈NACK;发送端第2次发送待发送的比特序列,所述待发送的比特序列包括:长度为(N-M)的比特序列中的一个或者多个比特,还可以发送第1次发送的比特中的一个或多个比特,接收端利用前两次的接收信号尝试合并译码,若CRC通过,反馈ACK;若CRC仍不通过,反馈NACK;发送端第t次发送(N-M)个比特的一个或多个比特,还可以发送前t-1次发送的比特中的一个或多个比特,接收端利用前t次的接收信号进行合并译码(t大于2的整数),在进行t次发送后,若发送端接收到ACK,则宣告发送成功;若接收到NACK且已达到最大发送次数,则宣告发送失败。
需要说明的是,由于通信系统在某些码长码率下采用的是重复重传,某些码长码率下又是采用的增量冗余(incremental redundancy,IR)传输。因此,一般在混合自动重传-增量冗余(hybrid automatic repeat request-incremental redundancy,HARQ-IR)模式下可采用本实施例的方案。从而,具体地,也可根据码长,码率,速率匹配方式等至少一个参数确定重传当中是否包含打孔比特,如包含打孔比特,则采用本实施例的方案。
本申请中,通过产生具有比特优先级的待发送序列,充分利用了Polar码的编码增益,提高了译码侧的准确率。
图5为本申请方案与现有重传方案的经过四次传输的性能比较曲线。为方便比较,将本申请方案记做IR1,进行重复发送的方案记做CC,发送端每次重传时,根据集合中每个信息比特对应的可靠度,从中选择具有较低可靠度的信息比特直接进行重传记做IR2。其中,横坐标Es/N0表示信噪比,纵坐标表示块差错率/丢包率(block error rate,BLER)。从图中可以清晰的看出由于IR2技术第一次重传的性能就不太理想,所以对于后续两次重传没有必要再将此方案进行比较。设置的参数包括加性白噪声(additive white gaussian noise,AWGN)信道,二进制相移键控(binary phase shift keying,BPSK)调制,母码码长为512,每次发送序列长度为412。第二次传输、第三次传输和第四次传输,在相同的信噪比下,IR1方案相比CC方案的丢包率低。因此,可以看出,CC方案由于每次重传都发送相同的比特,带来的编码增益较小。而本申请的方案发送母码中除初传的编码比特外的其它编码比特,因而在译码时产生了额外的编码增益,降低了译码的FER,提高了译码的性能。
根据本申请实施例提供的一种数据传输方法,这种数据传输的方案在译码时产生了额 外的编码增益,降低了译码的FER,提高了译码的性能。
基于图4所示的数据传输方法的同一发明构思,如图6所示,本申请实施例中还提供一种数据传输装置6000,该数据传输装置6000用于执行图4所示的数据传输方法。该装置可以适用于图3所示的通信系统中。具体地,该数据传输装置6000包括:
处理模块61,用于生成待发送的比特序列,所述待发送的比特序列包括:长度为(N-M)的比特序列中的一个或者多个比特,其中,所述N为极性编码的母码的长度,M为对所述N个比特序列进行速率匹配之后的编码比特长度;N为m的整数次方,m为大于1的正整数,M为正整数,N<M;
发送模块62,用于发送所述生成的比特序列。
本实施例中,首先对长度为N的母码进行极性编码,得到进行速率匹配之后的编码比特长度为M。对这M个编码比特和(N-M)个比特依次进行发送。具体地,对该M个编码比特进行初传,然后重传(N-M)个比特中的一个或者多个比特,也可以重传M个初传比特中的一个或多个比特。其中,可以将M个编码比特和(N-M)个比特存入缓存中,发送时依次读取缓存中的比特进行发送,直到达到初传的发送长度或重传的发送长度。
其中,例如,上述m=2,即母码长度为2的整数次方。当然,m也可以取其它值。
进一步地,对母码进行交织和速率匹配或得到M个编码比特。
可选地,该数据传输装置6000还包括构造模块63和编码模块64。
其中,构造模块63,用于根据待编码序列的长度和待传输信息比特长度,构造信息比特序号集合。
在对Polar码进行编码前,首先根据实际参数(包括待编码序列
的长度N和待传输的信息比特长度K等)进行构造,并通过在线计算或读表的方式选择较优的极化信道,产生信息比特序号集合
另外的一部分比特置为收发端预先约定的固定值,称之为固定比特,其索引的集合用
的补集
表示。
编码模块64,用于对待编码比特进行编码。
进一步地,所述待发送的比特序列还包括:
长度为N的比特序列中的一个或者多个比特。
进一步地,当m^ceil(log
mM)-M<=P
t,则母码长度N的取值为min(m^(ceil(log
mM)+1),N
max),其中,“m^ceil(log
mM)”表示与M最接近且大于等于M的编码长度,P
t表示一个打孔数目的阈值数,N
max为Polar码系统预设的最大母码长度。当m^(ceil(log
mM)+1)<N
max,母码长度N的取值为m^(ceil(log
mM)+1);当m^(ceil(log
mM)+1)>N
max,则母码长度N的取值为N
max;当m^(ceil(log
mM)+1)=N
max,则母码的长度N的取值为m^(ceil(log
mM)+1),或者,N
max。其中,P
t为打孔数目阈值,Nmax为系统设定的最大母码长度。在该实现方式中,设计母码长度时,考虑更多的是选择母码的长度尽可能长一点,使得可以产生更多(N-M)个比特供选择,应用到重传的场景中,在重传时使用(N-M)个比特进行重传,进而可以带来一定的编码增益,在译码时,可以通过额外的编码增益, 降低译码的FER,提高译码的性能。进一步地,母码的长度N的设计应满足以下条件:N/2-M≤P
t,且N-M≥P
t;其中,P
t为打孔数目阈值。在该实现方式中,设计母码长度时,使得待发送的比特中包含大于或等于阈值的比特可供选择,尤其是应用到重传的应用场景中,选择满足上述条件的母码长度N,使得可以产生更多(N-M)个比特供重传时使用,进而可以带来一定的编码增益,在译码时,可以通过额外的编码增益,降低译码的FER,提高译码的性能。
进一步地,打孔数目阈值P
t根据以下至少一个参数进行确定:码率R、码长M和速率匹配方式包括缩短或者打孔的方式。例如:P
t是根据公式P
t=m^ceil(log
mM)/K,来确定,K大于或者等于2的正整数。P
t也可以是接收端和发送端共同约定的固定的值,例如10、20等。
进一步地,所述装置为网络设备或终端设备。
根据本申请实施例提供的一种数据传输装置,这种数据传输的方案在译码时产生了额外的编码增益,降低了译码的FER,提高了译码的性能。
本申请实施例还提供了一种数据传输系统,所述数据传输系统包括:网络设备和终端设备,该网络设备/终端设备包括上述的数据传输装置。
基于图4所示的数据传输方法,如图7所示,本申请实施例中还提供一种编码装置7000,该编码装置7000用于执行图4所示的数据传输方法。该装置可以适用于图3所示的通信系统中。图4所示的数据传输方法中的部分或全部可以通过硬件来实现也可以通过软件来实现,当通过硬件实现时,编码装置包括:输入接口电路71,用于获取母码的长度为N的比特序列;逻辑电路72,用于生成待发送的比特序列;输出接口电路73,用于输出待发送的比特序列,其中,所述待发送的比特序列包括:长度为(N-M)的比特序列中的一个或者多个比特,其中,所述N为极性编码的母码的长度,M为对所述N个比特序列进行速率匹配之后的编码比特长度;N为m的整数次方,m为大于1的正整数,M为正整数,N<M。
进一步地,所述待发送的比特序列还包括:
长度为N的比特序列中的一个或者多个比特。
进一步地,当m^ceil(log
mM)-M<=Pt时,则所述待发送的比特序列的长度为min(m^(ceil(log
mM)+1),Nmax);
其中,P
t为打孔数目阈值,Nmax为母码的最大长度。
进一步地,N应满足以下条件:N/2-M≤P
t,且N-M≥P
t,则所述待发送的比特序列的长度为min(m^(ceil(log
mM)+1),Nmax);
其中,P
t为打孔数目阈值,Nmax为母码的最大长度。
进一步地,所述装置为网络设备或终端设备。
具体上述数据传输装置中逻辑电路执行的功能,请见前面方法实施例中的描述,此处不再赘述。
可选的,编码装置在具体实现时可以是芯片或者集成电路。
可选的,当上述实施例的编码方法中的部分或全部通过软件来实现时,如图8所示,编码装置8000包括:存储器81,用于存储程序;处理器82,用于执行存储器81存储的程序,当程序被执行时,使得编码装置获取母码的长度为N的比特序列;生成待发送的比特 序列;以及输出待发送的比特序列。该装置可以适用于图3所示的通信系统中。
可选的,上述存储器81可以是物理上独立的单元,也可以与处理器82集成在一起。
可选的,当上述图4实施例的数据传输方法中的部分或全部通过软件实现时,编码装置8000也可以只包括处理器82。用于存储程序的存储器81位于编码装置8000之外,处理器82通过电路/电线与存储器81连接,用于读取并执行存储器81中存储的程序。
处理器82可以是中央处理器(central processing unit,CPU),网络处理器(network processor,NP)或者CPU和NP的组合。
处理器82还可以进一步包括硬件芯片。上述硬件芯片可以是专用集成电路(application-specific integrated circuit,ASIC),可编程逻辑器件(programmable logic device,PLD)或其组合。上述PLD可以是复杂可编程逻辑器件(complex programmable logic device,CPLD),现场可编程逻辑门阵列(field-programmable gate array,FPGA),通用阵列逻辑(generic array logic,GAL)或其任意组合。
存储器81可以包括易失性存储器(volatile memory),例如随机存取存储器(random-access memory,RAM);存储器81也可以包括非易失性存储器(non-volatile memory),例如快闪存储器(flash memory),硬盘(hard disk drive,HDD)或固态硬盘(solid-state drive,SSD);存储器81还可以包括上述种类的存储器的组合。
图9为本申请实施例提供的一种译码方法的流程示意图,该方法可包括以下步骤:
S91、接收比特序列对应的软信息,所述软信息包括:长度为(N-M)的比特序列中的一个或者多个比特对应的软信息,其中,所述N为极性编码的母码的长度,M为对所述N个比特序列进行速率匹配之后的编码比特长度;N为m的整数次方,m为大于1的正整数,M为正整数,N<M;
S92、对所述软信息进行合并译码,获得译码后的比特。
进一步地,所述待发送的比特序列还包括:
长度为N的比特序列中的一个或者多个比特。
具体实现中,接收端在接收到初传序列和重传序列后,接收端的软信息合并只需要维护一个大小为N的一维矩阵
的初始值为0。接收端每次接收到的软信息按照每比特在母码中的位置与
中相应位置的软信息进行相加,即由于在传输比特时需进行速率匹配、交织和缓存等,每比特在母码中的位置与
中的位置未必是对齐的,因此,接收端在接收到初传或重传序列时,需要将其在母码中的位置与
中的位置对齐。具体地,假设从信道接收到的重传软信息为
则
中的软信息更新为y
i=y
i+s
j,f(i)=j,其中,j是比特在s中的位置,i是比特在y中的位置。因此,接收端只需预留Seq.2大小的缓存用于软信息合并。例如,如图10所示的接收端的软信息合并过程示意图,初传序列Seq.0的长度为16,并被打孔掉4个比特,则接收端需维护一个N=16的一维矩阵
且设置
的初始值为0。 当接收到初传序列时(即第一次传输,1
st received LLR),对齐Seq.0中的比特在
中的位置,将Seq.0合并到
当接收到第一次重传序列(2
nd received LLR)、第二次重传序列(3
rd received LLR)时,对齐每个重传序列的比特在
中的位置,将接收到的重传序列合并到
也可以是接收到初传序列和所有重传序列后,再统一合并到
根据本申请实施例提供的一种译码方法,在译码时产生了额外的编码增益,降低了译码的FER,提高了译码的性能。
基于与上述实施例提供的译码方法同一发明构思,如图11所示,本申请实施例还提供一种译码装置1100,译码装置1100可用于执行本申请实施例提供的译码方法。该装置可以适用于图3所示的通信系统中。该译码装置1100包括:
接收模块111,用于接收比特序列对应的软信息;
译码模块112,用于对所述软信息进行合并译码,获得译码后的比特。
基于上述实施例提供的译码方法的同一发明构思,如图12所示,本申请实施例中还提供一种译码装置1200,该译码装置1200用于执行上述译码方法。该装置可以适用于图3所示的通信系统中。上述译码方法中的部分或全部可以通过硬件来实现也可以通过软件来实现,当通过硬件实现时,译码装置1200包括:输入接口电路121,用于接收比特序列对应的软信息;逻辑电路1102,用于执行上述译码方法;输出接口电路1103,用于输出译码后的比特。
可选的,译码装置1200在具体实现时可以是芯片或者集成电路。
可选的,当上述实施例的译码方法中的部分或全部通过软件来实现时,如图13所示,译码装置1300包括:存储器131,用于存储程序;处理器132,用于执行存储器131存储的程序,当程序被执行时,使得译码装置1300可以实现上述实施例提供的译码方法。
可选的,上述存储器131可以是物理上独立的单元,也可以与处理器132集成在一起。
可选的,当上述实施例的译码方法中的部分或全部通过软件实现时,译码装置1300也可以只包括处理器132。该装置可以适用于图3所示的通信系统中。用于存储程序的存储器131位于译码装置1300之外,处理器132通过电路/电线与存储器131连接,用于读取并执行存储器131中存储的程序。
处理器132可以是中央处理器(central processing unit,CPU),网络处理器(network processor,NP)或者CPU和NP的组合。
处理器132还可以进一步包括硬件芯片。上述硬件芯片可以是专用集成电路(application-specific integrated circuit,ASIC),可编程逻辑器件(programmable logic device,PLD)或其组合。上述PLD可以是复杂可编程逻辑器件(complex programmable logic device,CPLD),现场可编程逻辑门阵列(field-programmable gate array,FPGA),通用阵列逻辑(generic array logic,GAL)或其任意组合。
存储器131可以包括易失性存储器(volatile memory),例如随机存取存储器(random-access memory,RAM);存储器131也可以包括非易失性存储器(non-volatile memory),例如快闪存储器(flash memory),硬盘(hard disk drive,HDD)或固态硬盘(solid-state drive,SSD);存储器131还可以包括上述种类的存储器的组合。
本申请实施例还提供了一种网络设备,参见图14所示,上述编码装置和/或译码装置可以被安装在网络设备1400中。该装置可以适用于图3所示的通信系统中。除了上述编码装置和译码装置外,网络设备1400还可以包括一个收发器142,编码装置编码后的比特序列经过后续的变化或处理后通过收发器142发送给终端设备,或者该收发器142还用于接收来自于终端设备的信息/数据,这些信息/数据经过一系列处理被转换成待译码的序列,经过译码装置的处理后得到译码后的序列。当网络设备1400还可以包括网络接口144,用于与其它的网络设备进行通信。
同理,上述编码装置和/或译码装置可以被安装在终端设备1500中,如图15所示。该装置可以适用于图3所示的通信系统中。除了上述编码装置和译码装置外,终端设备1500还可以包括一个收发器152,编码装置编码后的比特序列经过后续的变化或处理后通过收发器152发送给网络设备,或者该收发器152还用于接收来自于网络设备的信息/数据,这些信息/数据经过一系列处理被转换成待译码的序列,经过译码装置的处理后得到译码后的序列。终端1500还可以包括用于输入输出接口154,用于接收用户输入的信息,对于需要发送给网络设备的信息,则需要经过编码器的处理后再通过收发器152发送给网络设备。译码器译码后的数据经过后续处理后也可以通过输入输出接口154呈现给用户。
本申请实施例还提供了一种计算机存储介质,存储有计算机程序,该计算机程序包括用于执行图4所示的数据传输方法和上述实施例提供的译码方法。
本申请实施例还提供了一种Polar码编码装置,包括上述图7~图9任一种编码装置和图11~图13任一种译码装置。
本申请实施例还提供了一种包含指令的计算机程序产品,当其在计算机上运行时,使得计算机执行图4所示的数据传输方法以及上述实施例提供的译码方法。
本领域普通技术人员可以意识到,结合本文中所公开的实施例描述的各示例的单元及算法步骤,能够以电子硬件、或者计算机软件和电子硬件的结合来实现。这些功能究竟以硬件还是软件方式来执行,取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能,但是这种实现不应认为超出本申请的范围。
所属领域的技术人员可以清楚地了解到,为描述的方便和简洁,上述描述的系统、装置和单元的具体工作过程,可以参考前述方法实施例中的对应过程,在此不再赘述。
在本申请所提供的几个实施例中,应该理解到,所揭露的系统、装置和方法,可以通过其它的方式实现。例如,以上所描述的装置实施例仅仅是示意性的,例如,所述单元的划分,仅仅为一种逻辑功能划分,实际实现时可以有另外的划分方式,例如多个单元或组件可以结合或者可以集成到另一个系统,或一些特征可以忽略,或不执行。另一点,所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口,装置或单元的间接耦合或通信连接,可以是电性,机械或其它的形式。
所述作为分离部件说明的单元可以是或者也可以不是物理上分开的,作为单元显示的部件可以是或者也可以不是物理单元,即可以位于一个地方,或者也可以分布到多个网络 单元上。可以根据实际的需要选择其中的部分或者全部单元来实现本实施例方案的目的。另外,在本申请各个实施例中的各功能单元可以集成在一个处理单元中,也可以是各个单元单独物理存在,也可以两个或两个以上单元集成在一个单元中。
在上述实施例中,可以全部或部分地通过软件、硬件、固件或者其任意组合来实现。当使用软件实现时,可以全部或部分地以计算机程序产品的形式实现。所述计算机程序产品包括一个或多个计算机指令。在计算机上加载和执行所述计算机程序指令时,全部或部分地产生按照本申请实施例所述的流程或功能。所述计算机可以是通用计算机、专用计算机、计算机网络、或者其他可编程装置。所述计算机指令可以存储在计算机可读存储介质中,或者通过所述计算机可读存储介质进行传输。所述计算机指令可以从一个网站站点、计算机、服务器或数据中心通过有线(例如同轴电缆、光纤、数字用户线(digital subscriber line,DSL))或无线(例如红外、无线、微波等)方式向另一个网站站点、计算机、服务器或数据中心进行传输。所述计算机可读存储介质可以是计算机能够存取的任何可用介质或者是包含一个或多个可用介质集成的服务器、数据中心等数据存储设备。所述可用介质可以是磁性介质,(例如,软盘、硬盘、磁带)、光介质(例如,数字通用光盘(digital versatile disc,DVD))、或者半导体介质(例如固态硬盘(solid state disk,SSD))等。
本领域普通技术人员可以理解实现上述实施例方法中的全部或部分流程,该流程可以由计算机程序来指令相关的硬件完成,该程序可存储于计算机可读取存储介质中,该程序在执行时,可包括如上述各方法实施例的流程。而前述的存储介质包括:只读存储器(read-only memory,ROM)或随机存储存储器(random access memory,RAM)、磁碟或者光盘等各种可存储程序代码的介质。
Claims (21)
- 一种数据传输方法,其特征在于,包括:生成待发送的比特序列,所述待发送的比特序列包括:长度为(N-M)的比特序列中的一个或者多个比特,其中,所述N为极性编码的母码的长度,M为对所述N个比特序列进行速率匹配之后的编码比特长度;N为m的整数次方,m为大于1的正整数,M为正整数,N<M;发送所述生成的比特序列。
- 根据权利要求1所述的方法,其特征在于,所述待发送的比特序列还包括:长度为N的比特序列中的一个或者多个比特。
- 如权利要求1或者2所述的方法,其特征在于,当m^ceil(log mM)-M<=P t时,则所述待发送的比特序列的长度为min(m^(ceil(log mM)+1),Nmax);其中,P t为打孔数目阈值,Nmax为母码的最大长度。
- 如权利要求1或者2所述的方法,其特征在于,N应满足以下条件:N/2-M≤P t,且N-M≥P t,则所述待发送的比特序列的长度为min(m^(ceil(log mM)+1),Nmax);其中,P t为打孔数目阈值,Nmax为母码的最大长度。
- 一种数据传输装置,其特征在于,包括:处理模块,用于生成待发送的比特序列,所述待发送的比特序列包括:长度为(N-M)的比特序列中的一个或者多个比特,其中,所述N为极性编码的母码的长度,M为对所述N个比特序列进行速率匹配之后的编码比特长度;N为m的整数次方,m为大于1的正整数,M为正整数,N<M;发送模块,用于发送所述生成的比特序列。
- 根据权利要求5所述的装置,其特征在于,所述待发送的比特序列还包括:长度为N的比特序列中的一个或者多个比特。
- 如权利要求5或者6所述的装置,其特征在于,当m^ceil(log mM)-M<=P t时,则所述待发送的比特序列的长度为min(m^(ceil(log mM)+1),Nmax);其中,P t为打孔数目阈值,Nmax为母码的最大长度。
- 如权利要求5或者6所述的装置,其特征在于,N应满足以下条件:N/2-M≤P t,且N-M≥P t,则所述待发送的比特序列的长度为min(m^(ceil(log mM)+1),Nmax);其中,P t为打孔数目阈值,Nmax为母码的最大长度。
- 根据权利要求5~8任一项所述的装置,其特征在于,所述装置为网络设备或终端设备。
- 一种编码装置,其特征在于,包括处理器,所述处理器用于:生成待发送的比特序列,所述待发送的比特序列包括:长度为(N-M)的比特序列中的一个或者多个比特,其中,所述N为极性编码的母码的长度,M为对所述N个比特序列进行速率匹配之后的编码比特长度;N为m的整数次方,m为大于1的正整数,M为正整数,N<M。
- 根据权利要求10所述的装置,其特征在于,所述待发送的比特序列还包括:长度为N的比特序列中的一个或者多个比特。
- 如权利要求10或者11所述的装置,其特征在于,当m^ceil(log mM)-M<=P t时,则所述待发送的比特序列的长度为min(m^(ceil(log mM)+1),Nmax);其中,P t为打孔数目阈值,Nmax为母码的最大长度。
- 如权利要求10或者11所述的装置,其特征在于,N应满足以下条件:N/2-M≤P t,且N-M≥P t,则所述待发送的比特序列的长度为min(m^(ceil(log mM)+1),Nmax);其中,P t为打孔数目阈值,Nmax为母码的最大长度。
- 根据权利要求10~13任一项所述的装置,其特征在于,所述装置还包括存储器,所述存储器用于存储程序指令。
- 根据权利要求10~13任一项所述的装置,其特征在于,所述装置为网络设备或终端设备。
- 一种数据传输装置,其特征在于,包括:输入接口电路,用于获取母码的长度为N的比特序列;逻辑电路,用于生成待发送的比特序列,所述待发送的比特序列包括:长度为(N-M)的比特序列中的一个或者多个比特,其中,所述N为极性编码的母码的长度,M为对所述N个比特序列进行速率匹配之后的编码比特长度;N为m的整数次方,m为大于1的正整数,M为正整数,N<M;输出接口电路,用于输出待发送的比特序列。
- 根据权利要求16所述的装置,其特征在于,所述待发送的比特序列还包括:长度为N的比特序列中的一个或者多个比特。
- 如权利要求16或者17所述的装置,其特征在于,当m^ceil(log mM)-M<=P t时,则所述待发送的比特序列的长度为min(m^(ceil(log mM)+1),Nmax);其中,P t为打孔数目阈值,Nmax为母码的最大长度。
- 如权利要求16或者17所述的装置,其特征在于,N应满足以下条件:N/2-M≤P t,且N-M≥P t,则所述待发送的比特序列的长度为min(m^(ceil(log mM)+1),Nmax);其中,P t为打孔数目阈值,Nmax为母码的最大长度。
- 根据权利要求5~8任一项所述的装置,其特征在于,所述装置为网络设备或终端设备。
- 一种数据传输系统,所述数据传输系统包括:网络设备和终端设备,其特征在于,所述网络设备包括如权利要求5~9或16~20任一项所述的数据传输装置;和/或,所述终端设备包括如权利要求5~9或16~20任一项所述的数据传输装置。
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| EP19740706.7A EP3731443B1 (en) | 2018-01-16 | 2019-01-15 | Data transmission method, device and system for determining a mother code length of a polar code based on a puncturing threshold |
| US16/929,621 US11695435B2 (en) | 2018-01-16 | 2020-07-15 | Data transmission method, apparatus, and system |
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| CN115085862A (zh) * | 2021-03-16 | 2022-09-20 | 中兴通讯股份有限公司 | 数据传输方法、设备和存储介质 |
| CN116346277A (zh) * | 2021-12-13 | 2023-06-27 | 华为技术有限公司 | 一种速率匹配的方法及装置 |
| CN117200934A (zh) * | 2022-05-27 | 2023-12-08 | 华为技术有限公司 | 一种通信方法及装置 |
| CN115941774B (zh) * | 2022-12-29 | 2024-07-30 | 天翼云科技有限公司 | 服务节点选取方法、装置、电子装置和存储介质 |
| WO2024148606A1 (zh) * | 2023-01-13 | 2024-07-18 | 华为技术有限公司 | 一种编码方法、译码方法及通信装置 |
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| EP3731443A1 (en) | 2020-10-28 |
| US20200350932A1 (en) | 2020-11-05 |
| EP3731443A4 (en) | 2021-02-17 |
| EP3731443B1 (en) | 2022-09-21 |
| US11695435B2 (en) | 2023-07-04 |
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