WO2019200890A1 - 显示面板及其驱动方法、显示装置 - Google Patents

显示面板及其驱动方法、显示装置 Download PDF

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Publication number
WO2019200890A1
WO2019200890A1 PCT/CN2018/113467 CN2018113467W WO2019200890A1 WO 2019200890 A1 WO2019200890 A1 WO 2019200890A1 CN 2018113467 W CN2018113467 W CN 2018113467W WO 2019200890 A1 WO2019200890 A1 WO 2019200890A1
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Prior art keywords
compensation
light
sub
emitting
row
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Ceased
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PCT/CN2018/113467
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English (en)
French (fr)
Inventor
玄明花
王磊
肖丽
陈小川
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BOE Technology Group Co Ltd
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BOE Technology Group Co Ltd
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Priority to US16/345,854 priority Critical patent/US11475831B2/en
Priority to EP18869467.3A priority patent/EP3783592A4/en
Publication of WO2019200890A1 publication Critical patent/WO2019200890A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Definitions

  • Embodiments of the present disclosure relate to a display panel, a driving method thereof, and a display device.
  • Organic Light Emitting Diode (OLED) display devices are gradually gaining popularity due to their wide viewing angle, high contrast ratio, fast response speed, and higher brightness and lower driving voltage than inorganic light-emitting display devices. extensive attention. Due to the above characteristics, the organic light emitting diode (OLED) can be applied to a device having a display function such as a mobile phone, a display, a notebook computer, a digital camera, an instrument meter, and the like.
  • the pixel circuit in the OLED display device generally adopts a matrix driving method, and is divided into an active matrix (AM) driving and a passive matrix (PM) driving according to whether or not a switching component is introduced in each pixel unit.
  • AM active matrix
  • PM passive matrix
  • AMOLED integrates a set of thin film transistors and storage capacitors in the pixel circuit of each pixel. By controlling the driving of the thin film transistor and the storage capacitor, the current flowing through the OLED is controlled, so that the OLED is required according to the needs. Glowing.
  • AMOLED Compared with PMOLED, AMOLED requires less drive current, lower power consumption and longer life, which can meet the needs of large-size display with high resolution and multi-gradation. At the same time, AMOLED has obvious advantages in terms of viewing angle, color reduction, power consumption and response time, and is suitable for display devices with high information content and high resolution.
  • At least one embodiment of the present disclosure provides a display panel including a plurality of sub-pixel units arranged in an array, a plurality of compensation driving circuits, and a plurality of light emission control lines, each of the sub-pixel units including a light emitting circuit, the array including a plurality of rows and a plurality of columns; the sub-pixel unit in each row is divided into a plurality of compensation illumination groups, the plurality of compensation illumination groups comprising a plurality of first compensation illumination groups, each of the first compensation illumination groups comprising N adjacent Sub-pixel units, and the light-emitting circuits of the N adjacent sub-pixel units are connected to the same compensation driving circuit to be time-divisionally driven; N adjacent sub-pixel units of each of the first compensation lighting groups
  • the light emitting circuits are respectively connected to N different light emitting control lines; N is an integer greater than or equal to 2.
  • a display panel further includes a plurality of gate lines and a plurality of data lines, each row of sub-pixel units corresponding to N light-emitting control lines, and N of each of the first compensation light-emitting groups in the row
  • the control ends of the light emitting circuits of the pixel units are respectively connected to the corresponding N light emitting control lines; each of the compensation driving circuits is connected to one of the gate lines and one of the data lines.
  • each row of sub-pixel units corresponds to two of the light-emitting control lines, which are respectively a first light-emitting control line and a second light-emitting control line;
  • the control end of the light-emitting circuit located in the sub-pixel unit of the odd-numbered column is connected to the first light-emitting control line, and the control end of the light-emitting circuit located in the sub-pixel unit of the even-numbered column
  • the second illumination control line is connected.
  • the compensation light-emitting group further includes at least one second compensation light-emitting group for each of the sub-pixel units of the same row, and each of the second compensation light-emitting groups includes one The sub-pixel unit, the light-emitting circuit of the sub-pixel unit is connected to one of the compensation driving circuits; in the column direction, the compensation driving circuit corresponding to the first compensation light-emitting group located in different rows and the same data in the column direction a line connection; in the column direction, the compensation drive circuits corresponding to the second compensation illumination groups located in different rows corresponding to each other are connected to the same data line.
  • the second compensation light-emitting group in an odd-numbered sub-pixel unit, is located at a first end in a row direction, and in an even-numbered sub-pixel unit, the first The second compensation light-emitting group is located at the second end in the row direction, and the first end and the second end are opposite to each other.
  • each row of sub-pixel units corresponds to one of the gate lines, and a compensation driving circuit connected to the compensation light-emitting group of the sub-pixel unit of the same row and a gate corresponding to the row Wire connection.
  • the gate lines corresponding to the 2m-1st row and the 2mth row of sub-pixel cells are configured to receive the same gate scan signal, and m is an integer greater than or equal to 1.
  • each adjacent two rows of sub-pixel units correspond to the same gate line, and a compensation driving circuit connected to the compensation light-emitting group of the adjacent two rows of sub-pixel units The same strip line is connected.
  • the first compensation light-emitting groups located in different rows are aligned in the column direction.
  • each row of sub-pixel units corresponds to one of the gate lines, and a compensation driving circuit connected to the compensation light-emitting group of the sub-pixel unit of the same row and a gate corresponding to the row a line connection; in the column direction, the compensation drive circuit corresponding to the first compensation illumination group located in the odd row and the compensation drive circuit corresponding to the first compensation illumination group located in the even row are respectively connected to two different data lines .
  • each row of sub-pixel units corresponds to one of the gate lines, and a compensation driving circuit connected to the compensation light-emitting group of the sub-pixel unit of the same row and a gate corresponding to the row a line connection; in the column direction, the compensation driving circuit corresponding to the first compensation light-emitting group located in different rows is connected to the same data line.
  • each adjacent two rows of sub-pixel units correspond to the same gate line, and a compensation driving circuit connected to the compensation light-emitting group of the adjacent two rows of sub-pixel units
  • the same strip line is connected; in the column direction, the compensation driving circuit corresponding to the first compensation lighting group located in the odd row and the compensation driving circuit corresponding to the first compensation lighting group located in the even row are respectively connected To two different data lines.
  • the light emitting circuit includes a light emitting element and a switch circuit, and the light emitting element is connected to the compensation drive circuit through the switch circuit.
  • At least one embodiment of the present disclosure also provides a display device including a display panel as provided in any embodiment of the present disclosure.
  • a display device further includes a gate driving circuit configured to output a gate scan signal that causes the display panel to simultaneously turn on at least every two rows of sub-pixel units.
  • a display device further includes a gate driving circuit configured to output a gate scan signal that causes the display panel to turn on the sub-pixel unit row by row.
  • At least one embodiment of the present disclosure further provides a driving method of a display panel according to any embodiment of the present disclosure, including: dividing a frame display scan into N display time periods sequentially executed; and In the pixel unit, the light emission control signals are time-divisionally provided by the N light emission control lines such that the light emitting circuits connected to the N light emission control lines emit light in different display periods.
  • N 2
  • the light emitting circuit in the sub-pixel unit of the odd column and the light emitting circuit in the sub-pixel unit in the even column are respectively displayed in two different displays. Lights up during the time period.
  • the driving method provided by an embodiment of the present disclosure further includes: providing a gate scan signal for causing the display panel to turn on the sub-pixel unit row by row, so that the display panel emits light row by row.
  • the driving method provided by an embodiment of the present disclosure further includes: providing a gate scan signal for simultaneously turning on at least every two rows of sub-pixel units of the display panel, so that the display panel simultaneously emits light at least every two rows.
  • FIG. 1 is a schematic diagram showing an array of sub-pixel units in a display panel according to an embodiment of the present disclosure
  • FIG. 2 is a schematic diagram of a display panel according to an embodiment of the present disclosure
  • FIG. 3 is a schematic diagram of another display panel according to an embodiment of the present disclosure.
  • FIG. 4 is a schematic diagram of a first compensation illumination group in a display panel according to an embodiment of the present disclosure
  • FIG. 5 is a circuit diagram corresponding to an implementation example of the first compensation light-emitting group shown in FIG. 4;
  • 6A is a schematic view 1 showing a positional relationship between a first compensation light-emitting group and a second compensation light-emitting group;
  • 6B is a schematic diagram 2 showing the positional relationship between the first compensation illumination group and the second compensation illumination group;
  • 6C is a schematic diagram 3 showing the positional relationship between the first compensation illumination group and the second compensation illumination group;
  • 7A is a schematic diagram 1 showing time-division display of sub-pixel units of odd-numbered columns and even-numbered columns;
  • 7B is a schematic diagram 2 showing time-division display of sub-pixel units of odd-numbered columns and even-numbered columns;
  • 8A is a schematic diagram showing application of a data signal when a sub-pixel unit of an odd column is displayed
  • 8B is a schematic diagram of applying a data signal when a sub-pixel unit of an even column is displayed
  • FIG. 9 is a schematic diagram of still another display panel according to an embodiment of the present disclosure.
  • FIG. 10 is a schematic diagram of still another display panel according to an embodiment of the present disclosure.
  • FIG. 11 is a schematic diagram of still another display panel according to an embodiment of the present disclosure.
  • FIG. 12 is a schematic diagram of still another display panel according to an embodiment of the present disclosure.
  • FIG. 13 is a schematic diagram of a display device according to an embodiment of the present disclosure.
  • AMOLED uses Thin Film Transistor (TFT) to construct pixel circuits to provide corresponding currents for OLED devices, such as low temperature polysilicon thin film transistors (LTPS TFTs) or oxide thin film transistors (Oxide TFTs), and general amorphous silicon films.
  • LTPS TFTs low temperature polysilicon thin film transistors
  • Oxide TFTs oxide thin film transistors
  • LTPS TFTs and Oxide TFTs have higher mobility and more stable characteristics, and are more suitable for use in AMOLED displays.
  • the threshold voltage may drift, which may cause display defects. For example, a mura phenomenon (display uneven brightness) or an afterimage phenomenon occurs.
  • the highest resolution that can be achieved by the display panel using the LTPS TFT process is about 600 PPI (Pixels Per Inch, per The number of pixels in inches), for example further 577 PPI.
  • At least one embodiment of the present disclosure provides a display panel.
  • the display panel includes sub-pixel units arranged in an array, a plurality of compensation driving circuits, and a plurality of light emission control lines, each of the sub-pixel units including a light emitting circuit, the array including a plurality of rows and columns; the sub-rows in each row
  • the pixel unit is divided into a plurality of compensation light-emitting groups, the plurality of compensation light-emitting groups includes a plurality of first compensation light-emitting groups, each of the first compensation light-emitting groups includes N adjacent sub-pixel units, and the N
  • the light emitting circuits of the adjacent sub-pixel units are connected to the same compensation driving circuit to be time-divisionally driven; the light-emitting circuits of the N adjacent sub-pixel units of each of the first compensation light-emitting groups are respectively connected to N different ones.
  • Illumination control line; N is an integer greater than or equal to 2.
  • At least one embodiment of the present disclosure also
  • the display panel, the driving method thereof and the display device provided by at least one embodiment of the present disclosure can break through the limitation of the transistor fabrication process to obtain higher resolution.
  • At least one embodiment of the present disclosure provides a display panel 10, as shown in FIG. 1, the display panel 10 includes sub-pixel units 100 arranged in an array, the array including a plurality of rows and columns, for example, as shown in FIG. A plurality of regions arranged in an array are defined by the plurality of interleaved gate lines GL and the plurality of data lines DL, and the plurality of sub-pixel units 100 are disposed in the plurality of regions.
  • the display panel 10 further includes a plurality of compensation driving circuits 200 and a plurality of light emission control lines EL (for example, may include a plurality of first light emission control lines EL1 and a plurality of second light emission control lines EL2).
  • Each of the sub-pixel units 100 includes a light emitting circuit 110, and the sub-pixel unit 100 in each row is divided into a plurality of compensation lighting groups, and the plurality of compensation lighting groups includes a plurality of first compensation lighting groups, and each of the first compensation lighting groups includes N
  • the adjacent sub-pixel units 100, and the light-emitting circuits 110 of the N adjacent sub-pixel units 100 are connected to the same compensation driving circuit 200 to be time-divisionally driven.
  • the light-emitting circuits 110 of the N adjacent sub-pixel units 100 of each of the first compensation light-emitting groups are respectively connected to N different light-emitting control lines EL.
  • N is an integer greater than or equal to 2.
  • each first compensation illumination group includes two adjacent sub-pixel units 100 (shown as illumination circuit 110 in FIG. 2), and two adjacent sub- The light emitting circuit 110 of the pixel unit 100 is connected to the same compensation driving circuit 200 to be time-divisionally driven.
  • the light-emitting circuits 110 of two adjacent sub-pixel units 100 of each first compensation light-emitting group are respectively connected to two different light-emitting control lines EL, for example, respectively connected to the first light-emitting control line EL1 and the second light-emitting control line EL2 .
  • the first lighting control line EL1 and the second lighting control line EL2 are configured to provide the lighting control signals in a time division manner such that the two lighting circuits 110 in each of the first compensation lighting groups emit light in a time division manner.
  • each first compensation illumination group includes three adjacent sub-pixel units 100 (at The light-emitting circuit 110 is shown in FIG. 3, and the light-emitting circuits 110 of three adjacent sub-pixel units 100 are connected to the same compensation drive circuit 200 to be time-divisionally driven.
  • the light-emitting circuits 110 of three adjacent sub-pixel units 100 of each first compensation light-emitting group are respectively connected to three different light-emitting control lines EL, for example, respectively connected to the first light-emitting control line EL1, the second light-emitting control line EL2, and The third light emission control line EL3.
  • the light-emitting circuits of the N adjacent sub-pixel units in the first compensation light-emitting group can share the same compensation driving circuit to be time-divided. Driving, so that in the case where the number of compensation driving circuits set by the display panel is constant, more sub-pixel units can be provided corresponding to each of the compensation driving circuits, so that the resolution of the display panel can be improved.
  • a plurality of first compensation illumination groups are disposed in each row, and embodiments of the present disclosure include but are not limited thereto, for example, may also be displayed only
  • a partial region of the panel sets the first compensation illumination group as in the embodiment of the present disclosure, so that only the resolution of the partial region can be increased.
  • the display panel 10 provided by the embodiment of the present disclosure further includes a plurality of gate lines GL and a plurality of data lines DL.
  • Each row of sub-pixel units 100 corresponds to N light-emitting control lines EL, and the control ends of the light-emitting circuits 110 of the N sub-pixel units 100 in each of the first compensation light-emitting groups in the row are respectively connected to the corresponding N light-emitting control lines EL .
  • Each of the compensation driving circuits 200 is connected to one gate line GL and one data line DL.
  • the gate line GL provides a gate scanning signal for the compensation driving circuit 200
  • the data line DL provides a data signal for the compensation driving circuit 200, the data signal is used for
  • the control lighting circuit 110 performs a corresponding gray scale display.
  • the light emitting circuit 110 may include a light emitting element 101 and a switching circuit 102, and the light emitting element 101 is connected through the switching circuit 102 and the compensation driving circuit 200.
  • each of the first compensation light-emitting groups shown in FIG. 2 includes two light-emitting circuits 110, the control terminals of the two switch circuits 102 in the first compensation light-emitting group in FIG. 4 and the corresponding two light-emitting portions, respectively
  • the control lines EL1 and EL2 are connected, that is, the control terminal of the lighting circuit 110 can be implemented as the control terminal of the switching circuit 102.
  • the circuit structure shown in FIG. 5 can be realized.
  • the compensation driving circuit 200 can be implemented as a circuit structure of 5T1C (5 transistors and 1 storage capacitor), and the connection relationship is as shown in FIG. 5.
  • 5T1C 5 transistors and 1 storage capacitor
  • the display panel provided by the embodiment of the present disclosure may also adopt other forms of compensation driving circuits, for example, using different connection modes, different types of transistors, etc., as long as The function of compensating and driving the light-emitting circuit 110 can be implemented, and the embodiment of the present disclosure does not limit this.
  • the two switching circuits 102 in FIG. 4 can be implemented as transistors T6 and T7 in FIG. 5, respectively.
  • the compensation driving circuit 200 can perform time-division driving on the two light-emitting elements 101 electrically connected thereto. For example, in one display period, the transistor T6 is turned on to turn off the transistor T7, and the compensation driving circuit 200 can be paired with the transistor T6.
  • the connected light-emitting element 101 performs a compensation drive to cause the light-emitting element 101 to emit light; and, for example, in another display period, the transistor T7 is turned on to turn off the transistor T6, and the compensation drive circuit 200 can be connected to the transistor T7.
  • the light-emitting element 101 is compensated for driving, so that the light-emitting element 101 emits light.
  • control terminal of the switch circuit 102 on the left side in FIG. 5 (that is, the control terminal of the light-emitting circuit 110 on the left side) can be implemented as the gate of the transistor T6, and the gate of the transistor T6 and the first illumination control line EL1.
  • the connection is made such that the switch circuit 102 can be turned on or off under the control of the illumination control signal provided by the first illumination control line EL1.
  • control terminal of the switch circuit 102 on the right side in FIG. 5 (that is, the control terminal of the light-emitting circuit 110 on the right side) can be implemented as the gate of the transistor T7, the gate of the transistor T7 and the second illumination control line EL2.
  • the connection is made such that the switch circuit 102 can be turned on or off under the control of the illumination control signal provided by the second illumination control line EL2.
  • the light emitting element 101 may employ an OLED, and the OLED may be of various types (bottom emission, top emission, etc.), and may emit red light, green light, blue light, etc. as needed, and embodiments of the present disclosure Including but not limited to.
  • two light emission control lines EL which are a first light emission control line EL1 and a second light emission control line EL2 are respectively provided for each row of sub-pixel units 100.
  • the control end of the light-emitting circuit 110 located in the sub-pixel unit 100 of the odd-numbered column is connected to the first light-emission control line EL1, and is located in the sub-pixel unit 100 of the even-numbered column.
  • the control terminal of the light emitting circuit 110 is connected to the second light emission control line EL2.
  • the first light emission control line EL1 provides an effective light emission control signal for one display period, so that the light emitting circuit 110 located in the odd column sub-pixel unit 100 The illuminating is performed; in another display period, the second illuminating control line EL2 provides an effective illuminating control signal such that the illuminating circuit 110 in the sub-pixel unit 100 of the even-numbered column emits light, that is, sub-pixels of odd-numbered columns and even-numbered columns The unit 100 illuminates in time divisions over two display periods.
  • the compensation illumination group may further include at least one second compensation illumination group, and each of the second compensation illumination groups includes one sub-pixel unit 100.
  • the light emitting circuit 110 of the sub-pixel unit 100 is connected to a compensation driving circuit 200.
  • the compensation drive circuits 200 corresponding to the first compensation light-emitting groups located in different rows corresponding to each other are connected to the same data line DL.
  • the compensation driving circuit 200 corresponding to the second compensation light-emitting groups located in different rows corresponding to each other is connected to the same data line DL, and the data line DL is different from the above-mentioned compensation driving corresponding to the first compensation light-emitting group.
  • the data line DL to which the circuit 200 is connected is connected.
  • the compensation illumination group further includes a second compensation illumination group.
  • the compensation drive circuits 200 corresponding to the first compensation light-emitting groups located in different rows corresponding to each other are connected to the same data line DL.
  • the first compensation light-emitting groups located in the odd-numbered rows correspond to each other
  • the first compensation light-emitting groups located in the even-numbered rows correspond to each other.
  • the compensation driving circuit 200 corresponding to the second compensation light-emitting groups located in different rows corresponding to each other is connected to the same data line DL, and the data line DL is different from the above-mentioned corresponding to the first compensation light-emitting group.
  • the compensation drive circuit 200 is connected to the data line DL.
  • the second compensation light-emitting groups located in the odd-numbered rows correspond to each other
  • the second compensation light-emitting groups located in the even-numbered rows correspond to each other.
  • corresponding to each other in the column direction means that the first compensation light-emitting group or the second compensation light-emitting group is correspondingly arranged in the extending direction of the column direction, and may or may not be aligned with each other.
  • the embodiment is completely aligned, and the embodiment of the present disclosure does not limit this.
  • the sub-pixel units arranged in an array are aligned in the row direction or the column direction, and in the same row, the center of each sub-pixel unit On the same line, in the same column, the centers of the sub-pixel units are on the same straight line, thereby constituting a regular matrix.
  • Embodiments of the present disclosure include but are not limited thereto, for example, the sub-pixel unit is also in the row direction or the column direction. It may be incompletely aligned, for example, adjacent rows in the array are offset from each other by a portion of the sub-pixel unit width in the row direction, or adjacent columns are offset from each other by a portion of the sub-pixel unit height, such as a half sub-pixel unit width or height.
  • the row direction and the column direction are not limited to the direction shown in FIG. 2, and the row direction and the column direction may be interchanged, which may be determined according to actual needs.
  • FIG. 6A The positional relationship of the first compensation light-emitting group and the second compensation light-emitting group in the display panel 10 shown in FIG. 2 can be referred to FIG. 6A (only five columns of 2-row sub-pixel units 100 are schematically illustrated in the drawing. ).
  • the second compensation light-emitting group 32 is located at the first end in the row direction, and in the even-numbered sub-pixel unit 100, the second compensation light-emitting group 32 is located in the row direction.
  • the second end, the first end and the second end are opposite each other.
  • a plurality of first compensation light-emitting groups 31 are also included.
  • embodiments of the present disclosure include, but are not limited to, the example shown in FIG. 6A, for example, in the example shown in FIG. 6B, in odd-numbered rows In the sub-pixel unit 100, the second compensation light-emitting group 32 is located at the second end in the row direction, and in the even-numbered sub-pixel unit 100, the second compensation light-emitting group 32 is located at the first end in the row direction.
  • FIG. 6C when the number of columns of the sub-pixel unit 100 included in the display panel 10 is an even number (FIG.
  • each row of sub-pixel units 100 is correspondingly provided with a gate line GL, and the compensation driving circuit 200 connected to the compensation light-emitting group of the sub-pixel unit of the same row and corresponding to the row
  • the gate line GL is connected.
  • each row of sub-pixel units 100 is correspondingly provided with a gate line GL, so that the display panel 10 can realize both progressive scanning and simultaneous scanning of multiple lines, for example, Two lines are scanned simultaneously.
  • the gate lines GL corresponding to the 2m-1st row and the 2mth row subpixel unit 100 are configured to receive the same gate scan signal, and m is an integer greater than or equal to 1. .
  • the gate lines GL corresponding to the first row and the second row of sub-pixel units 100 are configured to receive the same gate scan signal, so that the first row and the second row of sub-pixel units 100 are simultaneously scanned.
  • the third row and the fourth row, the fifth row, the sixth row, and the like, that is, the gate line GL corresponding to every two rows of sub-pixel units 100 are configured to receive the same gate scan signal.
  • the display of the entire screen is completed within one frame display scan, and when the sub-pixel units of the odd-numbered column and the even-numbered column are driven to display by time division, the sub-sequence or even-numbered column is displayed.
  • the pixel units have a half frame time to compensate for the drive and display.
  • every two rows of sub-pixel units are set to be simultaneously scanned, and the sub-pixel unit of the odd-numbered column or the even-numbered column can be made to complete one frame in one frame time with respect to the case of progressive scanning.
  • Compensating for driving and display that is, sub-pixel units of odd-numbered columns or even-numbered columns have half-frame time for compensating for driving and display, since every two rows of sub-pixel units are set to be scanned at the same time, compared to usual
  • the display panel provided by the embodiment of the present disclosure completes one frame of display and scanning at the same time as the normal display panel, thereby improving the resolution of the display panel without losing the display effect.
  • FIGS. 7A, 7B, 8A, and 8B are described by taking four rows and five columns of sub-pixel units 100 as an example.
  • the picture of the number "0" shown in FIG. 7A can be superimposed by the two pictures in FIG. 7B.
  • the sub-pixel unit 100 does not emit light in black in FIG. 7B.
  • the display panel 10 displays the screen shown in FIG. 7A in one frame display scan, and may cause the odd-numbered column sub-pixel unit 100 to emit light in the first-half frame display scan, and the even-numbered column sub-pixel unit 100 to emit light in the second-half frame display scan. .
  • the embodiments of the present disclosure do not limit this.
  • the picture on the left side of FIG. 7B is displayed in the first half frame display scan, that is, the odd-numbered column sub-pixel unit 100 is caused to emit light.
  • the gate lines GL (refer to FIG. 2) corresponding to the first and second rows of sub-pixel units 100 receive the same gate scan signal, so that the first and second rows of sub-pixel units 100
  • the corresponding compensation driving circuit 200 is turned on; the first lighting control line EL1 (refer to FIG.
  • the first column, the third column, and the fifth column sub-pixel unit 100 receives the effective lighting control signal, so that the first column, the third column, and the fifth column sub-pixel unit 100
  • the light-emitting circuit 110 is turned on; at the same time, the data signals of the first column, the third column, and the fifth column sub-pixel unit 100 in the first row are supplied from the data lines DL2, DL4, and DL6 through the compensation driving circuit 200, respectively, and the second row
  • the data signals of the first, third, and fifth column sub-pixel units 100 in the middle are provided by the compensation driving circuit 200 by the data lines DL1, DL3, and DL5, respectively.
  • the odd-numbered column sub-pixel units 100 in the third row and the fourth row are displayed, and the working process is similar to the first row and the second row, and will not be described again. .
  • the picture on the right side in FIG. 7B is displayed in the latter half frame display scan, that is, the even-numbered column sub-pixel unit 100 is caused to emit light.
  • the gate lines GL (refer to FIG. 2) corresponding to the first and second rows of sub-pixel units 100 receive the same gate scan signal, so that the first and second rows of sub-pixel units 100
  • the corresponding compensation driving circuit 200 is turned on; the second light emission control line EL2 corresponding to the first row and the second row (refer to FIG.
  • each adjacent two rows of sub-pixel units 100 are correspondingly disposed with the same gate line GL such that the compensation light is emitted with the adjacent two rows of sub-pixel units 100 .
  • the group-connected compensation drive circuit 200 is connected to the same gate line GL.
  • the first set of compensation illuminations located in different rows are correspondingly arranged in the column direction (e.g., aligned settings).
  • two illumination control lines EL are respectively provided for each row of sub-pixel units 100, which are respectively the first The light emission control line EL1 and the second light emission control line EL2.
  • the control end of the light-emitting circuit 110 located in the sub-pixel unit 100 of the odd-numbered column is connected to the first light-emission control line EL1, and is located in the sub-pixel unit 100 of the even-numbered column.
  • the control terminal of the light emitting circuit 110 is connected to the second light emission control line EL2.
  • the display panel 10 may further include in each row of the sub-pixel units 100.
  • a second compensation illumination group for example, in each row, the second compensation illumination group is disposed at the same end in the row direction.
  • each row of sub-pixel units 100 is correspondingly provided with one gate line GL, and the compensation driving circuit 200 connected to the compensation light-emitting group of the sub-pixel unit 100 of the same row and corresponding to the row The gate line GL is connected.
  • the compensation driving circuit 200 corresponding to the first compensation light-emitting group located in the odd-numbered rows and the compensation driving circuit 200 corresponding to the first compensation light-emitting group located in the even-numbered rows are respectively connected to two different data lines DL.
  • the compensation drive circuit 200 corresponding to the first compensation illumination group located in the odd rows is connected to the data line DL1, and the compensation drive circuit 200 corresponding to the first compensation illumination group located in the even rows Connect to data line DL2.
  • the compensation driving circuit 200 corresponding to the first compensation light-emitting group located in the odd-numbered rows is connected to the data line DL3
  • the compensation driving circuit corresponding to the first compensation light-emitting group located in the even-numbered rows 200 is connected to the data line DL4.
  • each row of sub-pixel units 100 includes a second compensation illumination group.
  • the compensation drive circuit 200 corresponding to the second compensation illumination group in odd rows The compensation driving circuit 200 corresponding to the second compensation light-emitting group located in the even-numbered row is connected to the data line DL6.
  • the compensation driving circuit 200 corresponding to the first compensation light-emitting group located in the odd-numbered rows is located at an even number.
  • the compensation driving circuit 200 corresponding to the first compensation light-emitting group in the row is respectively connected to two different data lines, the compensation driving circuit 200 corresponding to the second compensation light-emitting group located in the odd-numbered rows, and the second compensation light-emitting light in the even-numbered rows
  • the group corresponding compensation driving circuit 200 is respectively connected to two different data lines, so the display panel 10 can realize simultaneous scanning of two adjacent lines or progressive scanning.
  • each row of sub-pixel units 100 is correspondingly provided with one gate line GL, and the compensation driving circuit 200 connected to the compensation light-emitting group of the sub-pixel unit 100 of the same row and corresponding to the row The gate line GL is connected.
  • the difference from the display panel 10 shown in FIG. 10 is that, in the column direction, the compensation driving circuit 200 corresponding to the first compensation light-emitting group located in different rows is connected to the same data line DL, and is located in the second of the different rows.
  • the compensation driving circuit 200 corresponding to the compensation lighting group is connected to the same data line DL.
  • the display panel 10 shown in FIG. 11 is reduced in relation to the data line DL that needs to be provided with respect to the display panel 10 shown in FIG. 10.
  • the display panel 10 shown in FIG. 11 can realize progressive scanning without enabling simultaneous scanning of two adjacent lines. .
  • each adjacent two rows of sub-pixel units 100 are correspondingly provided with the same gate line GL, so that the compensation driving circuit 200 connected to the compensation lighting group of the adjacent two rows of sub-pixel units 100 is connected. Connected to the same gate line GL.
  • the compensation driving circuit 200 corresponding to the first compensation light-emitting group located in the odd-numbered rows and the compensation driving circuit 200 corresponding to the first compensation light-emitting group located in the even-numbered rows are respectively connected to two different data lines.
  • the connection of the data lines in FIG. 12 is the same as that in FIG. 10, and details are not described herein again.
  • An embodiment of the present disclosure further provides a display device 1 including a display panel 10 provided by an embodiment of the present disclosure, as shown in FIG.
  • the display panel 10 includes sub-pixel units 100 arranged in an array.
  • the display device 1 further includes a gate driving circuit 20 electrically connected to the sub-pixel unit 100 through a gate line GL for providing a gate scan signal to the sub-pixel array.
  • the gate drive circuit 20 is configured to output a gate scan signal that causes the display panel 10 to be turned on at least every two lines simultaneously to cause the display panel 10 to achieve simultaneous scanning of at least two adjacent rows, for example Each adjacent two rows of the display panel 10 can be simultaneously scanned, and for example, each adjacent three rows of the display panel 10 can be simultaneously scanned.
  • the gate drive circuit 20 can also be configured to output a gate scan signal that causes the display panel 10 to turn on row by row to cause the display panel 10 to implement progressive scan.
  • the display device 1 may further include a data driving circuit 40 electrically connected to the sub-pixel unit 100 through the data line DL for providing a data signal to the sub-pixel array.
  • a data driving circuit 40 electrically connected to the sub-pixel unit 100 through the data line DL for providing a data signal to the sub-pixel array.
  • the display device 1 may be any product or component having a display function, such as a display, an OLED panel, an OLED TV, a mobile phone, a tablet computer, a notebook computer, a digital photo frame, a navigator, and the like.
  • the embodiment of the present disclosure also provides a driving method that can be used for the display panel 10 provided by the embodiment of the present disclosure and the display device 1 including the display panel 10.
  • the driving method includes the following operations.
  • Step S100 dividing a frame display scan into N display time periods sequentially executed
  • Step S200 In each row of sub-pixel units, the illumination control signals are time-divisionally provided through the N illumination control lines, so that the illumination circuits connected to the N illumination control lines emit light in different display periods.
  • step S200 the light emission control signals are time-divisionally provided through the two light emission control lines EL (for example, the first light emission control line EL1 and the second light emission control line EL2) such that the light emitting circuits 110 connected to the two light emission control lines EL are respectively The illumination is performed in two different display periods.
  • the lighting circuit 110 in the sub-pixel unit of the odd column and the lighting circuit 110 in the sub-pixel unit of the even column respectively emit light in two different display periods.
  • the working process of displaying the sub-pixel units of the odd-numbered columns and the even-numbered columns in a time-division manner may refer to the corresponding description in the foregoing embodiment of the display panel 10, and details are not described herein again.
  • the driving method may further include the following operations.
  • Step S300 providing a gate scan signal for causing the display panel to be turned on line by line, so that the display panel emits light row by row.
  • the gate driving circuit may be used to output a gate scan signal that causes the display panel to be turned on line by line, so that the display panel emits light line by line.
  • the driving method may further include the following operations.
  • Step S400 providing a gate scan signal that causes the display panel to be simultaneously turned on at least every two rows, so that the display panel simultaneously emits light at least every two rows.
  • the gate driving circuit can be used to output a gate scan signal that causes the display panel to be turned on at least every two lines at the same time, for example, every two lines are simultaneously turned on, and for example, every three lines are simultaneously turned on, which is not limited by the embodiment of the present disclosure.

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Abstract

一种显示面板及其驱动方法、显示装置。该显示面板(10)包括呈阵列排布的多个子像素单元(100)、多个补偿驱动电路(200)和多条发光控制线(EL)，每个子像素单元(100)包括发光电路(110)，该阵列包括多行和多列；每一行中的子像素单元(100)划分为多个补偿发光组，多个补偿发光组包括多个第一补偿发光组(31)，每个第一补偿发光组(31)包括N个相邻的子像素单元(100)且该N个相邻的子像素单元(100)的发光电路(110)连接到同一个补偿驱动电路(200)以被分时驱动；每个第一补偿发光组(31)的N个相邻的子像素单元(100)的发光电路(110)分别连接到N条不同的发光控制线(EL)；N为大于或等于2的整数。显示面板(10)可以提高显示的分辨率。

Description

显示面板及其驱动方法、显示装置
本申请要求于2018年4月19日递交的中国专利申请第201810355181.8号的优先权，该中国专利申请的全文以引入的方式并入以作为本申请的一部分。
技术领域
本公开实施例涉及一种显示面板及其驱动方法、显示装置。
背景技术
有机发光二极管(Organic Light Emitting Diode，OLED)显示装置由于具有视角宽、对比度高、响应速度快以及相比于无机发光显示器件更高的发光亮度、更低的驱动电压等优势而逐渐受到人们的广泛关注。由于上述特点，有机发光二极管(OLED)可以适用于手机、显示器、笔记本电脑、数码相机、仪器仪表等具有显示功能的装置。
OLED显示装置中的像素电路一般采用矩阵驱动方式，根据每个像素单元中是否引入开关元器件分为有源矩阵(Active Matrix，AM)驱动和无源矩阵(Passive Matrix，PM)驱动。PMOLED虽然工艺简单、成本较低，但因存在交叉串扰、高功耗、低寿命等缺点，不能满足高分辨率大尺寸显示的需求。相比之下，AMOLED在每一个像素的像素电路中都集成了一组薄膜晶体管和存储电容，通过对薄膜晶体管和存储电容的驱动控制，实现对流过OLED的电流的控制，从而使OLED根据需要发光。相比于PMOLED，AMOLED所需驱动电流小、功耗低、寿命更长，可以满足高分辨率多灰度的大尺寸显示需求。同时，AMOLED在可视角度、色彩的还原、功耗以及响应时间等方面具有明显的优势，适用于高信息含量、高分辨率的显示装置。
发明内容
本公开至少一实施例提供一种显示面板，包括呈阵列排布的多个子像素单元、多个补偿驱动电路和多条发光控制线，每个子像素单元包括发光电路， 所述阵列包括多行和多列；每一行中的所述子像素单元划分为多个补偿发光组，所述多个补偿发光组包括多个第一补偿发光组，每个所述第一补偿发光组包括N个相邻的子像素单元，且所述N个相邻的子像素单元的发光电路连接到同一个补偿驱动电路以被分时驱动；每个所述第一补偿发光组的N个相邻的子像素单元的发光电路分别连接到N条不同的发光控制线；N为大于或等于2的整数。
例如，本公开一实施例提供的显示面板还包括多条栅线和多条数据线，每一行子像素单元对应于N条发光控制线，且该行中每个第一补偿发光组中N个子像素单元的发光电路的控制端分别与相应的N条发光控制线连接；每个所述补偿驱动电路与一条所述栅线以及一条所述数据线连接。
例如，在本公开一实施例提供的显示面板中，N＝2，每一行子像素单元对应两条所述发光控制线，分别为第一发光控制线和第二发光控制线；在每一行子像素单元的第一补偿发光组中，位于奇数列的子像素单元中的发光电路的控制端与所述第一发光控制线连接，位于偶数列的子像素单元中的发光电路的控制端与所述第二发光控制线连接。
例如，在本公开一实施例提供的显示面板中，对于同一行的所述子像素单元，所述补偿发光组还包括至少一个第二补偿发光组，每个所述第二补偿发光组包括一个所述子像素单元，所述子像素单元的发光电路与一个所述补偿驱动电路连接；在列方向上，彼此对应的位于不同行中的第一补偿发光组对应的补偿驱动电路和同一条数据线连接；在所述列方向上，彼此对应的位于不同行中的第二补偿发光组对应的补偿驱动电路和同一条数据线连接。
例如，在本公开一实施例提供的显示面板中，在奇数行的子像素单元中，所述第二补偿发光组位于行方向的第一端，在偶数行的子像素单元中，所述第二补偿发光组位于所述行方向的第二端，所述第一端和所述第二端彼此相反。
例如，在本公开一实施例提供的显示面板中，每一行子像素单元对应一条所述栅线，且与同一行的子像素单元的补偿发光组连接的补偿驱动电路和对应于该行的栅线连接。
例如，在本公开一实施例提供的显示面板中，第2m-1行和第2m行子像素单元对应的栅线被配置为接收相同的栅极扫描信号，m为大于或等于1的 整数。
例如，在本公开一实施例提供的显示面板中，每相邻两行子像素单元对应同一条所述栅线，与所述相邻两行子像素单元的补偿发光组连接的补偿驱动电路和所述同一条所述栅线连接。
例如，在本公开一实施例提供的显示面板中，位于不同行中的第一补偿发光组在列方向上对齐设置。
例如，在本公开一实施例提供的显示面板中，每一行子像素单元对应一条所述栅线，且与同一行的子像素单元的补偿发光组连接的补偿驱动电路和对应于该行的栅线连接；在所述列方向上，位于奇数行中的第一补偿发光组对应的补偿驱动电路和位于偶数行中的第一补偿发光组对应的补偿驱动电路分别连接至两条不同的数据线。
例如，在本公开一实施例提供的显示面板中，每一行子像素单元对应一条所述栅线，且与同一行的子像素单元的补偿发光组连接的补偿驱动电路和对应于该行的栅线连接；在所述列方向上，位于不同行中的第一补偿发光组对应的补偿驱动电路和同一条数据线连接。
例如，在本公开一实施例提供的显示面板中，每相邻两行子像素单元对应同一条所述栅线，与所述相邻两行子像素单元的补偿发光组连接的补偿驱动电路和所述同一条所述栅线连接；在所述列方向上，位于奇数行中的第一补偿发光组对应的补偿驱动电路和位于偶数行中的第一补偿发光组对应的补偿驱动电路分别连接至两条不同的数据线。
例如，在本公开一实施例提供的显示面板中，所述发光电路包括发光元件和开关电路，所述发光元件通过所述开关电路与所述补偿驱动电路连接。
本公开至少一实施例还提供一种显示装置，包括如本公开任一实施例提供的显示面板。
例如，本公开一实施例提供的显示装置还包括栅极驱动电路，所述栅极驱动电路被配置为输出使所述显示面板至少每两行子像素单元同时开启的栅极扫描信号。
例如，本公开一实施例提供的显示装置还包括栅极驱动电路，所述栅极驱动电路被配置为输出使所述显示面板逐行开启所述子像素单元的栅极扫描信号。
本公开至少一实施例还提供一种如本公开任一实施例提供的显示面板的驱动方法，包括：将一帧显示扫描划分为N个依次执行的显示时间段；以及在每一行所述子像素单元中，通过所述N条发光控制线分时提供发光控制信号，以使得与所述N条发光控制线连接的发光电路在不同的所述显示时间段内进行发光。
例如，在本公开一实施例提供的驱动方法中，N＝2，位于奇数列的子像素单元中的发光电路和位于偶数列的子像素单元中的发光电路分别在两个不同的所述显示时间段内进行发光。
例如，本公开一实施例提供的驱动方法还包括：提供使所述显示面板逐行开启所述子像素单元的栅极扫描信号，使得所述显示面板逐行进行发光。
例如，本公开一实施例提供的驱动方法还包括：提供使所述显示面板至少每两行子像素单元同时开启的栅极扫描信号，使得所述显示面板至少每两行同时进行发光。
附图说明
为了更清楚地说明本公开实施例的技术方案，下面将对实施例的附图作简单地介绍，显而易见地，下面描述中的附图仅仅涉及本公开的一些实施例，而非对本公开的限制。
图1为本公开的实施例提供的显示面板中的子像素单元呈阵列排布的示意图；
图2为本公开的实施例提供的一种显示面板的示意图；
图3为本公开的实施例提供的另一种显示面板的示意图；
图4为本公开的实施例提供的一种显示面板中的第一补偿发光组的示意图；
图5为对应于图4所示的第一补偿发光组的一种实现示例的电路图；
图6A为第一补偿发光组与第二补偿发光组的位置关系的示意图1；
图6B为第一补偿发光组与第二补偿发光组的位置关系的示意图2；
图6C为第一补偿发光组与第二补偿发光组的位置关系的示意图3；
图7A为奇数列和偶数列的子像素单元分时显示的示意图1；
图7B为奇数列和偶数列的子像素单元分时显示的示意图2；
图8A为奇数列的子像素单元显示时施加数据信号的示意图；
图8B为偶数列的子像素单元显示时施加数据信号的示意图；
图9为本公开的实施例提供的再一种显示面板的示意图；
图10为本公开的实施例提供的再一种显示面板的示意图；
图11为本公开的实施例提供的再一种显示面板的示意图；
图12为本公开的实施例提供的又一种显示面板的示意图；以及
图13为本公开的实施例提供的一种显示装置的示意图。
具体实施方式
为使本公开实施例的目的、技术方案和优点更加清楚，下面将结合本公开实施例的附图，对本公开实施例的技术方案进行清楚、完整地描述。显然，所描述的实施例是本公开的一部分实施例，而不是全部的实施例。基于所描述的本公开的实施例，本领域普通技术人员在无需创造性劳动的前提下所获得的所有其他实施例，都属于本公开保护的范围。
除非另外定义，本公开使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。同样，“一个”、“一”或者“该”等类似词语也不表示数量限制，而是表示存在至少一个。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同，而不排除其他元件或者物件。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接，而是可以包括电性的连接，不管是直接的还是间接的。“上”、“下”、“左”、“右”等仅用于表示相对位置关系，当被描述对象的绝对位置改变后，则该相对位置关系也可能相应地改变。
AMOLED采用薄膜晶体管(Thin Film Transistor，TFT)构建像素电路为OLED器件提供相应的电流，例如多采用低温多晶硅薄膜晶体管(LTPS TFT)或氧化物薄膜晶体管(Oxide TFT)，与一般的非晶硅薄膜晶体管(Amorphous-Si TFT)相比，LTPS TFT和Oxide TFT具有更高的迁移率和更稳定的特性，更适合应用于AMOLED显示中。但是由于晶体管制作工艺 的局限性造成的例如阈值电压、迁移率等电学参数上的非均匀性，或者在长时间加压和高温下，阈值电压还可能会出现漂移，从而有可能造成显示不良，例如出现mura现象(显示亮度不均匀)或残影现象。针对上述问题，需要为每个子像素单元设置补偿驱动电路，以在一定程度上消除晶体管的非均匀性或者晶体管阈值电压的漂移。
随着用户对显示面板的分辨率要求越来越高，已经达到显示面板制作工艺的极限，例如，目前使用LTPS TFT工艺的显示面板可以达到的最高的分辨率大约为600PPI(Pixels Per Inch，每英寸的像素数目)，例如进一步为577PPI。
本公开至少一实施例提供一种显示面板。该显示面板包括呈阵列排布的子像素单元、多个补偿驱动电路和多条发光控制线，每个子像素单元包括发光电路，所述阵列包括多行和多列；每一行中的所述子像素单元划分为多个补偿发光组，所述多个补偿发光组包括多个第一补偿发光组，每个所述第一补偿发光组包括N个相邻的子像素单元，且所述N个相邻的子像素单元的发光电路连接到同一个补偿驱动电路以被分时驱动；每个所述第一补偿发光组的N个相邻的子像素单元的发光电路分别连接到N条不同的发光控制线；N为大于等于2的整数。本公开至少一实施例还提供对应于上述显示面板的显示装置以及驱动方法。
本公开至少一实施例提供的显示面板及其驱动方法、显示装置，可以突破晶体管制作工艺的限制，以获得更高的分辨率。
下面结合附图对本公开的实施例及其示例进行详细说明。
本公开的至少一个实施例提供一种显示面板10，如图1所示，该显示面板10包括呈阵列排布的子像素单元100，该阵列包括多行和多列，例如如图1所示，由交错的多条栅线GL和多条数据线DL限定出呈阵列排布的多个区域，多个子像素单元100设置在该多个区域中。
例如，显示面板10还包括多个补偿驱动电路200和多条发光控制线EL(例如可以包括多条第一发光控制线EL1和多条第二发光控制线EL2)。每个子像素单元100包括发光电路110，每一行中的子像素单元100划分为多个补偿发光组，多个补偿发光组包括多个第一补偿发光组，每个第一补偿发光组包括N个相邻的子像素单元100，且N个相邻的子像素单元100的发光 电路110连接到同一个补偿驱动电路200以被分时驱动。每个第一补偿发光组的N个相邻的子像素单元100的发光电路110分别连接到N条不同的发光控制线EL。N为大于等于2的整数。
例如，在一个实施例中，如图2所示，每个第一补偿发光组包括两个相邻的子像素单元100(在图2中表示为发光电路110)，且两个相邻的子像素单元100的发光电路110连接到同一个补偿驱动电路200以被分时驱动。每个第一补偿发光组的两个相邻的子像素单元100的发光电路110分别连接至两条不同的发光控制线EL，例如分别连接至第一发光控制线EL1和第二发光控制线EL2。例如，第一发光控制线EL1和第二发光控制线EL2被配置为分时提供发光控制信号，以使得每个第一补偿发光组中的两个发光电路110分时进行发光。
需要说明的是，在图2所示的显示面板中，仅示意性地示出了5列子像素单元100(发光电路110)，本公开的实施例对显示面板设置的子像素单元100的行数和列数不作限定。
例如，在另一个示例中，如图3所示(图中仅示意性地示出了两行子像素单元100)，每个第一补偿发光组包括三个相邻的子像素单元100(在图3中表示为发光电路110)，且三个相邻的子像素单元100的发光电路110连接到同一个补偿驱动电路200以被分时驱动。每个第一补偿发光组的三个相邻的子像素单元100的发光电路110分别连接至三条不同的发光控制线EL，例如分别连接至第一发光控制线EL1、第二发光控制线EL2以及第三发光控制线EL3。
需要说明的是，图2和图3仅示意性示出了N＝2和N＝3的示例，但本公开的实施例对N的数值不作限定，N只要为大于等于2的整数即可。
在本公开的实施例提供的显示面板中，通过设置第一补偿发光组，使得第一补偿发光组中的N个相邻的子像素单元的发光电路可以共用同一个补偿驱动电路以被分时驱动，从而在显示面板设置的补偿驱动电路的个数不变的情形下，对应于每一个补偿驱动电路，可以设置更多个子像素单元，从而可以提高显示面板的分辨率。
需要说明的是，在图2和图3所示的实施例中，在每一行中均设置了多个第一补偿发光组，本公开的实施例包括但不限于此，例如还可以只在显示 面板的部分区域如本公开的实施例那样设置第一补偿发光组，从而可以仅提高该部分区域的分辨率。
例如，本公开的实施例提供的显示面板10还包括多条栅线GL和多条数据线DL。每一行子像素单元100对应于N条发光控制线EL，且该行中每个第一补偿发光组中N个子像素单元100的发光电路110的控制端分别与相应的N条发光控制线EL连接。每个补偿驱动电路200与一条栅线GL以及一条数据线DL连接，例如栅线GL为补偿驱动电路200提供栅极扫描信号，数据线DL为补偿驱动电路200提供数据信号，该数据信号用于控制发光电路110进行相应的灰度显示。
在本公开的实施例中，如图4所示，发光电路110可以包括发光元件101和开关电路102，发光元件101通过开关电路102和补偿驱动电路200连接。对应于图2中所示的每个第一补偿发光组包括两个发光电路110的情形，图4中的第一补偿发光组中的两个开关电路102的控制端分别与相应的两条发光控制线EL1和EL2连接，即发光电路110的控制端可以实现为开关电路102的控制端。
对于图4所示的第一补偿发光组和与其连接的补偿驱动电路200，在一个示例中，可以实现为图5所示的电路结构。如图5所示，补偿驱动电路200可以实现为5T1C(5个晶体管和1个存储电容)的电路结构，连接关系如图5所示，详细说明可以参考常规设计，这里不再赘述。需要说明的是，除了图5中所示的补偿驱动电路200，本公开的实施例提供的显示面板还可以采用其它形式的补偿驱动电路，例如采用不同的连接方式、不同类型的晶体管等，只要可以实现对发光电路110进行补偿驱动的功能即可，本公开的实施例对此不作限定。
例如，图4中的两个开关电路102可以分别实现为图5中的晶体管T6和T7。补偿驱动电路200可以对和其电连接的两个发光元件101进行分时驱动，例如，在一个显示时间段中，使晶体管T6导通而使晶体管T7截止，补偿驱动电路200可以对与晶体管T6连接的发光元件101进行补偿驱动，从而使该发光元件101进行发光；又例如，在另一个显示时间段中，使晶体管T7导通而使晶体管T6截止，补偿驱动电路200可以对与晶体管T7连接的发光元件101进行补偿驱动，从而使该发光元件101进行发光。
例如，图5中左侧的开关电路102的控制端(也即，左侧的发光电路110的控制端)可以实现为晶体管T6的栅极，且晶体管T6的栅极与第一发光控制线EL1连接，从而使得该开关电路102可以在第一发光控制线EL1提供的发光控制信号的控制下导通或截止。同样地，图5中右侧的开关电路102的控制端(也即，右侧的发光电路110的控制端)可以实现为晶体管T7的栅极，晶体管T7的栅极与第二发光控制线EL2连接，从而使得该开关电路102可以在第二发光控制线EL2提供的发光控制信号的控制下导通或截止。
例如，如图5所示，发光元件101可以采用OLED，并且该OLED可以为各种类型(底发射、顶发射等)，可以根据需要发红光、绿光、蓝光等，本公开的实施例包括但不限于此。
例如，在图2所示的显示面板10中，为每一行子像素单元100对应设置两条发光控制线EL，分别为第一发光控制线EL1和第二发光控制线EL2。在每一行子像素单元100的第一补偿发光组中，位于奇数列的子像素单元100中的发光电路110的控制端与第一发光控制线EL1连接，位于偶数列的子像素单元100中的发光电路110的控制端与第二发光控制线EL2连接。
例如，图2所示的显示面板10被分时驱动时，在一个显示时间段内，第一发光控制线EL1提供有效的发光控制信号，使得位于奇数列的子像素单元100中的发光电路110进行发光；在另一个显示时间段内，第二发光控制线EL2提供有效的发光控制信号，使得位于偶数列的子像素单元100中的发光电路110进行发光，即奇数列和偶数列的子像素单元100分别在两个显示时间段内分时进行发光。
在本公开的实施例提供的显示面板10中，对于同一行的子像素单元100，补偿发光组还可以包括至少一个第二补偿发光组，每个第二补偿发光组包括一个子像素单元100，该子像素单元100的发光电路110与一个补偿驱动电路200连接。在列方向上，彼此对应的位于不同行中的第一补偿发光组对应的补偿驱动电路200和同一条数据线DL连接。在列方向上，彼此对应的位于不同行中的第二补偿发光组对应的补偿驱动电路200和同一条数据线DL连接，且该数据线DL不同于上述与第一补偿发光组对应的补偿驱动电路200连接的数据线DL。
例如，在图2所示的显示面板10中，对于同一行的子像素单元100，补 偿发光组还包括一个第二补偿发光组。在列方向上，彼此对应的位于不同行中的第一补偿发光组对应的补偿驱动电路200和同一条数据线DL连接。例如参考图2，在列方向上，位于奇数行的第一补偿发光组彼此对应，位于偶数行的第一补偿发光组彼此对应。相同地，在列方向上，彼此对应的位于不同行中的第二补偿发光组对应的补偿驱动电路200和同一条数据线DL连接，且该数据线DL不同于上述与第一补偿发光组对应的补偿驱动电路200连接的数据线DL。例如，在列方向上，位于奇数行的第二补偿发光组彼此对应，位于偶数行的第二补偿发光组彼此对应。
需要说明的是，在本公开的实施例中，在列方向上彼此对应指的是第一补偿发光组或第二补偿发光组在列方向的延伸方向上对应设置，可以彼此对齐，也可以不完全对齐，本公开的实施例对此不作限定。另外，需要说明的是，在本公开的实施例提供的显示面板中，呈阵列排布的子像素单元在行方向或列方向上均是对齐的，在同一行中，各子像素单元的中心在同一直线上，在同一列中，各子像素单元的中心在同一直线上，由此构成规则矩阵，本公开的实施例包括但不限于此，例如子像素单元在行方向或列方向上也可以是不完全对齐的，例如阵列中的相邻行在行方向彼此错开部分子像素单元宽度，或者相邻列在列方向彼此错开部分子像素单元高度，例如半个子像素单元宽度或高度。例如，行方向和列方向不限于图2所示的方向，行方向和列方向也可以互换，这可以根据实际需求而定。
关于图2中所示的显示面板10中的第一补偿发光组和第二补偿发光组的位置关系可以参考图6A所示(图中仅示意性的示出了5列2行子像素单元100)。如图6A所示，例如在奇数行的子像素单元100中，第二补偿发光组32位于行方向的第一端，在偶数行的子像素单元100中，第二补偿发光组32位于行方向的第二端，第一端和第二端彼此相反。在每一行子像素单元100中，还包括多个第一补偿发光组31。
关于第一补偿发光组31和第二补偿发光组32的位置关系，本公开的实施例包括但不限于图6A中所示的示例，例如，在图6B所示的示例中，在奇数行的子像素单元100中，第二补偿发光组32位于行方向的第二端，而在偶数行的子像素单元100中，第二补偿发光组32位于行方向的第一端。又例如，在图6C所示的示例中，当显示面板10中包括的子像素单元100的列数为偶 数时(图6C以4列为例进行说明)，在奇数行的子像素单元100中可以仅设置第一补偿发光组31而不设置第二补偿发光组32，而在偶数行的子像素单元100中，在行方向的第一端和第二端分别设置一个第二补偿发光组32。
例如，在如图2所示的显示面板10中，每一行子像素单元100对应设置一条栅线GL，且与同一行的子像素单元的补偿发光组连接的补偿驱动电路200和对应于该行的栅线GL连接。
在本公开的实施例提供的显示面板10中，每一行子像素单元100均对应设置一条栅线GL，可以使得该显示面板10既可以实现逐行扫描，也可以实现多行同时扫描，例如每两行同时扫描。
例如，在如图2所示的显示面板10中，第2m-1行和第2m行子像素单元100对应的栅线GL被配置为接收相同的栅极扫描信号，m为大于等于1的整数。例如，第1行和第2行子像素单元100对应的栅线GL被配置为接收相同的栅极扫描信号，从而使得第1行和第2行子像素单元100同时被扫描。相同地，第3行和第4行、第5行和第6行等，即每两行子像素单元100对应的栅线GL被配置为接收相同的栅极扫描信号。
在本公开的实施例提供的显示面板中，例如在一帧显示扫描内完成整幅画面的显示，当奇数列和偶数列的子像素单元被分时驱动显示时，奇数列或偶数列的子像素单元均有半帧的时间用于补偿驱动以及显示。在前述情形的基础上，每两行子像素单元被设置为同时被扫描，相对于逐行扫描的情形，可以使得奇数列或偶数列的子像素单元在一帧的时间内完成一帧画面的补偿驱动以及显示(也即是，奇数列或偶数列的子像素单元均有半帧的时间用于补偿驱动以及显示，由于每两行子像素单元被设置为同时被扫描，因此相比于通常的显示面板中逐行扫描的情形，本公开实施例提供的显示面板完成一帧显示和扫描的时间与通常的显示面板相同)，从而在提高该显示面板的分辨率的同时而不损失显示效果。
下面结合图7A、图7B、图8A和图8B对图2中所示的显示面板10的工作过程进行描述。需要说明的是，为了便于描述，在图7A、图7B、图8A和图8B中均是以4行5列子像素单元100为例进行说明的。
例如，对于图7A所示的数字“0”的画面，可以由图7B中的两个画面叠加而成。需要说明的是，图7B中用黑色表示该子像素单元100不发光。 例如，显示面板10在一帧显示扫描中要显示图7A中所示的画面，可以在前半帧显示扫描中使奇数列子像素单元100发光，在后半帧显示扫描中使偶数列子像素单元100发光。当然，也可以在前半帧显示扫描中使偶数列子像素单元100发光，在后半帧显示扫描中使奇数列子像素单元100发光。本公开的实施例对此不作限定。
例如，在一个示例中，在前半帧显示扫描中显示图7B中左侧的画面，即使得奇数列子像素单元100发光。例如，如图8A所示，首先第1行和第2行子像素单元100对应的栅线GL(参考图2)接收相同的栅极扫描信号，使得第1行和第2行子像素单元100对应的补偿驱动电路200开启；第1行和第2行对应的第一发光控制线EL1(参考图2)接收有效的发光控制信号，使得第1列、第3列和第5列子像素单元100中的发光电路110开启；同时，第1行中的第1列、第3列和第5列子像素单元100的数据信号分别由数据线DL2、DL4和DL6通过补偿驱动电路200提供，第2行中的第1列、第3列和第5列子像素单元100的数据信号分别由数据线DL1、DL3和DL5通过补偿驱动电路200提供。第1行和第2行中的奇数列子像素单元100完成显示后，第3行和第4行中的奇数列子像素单元100进行显示，工作过程与第1行、第2行类似，不再赘述。
在后半帧显示扫描中显示图7B中右侧的画面，即使得偶数列子像素单元100发光。例如，如图8B所示，首先第1行和第2行子像素单元100对应的栅线GL(参考图2)接收相同的栅极扫描信号，使得第1行和第2行子像素单元100对应的补偿驱动电路200开启；第1行和第2行对应的第二发光控制线EL2(参考图2)接收有效的发光控制信号，使得第2列和第4列子像素单元100中的发光电路110开启；同时，第1行中的第2列和第4列子像素单元100的数据信号分别由数据线DL2和DL4通过补偿驱动电路200提供，第2行中的第2列和第4列子像素单元100的数据信号分别由数据线DL3和DL5通过补偿驱动电路200提供。第1行和第2行中的偶数列子像素单元100完成显示后，第3行和第4行中的偶数列子像素单元100进行显示，工作过程与第1行、第2行类似，不再赘述。
在本公开的一个实施例提供的显示面板10中，如图9所示，每相邻两行子像素单元100对应设置同一条栅线GL，使得与相邻两行子像素单元100 的补偿发光组连接的补偿驱动电路200和同一条栅线GL连接。
在图9所示的实施例中，由于每相邻两行子像素单元100对应设置同一条栅线GL，所以相对于图2所示的实施例，每两行子像素单元100可以少设置一条栅线GL。在图9所示的情形下，只能实现每相邻的两行同时扫描而不能实现逐行扫描。
例如，在一些实施例中，如图10、图11和图12所示，位于不同行中的第一补偿发光组在列方向上对应设置(例如对齐设置)。
例如，与图2中所示的实施例相同地，在图10、图11和图12所示的实施例中，为每一行子像素单元100对应设置两条发光控制线EL，分别为第一发光控制线EL1和第二发光控制线EL2。在每一行子像素单元100的第一补偿发光组中，位于奇数列的子像素单元100中的发光电路110的控制端与第一发光控制线EL1连接，位于偶数列的子像素单元100中的发光电路110的控制端与第二发光控制线EL2连接。
例如，在图10、图11和图12所示的实施例中，在显示面板10中的子像素单元100的列数为奇数时，该显示面板10在每一行子像素单元100中还可以包括一个第二补偿发光组，例如在每一行中该第二补偿发光组均设置在行方向的同一端。
例如，在图10所示的显示面板10中，每一行子像素单元100对应设置一条栅线GL，且与同一行的子像素单元100的补偿发光组连接的补偿驱动电路200和对应于该行的栅线GL连接。在列方向上，位于奇数行中的第一补偿发光组对应的补偿驱动电路200和位于偶数行中的第一补偿发光组对应的补偿驱动电路200分别连接至两条不同的数据线DL。例如，对于第1列的第一补偿发光组，位于奇数行的第一补偿发光组对应的补偿驱动电路200连接至数据线DL1，而位于偶数行的第一补偿发光组对应的补偿驱动电路200连接至数据线DL2。同样地，对于第2列的第一补偿发光组，位于奇数行的第一补偿发光组对应的补偿驱动电路200连接至数据线DL3，而位于偶数行的第一补偿发光组对应的补偿驱动电路200连接至数据线DL4。
在图10所示的显示面板10中，每一行子像素单元100均包括一个第二补偿发光组，对于这一列第二补偿发光组，位于奇数行的第二补偿发光组对应的补偿驱动电路200连接至数据线DL5，而位于偶数行的第二补偿发光组 对应的补偿驱动电路200连接至数据线DL6。
在图10所示的显示面板10中，由于每一行子像素单元100对应设置一条栅线GL，且在列方向上，位于奇数行中的第一补偿发光组对应的补偿驱动电路200和位于偶数行中的第一补偿发光组对应的补偿驱动电路200分别连接至两条不同的数据线，位于奇数行中的第二补偿发光组对应的补偿驱动电路200和位于偶数行中的第二补偿发光组对应的补偿驱动电路200分别连接至两条不同的数据线，所以该显示面板10既可以实现每相邻的两行同时扫描，也可以实现逐行扫描。
例如，在图11所示的显示面板10中，每一行子像素单元100对应设置一条栅线GL，且与同一行的子像素单元100的补偿发光组连接的补偿驱动电路200和对应于该行的栅线GL连接。与图10所示的显示面板10不同的地方为：在列方向上，位于不同行中的第一补偿发光组对应的补偿驱动电路200和同一条数据线DL连接，位于不同行中的第二补偿发光组对应的补偿驱动电路200和同一条数据线DL连接。
图11所示的显示面板10相对于图10所示的显示面板10需要设置的数据线DL减少，图11所示的显示面板10可以实现逐行扫描而不能实现每相邻的两行同时扫描。
例如，在图12所示的显示面板10中，每相邻两行子像素单元100对应设置同一条栅线GL，使得与相邻两行子像素单元100的补偿发光组连接的补偿驱动电路200和同一条栅线GL连接。在列方向上，位于奇数行中的第一补偿发光组对应的补偿驱动电路200和位于偶数行中的第一补偿发光组对应的补偿驱动电路200分别连接至两条不同的数据线。图12中的数据线的连接方式和图10中的相同，这里不再赘述。
在图12所示的显示面板10中，由于每相邻两行子像素单元100对应设置同一条栅线GL，所以相对于图10所示的显示面板10，每两行子像素单元100可以少设置一条栅线GL。在图12所示的情形下，只能实现每相邻的两行同时扫描而不能实现逐行扫描。
本公开的实施例还提供一种显示装置1，如图13所示，该显示装置1包括本公开的实施例提供的显示面板10。显示面板10包括呈阵列排布的子像素单元100。
例如，如图13所示，该显示装置1还包括栅极驱动电路20，栅极驱动电路20通过栅线GL与子像素单元100电连接，用于提供栅极扫描信号给子像素阵列。例如，在一个实施例中，栅极驱动电路20被配置为输出使显示面板10至少每两行同时开启的栅极扫描信号，以使得显示面板10实现每相邻的至少两行同时扫描，例如可以使显示面板10的每相邻的两行同时扫描，又例如可以使显示面板10的每相邻的三行同时扫描。例如，在另一个实施例中，栅极驱动电路20还可以被配置为输出使显示面板10逐行开启的栅极扫描信号，以使得显示面板10实现逐行扫描。
例如，如图13所示，该显示装置1还可以包括数据驱动电路40，数据驱动电路40通过数据线DL与子像素单元100电连接，用于提供数据信号给子像素阵列。
需要说明的是，本公开的实施例提供的显示装置1可以为显示器、OLED面板、OLED电视、手机、平板电脑、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
本公开的实施例提供的显示装置1的技术效果可以参考上述实施例中关于显示面板10的相应描述，这里不再赘述。
本公开的实施例还提供一种驱动方法，该驱动方法可以用于本公开的实施例提供的显示面板10以及包括显示面板10的显示装置1。例如，在一个示例中，该驱动方法包括如下操作。
步骤S100：将一帧显示扫描划分为N个依次执行的显示时间段；以及
步骤S200：在每一行子像素单元中，通过N条发光控制线分时提供发光控制信号，以使得与N条发光控制线连接的发光电路在不同的显示时间段内进行发光。
例如，对于图2所示的显示面板10，在步骤S100中，可以将一帧显示扫描划分为两个依次执行的显示时间段，即N＝2。在步骤S200中，通过两条发光控制线EL(例如第一发光控制线EL1和第二发光控制线EL2)分时提供发光控制信号，以使得与两条发光控制线EL连接的发光电路110分别在两个不同的显示时间段内进行发光。
例如，在一个示例中，位于奇数列的子像素单元中的发光电路110和位于偶数列的子像素单元中的发光电路110分别在两个不同的显示时间段内进 行发光。需要说明的是，关于奇数列和偶数列的子像素单元分时进行显示的工作过程可以参考上述关于显示面板10的实施例中的相应描述，这里不再赘述。
例如，在一个实施例中，该驱动方法还可以包括如下操作。
步骤S300：提供使显示面板逐行开启的栅极扫描信号，使得显示面板逐行进行发光。
例如，可以采用栅极驱动电路输出使显示面板逐行开启的栅极扫描信号，以使得显示面板逐行进行发光。
例如，在另一个实施例中，该驱动方法还可以包括如下操作。
步骤S400：提供使显示面板至少每两行同时开启的栅极扫描信号，使得显示面板至少每两行同时进行发光。
例如，可以采用栅极驱动电路输出使显示面板至少每两行同时开启的栅极扫描信号，例如每两行同时开启，又例如每三行同时开启，本公开的实施例对此不作限定。
本公开的实施例提供的驱动方法的技术效果可以参考上述实施例中关于显示面板10的相应描述，这里不再赘述。
以上所述，仅为本公开的具体实施方式，但本公开的保护范围并不局限于此，本公开的保护范围应以所述权利要求的保护范围为准。

Claims (20)

  1. 一种显示面板，包括呈阵列排布的多个子像素单元、多个补偿驱动电路和多条发光控制线，
    其中，每个子像素单元包括发光电路，所述阵列包括多行和多列；
    每一行中的所述子像素单元划分为多个补偿发光组，所述多个补偿发光组包括多个第一补偿发光组，每个所述第一补偿发光组包括N个相邻的子像素单元，且所述N个相邻的子像素单元的发光电路连接到同一个补偿驱动电路以被分时驱动；
    每个所述第一补偿发光组的N个相邻的子像素单元的发光电路分别连接到N条不同的发光控制线；
    N为大于或等于2的整数。
  2. 根据权利要求1所述的显示面板，还包括多条栅线和多条数据线，其中，
    每一行子像素单元对应于N条发光控制线，且该行中每个第一补偿发光组中N个子像素单元的发光电路的控制端分别与相应的N条发光控制线连接；
    每个所述补偿驱动电路与一条所述栅线以及一条所述数据线连接。
  3. 根据权利要求2所述的显示面板，其中，N＝2，
    每一行子像素单元对应两条所述发光控制线，分别为第一发光控制线和第二发光控制线；
    在每一行子像素单元的第一补偿发光组中，位于奇数列的子像素单元中的发光电路的控制端与所述第一发光控制线连接，位于偶数列的子像素单元中的发光电路的控制端与所述第二发光控制线连接。
  4. 根据权利要求3所述的显示面板，其中，对于同一行的所述子像素单元，所述补偿发光组还包括至少一个第二补偿发光组，
    每个所述第二补偿发光组包括一个所述子像素单元，所述子像素单元的发光电路与一个所述补偿驱动电路连接；
    在列方向上，彼此对应的位于不同行中的第一补偿发光组对应的补偿驱动电路和同一条数据线连接；
    在所述列方向上，彼此对应的位于不同行中的第二补偿发光组对应的补偿驱动电路和同一条数据线连接。
  5. 根据权利要求4所述的显示面板，其中，
    在奇数行的子像素单元中，所述第二补偿发光组位于行方向的第一端，在偶数行的子像素单元中，所述第二补偿发光组位于所述行方向的第二端，所述第一端和所述第二端彼此相反。
  6. 根据权利要求4或5所述的显示面板，其中，
    每一行子像素单元对应一条所述栅线，且与同一行的子像素单元的补偿发光组连接的补偿驱动电路和对应于该行的栅线连接。
  7. 根据权利要求6所述的显示面板，其中，
    第2m-1行和第2m行子像素单元对应的栅线被配置为接收相同的栅极扫描信号，
    m为大于或等于1的整数。
  8. 根据权利要求4或5所述的显示面板，其中，
    每相邻两行子像素单元对应同一条所述栅线，与所述相邻两行子像素单元的补偿发光组连接的补偿驱动电路和所述同一条所述栅线连接。
  9. 根据权利要求3-5任一所述的显示面板，其中，位于不同行中的第一补偿发光组在列方向上对齐设置。
  10. 根据权利要求9所述的显示面板，其中，
    每一行子像素单元对应一条所述栅线，且与同一行的子像素单元的补偿发光组连接的补偿驱动电路和对应于该行的栅线连接；
    在所述列方向上，位于奇数行中的第一补偿发光组对应的补偿驱动电路和位于偶数行中的第一补偿发光组对应的补偿驱动电路分别连接至两条不同的数据线。
  11. 根据权利要求9所述的显示面板，其中，
    每一行子像素单元对应一条所述栅线，且与同一行的子像素单元的补偿发光组连接的补偿驱动电路和对应于该行的栅线连接；
    在所述列方向上，位于不同行中的第一补偿发光组对应的补偿驱动电路和同一条数据线连接。
  12. 根据权利要求9所述的显示面板，其中，
    每相邻两行子像素单元对应同一条所述栅线，与所述相邻两行子像素单元的补偿发光组连接的补偿驱动电路和所述同一条所述栅线连接；
    在所述列方向上，位于奇数行中的第一补偿发光组对应的补偿驱动电路和位于偶数行中的第一补偿发光组对应的补偿驱动电路分别连接至两条不同的数据线。
  13. 根据权利要求1-12任一所述的显示面板，其中，所述发光电路包括发光元件和开关电路，所述发光元件通过所述开关电路与所述补偿驱动电路连接。
  14. 一种显示装置，包括如权利要求1-13任一所述的显示面板。
  15. 根据权利要求14所述的显示装置，还包括栅极驱动电路，其中，
    所述栅极驱动电路被配置为输出使所述显示面板至少每两行子像素单元同时开启的栅极扫描信号。
  16. 根据权利要求14所述的显示装置，还包括栅极驱动电路，其中，
    所述栅极驱动电路被配置为输出使所述显示面板逐行开启所述子像素单元的栅极扫描信号。
  17. 一种如权利要求1-3任一所述的显示面板的驱动方法，包括：
    将一帧显示扫描划分为N个依次执行的显示时间段；以及
    在每一行所述子像素单元中，通过所述N条发光控制线分时提供发光控制信号，以使得与所述N条发光控制线连接的发光电路在不同的所述显示时间段内进行发光。
  18. 根据权利要求17所述的驱动方法，其中，N＝2，
    位于奇数列的子像素单元中的发光电路和位于偶数列的子像素单元中的发光电路分别在两个不同的所述显示时间段内进行发光。
  19. 根据权利要求17或18所述的驱动方法，还包括：
    提供使所述显示面板逐行开启所述子像素单元的栅极扫描信号，使得所述显示面板逐行进行发光。
  20. 根据权利要求17或18所述的驱动方法，还包括：
    提供使所述显示面板至少每两行子像素单元同时开启的栅极扫描信号，使得所述显示面板至少每两行同时进行发光。
PCT/CN2018/113467 2018-04-19 2018-11-01 显示面板及其驱动方法、显示装置 Ceased WO2019200890A1 (zh)

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