WO2020001032A1 - 包括像素岛的装置及其制备方法以及显示装置 - Google Patents

包括像素岛的装置及其制备方法以及显示装置 Download PDF

Info

Publication number
WO2020001032A1
WO2020001032A1 PCT/CN2019/074412 CN2019074412W WO2020001032A1 WO 2020001032 A1 WO2020001032 A1 WO 2020001032A1 CN 2019074412 W CN2019074412 W CN 2019074412W WO 2020001032 A1 WO2020001032 A1 WO 2020001032A1
Authority
WO
WIPO (PCT)
Prior art keywords
island
inter
connection line
islands
pixel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2019/074412
Other languages
English (en)
French (fr)
Inventor
赵梦
马伟欣
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BOE Technology Group Co Ltd
Original Assignee
BOE Technology Group Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by BOE Technology Group Co Ltd filed Critical BOE Technology Group Co Ltd
Priority to US16/491,841 priority Critical patent/US11101296B2/en
Priority to EP19783406.2A priority patent/EP3817057A4/en
Priority to JP2019544688A priority patent/JP7415245B2/ja
Publication of WO2020001032A1 publication Critical patent/WO2020001032A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H10D86/021—Manufacture or treatment of multiple TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/411—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs characterised by materials, geometry or structure of the substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/441—Interconnections, e.g. scanning lines
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/80—Constructional details of image sensors
    • H10F39/802—Geometry or disposition of elements in pixels, e.g. address-lines or gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/80—Constructional details of image sensors
    • H10F39/803—Pixels having integrated switching, control, storage or amplification elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K2102/00—Constructional details relating to the organic devices covered by this subclass
    • H10K2102/301—Details of OLEDs
    • H10K2102/311—Flexible OLED

Definitions

  • the present disclosure relates to the field of display technology, and in particular, to a device including a pixel island, a manufacturing method thereof, and a display device.
  • OLED Organic Light Emitting Diode
  • OLED display substrates can be flexible. By making OLED devices on flexible substrates, flexible display devices can be realized. However, with the increasing popularity of wearable devices, higher requirements have been placed on the tensile properties of OLED flexible panels. Because each pixel of the OLED display substrate is equipped with a separate driving circuit, this results in not only higher pixel density but also denser wiring. Therefore, it is relatively difficult to implement a stretchable OLED display substrate. In addition, the bending performance of the OLED display substrate is also affected by it.
  • One of the objectives of some embodiments of the present disclosure is to provide a device, a method of manufacturing the same, and a display device.
  • a device including: a flexible substrate; at least two islands on the flexible substrate, each of the islands including a semiconductor layer, and adjacent islands separated by a trench And at least one inter-island connection line, and each inter-island connection line is used to electrically connect a corresponding island.
  • the device further includes: an organic insulating material filled in the groove.
  • the at least one inter-island connection line is configured to bridge over the corresponding slot, or be at least partially received in the corresponding slot.
  • the inter-island connection line is made of a flexible material or has a shape suitable for stretching.
  • the shape of the island includes a circle or a polygon
  • the polygon includes any one of a triangle, a diamond, and a rectangle.
  • the island is adapted to form a pixel therein, the pixel including a device for receiving or transmitting light and a semiconductor device associated therewith.
  • the device further includes: an insulation layer between the at least one inter-island connection line and a corresponding island, wherein the at least one inter-island connection line passes through a hole in the insulation layer Electrically connected to components in the corresponding island.
  • the insulating layer is one of the following: an organic insulating layer or an inorganic insulating layer.
  • the island includes a thin film transistor
  • the thin film transistor includes a source electrode and a drain electrode
  • the inter-island connection line is located on a different layer from the source electrode and the drain electrode.
  • the device is a display substrate or a sensor substrate.
  • each of the islands includes: a buffer layer over the flexible substrate; and the semiconductor layer over the buffer layer; wherein the groove extends to the flexible substrate .
  • each of the islands includes a component for electrical connection, wherein each of the at least one inter-island connection line is electrically connected with the component for electrical connection of a corresponding island, wherein all The inter-island connection line and the component for electrical connection are located on different layers.
  • a display device including the device according to any embodiment.
  • a method of manufacturing a device including: forming at least two islands on a flexible substrate, and adjacent islands separated by a trench, the islands including a semiconductor layer; forming at least An inter-island connection line is used to electrically connect the corresponding islands.
  • the at least one inter-island connection line is configured to be stretchable.
  • the at least inter-island connection lines are respectively bridged over or received in corresponding grooves.
  • the method further includes, after the forming at least two islands and before the forming at least one inter-island connection line: filling the groove with an insulating material.
  • the insulating material is an organic insulating material.
  • the method further includes, after filling the groove with an insulating material and before the forming at least one inter-island connection line: forming an insulating layer on the island and the insulating material,
  • the insulation layer includes at least one opening; wherein forming at least one inter-island connection line includes: forming the at least one inter-island connection line on the insulation layer, the at least one inter-island connection line filling a corresponding opening and Connect to the corresponding island.
  • each of the islands includes a component for electrical connection, wherein each of the at least one inter-island connection line is electrically connected with the component for electrical connection of a corresponding island, wherein all The inter-island connection line and the component for electrical connection are located on different layers.
  • a pixel region is divided into a plurality of pixel islands by providing grooves, and between adjacent pixel islands are realized by means of inter-island connecting lines provided in corresponding grooves Signal connectivity.
  • a display substrate or a sensor substrate with improved tensile performance and bending performance such as a foldable OLED display substrate or a CIMS sensor substrate, can be realized.
  • FIG. 1 schematically illustrates a plan view of a display substrate according to an exemplary embodiment of the present disclosure
  • FIG. 2 schematically illustrates a structure diagram of a display substrate according to an exemplary embodiment of the present disclosure
  • FIG. 3 schematically illustrates a shape of an inter-island connection line in an exemplary embodiment of the present disclosure
  • FIG. 4 schematically illustrates a shape of an inter-island connection line according to another exemplary embodiment of the present disclosure
  • FIG. 5 schematically illustrates a shape of a connection line between islands in still another exemplary embodiment of the present disclosure
  • FIG. 6 schematically illustrates a structure diagram of a display substrate in an exemplary embodiment of the present disclosure
  • FIG. 7 schematically illustrates a structure of a thin film transistor according to an exemplary embodiment of the present disclosure
  • FIG. 8 schematically illustrates a flowchart of a method for manufacturing a display substrate according to an exemplary embodiment of the present disclosure
  • 12A and 12B each show a flowchart of a method of manufacturing a device according to an embodiment of the present disclosure.
  • a device which may include: a flexible substrate; at least two islands on the flexible substrate, wherein adjacent islands are separated by a slot; and at least An inter-island connection line is used to connect the corresponding islands.
  • the island can include a semiconductor layer.
  • the at least one inter-island connection line may be configured to be stretchable.
  • the display substrate will be used as an example for description, and the island will be referred to as a pixel island.
  • the device described in the present disclosure is not limited to a display substrate, for example, it may be used as a sensor substrate.
  • the display substrate described herein can be applied to, but not limited to, a bendable OLED display.
  • a device for example, a display substrate
  • a device may include a flexible substrate 10, a plurality of pixel islands 20 located on the flexible substrate 10, a slot 30 between adjacent pixel islands 20, and a communication phase. Inter-island connection lines 40 of adjacent pixel islands 20.
  • FIG. 2 schematically shows a partial cross-sectional view of the device shown in FIG. 1.
  • the pixel island is adapted to form a pixel therein.
  • the pixel may include a device for receiving or transmitting light (for example, a light emitting diode or a photodiode, etc.) and a semiconductor device (for example, but not limited to, a switching device, a capacitor, etc.) associated with the device for receiving or transmitting light.
  • the pixels may be configured to receive or transmit light.
  • a pixel may include one or more sub-pixels, for example, a sub-pixel for red, a sub-pixel for blue, a sub-pixel for green, and the like.
  • the pixel or sub-pixel may include, for example, a light emitting diode.
  • the pixel or sub-pixel may include, for example, a photodiode. It should be understood that the present disclosure is not limited to these cases.
  • the pixel island 20 may be provided with a thin film transistor 200.
  • the pixel island 20 may also be provided with a component for electrical connection (for example, a component electrically connected to the thin film transistor 200 or other electronic devices (for example, but not limited to, a terminal, a doped active region, a metal wiring, or a polysilicon wiring, etc. ).
  • the component for electrical connection may be used for internal electrical connection.
  • the component for electrical connection may also be used to carry signals or power, such as scanning signals, data signals, and / or power sources, etc. It should be understood that The connection methods of the various signal wires in the island can adopt various connection methods known or developed in the future as required.
  • the inter-island connection line 40 can be used to connect corresponding pixel islands.
  • the inter-island connection line 40 electrically connects electrical connection components (for example, signal lines) of adjacent pixel islands 20 to achieve signal communication between adjacent pixel islands 20.
  • the inter-island connection line 40 may include, for example, a first inter-island connection line electrically connecting the scanning signal lines of the adjacent pixel islands 20 and an electrical connection of the data signal lines of the adjacent pixel islands 20.
  • a second inter-island connection line, and / or a third inter-island connection line that electrically connects power supply signal lines of adjacent pixel islands 20, and the like.
  • the pixel island 20 may include at least one pixel unit. In some embodiments, the pixel island 20 may include a group of pixels. In some embodiments of the present disclosure, a pixel may include several sub-pixels, for example, a sub-pixel for red, a sub-pixel for blue, a sub-pixel for green, and the like. Signal communication between groups of respective pixels (or sub-pixels) of adjacent pixel islands can be achieved by means of the inter-island connection line 40.
  • a pixel island 20 may include a plurality of pixels, and the thin film transistors (for example, control transistors) in the plurality of pixels are all electrically connected to the scanning signal lines. Since the adjacent pixel islands 20 are separated by the slots 30 and 0, the scanning signal lines of the adjacent pixel islands 20 are independent of each other. By providing an inter-island connection line 40 that is electrically connected to the two scanning signal lines of the adjacent pixel island 20, the signal communication of the adjacent pixel island 20 can be achieved.
  • the gates of the control transistors are electrically connected to the scanning signal lines in the corresponding islands, they can be formed into an integrated structure through the same patterning process during the preparation process. Therefore, in this case, when the scanning signal lines in the adjacent pixel islands 20 are electrically connected through the inter-island connection lines 40, the gates of the control transistors in the adjacent pixel islands 20 can be connected through the inter-island connection lines 40. Electrical connection.
  • each pixel island 20 includes one pixel (or sub-pixel), in actual production, each pixel island 20 may include two or more pixels ( Or sub-pixels); therefore, it is apparent that the present disclosure is not limited to the illustrated embodiments.
  • the electrical connection manner between the inter-island connection line 40 and other electrical connection components (for example, data signal lines or other signal lines) on the adjacent pixel islands 20 is similar to the electrical connection manner of the scanning signal lines described above, and is not repeated here.
  • a slot 30 is provided to divide a pixel region into a plurality of pixel islands 20, and signals between adjacent pixel islands 20 are implemented by an inter-island connection line 40 provided in the corresponding slot 30. Connected.
  • the tensile performance and the bending performance of the display substrate can be effectively improved under the condition of ensuring the signal communication, so as to achieve an improved display substrate.
  • the inter-island connection line 40 may be received in the slot 30 or bridged above the slot 30.
  • the signal lines in each pixel island 20 are configured using a normal wiring method.
  • the signal lines between adjacent pixel islands 20, that is, the inter-island connection lines 40 may be partially disposed in the groove 30.
  • the inter-island connection line 40 may be electrically isolated from undesired components of the pixel island to avoid undesired electrical connections.
  • the inter-island connection line 40 may be configured to travel across the slot 30 to achieve signal line communication between two adjacent pixel islands 20.
  • FIG. 2 is taken as an example for explaining that the inter-island connection line 40 is bridged above the slot 30, those skilled in the art can understand that the inter-island connection line 40 is at least partially accommodated in the slot 30 according to the present disclosure. The way is not repeated here.
  • the groove 30 may be filled with an insulating material 300 such as an organic insulating material.
  • the scanning signals may be sequentially loaded to the scanning signal lines corresponding to the pixels (or sub-pixels) of each row through the cascaded GOA units.
  • the scanning signal lines For each level of the scanning signal, on the one hand, pixels in the same row in the pixel island 20 are connected to the scanning signal line in the same island.
  • the pixel islands 20 can be electrically connected with the scanning signal lines of the adjacent two pixel islands 20 through the inter-island connection line 40 to provide scanning signals between the pixel islands 20 for scanning signals. connection.
  • the scanning signal can be further transmitted from one pixel island 20 to another pixel island 20 through the inter-island connection line 40, and then transmitted from the other pixel island to the next pixel island in the above manner, until all the target pixel islands, Complete the scanning signal loading of this level.
  • the shape of the pixel island 20 may include any one of a circle or a polygon such as a triangle, a rhombus, and a rectangle; the present disclosure is not limited thereto.
  • the inter-island connecting wire 40 may be a stretchable wire, for example, a wire made of a flexible material and / or a wire suitable for stretching (for example, the wire may have a curved shape).
  • the inter-island connection wire 40 may be a flexible wire, such as a wire formed of a flexible material such as silver nanowires, carbon nanotubes, or organic conductive materials. The flexible wire has good tensile properties, which can ensure the effective connection of the circuit when the display substrate is bent.
  • the inter-island connecting line 40 may also be a curved or polyline-shaped wire, such as a horseshoe shape shown in FIG. 3, a wave shape shown in FIG. 4, or a zigzag shape shown in FIG. 5.
  • the wire may be Metal wires. Since the stretchability of the metal wire is not as good as that of the flexible wire, if it is set to a linear structure, it will affect the overall tensile performance of the display substrate. Therefore, setting it to a curved structure or a polyline structure can improve the metal wire Tensile performance to ensure effective connection of the circuit when the display substrate is bent.
  • the polyline shape may be configured to have a certain curvature at the bend.
  • the inter-island connection line 40 may be a straight flexible wire, a curved / folded metal wire, or a curved / folded flexible wire.
  • the island-to-island connecting line is no particular limitation on the island-to-island connecting line as long as the island-to-island connecting line 40 has stretchability.
  • the display substrate may further include a buffer layer 50 located above the base substrate 10 and an insulating layer 60 located on the side of the inter-island connection line 40 near the base substrate 10.
  • the insulating layer 60 may be located between the inter-island connection lines and the corresponding islands.
  • the inter-island connection line 40 may be electrically connected to a component in a corresponding island through a hole in the insulation layer, for example.
  • the inter-island connection line 40 may be electrically connected to the gate of the thin film transistor 200 through the first hole 600 in the insulating layer 60.
  • the insulating layer 60 may be an organic insulating layer.
  • the groove 30 may penetrate the film layer between the flexible substrate 10 and the insulating layer 60.
  • the groove 30 may be configured to extend up to the flexible substrate 10. Since the organic material has good tensile properties, designing the insulating layer 60 as an organic insulating layer is beneficial to improving the tensile properties of the display substrate.
  • the insulating layer 60 may also be an inorganic insulating layer.
  • the groove 30 may pass through the film layer between the flexible substrate 10 and the inter-island connection line 40. Since the tensile performance of the inorganic material is inferior to that of the organic material, in this embodiment, the groove 30 can be configured to also penetrate the inorganic insulating layer, thereby being beneficial to improving the tensile performance of the display substrate.
  • the display substrate may further include an organic insulating material 300 filled in the groove 30.
  • the bottom of the organic insulating material 300 may be in contact with the flexible substrate 10, and the top of the organic insulating material 300 may be in contact with the insulating layer 60 or even penetrate the insulating layer 600. Since the organic insulating material 300 has good stretchability, it contributes to the overall stretchability of the display substrate.
  • other materials in the groove 30 may be removed by, for example, an exposure and development step, leaving only the elastic organic insulating material 300 to form a deep groove in the groove 30, so that the island-to-island connection line is always maintained in the groove 30 Inside the deep trench.
  • the thin film transistor 200 may include: a semiconductor active layer 201 on the buffer layer 50, a gate insulating layer 202 on the semiconductor active layer 201, and a gate above the gate insulating layer 202.
  • the source electrode 207 and the drain electrode 208 are electrically connected to the semiconductor active layer 201 through the second hole 205 and the third hole 206, respectively.
  • the inter-island connection line 40 is located on a side of the interlayer insulation layer 204 facing away from the flexible substrate 10 and is located on a different layer from the source electrode 207 and the drain electrode 208.
  • a pixel region may be divided into a plurality of pixel islands 20.
  • the pixel island 20 is normally routed. Between the pixel islands 20, an island-to-island connection line 40 is provided after a source-drain metal layer is formed. According to the embodiments of the present disclosure, it is possible to obtain good stretchability and facilitate wiring layout.
  • the display substrate provided by this exemplary embodiment may adopt the single-gate transistor structure or the double-gate transistor structure described in FIG. 2. It should be understood that the present disclosure is not limited to the embodiments described herein or shown in the drawings.
  • a method of manufacturing a device for example, a display substrate
  • the preparation method may include:
  • the pixel islands 20 are provided with a thin film transistor 200 and a signal line electrically connected to the thin film transistor 200;
  • An inter-island connection line 40 for connecting adjacent pixel islands 20 is formed at a position corresponding to the slot 30, and the inter-island connection line 40 electrically connects signal lines of the adjacent pixel islands 20.
  • the groove 30 is provided to divide a pixel region into a plurality of pixel islands 20, and the signal communication between adjacent pixel islands 20 is achieved by means of an inter-island connection line 40.
  • the tensile performance and the bending performance of the display substrate can be effectively improved under the condition that the signal communication is ensured, so as to realize a bendable display substrate.
  • a display panel including a thin film transistor is taken as an example in combination with the drawings to describe the manufacturing method of the device by way of example.
  • the structure may include a buffer layer 50, a light-shielding layer (not shown) of the optional thin film transistor 200, a semiconductor active layer 201, a gate insulating layer 202, a gate 203, and an interlayer insulating layer 204 in this order.
  • the structure may further include an electrical connection member, such as a signal line.
  • the structure may be designed based on the distribution of the islands 20 designed in advance. For the area corresponding to the pixel islands 20 to be formed, the signal lines (if any) can be routed normally, and no electrical connection members such as signal lines are formed in the corresponding areas of the slots 30 between the pixel islands 20 to be formed. That is, the electrical connection member is an island (or local) connection member.
  • a groove 30 is formed in the structure.
  • the slot 30 passes through the interlayer insulating layer 204 and the gate insulating layer 202 and the buffer layer 50 to separate each pixel island 20.
  • Holes 205 and 206 may be formed in the interlayer insulating layer 204 and the gate insulating layer 202 at the same time as the trench 30 is formed (but not limited thereto).
  • the holes 205 and 206 may be used for the preparation of the source electrode 207 and the drain electrode 208 of the thin film transistor 200.
  • the bottom of the slot 30 may also be configured to be close to the flexible substrate (ie, only up to the flexible substrate in the buffer layer 50 (if any)).
  • the grooves 30 may be formed to extend (or even enter) the flexible substrate 10; thus, it is more beneficial to improve the bending performance of the display substrate.
  • openings 205 and 206 may be formed in the structure (or in the corresponding island) while forming the groove 30.
  • the openings 205 and 206 may be used, for example, to form source and drain electrodes or contacts connected to the active layer therein; it should be understood that the present disclosure is not limited to this.
  • the trench 30 is filled with an organic insulating material 300 such as, for example, polyimide (PI) or polydimethylsiloxane (PDMS).
  • an organic insulating material 300 such as, for example, polyimide (PI) or polydimethylsiloxane (PDMS).
  • PI polyimide
  • PDMS polydimethylsiloxane
  • the organic insulating material 300 it is preferable to use a material that has good tensile properties and can be processed through photolithography and patterning processes.
  • a source electrode 207 and a drain electrode 208 are formed in the second hole 205 and the third hole 206, respectively. So far, the basic structure of, for example, the transistor 200 in the pixel island 20 can be formed.
  • the trench 30 may be formed first and filled with the organic insulating material 300; then, the second hole 205 and the third hole 206 are formed, and the source electrode 207 and the drain electrode 208 are formed therein.
  • the second hole 205 and the third hole 206 may be formed first and the source electrode 207 and the drain electrode 208 are formed therein, and then the trench 30 is formed and the organic insulating material 300 is filled therein.
  • an insulating layer 60 (eg, an organic insulating layer) is formed over the pixel island 20. At least one opening (for example, a hole 600) may be formed in the insulating layer 60. Thereafter, an inter-island connection line 40 is formed over the organic insulating layer 60.
  • the inter-island connection line 40 may be electrically connected to the thin film transistor 200 (for example, an electrode thereof) through the opening 600.
  • the inter-island connection line 40 may include (for example but not limited to): a first inter-island connection line electrically connected to the scanning signal line, a second inter-island connection line electrically connected to the data signal line, and / or a power signal line The third inter-island connection line is connected.
  • the inter-island connection line 40 enables signal communication between adjacent pixel islands 20.
  • a method for preparing a device is also provided. As shown in FIG. 12A, the method may include the following steps.
  • step S601 at least two islands are formed on a flexible substrate, and adjacent islands are separated by a trench, and the islands include a semiconductor layer.
  • step S607 at least one inter-island connection line is formed, and each inter-island connection line is used to electrically connect a corresponding island.
  • the at least one inter-island connection line is configured to be stretchable.
  • the at least inter-island connection lines are respectively bridged over or received in corresponding slots.
  • a method for preparing a device is also provided. As shown in FIG. 12B, the method may include the following steps.
  • step S601 at least two islands are formed on a flexible substrate, and adjacent islands are separated by a trench, and the islands include a semiconductor layer.
  • step S603 the groove is filled with an insulating material.
  • the insulating material may be, for example, an organic insulating material.
  • step S605 an insulating layer is formed on the island and the insulating material, and the insulating layer includes at least one opening.
  • the at least one inter-island connection line is formed on the insulation layer, and the at least one inter-island connection line fills a corresponding opening and is electrically connected to the corresponding island.
  • each of the islands includes a component for electrical connection, wherein each of the at least one inter-island connection line is electrically connected with the component for electrical connection of a corresponding island.
  • the inter-island connection line may be located on a different layer from the component for electrical connection.
  • a display device including the above-mentioned device (for example, a display substrate).
  • the display device has good tensile properties, and can be applied to flexible display devices, and is particularly suitable for wearable devices.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Electroluminescent Light Sources (AREA)

Abstract

本公开提供一种装置及其制备方法、显示装置。一种装置，包括：柔性衬底；位于所述柔性衬底上的至少两个岛，各所述岛都包括半导体层，相邻的岛之间通过槽隔离开；以及至少一个岛间连接线，各岛间连接线用于电连接对应的岛。

Description

包括像素岛的装置及其制备方法以及显示装置
相关申请的交叉引用
本申请要求于2018年6月26日提交的中国专利申请No.201810671717.7的优先权，通过引用将其全文并入在此。
技术领域
本公开涉及显示技术领域，尤其涉及一种包括像素岛的装置及其制备方法、显示装置。
背景技术
OLED(Organic Light Emitting Diode，有机电致发光二极管)凭借其低功耗、广视角、超薄化、高色饱和度、以及可实现柔性化等优势而逐渐成为显示领域的主流产品，其已经广泛应用于智能手机、平板电脑、显示器和电视等终端产品。
OLED显示基板的其中一个优势就是可以实现柔性化，其通过将OLED器件制作在柔性衬底上，便可实现可弯曲的显示设备。但随着可穿戴设备的日渐流行，其对于OLED柔性面板的拉伸性能提出了更高的要求。由于OLED显示基板的每个像素都配有单独的驱动电路，这就导致其不仅像素密度较高，而且布线也较为密集。因此实现可拉伸型OLED显示基板的难度也相对较大。另外，OLED显示基板的弯折性能也会受其影响。
对于其它类型的显示基板，也可能类似地存在这样的问题。
需要说明的是，在上述背景技术部分公开的信息仅用于加强对本公开的背景的理解，因此可以包括不构成对本领域普通技术人员已知的现有技术的信息。
发明内容
本公开的一些实施例的目的之一在于提供一种装置及其制备方法以及显示装置。
本公开的其他特性和优点将通过下面的详细描述变得显然，或部分地通过本公开的实践而习得。
根据本公开的一个方面，提供了一种装置，包括：柔性衬底；位于所述柔性衬 底上的至少两个岛，各所述岛都包括半导体层，相邻的岛之间通过槽隔离开；以及至少一个岛间连接线，各岛间连接线用于电连接对应的岛。
在一些实施例中，所述装置还包括：填充在所述槽中的有机绝缘材料。
在一些实施例中，所述至少一个岛间连接线被配置为：跨接在对应的所述槽上方，或至少部分地容纳在对应的所述槽中。
在一些实施例中，所述岛间连接线由柔性材料制成或者具有适于拉伸的形状。
在一些实施例中，所述岛的形状包括圆形或者多边形，所述多边形包括三角形、菱形、矩形中的任一种。
在一些实施例中，所述岛适于在其中形成像素，所述像素包括用于接收或发送光的器件和与之关联的半导体器件。
在一些实施例中，所述装置还包括：绝缘层，位于所述至少一个岛间连接线和对应的岛之间，其中，所述至少一个岛间连接线通过位于所述绝缘层中的孔与对应的岛中的部件电连接。
在一些实施例中，所述绝缘层为下列中的一种：有机绝缘层或无机绝缘层。
在一些实施例中，所述岛包括薄膜晶体管，所述薄膜晶体管包括源极和漏极，并且其中，所述岛间连接线与所述源极和所述漏极位于不同层。
在一些实施例中，所述装置为显示基板或传感器基板。
在一些实施例中，各所述岛包括：在所述柔性衬底之上的缓冲层；以及在所述缓冲层之上的所述半导体层；其中，所述槽延伸到所述柔性衬底。
在一些实施例中，各所述岛包括用于电连接的部件，其中所述至少一个岛间连接线中的每一个与对应的岛的所述用于电连接的部件电连接，其中，所述岛间连接线与所述用于电连接的部件位于不同层。
根据本公开另一方面，还提供了一种显示装置，包括根据任意实施例所述的装置。
根据本公开又一方面，还提供了一种装置的制备方法，包括：在柔性衬底上形成至少两个岛，相邻的岛之间通过槽隔离开，所述岛包括半导体层；形成至少一个岛间连接线，各岛间连接线用于电连接对应的岛。
在一些实施例中，所述至少一个岛间连接线被配置为是可拉伸的。
在一些实施例中，所述至少岛间连接线分别跨接在对应的槽上方或容纳在对应的槽中。
在一些实施例中，所述方法还包括，在所述形成至少两个岛之后，且在所述形成至少一个岛间连接线之前：以绝缘材料填充所述槽。
在一些实施例中，所述绝缘材料是有机绝缘材料。
在一些实施例中，所述方法还包括，在以绝缘材料填充所述槽之后，且在所述形成至少一个岛间连接线之前：在所述岛和所述绝缘材料之上形成绝缘层，所述绝缘层包括至少一个开口；其中，形成至少一个岛间连接线包括：在所述绝缘层之上形成所述至少一个岛间连接线，所述至少一个岛间连接线填充对应的开口并与对应的岛电连接。
在一些实施例中，各所述岛包括用于电连接的部件，其中所述至少一个岛间连接线中的每一个与对应的岛的所述用于电连接的部件电连接，其中，所述岛间连接线与所述用于电连接的部件位于不同层。
根据本公开示例性实施方式的显示基板及其制备方法、显示装置，通过设置槽以将像素区域分割为多个像素岛，并借助于对应槽设置的岛间连接线实现相邻像素岛之间的信号连通。根据本公开示例性实施方式，可以在保证信号连通的同时有效改善显示基板的拉伸性能和弯折性能。根据本公开示例性实施方式，可以实现拉伸性能和弯折性能提高的显示基板或传感器基板，例如可弯折OLED显示基板或CIMS传感器基板等。
应当理解的是，以上的一般描述和后文的细节描述仅是示例性和解释性的，并不能限制本公开。
附图说明
此处的附图被并入说明书中并构成本说明书的一部分，示出了符合本公开的实施例，并与说明书一起用于解释本公开的原理。显而易见地，下面描述中的附图仅仅是本公开的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1示意性示出本公开一个示例性实施例的显示基板的平面图；
图2示意性示出本公开一个示例性实施例的显示基板的结构示意图；
图3示意性示出本公开一个示例性实施例中岛间连接线的形状示意图；
图4示意性示出本公开另一示例性实施例的岛间连接线的形状示意图；
图5示意性示出本公开再一个示例性实施例中岛间连接线的形状示意图；
图6示意性示出本公开一个示例性实施例中显示基板的结构示意图；
图7示意性示出本公开一个示例性实施例的薄膜晶体管的结构示意图；
图8示意性示出本公开一个示例性实施例的显示基板的制备方法的流程图；
图9至图11示意性示出本公开一个示例性实施例中显示基板的制备过程示意图；
图12A和12B分别示出了根据本公开实施例的装置的制备方法的流程图。
具体实施方式
现在将参考附图更全面地描述示例实施方式。然而，示例实施方式能够以多种形式实施，且不应被理解为限于在此阐述的范例；相反，提供这些实施方式使得本公开将更加全面和完整，并将示例实施方式的构思全面地传达给本领域的技术人员。所描述的特征、结构或特性可以以任何合适的方式结合在一个或更多实施方式中。
此外，附图仅为本公开的实施例的示意性图示，并非一定是按比例绘制。图中相同的附图标记表示相同或类似的部分，因而将省略对它们的重复描述。
根据本公开的一个示例实施方式，提供了一种装置，其可以包括：柔性衬底；位于所述柔性衬底上的至少两个岛，其中相邻的岛之间通过槽隔离开；以及至少一个岛间连接线，各岛间连接线用于连通的对应的岛。在一些实现方式中，所述岛可以包括半导体层。在一些实现方式中，所述至少一个岛间连接线可以被配置为是可拉伸的。
在后面的部分说明中，将以显示基板作为示例来进行说明，并将岛称为像素岛。但应理解，本公开所述的装置并不限于显示基板，例如，其可以作为传感器基板。另外，还应理解，这里所描述显示基板可应用于(但不限于)可弯折OLED显示器。
如图1所示，装置(例如，显示基板)可以包括柔性衬底10、位于柔性衬底10上的多个像素岛20、位于相邻像素岛20之间的槽30、以及用于连通相邻像素岛20的岛间连接线40。图2示意性示出了图1所示的装置的部分截面图。
在本公开的一些实施例中，所述像素岛适于在其中形成像素。像素可以包括用于接收或发送光的器件(例如，发光二极管或光电二极管等)和与所述用于接收或发送光的器件关联的半导体器件(例如但不限于，开关器件、电容器等)。在不同实施例中，像素可以被配置用于接收或发送光。在一些实施例中，像素可以包括一个或多个子像素，例如，用于红色的子像素、用于蓝色的子像素、用于绿色的子像素 等。在显示基板的情况下，像素或者子像素可以包括例如发光二极管。在传感器基板的情况下，像素或者子像素可以包括例如光电二极管。应理解，本公开并不限于这些情况。
如图2所示，所述像素岛20可以设有薄膜晶体管200。所述像素岛20还可以设有用于电连接的部件(例如，与薄膜晶体管200或其他电子器件电连接的部件(例如但不限于，端子、掺杂的有源区、金属布线或多晶硅布线等)。所述用于电连接的部件可以用于内部电连接。所述用于电连接的部件还可以用于承载信号或电力，例如扫描信号、数据信号、和/或电源等。应理解，岛内各种信号线的连接方式可以根据需要采用各种已知的或将来开发的连接方式。
岛间连接线40可以用于连通的对应的像素岛。例如，如图2所示，岛间连接线40将相邻像素岛20的电连接部件(例如，信号线)电连接，以实现相邻像素岛20之间的信号连通。在图2所示的示例中，岛间连接线40例如可以包括：将相邻像素岛20的扫描信号线电连接的第一岛间连接线、将相邻像素岛20的数据信号线电连接的第二岛间连接线、和/或将相邻像素岛20的电源信号线电连接的第三岛间连接线等。
在一些实施例中，像素岛20可以包括至少一个像素单元。在一些实施方式中，像素岛20可以包括像素的群组。在本公开的一些实施例中，像素可以包括若干个子像素，例如，用于红色的子像素、用于蓝色的子像素、用于绿色的子像素等。相邻的像素岛的各自像素(或子像素)的群组之间的信号连通可以借助于岛间连接线40来实现。
下面，以岛间连接线40连接相邻像素岛20的扫描信号线的情况为例进行说明。一个像素岛20内可以包括多个像素，该多个像素中的薄膜晶体管(例如控制晶体管)均与扫描信号线电连接。由于相邻像素岛20被设置于其槽30 0隔断，因此相邻像素岛20各自的扫描信号线是相互独立的。通过设置与该相邻像素岛20的两个扫描信号线均电连接的岛间连接线40，即可实现相邻像素岛20的信号连通。
由于控制晶体管的栅极与对应的岛内的扫描信号线电连接，因此二者在制备过程中可以通过同一次构图工艺来形成为一体结构。因此，在这种情况下，在通过岛间连接线40将相邻像素岛20中的扫描信号线电连接时，可以通过岛间连接线40将相邻像素岛20中的控制晶体管的栅极电连接的方式来实现。
应当理解的是，虽然图2是以每个像素岛20中包含一个像素(或子像素)为例 绘示的，但在实际生产中每个像素岛20中可以包括两个或多个像素(或子像素)；因此，显然本公开不限于图示的实施例。此外，岛间连接线40与相邻像素岛20上的其它电连接部件(例如，数据信号线或其它信号线)的电连接方式与上述扫描信号线的电连接方式类似，这里不再赘述。
本公开示例性实施方式所提供的显示基板，通过设置槽30以将像素区域分割为多个像素岛20，并通过对应槽30设置的岛间连接线40实现相邻像素岛20之间的信号连通。根据本公开的实施例，可在保证信号连通的条件下有效的改善显示基板的拉伸性能和弯折性能，以便于实现改善的显示基板。
在一些实现方式中，所述岛间连接线40可以容纳在槽30中或者跨接在槽30上方。各个像素岛20内的信号线采用正常走线方式来配置。在一些实施例中，相邻像素岛20间的信号线即岛间连接线40可以部分设置在槽30内。在这种情况下，根据不同的应用，可以使岛间连接线40与像素岛的不期望的部件电隔离，以避免不期望的电连接。在另一实施例中，岛间连接线40可以设置为横跨槽30行进，以实现相邻两像素岛20的信号线连通。
需要说明的是：虽然图2是以岛间连接线40跨接在槽30上方为例进行说明的，但本领域技术人员根据本公开能够明了岛间连接线40至少部分容纳于槽30中的方式，这里不再赘述。
另外，如图2中所示，槽30中可以填充有诸如有机绝缘材料的绝缘材料300。
下面以前述的显示基板应用于OLED显示器的情况下以扫描信号为例对信号加载方式进行示例性的说明。在一具体实现方式中，在OLED显示器工作时，扫描信号可以通过级联的GOA单元依次加载至各行像素(或子像素)对应的扫描信号线。对于每一级扫描信号而言，一方面像素岛20内的同一行像素连接至同一岛内扫描信号线。另一方面，像素岛20间可以通过岛间连接线40以跨接的方式与相邻的两个像素岛20的岛内扫描信号线电连接，来提供像素岛20间的用于扫描信号的连接。如此，扫描信号可以自一像素岛20通过岛间连接线40进一步传输至另一像素岛20，再按照上述方式由该另一像素岛传输至下一个像素岛，直至全部的目标像素岛，从而完成本级的扫描信号加载。
本示例实施方式中，所述像素岛20的形状可以包括圆形或者例如三角形、菱形、矩形等多边形中的任一种；本公开不限于此。
本示例实施方式中，所述岛间连接线40可以采用可拉伸导线，例如由柔性材料 制成的导线和/或具有适于拉伸的导线(例如，导线可以具有弯曲形状)。可选的，所述岛间连接线40可以采用柔性导线，例如由银纳米线、碳纳米管、或者有机导电材料等柔性材料形成的导线。该柔性导线具有良好的拉伸性能，可在显示基板弯曲时保证线路的有效连接。
可选的，所述岛间连接线40也可以采用曲线形或者折线形导线，例如图3所示的马蹄形、图4所示的波浪形、或者图5所示的锯齿形，该导线可以是金属导线。由于金属导线的可拉伸性不及柔性导线，若将其设置为直线形结构会影响显示基板的整体拉伸性能，因此这里将其设置为曲线形结构或者折线形结构，便可以改善金属导线的拉伸性能，以在显示基板弯曲时保证线路的有效连接。可选地，折线形可以被配置为在弯折处具有一定曲率。
需要说明的是：以上两种实施方式可以单独使用，或者结合使用。即：岛间连接线40可以采用直线形的柔性导线，曲线形/折线形的金属导线，或者曲线形/折线形的柔性导线。对于岛间连接线没有特别的限制，只要岛间连接线40具有可拉伸性能即可。
本示例实施方式中，如图6所示，所述显示基板还可以包括位于衬底基板10上方的缓冲层50，以及位于岛间连接线40靠近衬底基板10一侧的绝缘层60。如图6中所示绝缘层60可以位于岛间连接线和对应的岛之间。岛间连接线40可以例如通过位于所述绝缘层中的孔与对应的岛中的部件电连接。例如，该岛间连接线40可以通过位于绝缘层60中的第一孔600与薄膜晶体管200的栅极电连接。
在一个实施例中，该绝缘层60可以为有机绝缘层，此时槽30可以贯穿于柔性衬底10与该绝缘层60之间的膜层。在一些实施例中，槽30可以被配置为延伸直至柔性衬底10。由于有机材料具有良好的拉伸性能，因此将该绝缘层60设计为有机绝缘层有利于提升显示基板的拉伸性能。
在另一实施例中，该绝缘层60也可以为无机绝缘层，此时槽30可以贯穿于柔性衬底10与岛间连接线40之间的膜层。由于无机材料的拉伸性能不及有机材料，因此本实施例可将槽30配置为也贯穿该无机绝缘层，从而有利于提升显示基板的拉伸性能。
更进一步的，所述显示基板还可以包括填充于槽30内的有机绝缘材料300。该有机绝缘材料300的底部可与柔性衬底10接触，该有机绝缘材料300的顶部可与绝缘层60接触甚至穿透该绝缘层600。由于有机绝缘材料300具有良好的可拉伸性， 因此有助于显示基板整体拉伸性能。
在一些实施例中，可以通过例如曝光显影步骤，去掉槽30内的其他材料，只留下弹性的有机绝缘材料300在槽30中形成深沟，使得岛间连接线始终保持在槽30中的深沟里面。
示例的，如图7所示，所述薄膜晶体管200可以包括：位于缓冲层50上的半导体有源层201，位于半导体有源层201上的栅绝缘层202，位于栅绝缘层202上方的栅极203，位于栅极203上方的层间绝缘层204，以及源极207和漏极208。源极207和漏极208通过第二孔205和第三孔206分别与半导体有源层201电连接。所述岛间连接线40位于层间绝缘层204背离柔性衬底10的一侧且与源极207和漏极208位于不同层。
本示例实施方式所提供的显示基板中，可将像素区域分割成多个像素岛20。像素岛20内正常走线。像素岛20间，在形成源漏金属层之后才设置岛间连接线40。根据本公开的实施例，能够获得良好的可拉伸性能，而且便于布线布局。
需要说明的是：本示例实施方式所提供的显示基板可以采用图2所述的单栅晶体管结构，或者双栅晶体管结构。应理解，本公开并不限于这里所描述或者图中所示出的实施例。
根据本公开的示例实施方式，还提供了一种装置(例如，显示基板)的制备方法。如图8所示，该制备方法可以包括：
S1、在柔性衬底10上形成多个像素岛20以及位于相邻像素岛20之间的槽30，所述像素岛20内设有薄膜晶体管200以及与薄膜晶体管200电连接的信号线；
S2、在对应槽30的位置形成用于连通相邻像素岛20的岛间连接线40，所述岛间连接线40将相邻像素岛20的信号线电连接。
根据本公开示例性实施方式所提供的显示基板的制备方法，设置槽30以将像素区域分割为多个像素岛20，并借助于岛间连接线40实现相邻像素岛20之间的信号连通。根据本公开的实施例，可在保证信号连通的条件下有效的改善显示基板的拉伸性能和弯折性能，以便于实现可弯折的显示基板。
下面以包括薄膜晶体管的显示面板为例结合附图对装置的制备方法进行示例性的描述。
首先，参考图9所示，在柔性衬底10上形成结构体。所述结构体可以依次包括形成缓冲层50、可选的薄膜晶体管200的遮光层(未示出)、半导体有源层201、栅 绝缘层202、栅极203、层间绝缘层204。在一些实施例中，所述结构体还可以包括电连接部件，例如信号线，。对于所述结构体，可以根据预先设计的岛20的分布来进行设计。对于与要形成的像素岛20对应的区域内，信号线(如果有的话)可以正常走线，而在对应的待形成像素岛20间的槽30区域不形成诸如信号线的电连接部件。也即，该电连接部件是岛内(或者说局部)连接部件。
然后，参考图10所示，在该结构体中形成槽30。所述槽30穿过层间绝缘层204和栅绝缘层202、以及缓冲层50，以将各个像素岛20分割开来。可以在形成槽30的同时(但不限于此)，在层间绝缘层204和栅绝缘层202中形成孔205和孔206。孔205和206可以用于薄膜晶体管200的源极207和漏极208的制备。在一些实施例中，槽30的底部也可以被配置为接近柔性衬底(也即，仅达到缓冲层50(如果有的话)中临近柔性衬底)。在另一些实施例中，槽30可以被形成为延伸到(甚至进入)柔性衬底10；如此，更有利于提升显示基板的弯曲性能。
还可以在形成槽30的同时，在结构体(或者，对应的岛中)形成开口205和206。开口205和206可以用于，例如，在其中形成连接到有源层的源极和漏极或者接触件；应理解，本公开并不限于。
接着，参考图11所示，在槽30中填充有机绝缘材料300，诸如例如聚酰亚胺(Polyimide，PI)或者聚二甲基硅氧烷(polydimethylsiloxane，PDMS)等。对于有机绝缘材料300，优选采用具有良好拉伸性能并可通过光刻和图案化工艺处理的材料。之后，在第二孔205和第三孔206中分别形成源极207和漏极208。至此即可形成像素岛20中例如晶体管200的基本结构。需要说明的是：在其他实施例中，也可以先形成槽30并在其中填充有机绝缘材料300；之后，再形成第二孔205和第三孔206并在其中源极207和漏极208。反之亦可；例如，在其他实施例中，也可以先形成第二孔205和第三孔206并在其中源极207和漏极208，之后形成槽30并在其中填充有机绝缘材料300。
参考回到图2所示，在像素岛20上方形成绝缘层60(例如，有机绝缘层)。该绝缘层60中可以形成有至少一个开口(例如孔600)。之后，在有机绝缘层60上方形成岛间连接线40。岛间连接线40可以通过该开口600与薄膜晶体管200(例如，其电极)电连接。岛间连接线40可以包括(例如但不限于)：与扫描信号线电连接的第一岛间连接线，与数据信号线电连接的第二岛间连接线，和/或与电源信号线电连接的第三岛间连接线等。通过该岛间连接线40，可实现相邻像素岛20间的信号连 通。
根据本公开的一些实施例，还提供了一种装置的制备方法。如图12A所示，所述方法可以包括如下步骤。在步骤S601，在柔性衬底上形成至少两个岛，相邻的岛之间通过槽隔离开，所述岛包括半导体层。在步骤S607，形成至少一个岛间连接线，各岛间连接线用于电连接对应的岛。所述至少一个岛间连接线被配置为是可拉伸的。
在一些实现方式中，所述至少岛间连接线分别跨接在对应的槽上方或容纳在对应的槽中。
根据本公开的一些实施例，还提供了一种装置的制备方法。如图12B所示，所述方法可以包括如下步骤。在步骤S601，在柔性衬底上形成至少两个岛，相邻的岛之间通过槽隔离开，所述岛包括半导体层。在步骤S603，以绝缘材料填充所述槽。所述绝缘材料可以是例如有机绝缘材料。在步骤S605，在所述岛和所述绝缘材料之上形成绝缘层，所述绝缘层包括至少一个开口。在步骤S607，在所述绝缘层之上形成所述至少一个岛间连接线，所述至少一个岛间连接线填充对应的开口并与对应的岛电连接。
在一些实现方式中，各所述岛包括用于电连接的部件，其中所述至少一个岛间连接线中的每一个与对应的岛的所述用于电连接的部件电连接。所述岛间连接线可以与所述用于电连接的部件位于不同层。
根据本公开的一些示例实施方式，还提供了一种显示装置，包括上述的装置(例如，显示基板)。该显示装置具有良好的拉伸性能，可应用于柔性显示设备，尤其适用于可穿戴设备。
应当注意，尽管在附图中以特定顺序描述了本公开中方法的各个步骤，但是，这并非要求或者暗示必须按照该特定顺序来执行这些步骤，或是必须执行全部所示的步骤才能实现期望的结果。附加的或备选的，可以省略某些步骤，将多个步骤合并为一个步骤执行，以及/或者将一个步骤分解为多个步骤执行等。
本领域技术人员在考虑说明书及实践这里公开的发明后，将容易想到本公开的其他实施例。本申请旨在涵盖本公开的任何变型、用途或者适应性变化，这些变型、用途或者适应性变化遵循本公开的一般性原理并包括本公开未公开的本技术领域中的公知常识或惯用技术手段。说明书和实施例仅被视为示例性的，本公开的真正范围和精神由权利要求指出。
应当理解的是，本公开并不局限于上面已经描述并在附图中示出的精确结构，并且可以在不脱离其范围进行各种修改和改变。本公开的范围仅由所附的权利要求来限。

Claims (20)

  1. 一种装置，包括：
    柔性衬底；
    位于所述柔性衬底上的至少两个岛，各所述岛都包括半导体层，相邻的岛之间通过槽隔离开；以及
    至少一个岛间连接线，各岛间连接线用于电连接对应的岛。
  2. 根据权利要求1所述的装置，还包括：
    填充在所述槽中的有机绝缘材料。
  3. 根据权利要求1所述的装置，其中，所述至少一个岛间连接线被配置为：
    跨接在对应的所述槽上方，或至少部分地容纳在对应的所述槽中。
  4. 根据权利要求1所述的装置，其中，所述岛间连接线由柔性材料制成或者具有适于拉伸的形状。
  5. 根据权利要求1所述的装置，其中，所述岛的形状包括圆形或者多边形，所述多边形包括三角形、菱形、矩形中的任一种。
  6. 根据权利要求1所述的装置，其中，所述岛适于在其中形成像素，所述像素包括用于接收或发送光的器件和与之关联的半导体器件。
  7. 根据权利要求1-6任一项所述的装置，还包括：
    绝缘层，位于所述至少一个岛间连接线和对应的岛之间，
    其中，所述至少一个岛间连接线通过位于所述绝缘层中的孔与对应的岛中的部件电连接。
  8. 根据权利要求7所述的装置，其中，所述绝缘层为下列中的一种：有机绝缘层或无机绝缘层。
  9. 根据权利要求1所述的装置，
    其中，所述岛包括薄膜晶体管，所述薄膜晶体管包括源极和漏极，并且
    其中，所述岛间连接线与所述源极和所述漏极位于不同层。
  10. 根据权利要求1所述的装置，其中，所述装置为显示基板或传感器基板。
  11. 根据权利要求1所述的装置，
    其中各所述岛包括：
    在所述柔性衬底之上的缓冲层；以及
    在所述缓冲层之上的所述半导体层；
    其中，所述槽延伸到所述柔性衬底。
  12. 根据权利要求1所述的装置，其中各所述岛包括用于电连接的部件，其中所述至少一个岛间连接线中的每一个与对应的岛的所述用于电连接的部件电连接，
    其中，所述岛间连接线与所述用于电连接的部件位于不同层。
  13. 一种显示装置，包括权利要求1-13中任一项所述的装置。
  14. 一种装置的制备方法，包括：
    在柔性衬底上形成至少两个岛，相邻的岛之间通过槽隔离开，所述岛包括半导体层；
    形成至少一个岛间连接线，各岛间连接线用于电连接对应的岛。
  15. 根据权利要求14所述的方法，其中所述至少一个岛间连接线被配置为是可拉伸的。
  16. 根据权利要求14所述的方法，其中，所述至少岛间连接线分别跨接在对应的槽上方或容纳在对应的槽中。
  17. 根据权利要求14所述的方法，还包括，在所述形成至少两个岛之后，且在所述形成至少一个岛间连接线之前：
    以绝缘材料填充所述槽。
  18. 根据权利要求17所述的方法，其中所述绝缘材料是有机绝缘材料。
  19. 根据权利要求17所述的方法，还包括，在以绝缘材料填充所述槽之后，且在所述形成至少一个岛间连接线之前：
    在所述岛和所述绝缘材料之上形成绝缘层，所述绝缘层包括至少一个开口；
    其中，形成至少一个岛间连接线包括：在所述绝缘层之上形成所述至少一个岛间连接线，所述至少一个岛间连接线填充对应的开口并与对应的岛电连接。
  20. 根据权利要求14所述的方法，其中各所述岛包括用于电连接的部件，其中所述至少一个岛间连接线中的每一个与对应的岛的所述用于电连接的部件电连接，
    其中，所述岛间连接线与所述用于电连接的部件位于不同层。
PCT/CN2019/074412 2018-06-26 2019-02-01 包括像素岛的装置及其制备方法以及显示装置 Ceased WO2020001032A1 (zh)

Priority Applications (3)

Application Number Priority Date Filing Date Title
US16/491,841 US11101296B2 (en) 2018-06-26 2019-02-01 Device having pixel island, preparation method thereof, and display device
EP19783406.2A EP3817057A4 (en) 2018-06-26 2019-02-01 DEVICE COMPRISING A PIXEL ISLAND AND METHOD FOR PREPARING IT, AND DISPLAY DEVICE
JP2019544688A JP7415245B2 (ja) 2018-06-26 2019-02-01 ピクセルアイランドを含む装置、ピクセルアイランドを含む装置の製造方法及び表示装置

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201810671717.7A CN108878486A (zh) 2018-06-26 2018-06-26 显示基板及其制备方法、显示装置
CN201810671717.7 2018-06-26

Publications (1)

Publication Number Publication Date
WO2020001032A1 true WO2020001032A1 (zh) 2020-01-02

Family

ID=64295752

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2019/074412 Ceased WO2020001032A1 (zh) 2018-06-26 2019-02-01 包括像素岛的装置及其制备方法以及显示装置

Country Status (5)

Country Link
US (1) US11101296B2 (zh)
EP (1) EP3817057A4 (zh)
JP (1) JP7415245B2 (zh)
CN (1) CN108878486A (zh)
WO (1) WO2020001032A1 (zh)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115440778A (zh) * 2022-08-23 2022-12-06 昆山国显光电有限公司 显示面板
EP4106000A4 (en) * 2020-03-18 2023-05-10 BOE Technology Group Co., Ltd. DISPLAY BOARD AND DISPLAY DEVICE
US20230280806A1 (en) * 2022-03-07 2023-09-07 Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd. Display panel and display terminal

Families Citing this family (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102462421B1 (ko) * 2017-11-15 2022-11-03 삼성디스플레이 주식회사 디스플레이 장치
CN108878486A (zh) * 2018-06-26 2018-11-23 京东方科技集团股份有限公司 显示基板及其制备方法、显示装置
CN109599402B (zh) * 2018-12-03 2021-02-09 京东方科技集团股份有限公司 显示基板和显示装置
CN111326067B (zh) * 2018-12-13 2022-01-28 昆山工研院新型平板显示技术中心有限公司 显示面板及其制作方法和显示装置
CN111326607B (zh) * 2018-12-14 2021-05-25 昆山工研院新型平板显示技术中心有限公司 可拉伸显示面板及其制备方法、可拉伸显示装置
CN109742119A (zh) * 2019-01-08 2019-05-10 云谷（固安）科技有限公司 可拉伸显示器件及其制备方法
CN109830505A (zh) * 2019-01-08 2019-05-31 昆山国显光电有限公司 一种显示基板和显示装置
CN109830503A (zh) * 2019-01-08 2019-05-31 云谷（固安）科技有限公司 柔性显示面板
CN109830509A (zh) * 2019-01-09 2019-05-31 云谷（固安）科技有限公司 柔性显示基板及其制备方法
CN109830510B (zh) * 2019-01-09 2021-03-16 云谷（固安）科技有限公司 可拉伸显示面板及显示装置
CN109860119B (zh) * 2019-01-10 2020-11-24 云谷（固安）科技有限公司 显示屏体及显示装置
CN109904338B (zh) * 2019-01-10 2021-09-03 云谷（固安）科技有限公司 显示屏体及显示装置
US11251237B2 (en) 2019-02-02 2022-02-15 Boe Technology Group Co., Ltd. Display substrate and manufacturing method thereof, display control method
CN111627325B (zh) * 2019-02-27 2022-05-13 昆山工研院新型平板显示技术中心有限公司 显示面板母板、显示面板及显示面板的制备方法
CN111681546B (zh) * 2019-07-26 2022-02-08 友达光电股份有限公司 元件阵列基板以及显示装置
CN110459571B (zh) 2019-08-19 2022-01-21 京东方科技集团股份有限公司 一种阵列基板、电致发光显示装置和阵列基板的制作方法
US11281046B2 (en) * 2020-03-17 2022-03-22 Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd. Backlight module, manufacturing method thereof, and display device
CN111583793B (zh) * 2020-05-12 2021-09-24 武汉华星光电半导体显示技术有限公司 柔性显示屏
CN111799280A (zh) * 2020-07-20 2020-10-20 京东方科技集团股份有限公司 显示基板及其制备方法、显示装置
CN113870695B (zh) * 2020-08-21 2024-01-26 友达光电股份有限公司 可拉伸显示器
CN112542092B (zh) * 2020-12-08 2023-05-26 合肥维信诺科技有限公司 显示面板和显示装置
CN116568091A (zh) * 2021-03-16 2023-08-08 京东方科技集团股份有限公司 显示面板、显示装置
CN113193010A (zh) * 2021-04-07 2021-07-30 武汉华星光电技术有限公司 一种阵列基板及其制备方法、oled显示面板
US20240137484A1 (en) * 2021-08-27 2024-04-25 Boe Technology Group Co., Ltd. Display panel, display apparatus and driving method therefor, and image rendering method
CN117016054A (zh) * 2022-03-02 2023-11-07 京东方科技集团股份有限公司 可拉伸显示面板及其制造方法、显示装置
CN118898972A (zh) * 2024-08-30 2024-11-05 惠科股份有限公司 显示面板和显示装置

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104347819A (zh) * 2013-07-30 2015-02-11 乐金显示有限公司 柔性有机电致发光器件及其制造方法
CN107871770A (zh) * 2016-09-27 2018-04-03 三星显示有限公司 显示装置
CN107871761A (zh) * 2016-09-23 2018-04-03 三星显示有限公司 显示装置及其制造方法
CN107994052A (zh) * 2016-10-26 2018-05-04 三星显示有限公司 显示装置
CN108878486A (zh) * 2018-06-26 2018-11-23 京东方科技集团股份有限公司 显示基板及其制备方法、显示装置

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7242398B2 (en) * 2002-02-18 2007-07-10 Ignis Innovation Inc. Flexible display device
US7452786B2 (en) * 2004-06-29 2008-11-18 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing thin film integrated circuit, and element substrate
US9269914B2 (en) * 2013-08-01 2016-02-23 Semiconductor Energy Laboratory Co., Ltd. Light-emitting device, electronic device, and lighting device
US9377817B2 (en) * 2013-08-20 2016-06-28 Semiconductor Energy Laboratory Co., Ltd. Display device
CN104576693B (zh) * 2014-12-08 2017-06-27 深圳市华星光电技术有限公司 Oled显示装置及其制造方法
KR102567547B1 (ko) * 2016-03-22 2023-08-17 삼성디스플레이 주식회사 디스플레이 장치
US10522783B2 (en) * 2016-09-30 2019-12-31 Lg Display Co., Ltd. Flexible display including protective coating layer having different thickness in bend section
KR102631257B1 (ko) * 2016-11-18 2024-01-31 삼성디스플레이 주식회사 디스플레이 장치
CN108183126B (zh) * 2017-12-31 2020-11-10 深圳市华星光电技术有限公司 一种弹性显示面板制作方法、弹性显示面板及其显示器

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104347819A (zh) * 2013-07-30 2015-02-11 乐金显示有限公司 柔性有机电致发光器件及其制造方法
CN107871761A (zh) * 2016-09-23 2018-04-03 三星显示有限公司 显示装置及其制造方法
CN107871770A (zh) * 2016-09-27 2018-04-03 三星显示有限公司 显示装置
CN107994052A (zh) * 2016-10-26 2018-05-04 三星显示有限公司 显示装置
CN108878486A (zh) * 2018-06-26 2018-11-23 京东方科技集团股份有限公司 显示基板及其制备方法、显示装置

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP3817057A4 *

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP4106000A4 (en) * 2020-03-18 2023-05-10 BOE Technology Group Co., Ltd. DISPLAY BOARD AND DISPLAY DEVICE
US20230280806A1 (en) * 2022-03-07 2023-09-07 Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd. Display panel and display terminal
CN115440778A (zh) * 2022-08-23 2022-12-06 昆山国显光电有限公司 显示面板

Also Published As

Publication number Publication date
EP3817057A4 (en) 2022-03-09
CN108878486A (zh) 2018-11-23
JP2021528668A (ja) 2021-10-21
JP7415245B2 (ja) 2024-01-17
US20200381455A1 (en) 2020-12-03
US11101296B2 (en) 2021-08-24
EP3817057A1 (en) 2021-05-05

Similar Documents

Publication Publication Date Title
WO2020001032A1 (zh) 包括像素岛的装置及其制备方法以及显示装置
US10559603B2 (en) Display panel and display apparatus thereof
CN105390095B (zh) 有机发光二极管显示设备及其制造方法
CN106469745A (zh) 有机发光二极管显示器及其制造方法
KR101466488B1 (ko) 표시장치 및 그 제조방법
CN106707646A (zh) 一种阵列基板和显示面板
CN110416254B (zh) 阵列基板及显示面板
CN115224222A (zh) 显示面板及其制备方法、显示装置
CN103064223B (zh) 一种阵列基板和一种显示面板
CN107833908A (zh) 异形显示面板和液晶显示装置及有机电致发光显示装置
CN112234092A (zh) 显示面板及显示装置
JP7410152B2 (ja) アレイ基板及び表示装置
WO2021190034A1 (zh) 显示基板、其制备方法及显示装置
CN110911445B (zh) 显示装置
TWI569426B (zh) 畫素陣列結構、顯示面板以及畫素陣列結構的製作方法
CN217562567U (zh) 显示基板和显示装置
WO2024007435A1 (zh) 显示面板
CN116206562B (zh) 显示面板及显示装置
WO2022057542A1 (zh) 一种显示背板及其制备方法、显示装置
CN111383572B (zh) 具有由四个子像素构成的单位像素的显示装置
CN115666176A (zh) 显示装置
WO2023122874A1 (zh) 显示面板和显示装置
WO2015003461A1 (zh) 阵列基板及显示器
WO2019075951A1 (zh) 显示基板及其制作方法
CN117796178A (zh) 显示基板及其制备方法、显示装置

Legal Events

Date Code Title Description
ENP Entry into the national phase

Ref document number: 2019544688

Country of ref document: JP

Kind code of ref document: A

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 19783406

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

ENP Entry into the national phase

Ref document number: 2019783406

Country of ref document: EP

Effective date: 20210126