WO2020063652A1 - 一种pfc过流保护电路及控制器 - Google Patents

一种pfc过流保护电路及控制器 Download PDF

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Publication number
WO2020063652A1
WO2020063652A1 PCT/CN2019/107772 CN2019107772W WO2020063652A1 WO 2020063652 A1 WO2020063652 A1 WO 2020063652A1 CN 2019107772 W CN2019107772 W CN 2019107772W WO 2020063652 A1 WO2020063652 A1 WO 2020063652A1
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WIPO (PCT)
Prior art keywords
circuit
signal
control
pfc
output
Prior art date
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Ceased
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PCT/CN2019/107772
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English (en)
French (fr)
Inventor
吕勇松
王祺
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Hangzhou Leaderway Electronics Co Ltd
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Hangzhou Leaderway Electronics Co Ltd
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Priority to US17/050,425 priority Critical patent/US11444566B2/en
Priority to EP19867584.5A priority patent/EP3879655A4/en
Publication of WO2020063652A1 publication Critical patent/WO2020063652A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
    • H02P23/00—Arrangements or methods for the control of AC motors characterised by a control method other than vector control
    • H02P23/26—Power factor control [PFC]
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H3/00—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
    • H02H3/08—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to excess current
    • H02H3/087—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to excess current for DC applications
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H3/00—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
    • H02H3/02—Details
    • H02H3/06—Details with automatic reconnection
    • H02H3/066—Reconnection being a consequence of eliminating the fault which caused disconnection
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H7/00—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
    • H02H7/10—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers
    • H02H7/12—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers
    • H02H7/125—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers for rectifiers
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
    • H02P29/00—Arrangements for regulating or controlling electric motors, appropriate for both AC and DC motors
    • H02P29/02—Providing protection against overload without automatic interruption of supply
    • H02P29/024—Detecting a fault condition, e.g. short circuit, locked rotor, open circuit or loss of load
    • H02P29/027—Detecting a fault condition, e.g. short circuit, locked rotor, open circuit or loss of load the fault being an over-current
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/08—Modifications for protecting switching circuit against overcurrent or overvoltage
    • H03K17/082—Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit
    • H03K17/0828—Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit in composite switches
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/20—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/037—Bistable circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/22—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral
    • H03K5/24—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude

Definitions

  • the invention relates to the technical field of circuit protection, in particular to an overcurrent protection circuit and a controller.
  • Circuit overcurrent protection is a basic requirement of the circuit, such as motor overcurrent protection, PFC overcurrent protection, motor drive circuits and PFC (Power Factor Correction) circuits are widely used in air-conditioning controllers, motor drive circuits and PFC circuits.
  • the reliability of the controller directly affects the reliability of the controller, and the overcurrent protection circuit can improve the reliability of the controller.
  • software is commonly used to implement the overcurrent protection function, but the response speed of this method is slow.
  • embodiments of the present invention provide an overcurrent protection circuit and a controller, which implement circuit overcurrent protection using hardware.
  • An overcurrent protection circuit includes a sampling circuit, a comparison circuit, a D flip-flop, and an output signal control circuit;
  • the sampling circuit is configured to sample the current of the controlled branch to obtain a sampling signal, and output the sampling signal to the comparison circuit;
  • the comparison circuit compares the sampling signal with a reference signal, and generates an overcurrent signal when the sampling signal is greater than the reference signal, and outputs the overcurrent signal to the D flip-flop;
  • the D flip-flop receives the overcurrent signal, generates a first level signal according to the overcurrent signal, and outputs the first level signal to the output signal control circuit;
  • the output signal control circuit receives the first level signal and outputs a control signal that reduces the current of the controlled branch in response to the first level signal.
  • the delay of the overcurrent protection is realized by the D flip-flop, which can improve the reaction speed of the overcurrent protection and further improve the protection reliability.
  • an embodiment of the present application further provides a PFC overcurrent protection circuit, including a sampling circuit, a comparison circuit, a D flip-flop, and an output signal control circuit;
  • the sampling circuit samples the current of the PFC circuit to obtain a sampling signal, and outputs the sampling signal to the comparison circuit;
  • the comparison circuit compares the sampling signal with a reference signal, and generates an overcurrent signal when the sampling signal is greater than the reference signal, and outputs the overcurrent signal to the D flip-flop;
  • the D flip-flop receives an over-current signal, generates a first level signal, and outputs the first level signal to the output signal control circuit.
  • Terminal receives the PWM control signal that drives the PFC main switch;
  • the output signal control circuit receives the first level signal and outputs a shutdown control signal to turn off the PFC main switch in response to the first level signal.
  • a controller for controlling an air conditioner includes a controlled branch and an overcurrent protection circuit according to any one of the embodiments of the present application.
  • the output current of the PFC circuit is sampled by the sampling circuit, and the comparison circuit compares the sampling signal with a reference signal. When it is greater than the reference signal, an overcurrent signal is generated, the D flip-flop generates a first level signal according to the overcurrent signal, and the output signal control circuit is configured to generate a shutdown PFC master according to the first level signal.
  • the switch-off control signal of the switch tube realizes the overcurrent protection of the PFC circuit, and the circuit responds to the execution completely by hardware, and has a fast response speed and does not occupy MCU resources in the PFC circuit.
  • FIG. 1 is a schematic circuit diagram of a PFC overcurrent protection circuit in the prior art
  • FIG. 2 is a schematic block diagram of an overcurrent protection circuit disclosed in an embodiment of the present application.
  • FIG. 3 is a schematic circuit diagram of a PFC overcurrent protection circuit disclosed by another embodiment of the present application.
  • FIG. 4 is a schematic circuit diagram of a PFC overcurrent protection circuit disclosed by another embodiment of the present application.
  • FIG. 5 is a timing diagram of an operation process of the PFC overcurrent protection circuit disclosed in the embodiment of FIG. 3;
  • FIG. 6 is a schematic circuit diagram of a PFC overcurrent protection circuit disclosed by another embodiment of the present application.
  • FIG. 7 is a schematic circuit diagram of a PFC overcurrent protection circuit disclosed by another embodiment of the present application.
  • FIG. 8 is a schematic block diagram of an overcurrent protection circuit disclosed in another embodiment of the present application.
  • FIG. 9 is a schematic block diagram of an overcurrent protection circuit disclosed in another embodiment of the present application.
  • FIG. 10 is a schematic circuit diagram of a PFC overcurrent protection circuit disclosed by another embodiment of the present application.
  • over-current protection circuits are often provided; in the circuit design of air-conditioning controllers, circuits that require over-current protection include but are not limited to PFC circuits Compressor drive circuit, fan drive circuit, etc.
  • the compressor driving circuit and the fan driving circuit may be collectively referred to as a motor driving circuit, and a current control unit is provided in the driving circuit.
  • the current control unit of the PFC circuit and the current control unit of the motor can control the amount of current in the PFC circuit and the motor drive current loop.
  • FIG. 1 is a circuit diagram of a PFC overcurrent protection.
  • the PFC circuit is a boost circuit, and the PFC circuit includes:
  • An inductor L connected at a first end to a positive output terminal of the rectifier bridge DB, the rectifier bridge DB may be considered as a pre-stage circuit of the PFC circuit, and the rectifier bridge DB may be directly or indirectly connected to the rectifier bridge DB;
  • a first diode D1 having an anode connected to the second end of the inductor L, and a cathode of the first diode D1 being an output positive terminal of the PFC circuit, and connected to the first capacitor C1;
  • IGBT whose first end is connected to the second end of the inductor L, and the IGBT is a PFC main switch of the PFC circuit, wherein in the view disclosed in FIG. 1, the IGIGBT collector is used as the first of the IGBT Terminal, the base is used as the control terminal of the IGBT, and the emitter is used as the second terminal of the IGBT.
  • the PFC control circuit also includes an IGBT drive circuit and a microprocessor MCU.
  • the on-off of the main switching transistor IGBT is controlled by the IGBT driving circuit, and the IGBT driving circuit is used for controlling a PWM control signal output by a microprocessor MCU. Controls the on and off of the PFC main switch IGBT.
  • the output end of the microprocessor MCU is connected to the input end of the IGBT drive circuit, and is used to provide a PWM control signal to the IGBT drive circuit.
  • the IGBT drive circuit controls the on-off of the main switch IGBT according to the PWM control signal. For example, when the PWM control signal is at a low level, the main switch IGBT is controlled to be turned off, and when the PWM control signal is at a high level, the main switch IGBT is controlled to be turned on.
  • the PFC overcurrent protection circuit generally includes:
  • a first terminal connected to the second terminal of the IGBT, and a first resistor R1 with the second terminal grounded;
  • a ninth resistor R9 with a first terminal connected to the second terminal of the IGBT;
  • a first comparator U1 whose non-inverting input terminal is connected to the second terminal of the ninth resistor R9;
  • a fourth capacitor C4 connected at one end to the non-inverting input terminal of the first comparator U1 and grounded at the other end;
  • a reference power generation circuit connected to the inverting input terminal of the first comparator U1, the reference power generation circuit includes: a first resistor R5 connected to the power supply VCC at a first end; and a fifth resistor R5 connected at one end to the fifth resistor R5.
  • An output terminal of the first comparator U1 is connected to a non-inverting input terminal of the first comparator U1 through a second diode D2 and a fourth resistor R4 connected in series;
  • a sixth resistor R6 with one end connected to the output terminal of the first comparator U1 and the other end connected to the current source VCC;
  • An eighth resistor R8 with a first terminal connected to an output terminal of the first comparator U1, and a second terminal of the eighth resistor R8 connected with an input terminal of the microprocessor MCU;
  • a second resistor R2 whose first end is connected to the output end of the microprocessor MCU;
  • An IGBT driving circuit having an input terminal connected to the second terminal of the second resistor R2 and an output terminal connected to the control terminal of the IGBT;
  • An RC filter circuit connected to the second end of the second resistor R2, the RC filter circuit includes a third resistor R3 and a third capacitor C3 connected in parallel; one common terminal of the third resistor R3 and the third capacitor C3 The second terminal of the second resistor R2 is connected, and the other common terminal is grounded.
  • the IGBT current is sampled at the second terminal of the IGBT through the first resistor R1, and the sampling signal is sent to the first comparator U1.
  • the first comparator detects that the sampling signal exceeds a reference signal of a set value output by the reference power generating circuit, the output voltage of the first comparator U1 changes from low level to high level, and the MCU After receiving the level change, a control signal is output, and the IGBT is controlled to be turned off by the IGBT driving circuit, so as to prevent the output current of the PFC circuit from being excessively large, and to achieve the effect of overcurrent protection.
  • the output signal of the MCU is implemented by software, so there are the following disadvantages: the response speed will be relatively slow, and the processing process will occupy more MCU resources.
  • an embodiment of the present application provides an overcurrent protection circuit. As shown in FIG. 2, the sampling circuit 100, the comparison circuit 200, the D flip-flop 300, and the output signal control circuit 400;
  • the sampling circuit 100 is configured to sample the current of the controlled branch, obtain a sampling signal, and output the sampling signal to the comparison circuit 200; for example, the sampling circuit 100 samples the current of the PFC circuit or the current of the motor drive current loop.
  • the comparison circuit 200 compares a sampling signal with a reference signal. When the sampling signal is greater than the reference signal, an overcurrent signal is generated and the overcurrent signal is output to the D flip-flop; the sampling signal represents a controlled branch. The current of the circuit and the reference signal correspond to the maximum current allowed by the controlled branch. When the current of the controlled branch is greater than the maximum allowed current, the circuit overcurrent occurs. At this time, the comparison circuit generates an overcurrent signal.
  • the D flip-flop 300 receives the overcurrent signal, generates a first level signal according to the overcurrent signal, and outputs the first level signal to the output signal control circuit;
  • the output signal control circuit 400 receives the first level signal and outputs a control signal that reduces the current of the controlled branch in response to the first level signal.
  • the above-mentioned overcurrent protection circuit is applied in a PFC circuit or a motor drive circuit; the two circuits have in common that by using a PWM control signal to control the working state of a corresponding controllable switch tube, it can be controlled Their operating current. Therefore, their current control unit often contains an MCU chip, which can output PWM control signals.
  • the overcurrent protection circuit further includes a current control unit 500. An input end of the output signal control circuit 400 is connected to the current control control unit 500, and receives a PWM control signal output by the current control unit.
  • the output terminal of the output signal control unit 400 is connected to a controllable switch tube for controlling the current of the controlled branch, and controls the controllable switch tube according to the PWM control signal and the first level signal. Specifically, when the output signal control circuit 400 does not receive the first level signal, the current control unit 500 outputs the PWM control signal through the output signal control circuit 400 to a circuit for controlling the current of the controlled branch. On the controllable switch tube, current control of the controlled branch is performed. When the output signal control circuit 400 receives the first level signal, the output signal control circuit 400 pulls the PWM control signal low or high, thereby blocking the output of the PWM control signal to the current for controlling the current of the controlled branch. Controllable switch; therefore, the controllable switch does not work, thereby reducing the current of the controlled branch and achieving the effect of overcurrent protection.
  • the controlled branch may be a PFC loop.
  • the current of the controlled circuit is the current of the PFC loop
  • the current control circuit is a PFC control circuit.
  • the sampling circuit is placed in the PFC loop, such as with The PFC circuit's switch tube is connected in series, the PFC circuit's switch tube current is used to characterize the PFC current, or it is connected in series with the PFC circuit's freewheeling diode to characterize the PFC current, or it is directly connected in series to the PFC main circuit to directly sample the PFC Current.
  • a sampling circuit is used to sample the current of the PFC circuit to obtain a corresponding sampling signal.
  • the comparison circuit receives the sampling signal and compares it with a reference signal.
  • an overcurrent signal is generated and output to the D trigger.
  • the D trigger generates a first level signal according to the overcurrent signal, and outputs the first level signal to the current control unit.
  • the current control unit controls the current of the controlled branch to decrease according to the first level signal.
  • the D trigger When the D trigger receives the overcurrent signal, it can quickly generate the first level signal and act on the controllable switch tube that controls the current of the controlled branch, quickly reducing the current of the controlled branch, thereby achieving overcurrent protection. Fast response.
  • the controlled branch can also be a motor drive circuit, such as a compressor / fan drive circuit.
  • the current of the controlled circuit is the drive current of the compressor / fan, which can specifically be the drive current of each phase of the compressor / fan, that is, the phase.
  • the current can also be the total current driven by the compressor / fan, and the current control unit is the compressor drive control circuit.
  • the output terminal of the D flip-flop 300 is connected to a digital IO port of the current control unit.
  • Port 2 is configured to output and send a second level signal to the current control unit 500 when the D flip-flop 300 generates a first level signal, wherein the second level signal characterizes the First level signal;
  • Another digital IO port (port 3) of the current control unit 500 is connected to the reset terminal of the D flip-flop, and is configured to output a protection reset signal to the D flip-flop.
  • the D flip-flop receives the protection, When the signal is reset, the output of the first level signal is stopped.
  • the Q terminal of 300 of the D flip-flop generates and outputs a first level signal
  • the terminal generates a second level signal.
  • the second level signal is opposite to the first level signal, that is, the second level signal opposite to the first level signal is used to characterize the first level signal;
  • the first level signal is directly characterized by the first level signal, that is, when the D flip-flop 300 generates the first level signal, it outputs and sends the first level signal to the port 2 of the current control unit 500.
  • the current control unit can know that the circuit has entered the overcurrent protection stage; the current control unit 500 can set the overcurrent protection time, that is, the current control unit 500 is set to receive the second level signal
  • the time to output the protection reset signal can be extended by the setting of the overcurrent protection time in the current control unit, which further improves the protection reliability and the adjustable time of the protection time.
  • the controlled branch includes a motor drive current loop
  • the controlled branch includes a motor drive current loop
  • the current of the motor drive current loop is converted by an inverter circuit including 6 IGBTs, wherein the The control signal for controlling the current reduction of the branch is a control signal for turning off the 6 IGBTs.
  • the inverter circuit in the motor drive is a common technology, and it will not be described here.
  • the control signal for reducing the current of the controlled branch is a control signal for turning off the PFC main switch.
  • the specific setting may be as shown in FIG. 10.
  • the sampling circuit 100 includes a sampling resistor R1 connected in series with the PFC main switch.
  • the voltage on R1 is a sampling voltage, and the sampling voltage is output to the comparator U1 in the comparison circuit 200.
  • the positive input terminal is compared with the reference signal, where the reference signal is obtained by dividing the voltage VCC by R5 / R7.
  • a signal processing circuit may be set to amplify the sampling signal before inputting it to the comparison circuit 200.
  • the Q terminal of the D flip-flop outputs a high level, and controls the second switch Q2 to be turned on, so that the second input terminal of the second AND gate circuit U3 is low.
  • the second AND gate circuit U3 outputs a low level, and the main switch IGBT is turned off by the low level output from the second AND gate circuit U3.
  • the output of the comparison circuit 200 is connected to the CK port of the D flip-flop, the D flip-flop D port and The port is connected to a power source.
  • the PWM control signal output terminal (port 1) of the MCU of the current control unit 500 is connected to the output signal control circuit 400, and sends the PWM control signal to the output signal control circuit 400.
  • Port 2 of the MCU is connected to the D flip-flop Port to receive the second level signal;
  • port 3 of the MCU is connected to the reset terminal of the D flip-flop ( End), when the MCU receives When the second level signal sent from the port, it is learned that the circuit is in overcurrent protection. After a preset overcurrent protection time, port 3 sends a protection reset signal to the D flip-flop.
  • the circuit 400 is passed to the PFC main switch to control the PFC circuit current.
  • the IGBT driving circuit in the figure is to improve the driving ability of the PWM control signal.
  • FIG. 10 represents only one embodiment.
  • the output signal control circuit 400 can also be implemented in other ways, and the connection mode of the D flip-flop can also be changed according to the specific protection logic.
  • the D-flip-flop can be used to achieve a fast response of the overcurrent protection, but also the overcurrent protection time can be set using the current control unit, thereby extending the overcurrent protection time and improving the protection reliability.
  • an embodiment of the present application further provides an overcurrent protection circuit.
  • the D flip-flop 300 The reset terminal is connected to a PWM control signal output terminal of the current control unit, and is configured to receive the PWM control signal and reset the D flip-flop according to a rising edge or a falling edge of the PWM control signal, so that all the D flip-flops are reset.
  • the D flip-flop stops outputting the first level signal. In other words, within each PWM control signal period, the first level signal can be reset (the D flip-flop stops outputting the first level signal), thereby realizing the reset of the overcurrent protection.
  • the controlled branch circuit includes a motor drive current circuit
  • the current of the motor drive current circuit is converted by an inverter circuit including 6 IGBTs, and the control signal for reducing the current of the controlled branch circuit is turned off.
  • the control signal of IGBT is described.
  • the control signal for reducing the current of the controlled branch is a control signal for turning off the PFC main switch; in one embodiment, the D trigger is shown in FIG. 3
  • the receiver receives the overcurrent signal, generates a first level signal, and outputs the first level signal to the output signal control circuit 400.
  • the terminal receives a PWM control signal output by the current control unit; wherein the current control unit includes an MCU chip.
  • the output signal control circuit receives the first level signal, and the D flip-flop outputs the first level signal to the output signal control circuit. Receiving the PWM control signal output by the current control unit;
  • the output signal control circuit receives the first level signal and outputs a first control signal that reduces the current of the controlled branch to the current control unit in response to the first level signal.
  • the current control unit is based on The first control signal controls the current of the controlled branch to decrease.
  • the reduction includes reducing the current and turning off the current, that is, reducing the current to zero.
  • PFC overcurrent protection circuit including:
  • the sampling circuit 100 is configured to sample a current of a PFC circuit, obtain a sampling signal, and output the sampling signal to the comparison circuit.
  • the sampling circuit 100 may be connected in series with a main switching transistor IGBT in the PFC circuit. In a manner, a current flowing through the main switch IGBT is used as an output current of the PFC circuit.
  • the sampling circuit 100 may also be provided in a main loop in the PFC circuit, and the output current of the PFC circuit is sampled by detecting a current in the main loop in the PFC circuit.
  • the specific structure of the sampling circuit 100 may be set according to user requirements.
  • the sampling circuit 100 may include a first resistor R1, a first terminal of the first resistor R1 and the PFC.
  • a signal processing circuit may be provided between the non-inverting input terminal of the sampling circuit 100 and the comparison circuit 200, and the signal processing circuit may be a reverse processing circuit for The negative voltage characterizing the current is reversed to obtain a positive voltage and then input to the non-inverting input of the comparison circuit 200.
  • the signal processing circuit may also be a differential circuit. The differential circuit is used to obtain the sampling voltage characterizing the current and then input to the non-inverting input of the comparison circuit. .
  • the comparison circuit 200 compares the sampling signal with a reference signal, and when the sampling signal is larger than the reference signal, generates an overcurrent signal, and outputs the overcurrent signal to the D flip-flop;
  • the input of the non-inverting input of the comparison circuit is connected to the output of the sampling circuit.
  • the comparison circuit 200 may be composed of a first comparator U1 and its peripheral circuits.
  • the peripheral circuit may include: An eighth resistor R8, a sixth resistor R6, a second diode D2, a fourth resistor R4, a ninth resistor R9, and a fourth capacitor C4; the non-inverting input terminal of the first comparator U1 is used as the first of the comparison circuits.
  • the input terminal is connected to the output terminal of the sampling circuit 100, and the inverting input terminal of the first comparator U1 is used as the second input terminal of the comparison circuit to obtain a reference signal output by the reference signal generating circuit.
  • the reference signal generating circuit is configured to provide a reference signal to an inverting input terminal of the comparison circuit 200. Referring to FIG. 1, its structure may include a second capacitor C2, a fifth resistor R5, and a seventh resistor R7.
  • the reference signal generating circuit may also be used as a part of the PFC overcurrent protection circuit;
  • the D flip-flop 300 receives an over-current signal, generates a first level signal, and outputs the first level signal to the output signal control circuit; the D flip-flop 300 is based on an output of the comparison circuit 200 The signal controls its output.
  • the D flip-flop 300 When an over-current signal is output from the comparison circuit 200, the D flip-flop 300 generates and outputs a first-level signal, otherwise the first-level signal is not generated, where the first The level signal may be a high-level signal or a low-level signal; and, the The terminal receives a PWM control signal that controls the main PFC switch, such as receiving a PWM control signal from an MCU in the current control circuit 500, and using the PWM control signal from the MCU as a clock signal for the D flip-flop.
  • the output signal control circuit 400 receives the first level signal to generate a shutdown control signal to turn off the PFC main switch, so that the current of the PFC circuit is reduced.
  • the shutdown control signal may be a low-level signal.
  • the output signal control circuit 400 obtains the first level signal, it controls the main switch IGBT in the PFC circuit to be turned off. Specifically, it can directly provide the control terminal of the main switch IGBT.
  • the main switch IGBT is turned off by means of a level signal, and the main switch IGBT can also be turned off by providing a low level signal to the IGBT drive circuit of the main switch IGBT.
  • the sampling circuit 100 samples the current of the PFC circuit in real time, and the comparison circuit 200 compares the sampling voltage collected by the sampling circuit 100 with a reference signal.
  • the comparison circuit 200 outputs an overcurrent signal to the D flip-flop 300, and the D flip-flop generates a first level signal.
  • the output signal control circuit 400 controls the PFC.
  • the main switch IGBT in the circuit is turned off. After the main switch IGBT is turned off, the sampling signal of the sampling circuit 100 will be smaller than the reference signal.
  • the comparison circuit 200 stops outputting the overcurrent signal, and the D flip-flop 300 will keep outputting.
  • the first level signal up to the D flip-flop The terminal becomes low level, so that the output signal control circuit 400 releases control of the main switching transistor IGBT, so that the PFC circuit works normally. It can be seen that in this process, the overcurrent protection and release of the PFC circuit is implemented by hardware, without the participation of software, so some software resources can be released.
  • a specific linking manner of the D flip-flop port is also defined.
  • the D flip-flop 300, the CK port of the D flip-flop, and The output terminal of the comparison circuit 200 is connected, and D and D of the D flip-flop are connected.
  • the port is pulled up and connected to a power source.
  • the D flip-flop 300 is configured to generate and output a first-level signal when a high level is input to the CK port. See FIG. 3.
  • the port is specifically configured as: The port is grounded through a fifth capacitor C5, and the D port of the D flip-flop is connected to the power source VCC through a tenth capacitor R10.
  • the port collects a clock signal through the eleventh capacitor R11 and is grounded through the seventh capacitor C7.
  • This clock signal can be a PWM control signal provided by the microprocessor MCU.
  • the IGBT driving circuit controls the main switch IGBT to be turned on.
  • the main switch A current flows through the IGBT, and the current direction of the PFC circuit is as follows:
  • the IGBT driving circuit controls the main switch IGBT to turn off. At this time, no current flows through the IGBT.
  • the current direction of the PFC circuit is as follows:
  • the first resistor R1 in this circuit samples the current at the second terminal of the main switching transistor IGBT, converts the current into a corresponding voltage, and inputs the current to the non-inverting input terminal of the comparison circuit 200.
  • the voltage of the inverting input terminal of the comparison circuit 200 is a reference voltage provided by a reference power generation circuit.
  • the reference power generation circuit can also be used as a part of the overcurrent protection circuit. For a specific structure, refer to FIG. 1.
  • Overcurrent protection The setting method of the value Itrip is as follows:
  • the comparison circuit 200 compares the sampling voltage with a reference voltage. If it is greater than the reference voltage, it means that the current of the PFC circuit has exceeded the set overcurrent protection value, and the D flip-flop generates the first level signal at this time.
  • the D trigger described in this application can be passed
  • the port or Q port is connected to the output signal control circuit 400.
  • the port or Q port provides the first level signal to the output signal control circuit 400.
  • the output terminal of the output signal control circuit 400 is connected to the main switch control terminal of the PFC circuit. At this time, the output The output end of the signal control circuit 400 may be directly connected to the control end of the main switch tube at the time. Of course, it may also be connected to the control end of the main switch tube through the drive circuit of the main switch tube, as long as it can be guaranteed It is sufficient that the conduction state of the main switch tube follows the output signal of the output signal control circuit 400.
  • the L indicates a low level
  • H indicates a high level
  • X indicates no signal
  • ⁇ indicates a rising edge
  • the present application also discloses a specific structure of the output signal control circuit 400, which may include:
  • a third diode D3, a cathode of the third diode D3 is used as an input terminal of the output signal control circuit 400, and The terminals are connected, and the anode of the third diode D3 is used as the output terminal of the output signal control circuit to be connected to the control terminal of the main switch IGBT of the PFC circuit.
  • the sampling signal is greater than the reference signal
  • the The port outputs a low-level signal.
  • the anode of the third diode D3 is also a low-level signal. That is, the output signal control circuit 400 outputs a low-level signal to the PFC circuit.
  • the low-level signal controls the main switch IGBT to be turned off.
  • the PFC circuit has no current output, and the comparison circuit outputs a low level. Port keeps level signal output until D flip-flop After the terminal goes low, the The port changes from low level to high level. At this time, the IGBT driving circuit continues to drive the main switch IGBT to work normally.
  • the output signal control circuit 400 may also include:
  • a first end of the first switching tube Q1 is an output terminal of the output signal control circuit connected to the PFC circuit, and a second end of the first switching tube Q1 is grounded;
  • the control terminal is connected to the Q port of the D flip-flop 300 as an input terminal of the output signal control circuit.
  • the Q port of the D flip-flop outputs a high-level signal.
  • the first switch Q1 is turned on, and the first switch The output terminal of Q1 is at a low level, that is, the output signal control circuit 400 outputs a low-level signal to the PFC circuit, and the main-switch IGBT is turned off by the low-level signal.
  • the The PFC circuit has no current output, the comparison circuit outputs a low level, and the Q port of the D flip-flop keeps a high level signal output until the D flip-flop. Terminal becomes low level, the IGBT driving circuit continues to drive the main switch IGBT to work normally.
  • the first switching transistor Q1 may be an NPN transistor, a base of the NPN transistor is used as an input terminal, an emitter is used as an output terminal, and a collector is used as a control terminal.
  • the output signal control circuit 400 may further include a setting. A sixteenth resistor R16 between the base and the emitter of the NPN transistor, and a seventeenth resistor R17 provided between the base of the NPN transistor and the Q terminal of the D flip-flop 400.
  • the output signal control circuit 400 disclosed in FIG. 3 and FIG. 4 may be connected as a bypass circuit to the input terminal of the PWM control signal of the IGBT driving circuit, that is, all
  • the output signal of the output signal control circuit 400 is superimposed on the PWM control signal output by the microprocessor MCU, and then sent to the IGBT drive circuit, and the IGBT drive circuit controls the main switch tube according to the superimposed PWM control signal.
  • IGBT on and off.
  • the PWM control signal is pulled down to a low level signal.
  • the IGBT driving circuit obtains a low-level PWM control signal to control the PWM control signal.
  • the main switch IGBT is turned off.
  • FIG. 5 introduces the working process of the over-current protection circuit disclosed in FIG. 3, with respect to the embodiment in FIG. 3;
  • the microprocessor MCU in the current control unit 500 continuously outputs a PWM control signal, and the output current of the PFC circuit changes with the PWM control signal.
  • the output current of the PFC circuit exceeds a set
  • the output voltage of the comparison circuit 200 changes from low level to high level.
  • the output of the terminal is controlled by the output signal of the compared circuit, so that the The port outputs a low level, and the main switch IGBT is turned off by the low level, so that the output current of the PFC circuit is 0 to achieve overcurrent protection.
  • the output current of the PFC circuit is 0.
  • the comparison circuit 200 has no output. Output remains low until D flip-flop Terminal becomes low level, after that, the IGBT driving circuit continues to drive the main switch IGBT to work normally.
  • the output signal control circuit 400 disclosed in the embodiment of the present application may also include a first AND gate circuit U2; specifically, refer to FIG. 6:
  • a first input terminal of the first AND circuit U2 is used to obtain a PWM control signal input to a main switch control terminal of the PFC circuit; a second input terminal of the first AND circuit U2 is used as the output signal.
  • the input terminal of the control circuit and the current source VCC and the D flip-flop The output terminal of the first AND gate circuit U2 is used as the output terminal of the output signal control circuit and is connected to the main switch control terminal of the PFC circuit for providing the PFC circuit for controlling The control signal for turning off the main switch IGBT is described.
  • the Terminal when the PFC circuit is over-current, the Terminal outputs a low level, so that the second input terminal of the first AND circuit U2 inputs a low level, and at the same time, the PWM control signal input from the first input terminal of the first AND circuit U2 is high voltage. Therefore, the first AND gate circuit U2 outputs a low level, and the main switch IGBT is turned off by the low level output from the first AND gate circuit U2.
  • the output signal control circuit 400 disclosed in the embodiment of the present application may also include:
  • a first input terminal of the second AND circuit U3 is used to obtain a PWM control signal input to the PFC circuit.
  • a second input terminal of the second AND circuit U3 is connected to a power source and the second switch Q2. The first end of the U2 is connected, and the output of the second AND circuit U3 is connected to the PFC circuit as the output of the output signal control circuit;
  • a first end of the second switch Q2 is connected to a second input end of the second AND gate circuit U3;
  • a second end of the second switching tube Q2 is grounded
  • the control terminal of the second switch Q2 is connected to the Q terminal of the D flip-flop as an input terminal of the output signal control circuit.
  • the Q terminal of the D flip-flop when the PFC circuit is overcurrent, the Q terminal of the D flip-flop outputs a high level, and controls the second switch Q2 to be turned on, so that the second input of the second AND gate circuit U3 Terminal is low level.
  • the PWM control signal input from the first input terminal of the second AND circuit U3 is high level. Therefore, the second AND circuit U3 outputs a low level.
  • the low level output from the second AND gate circuit U3 controls the main switch IGBT to be turned off.
  • the second switching transistor may be an NPN-type transistor, with a base of the NPN-type transistor as an input terminal, an emitter as an output terminal, and a collector as a control.
  • the output signal control circuit 400 may further include a sixteenth resistor R16 provided between the base and the emitter of the NPN type transistor, and a base and a D flip-flop 400 provided between the NPN type transistor and the emitter. The seventeenth resistor R17 between the Q terminals.
  • the first AND circuit U2 and the second AND circuit U3 disclosed in the embodiment of the present application may be disposed between the microprocessor MCU and the IGBT driving circuit of the PFC circuit.
  • the output signal control circuit 400 does not control the main switch IGBT to be turned off
  • the PWM control signal is forwarded to the IGBT driving circuit.
  • the main switch IGBT is turned off due to overcurrent
  • the output current of the PFC circuit is 0, and the IGBT is continuously protected until the D flip-flop is turned off. Terminal becomes low level, and then the input signals of the second input terminals of the first AND circuit U2 and the second AND circuit U3 become high level again.
  • the first AND circuit U2 The output level of the second AND gate circuit U3 is the level of the PWM control signal. Therefore, after the next cycle of the PWM control signal arrives, the first AND gate circuit U2 and the second AND circuit The output of the gate circuit U3 only follows the PWM control signal, so the on-state of the main switch IGBT can continue to be controlled by the PWM control signal.
  • the overcurrent protection and restoration of the protection of the PFC circuit are implemented by hardware, without the participation of software, so some software resources can be released; the overcurrent of PFC The protection is protected by pulse by pulse.
  • the next PWM control signal can be output normally to drive the main IGBT in the PFC, which can improve Current waveform.
  • the present application also discloses a controller applying the PFC overcurrent protection circuit.
  • the controller is used to control an air conditioner or other load equipment.
  • the controller includes a PFC circuit and applies the present application.
  • the PFC circuit may be a boost circuit, including:
  • An inductance L connected at the first end to the positive output end of the rectifier bridge DB;
  • a first diode D1 having an anode connected to a second end of the inductor L, and a cathode of the first diode D1 connected to a load;
  • the IGBT whose collector is connected to the second end of the inductor L and whose emitter is grounded through a sampling resistor.
  • the IGBT is a PFC main switch of the PFC circuit.

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Abstract

本申请提供了一种过流保护电路及控制器，该过流保护电路包括采样电路、比较电路、D触发器和输出信号控制电路；所述采样电路用于采样被控支路的电流，得到采样信号，并将所述采样信号输出至所述比较电路；所述比较电路对所述采样信号和基准信号进行比较，当所述采样信号大于所述基准信号时，生成过流信号，并将所述过流信号输出至所述D触发器；所述D触发器接收所述过流信号，并根据所述过流信号生成第一电平信号，并将所述第一电平信号输出至所述输出信号控制电路；所述输出信号控制电路接收所述第一电平信号，响应于所述第一电平信号输出使被控支路的电流减小的控制信号。该电路通过D触发器快速实现过流保护，提高保护可靠性。

Description

一种PFC过流保护电路及控制器
本申请要求于2018年09月29日提交中国专利局、申请号为201811144713.X、发明名称为“一种PFC过流保护电路及控制器”的国内申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本发明涉及电路保护技术领域，具体涉及一种过流保护电路及控制器。
背景技术
电路的过流保护是电路基本要求，比如电机过流保护、PFC过流保护，电机驱动电路和PFC(Power Factor Correction：功率因素校正)电路广泛运用在空调控制器中，电机驱动电路和PFC电路的可靠性直接影响控制器的可靠性，过流保护电路能够提高控制器的可靠性；目前，常用软件方式实现过流保护功能，但是这种方式的响应速度较慢。
发明内容
有鉴于此，本发明实施例提供一种过流保护电路和控制器，利用硬件实现电路过流保护。
为实现上述目的，本发明实施例提供如下技术方案：
一种过流保护电路，包括采样电路、比较电路、D触发器和输出信号控制电路；
所述采样电路用于采样被控支路的电流，得到采样信号，并将所述采样信号输出至所述比较电路；
所述比较电路对所述采样信号和基准信号进行比较，当所述采样信号大于所述基准信号时，生成过流信号，并将所述过流信号输出至所述D触发器；
所述D触发器接收所述过流信号，并根据所述过流信号生成第一电平信号，并将所述第一电平信号输出至所述输出信号控制电路；
所述输出信号控制电路接收所述第一电平信号，响应于所述第一电平信号输出使被控支路的电流减小的控制信号。
上述过流保护电路，通过D触发器实现过流保护的延时，能够提高过流保护反应速度，进一步提高保护可靠性。
另外，本申请实施例还提供一种PFC过流保护电路，包括采样电路、比 较电路、D触发器、输出信号控制电路；
所述采样电路采样PFC电路的电流，得到采样信号，并将所述采样信号输出至所述比较电路；
所述比较电路对所述采样信号和基准信号进行比较，当所述采样信号大于所述基准信号时，生成过流信号，并将所述过流信号输出至所述D触发器；
所述D触发器接收过流信号，生成第一电平信号，并将所述第一电平信号输出至所述输出信号控制电路，所述D触发器的
Figure PCTCN2019107772-appb-000001
端接收驱动PFC主开关管的PWM控制信号；
所述输出信号控制电路接收所述第一电平信号，响应所述第一电平信号输出关断PFC主开关管的关断控制信号。
一种控制器，用于控制空调，包括被控支路以及本申请任意一项实施例所述的过流保护电路。
基于上述技术方案，本发明实施例提供的上述PFC过流保护电路，通过所述采样电路采样所述PFC电路的输出电流，所述比较电路将采样信号与基准信号进行比较，当所述采样信号大于所述基准信号时，生成过流信号，所述D触发器根据过流信号，生成第一电平信号，所述输出信号控制电路用于根据所述第一电平信号生成关断PFC主开关管的关断控制信号，实现了PFC电路的过流保护，并且，该电路完全通过硬件方式响应执行，响应速度快并且不会占用PFC电路中的MCU资源。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据提供的附图获得其他的附图。
图1为现有技术中PFC过流保护电路的电路示意图；
图2为本申请实施例公开的一种过流保护电路的示意框图；
图3为本申请另一实施例公开的一种PFC过流保护电路的电路示意图；
图4为本申请另一实施例公开的一种PFC过流保护电路的电路示意图；
图5为本申请图3实施例公开的PFC过流保护电路的动作过程时序图；
图6为本申请另一实施例公开的一种PFC过流保护电路的电路示意图；
图7为本申请另一实施例公开的一种PFC过流保护电路的电路示意图；
图8为本申请另一实施例公开的一种过流保护电路的示意框图；
图9为本申请另一实施例公开的一种过流保护电路的示意框图；
图10为本申请另一实施例公开的一种PFC过流保护电路的电路示意图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
在电控技术领域，比如空调控制器，为了保护控制器及相关设备，常设置有过流保护电路；在空调控制器电路设计中，涉及到需要过流保护的电路包括但不限于PFC电路，压缩机驱动电路、风机驱动电路等。压缩机驱动电路和风机驱动电路可以统称为电机驱动电路，驱动电路中设置有电流控制单元。PFC电路的电流控制单元和电机的电流控制单元能够控制PFC电路和电机驱动电流回路中的电流大小。
图1为一种PFC过流保护的电路图，参见图1，PFC电路为boost(升压)电路，所述PFC电路包括：
第一端与整流桥DB的正输出端相连的电感L，所述整流桥DB可以认为是所述PFC电路的前级电路，所述整流桥DB可以直接或间接与所述整流桥DB相连；
阳极与所述电感L的第二端相连的第一二极管D1，第一二极管D1阴极为PFC电路的输出正端，连接到第一电容C1；
第一端与所述电感L的第二端相连的IGBT，所述IGBT为所述PFC电路的PFC主开关管，其中，在图1公开的视图中，IGIGBT集电极作为所述IGBT的第一端，基极作为所述IGBT的控制端，发射极作为所述IGBT的第二端。
图1中，PFC控制电路还包括IGBT驱动电路和微处理器MCU。
在本申请实施例公开的技术方案中，参见图1，所述主开关管IGBT的通断由所述IGBT驱动电路来控制，所述IGBT驱动电路用于依据微处理器MCU输出的PWM控制信号控制所述PFC主开关管IGBT的通断。
所述微处理器MCU的输出端与IGBT驱动电路的输入端相连，用于向所述IGBT驱动电路提供PWM控制信号，IGBT驱动电路根据该PWM控制信号控制所述主开关管IGBT的通断，例如，当所述PWM控制信号为低电平时，控制所述主开关管IGBT断开，当所述述PWM控制信号为高电平时，控制所述主开关管IGBT导通。
所述PFC过流保护电路通常包括：
第一端与所述IGBT的第二端相连，第二端接地的第一电阻R1；
第一端与所述IGBT的第二端相连的第九电阻R9；
同相输入端与所述第九电阻R9的第二端相连的第一比较器U1；
一端与所述第一比较器U1的同相输入端相连，另一端接地的第四电容C4；
与所述第一比较器U1的反相输入端相连的基准电源产生电路，所述基准电源产生电路包括：第一端与电源VCC相连的第五电阻R5；一端与所述第五电阻R5的第二端相连、第二端接地的第七电阻R7；与所述第七电阻R7并联的第二电容C2，所述第五电阻R5与第七电阻R7的公共端作为所述基准电源产生电路的输出端；
所述第一比较器U1的输出端通过串联的第二二极管D2和第四电阻R4与所述第一比较器U1的同相输入端相连；
一端与所述第一比较器U1的输出端相连、另一端与电流源VCC相连的第六电阻R6；
第一端与所述第一比较器U1的输出端相连的第八电阻R8，所述第八电阻R8的第二端与所述微处理器MCU的输入端相连；
第一端与所述微处理器MCU的输出端相连的第二电阻R2；
输入端与所述第二电阻R2的第二端相连、输出端与所述IGBT的控制端相连的IGBT驱动电路；
与所述第二电阻R2的第二端相连的RC滤波电路，所述RC滤波电路包括并联的第三电阻R3和第三电容C3；所述第三电阻R3和第三电容C3的一个公共端与所述第二电阻R2的第二端相连，另一个公共端接地。
在图1所示的IGBT的过流保护的电路中，通过第一电阻R1在IGBT的第二端采样IGBT电流，并将采样信号发送给第一比较器U1。一旦所述第一比较器检测到采样信号超过基准电源产生电路输出的、大小为设定值的基准信号后，所述第一比较器U1的输出电压由低电平变成高电平，MCU接收到该电平变化后输出控制信号，通过所述IGBT驱动电路控制所述IGBT关闭，以此来防止PFC电路的输出电流过大，达到过流保护的作用。
上述方案中，所述MCU的输出信号是通过软件来实现的，因此存在以下缺点：响应速度会相对较慢，并且处理过程会占用更多的MCU资源。
针对保护响应速度问题，本申请实施例提供了一种过流保护电路，如图2所示，采样电路100、比较电路200、D触发器300和输出信号控制电路400；
采样电路100用于采样被控支路的电流，得到采样信号，并将所述采样信号输出至所述比较电路200；比如采样电路100采样PFC电路的电流或者电机驱动电流回路的电流。
比较电路200对采样信号和基准信号进行比较，当所述采样信号大于所述基准信号时，生成过流信号，并将所述过流信号输出至所述D触发器；采样信号表征被控支路的电流，基准信号对应被控支路所允许的最大电流，当被控支路的电流大于允许的最大电流时，电路发生过流，此时比较电路生成过流信号。
D触发器300接收所述过流信号，并根据所述过流信号生成第一电平信号，并将所述第一电平信号输出至所述输出信号控制电路；
输出信号控制电路400接收所述第一电平信号，响应于所述第一电平信号输出使被控支路的电流减小的控制信号。
进一步的，在一个实施例中，上述过流保护电路应用在PFC电路或者电机驱动电路中；这两种电路的共同点在于，通过利用PWM控制信号控制对应的可控开关管的工作状态可以控制它们的工作电流。因此，它们的电流控制单元中常包含一个MCU芯片，该MCU芯片可以输出PWM控制信号。基于此，如图8或9所示，过流保护电路还包括电流控制单元500，输出信号控制电路400输入端连接到所述电流控制控制单元500，接收所述电流控制单元输出的PWM控制信号；输出信号控制单元400输出端连接到用于控制被控支路电流的可控开关管，并根据所述PWM控制信号和所述第一电平信号对所述可控开 关管进行控制。具体的，当输出信号控制电路400未接收到所述第一电平信号时，电流控制单元500将所述PWM控制信号经过所述输出信号控制电路400输出到用于控制被控支路电流的可控开关管上，进行被控支路的电流控制。当输出信号控制电路400接收到所述第一电平信号时，输出信号控制电路400将PWM控制信号拉低或置高，从而阻断PWM控制信号输出至用于控制被控支路的电流的可控开关管上；因此，该可控开关管不工作，从而降低被控支路的电流，达到过流保护的作用。
具体的，在一个实施例中，被控支路可以是PFC回路，此时，被控电路的电流为PFC回路的电流，电流控制电路是PFC控制电路；采样电路置于PFC回路中，比如与PFC电路的开关管串联、利用PFC电路的开关管电流表征PFC电流，或者与PFC电路的续流二极管串联、利用续流二极管的电流表征PFC电流，或者直接串联在PFC主回路中，直接采样PFC电流。本实施例中，利用采样电路采样PFC电路的电流，得到对应的采样信号，比较电路接收采样信号并与基准信号进行比较，当采样信号大于基准信号时，生成过流信号，并输出至D触发器，D触发器根据该过流信号生成第一电平信号，并输出至电流控制单元，电流控制单元根据第一电平信号控制被控支路的电流减小。
当D触发器接收到过流信号时，能够迅速生成第一电平信号，并作用在控制被控支路电流的可控开关管上，迅速降低被控支路的电流，从而实现过流保护的快速响应。
被控支路也可以是电机驱动电路，比如压缩机/风机驱动电路，此时，被控电路的电流为压缩机/风机的驱动电流，具体可以是压缩机/风机每相的驱动电流即相电流，也可以是压缩机/风机驱动的总电流，电流控制单元是压缩机驱动控制电路。
进一步的，为了实现过流保护的复位，即退出过流保护，如图9所示，在一个实施例中，所述D触发器300的输出端连接到所述电流控制单元的一个数字IO口(端口2)，用于当所述D触发器300生成第一电平信号时，输出并发送第二电平信号至所述电流控制单元500，其中，所述第二电平信号表征所述第一电平信号；
电流控制单元500的另一个数字IO口(端口3)连接到所述D触发器的复位端，用于将保护复位信号输出至所述D触发器，当所述D触发器接收到 所述保护复位信号时，停止输出所述第一电平信号。
具体的，如果所述D触发器的300的Q端生成并输出第一电平信号，则可以用
Figure PCTCN2019107772-appb-000002
端生成第二电平信号，此时第二电平信号与第一电平信号电平相反，即利用与第一电平信号相反的第二电平信号表征第一电平信号；当然也可以直接利用第一电平信号表征第一电平信号，即，当D触发器300生成第一电平信号时，输出并发送第一电平信号至所述电流控制单元500的端口2。通过第二电平信号输入至电流控制单元，电流控制单元可以知道电路已经进入了过流保护阶段；通过电流控制单元500可以设置过流保护时间，即设置电流控制单元500接收第二电平信号到输出保护复位信号的时间，通过电流控制单元中过流保护时间的设置，可以延长过流保护时间，进一步提高保护可靠性和保护时间可调性。当被控支路包括电机驱动电流回路，所述被控支路包括电机驱动电流回路，所述电机驱动电流回路的电流由包括6个IGBT的逆变电路转换而来，其中，所述使被控支路的电流减小的控制信号为关断所述6个IGBT的控制信号。电机驱动中的逆变电路为常用技术，在此不作展开说明；
当所述被控支路包括PFC电路，所述使被控支路的电流减小的控制信号为关断PFC主开关管的控制信号。在一个实施例，具体设置可以如图10所示，采样电路100包括与PFC主开关管串联的采样电阻R1，R1上的电压为采样电压，该采样电压输出至比较电路200中的比较器U1的正向输入端，与基准信号进行比较，此处基准信号由R5/R7对电压VCC分压得到。当采样信号很小时，可以设置信号处理电路对采样信号进行放大后再输入至比较电路200。假设当所述PFC电路过流时，所述D触发器的Q端输出高电平，控制所述第二开关管Q2导通，使得所述第二与门电路U3的第二输入端为低电平，所述第二与门电路U3输出低电平，通过所述第二与门电路U3输出的低电平控制所述主开关管IGBT断开。
比较电路200的输出端连接到D触发器的CK端口，D触发器D端口和
Figure PCTCN2019107772-appb-000003
端口与电源相连。电流控制单元500的MCU的PWM控制信号输出端(端口1)连接到输出信号控制电路400，将PWM控制信号发送至输出信号控制电路400。MCU的端口2连接到D触发器的
Figure PCTCN2019107772-appb-000004
端口，接收第二电平信号；MCU的端口3连接到D触发器的复位端(
Figure PCTCN2019107772-appb-000005
端)，当MCU接收到
Figure PCTCN2019107772-appb-000006
端口发来的第二电平信号时，得知电路在发生过流保护，在预设过流保护时间后，由端口 3发送保护复位信号至D触发器的
Figure PCTCN2019107772-appb-000007
端，从而退出过流保护，退出保护、即正常工作时，Q输出低电平，第二与门电路U3的输出信号与其接收到的PWM控制信号电平信号，因此PWM控制信号通过输出信号控制电路400传递到了PFC主开关，控制PFC电路电流。图中IGBT驱动电路是为了提高PWM控制信号的驱动能力。附图10仅代表一个实施例，输出信号控制电路400也可以由其它方式实现、D触发器的连接方式也可以根据具体保护逻辑做改变。
上述实施例，不仅能够运用D触发器实现过流保护的快速响应，还可以利用电流控制单元还设置过流保护时间，从而延长过流保护时间，提高保护可靠性。
进一步的，区别于利用电流控制单元设置过流保护时间，为了实现过流保护复位，本申请实施例还提供了一种过流保护电路，具体的，如图8所示，D触发器300的复位端连接到所述电流控制单元的PWM控制信号输出端，用于接收所述PWM控制信号，并根据所述PWM控制信号的上升沿或者下降沿来对所述D触发器复位，从而使得所述D触发器停止输出所述第一电平信号。换句话说，每个PWM控制信号周期内，都可以对第一电平信号进行复位(D触发器停止输出第一电平信号)，从而实现过流保护的复位。
当被控支路包括电机驱动电流回路时，所述电机驱动电流回路的电流由包括6个IGBT的逆变电路转换得到，所述使被控支路的电流减小的控制信号为关断所述IGBT的控制信号。
当被控支路包括PFC电路时，所述使被控支路的电流减小的控制信号为关断PFC主开关管的控制信号；在一个实施例中，如图3所示所述D触发器接收过流信号，生成第一电平信号，并将所述第一电平信号输出至所述输出信号控制电路400，所述D触发器的
Figure PCTCN2019107772-appb-000008
端接收电流控制单元输出的PWM控制信号；其中，电流控制单元包括MCU芯片。
所述输出信号控制电路接收所述第一电平信号，所述D触发器将所述第一电平信号输出至所述输出信号控制电路，所述D触发器的
Figure PCTCN2019107772-appb-000009
端接收所述电流控制单元输出的PWM控制信号；
所述输出信号控制电路接收所述第一电平信号，响应所述第一电平信号输出使被控支路电流减小的第一控制信号至所述电流控制单元，所述电流控制单 元根据所述第一控制信号控制被控支路的电流减小，减小包括减小电流和关断电流，即将电流降为0。
下面以PFC过流保护为例，本申请提供了一种PFC过流保护电路，包括：
采样电路100、比较电路200、D触发器300和输出信号控制电路400；
所述采样电路100用于采样PFC电路的电流，得到采样信号，并将所述采样信号输出至所述比较电路；所述采样电路100可以通过与所述PFC电路中的主开关管IGBT串联的方式，将流过所述主开关管IGBT的电流作为所述PFC电路的输出电流。当然，所述采样电路100也可以设置在所述PFC电路中的主回路中，通过检测PFC电路中的主回路中的电流对所述PFC电路的输出电流进行采样。其中，所述采样电路100的具体结构可以依据用户需求自行设定，例如，参见图3，所述采样电路100可以包括第一电阻R1，所述第一电阻R1的第一端与所述PFC电路中的主开关管IGBT的第二端相连，第一电阻R1的第一端还与所述比较电路200的第一输入端相连，所述第一电阻R1的第二端接地。如图3所示，根据采样电路100、地的连接关系，采样电路100和比较电路200的同相输入端之间可以设置信号处理电路，所述信号处理电路可以为反向处理电路，用来将表征电流的负压进行反向后得到正的电压后再输入到比较电路200同相输入端；信号处理电路也可以是差分电路，利用差分电路获取表征电流的采样电压后输入至比较电路同相输入端。
所述比较电路200对所述采样信号和基准信号进行比较，当所述采样信号大于所述基准信号时，生成过流信号，并将所述过流信号输出至所述D触发器；所述比较电路的同相输入端的输入端与所述采样电路的输出端相连，参见图1，所述比较电路200可以由第一比较器U1及其外围电路构成，参见图1，其外围电路可以包括，第八电阻R8、第六电阻R6、第二二极管D2、第四电阻R4第九电阻R9以及第四电容C4；所述第一比较器U1的同相输入端作为所述比较电路的第一输入端，与所述采样电路100的输出端相连，第一比较器U1的反相输入端作为所述比较电路的第二输入端，用于获取基准信号产生电路输出的基准信号。其中，所述基准信号产生电路用于向所述比较电路200的反相输入端提供基准信号，参见图1，其结构可以包括：第二电容C2、第五电阻R5和第七电阻R7，所述基准信号产生电路也可以作为所述PFC过流保护电路的一部分；
所述D触发器300接收过流信号，生成第一电平信号，并将所述第一电平信号输出至所述输出信号控制电路；所述D触发器300基于所述比较电路200的输出信号控制其输出，当所述比较电路200的输出过流信号时，所述D触发器300生成并输出第一电平信号，否则不生成所述第一电平信号，其中，所述第一电平信号可以是高电平信号也可以是低电平信号；并且，所述D触发器的
Figure PCTCN2019107772-appb-000010
端接收控制PFC主开关管的PWM控制信号，比如接收电流控制电路500中的MCU发出的PWM控制信号，将所述MCU发出的PWM控制信号作为所述D触发器的时钟信号。
所述输出信号控制电路400接收所述第一电平信号生成关断PFC主开关管的关断控制信号，使PFC电路的电流减小。其中，所述关断控制信号可以为低电平信号。所述输出信号控制电路400在获取到所述第一电平信号时，控制所述PFC电路中的主开关管IGBT关断，具体的，其可以直接向所述主开关管IGBT的控制端提供电平信号的方式控制所述主开关管IGBT关断，也可以通过向所述主开关管IGBT的IGBT驱动电路提供低电平信号的方式控制所述主开关管IGBT关断。
在本申请上述实施例公开的技术方案中，所述采样电路100实时采样所述PFC电路的电流，所述比较电路200将所述采样电路100采集到的采样电压与基准信号进行比较，当采样信号大于所述基准信号时，所述比较电路200输出过流信号给所述D触发器300，所述D触发器生成第一电平信号，此时所述输出信号控制电路400控制所述PFC电路中的主开关管IGBT关断。当所述主开关管IGBT关断以后，所述采样电路100的采样信号会小于所述基准信号，此时所述比较电路200停止输出所述过流信号，所述D触发器300将保持输出所述第一电平信号直至D触发器
Figure PCTCN2019107772-appb-000011
端变为低电平，最终使得所述输出信号控制电路400释放对所述主开关管IGBT的控制，使得所述PFC电路正常工作。可见该过程中，PFC电路的过电流保护及释放由硬件来实现，不需要软件的参与，因此可以释放部分软件资源。
参见图3，在本申请上述实施例公开的技术方案中还对所述D触发器端口的具体链接方式进行了限定，具体的，所述D触发器300，所述D触发器的CK端口与所述比较电路200的输出端相连，所述D触发器的D和
Figure PCTCN2019107772-appb-000012
端口上拉，与电源相连，所述D触发器300被配置为：当CK端口输入高电平时，生 成并输出第一电平信号，参见图3，在配置时，所述D触发器的各个端口具体被配置为：所述D触发器的
Figure PCTCN2019107772-appb-000013
端口通过第五电容C5接地，所述D触发器的D端口通过第十电容R10与电源VCC相连，所述D触发器的
Figure PCTCN2019107772-appb-000014
端口通过第十一电容R11采集时钟信号，并通过所述第七电容C7接地，该时钟信号可以为所述微处理器MCU提供的PWM控制信号。
在本申请实施例公开的保护电路中，当所述微处理器MCU输出的脉冲信号PWM为高电平时，所述IGBT驱动电路控制所述主开关管IGBT导通，此时所述主开关管IGBT上有电流流过，PFC电路的电流方向如下：
电流从整流桥DB的“+”端流出、通过所述电感L流入所述主开关管IGBT的第一端、通过所述主开关管IGBT的第二端流出经过所述第一电阻R1、然后返回整流桥DB的“-”端；
当所述微处理器500输出的脉冲信号PWM为低电平时，IGBT驱动电路控制所述主开关管IGBT关断，此时IGBT上没有电流流过，PFC电路的电流方向如下：
电流从整流桥DB的“+”端流出、通过电感L流入二极管D1、再从二极管D1流出经过电容C1、然后返回整流桥DB的“-”端；
此电路中第一电阻R1采样所述主开关管IGBT的第二端的电流，将该电流转换成相应的电压后输入到比较电路200的同相输入端。比较电路200的反相输入端电压为基准电源产生电路提供的基准电压，所述基准电源产生电路也可以作为所述过流保护电路的一部分，其具体结构可参见图1所示，过流保护值Itrip的设置方法如下：
Figure PCTCN2019107772-appb-000015
当所述主开关管IGBT导通时，电流通过所述主开关管IGBT，并被第一电阻R1转换成采样电压，所述比较电路200将所述采样电压与基准电压进行比较，如果采样电压大于基准电压，则说明PFC电路的电流已超过设置的过流保护值，此时所述D触发器生成所述第一电平信号。
在本申请所述D触发器的可以通过
Figure PCTCN2019107772-appb-000016
端口或Q端口与所述输出信号控制电路400相连，通过所述
Figure PCTCN2019107772-appb-000017
端口或Q端口向所述输出信号控制电路400提供所述第一电平信号，所述输出信号控制电路400的输出端与所述PFC电路的主 开关管控制端相连，此时，所述输出信号控制电路400的输出端可以采用直接连接的当时与所述主开关管控制端相连相连，当然也可以通过所述主开关管的驱动电路与所述主开关管的控制端相连，只要能够保证所述主开关管的导通状态跟随所述输出信号控制电路400的输出信号变化即可。
参见表1，所述D触发器的
Figure PCTCN2019107772-appb-000018
端口或Q端口的输出信号可以参见表1所示：
Figure PCTCN2019107772-appb-000019
所述L表示低电平，H表示高电平，X表示无信号,↑表示上升沿。
参见图3，本申请还公开了一种所述输出信号控制电路400的具体结构，其可以包括：
第三二极管D3，所述第三二极管D3的阴极作为所述输出信号控制电路400的输入端、与所述D触发器的
Figure PCTCN2019107772-appb-000020
端口相连，所述第三二极管D3的阳极作为所述输出信号控制电路的输出端与所述PFC电路的主开关管IGBT的控制端相连。在本方案中，当所述采样信号大于所述基准信号时，所述D触发器的
Figure PCTCN2019107772-appb-000021
端口输出低电平信号，此时，所述第三二极管D3的阳极也就为低电平信号，即，所述输出信号控制电路400向所述PFC电路输出低电平信号，通过该低电平信号控制所述主开关管IGBT关断，此时，所述PFC电路无电流输出，比较电路输出低电平，D触发器的
Figure PCTCN2019107772-appb-000022
端口保持电平信号输出，直至D触发器
Figure PCTCN2019107772-appb-000023
端变为低电平后，D触发器的
Figure PCTCN2019107772-appb-000024
端口由低电平变为高电平，此时所述IGBT驱动电路继续驱动所述主开关管IGBT正常工作。
参见图4，所述输出信号控制电路400也可以包括：
第一开关管Q1；
所述第一开关管Q1的第一端为所述输出信号控制电路的输出端与所述PFC电路相连，所述第一开关管Q1的第二端接接地；所述第一开关管Q1的控制端作为所述输出信号控制电路的输入端与所述D触发器300的Q端口相连。在本方案中，当所述采样信号大于所述基准信号时，所述D触发器的Q端口输出高电平信号，此时，所述第一开关管Q1导通，所述第一开关管Q1的输出端为低电平，即，所述输出信号控制电路400向所述PFC电路输出低电平信号，通过该低电平信号控制所述主开关管IGBT关断，此时，所述PFC 电路无电流输出，比较电路输出低电平，D触发器的Q端口保持高电平信号输出直至D触发器
Figure PCTCN2019107772-appb-000025
端变为低电平，所述IGBT驱动电路继续驱动所述主开关管IGBT正常工作。
其中，所述第一开关管Q1可以为NPN型三极管，所述NPN型三极管的基极作为输入端，发射极作为输出端，集电极作为控制端，所述输出信号控制电路400还可以包括设置在所述NPN型三极管的基极和发射极之间的第十六电阻R16，以及设置在所述NPN型三极管的基极和D触发器400的Q端之间的第十七电阻R17。
具体的，在本申请实施例公开的技术方案中，所述图3和图4公开的输出信号控制电路400可以作为旁路电路与所述IGBT驱动电路PWM控制信号输入端相连，也就是，所述输出信号控制电路400的输出信号与所述微处理器MCU输出的PWM控制信号叠加后，发送给所述IGBT驱动电路，所述IGBT驱动电路依据叠加后的PWM控制信号控制所述主开关管IGBT的通断。当所述输出信号控制电路400的输出信号为低电平时，将所述PWM控制信号拉低为低电平信号，此时，所述IGBT驱动电路获取到低电平的PWM控制信号，控制所述主开关管IGBT关断。
图5对图3公开的过流保护电路的工作过程进行介绍，针对图3中的实施例而言；
参见图5，所述电流控制单元500中的微处理器MCU持续输出PWM控制信号，PFC电路的输出电流跟随所述PWM控制信号变化；参见图5，当所述PFC电路的输出电流超过设置的过流值时，比较电路200的输出电压由低电平变成高电平，D触发器的
Figure PCTCN2019107772-appb-000026
端的输出受所比较电路的输出信号控制，使得D触发器的
Figure PCTCN2019107772-appb-000027
端口输出低电平，通过该低电平关断所述主开关管IGBT，使得所述PFC电路的输出电流为0，以实现过流保护，此时，所述PFC电路的输出电流为0，所述比较电路200无输出，所述D触发器的
Figure PCTCN2019107772-appb-000028
端输出保持低电平直至D触发器
Figure PCTCN2019107772-appb-000029
端变为低电平，之后，所述IGBT驱动电路继续驱动所述主开关管IGBT正常工作。
参见图6，本申请实施例公开的所述输出信号控制电路400也可以包括第一与门电路U2；具体的，参见图6：
所述第一与门电路U2的第一输入端用于获取输入至所述PFC电路的主开关管控制端的PWM控制信号；所述第一与门电路U2的第二输入端作为所述输出信号控制电路的输入端与电流源VCC和所述D触发器的
Figure PCTCN2019107772-appb-000030
端口相连，所述第一与门电路U2的输出端作为所述输出信号控制电路的输出端、与所述PFC电路的主开关管控制端相连，用于向所述PFC电路提供用于控制所述主开关管IGBT断开的控制信号。
参见图6，当所述PFC电路过流时，所述D触发器的
Figure PCTCN2019107772-appb-000031
端输出低电平，使得所述第一与门电路U2的第二输入端输入低电平，与此同时，所述第一与门电路U2的第一输入端输入的PWM控制信号呈高电平，因此，所述第一与门电路U2输出低电平，通过所述第一与门电路U2输出的低电平控制所述主开关管IGBT断开。
参见图7，本申请实施例公开的所述输出信号控制电路400也可以包括：
第二与门电路U3和第二开关管Q2；
所述第二与门电路U3的第一输入端用于获取输入至所述PFC电路的PWM控制信号，所述第二与门电路U3的第二输入端与电源和所述第二开关管Q2的第一端相连，所述第二与门电路U3的输出端作为所述输出信号控制电路的输出端与PFC电路相连；
所述第二开关管Q2的第一端与所述第二与门电路U3的第二输入端相连；
所述第二开关管Q2的第二端接地；
所述第二开关管Q2的控制端作为所述输出信号控制电路的输入端与所述D触发器的Q端相连。
参见图7，当所述PFC电路过流时，所述D触发器的Q端输出高电平，控制所述第二开关管Q2导通，使得所述第二与门电路U3的第二输入端为低电平，与此同时，所述第二与门电路U3的第一输入端输入的PWM控制信号呈高电平，因此，所述第二与门电路U3输出低电平，通过所述第二与门电路U3输出的低电平控制所述主开关管IGBT断开。
进一步的，为了保证所述第二开关管Q2的可靠性，所述第二开关管可以为NPN型三极管，所述NPN型三极管的基极作为输入端，发射极作为输出端，集电极作为控制端，所述输出信号控制电路400还可以包括设置在所述NPN型三极管的基极和发射极之间的第十六电阻R16，以及设置在所述NPN型三极管 的基极和D触发器400的Q端之间的第十七电阻R17。
参见图6和图7，本申请实施例公开的所述第一与门电路U2和所述第二与门电路U3可以设置在所述PFC电路的微处理器MCU和IGBT驱动电路之间，在所述输出信号控制电路400不控制所述主开关管IGBT关断时，向所述IGBT驱动电路转发所述PWM控制信号。此时，当因过流导致主开关管IGBT关断后，PFC电路的输出电流为0，并持续保护IGBT处于关断状态直至D触发器
Figure PCTCN2019107772-appb-000032
端变为低电平，之后所述第一与门电路U2和所述第二与门电路U3的第二输入端输入信号又变为高电平，此时，所述第一与门电路U2和所述第二与门电路U3的输出电平为所述PWM控制信号的电平，因此，在PWM控制信号的下一周期到来后，所述第一与门电路U2和所述第二与门电路U3的输出仅跟随所述PWM控制信号，因此可继续通过所述PWM控制信号控制所述主开关管IGBT的导通状态。
综上可见，本申请实施例公开的PFC过流保护电路中，PFC电路的过电流保护及保护的恢复都由硬件来实现，不需要软件的参与，因此可以释放部分软件资源；PFC的过流保护保护是逐个脉冲进行保护的，当前的PWM控制信号周期内控制所述主开关管IGBT关断以后，下一个的PWM控制信号就可以正常输出以驱动PFC中的主开关管IGBT，从而可改善电流波形。
对应于上述PFC过流保护电路，本申请还公开了一种应用所述PFC过流保护电路的控制器，该控制器用于控制空调或其他负载设备，该控制器包括PFC电路以及并且应用本申请上述任意一项实施例公开的PFC过流保护电路；
参见图1所示，所述PFC电路可以为boost电路，包括：
第一端与整流桥DB的正输出端相连的电感L；
阳极与所述电感L的第二端相连的第一二极管D1，所述第一二极管D1的阴极与负载相连；
集电极与所述电感L的第二端相连、发射极通过采样电阻接地的IGBT，所述IGBT为所述PFC电路的PFC主开关管。
本说明书中各个实施例采用递进的方式描述，每个实施例重点说明的都是与其他实施例的不同之处，各个实施例之间相同向似部分互相参见即可。对于实施例公开的装置而言，由于其与实施例公开的方法相对应，所以描述的比较简单，相关之处参见方法部分说明即可。
对所公开的实施例的上述说明，使本领域专业技术人员能够实现或使用本发明。对这些实施例的多种修改对本领域的专业技术人员来说将是显而易见的，本文中所定义的一般原理可以在不脱离本发明的精神或范围的情况下，在其它实施例中实现。因此，本发明将不会被限制于本文所示的这些实施例，而是要符合与本文所公开的原理和新颖特点相一致的最宽的范围。

Claims (17)

  1. 一种过流保护电路，其特征在于，包括采样电路、比较电路、D触发器和输出信号控制电路；
    所述采样电路用于采样被控支路的电流，得到采样信号，并将所述采样信号输出至所述比较电路；
    所述比较电路对所述采样信号和基准信号进行比较，当所述采样信号大于所述基准信号时，生成过流信号，并将所述过流信号输出至所述D触发器；
    所述D触发器接收所述过流信号，并根据所述过流信号生成第一电平信号，并将所述第一电平信号输出至所述输出信号控制电路；
    所述输出信号控制电路接收所述第一电平信号，响应于所述第一电平信号输出使被控支路的电流减小的控制信号。
  2. 根据权利要求1所述的过流保护电路，其特征在于，还包括电流控制单元，所述输出信号控制电路输入端连接到所述电流控制控制单元，接收所述电流控制单元输出的PWM控制信号；所述输出信号控制单元输出端连接到用于控制被控支路电流的可控开关管，并根据所述PWM控制信号和所述第一电平信号对所述可控开关管进行控制。
  3. 根据权利要求2所述的过流保护电路，其特征在于，所述D触发器的输出端连接到所述电流控制单元的一个数字IO口，用于当所述D触发器生成第一电平信号时，输出并发送第二电平信号至所述电流控制单元，其中，所述第二电平信号表征所述第一电平信号；
    所述电流控制单元的另一个数字IO口连接到所述D触发器的复位端，用于将保护复位信号输出至所述D触发器，当所述D触发器接收到所述保护复位信号时，停止输出所述第一电平信号。
  4. 根据权利要求3所述的过流保护电路，其特征在于，所述被控支路包括电机驱动电流回路，所述电机驱动电流回路的电流由包括6个IGBT的逆变电路转换得到，所述使被控支路的电流减小的控制信号为关断所述IGBT的控制信号。
  5. 根据权利要求3所述的过流保护电路，其特征在于，所述被控支路包括PFC电路，所述使被控支路的电流减小的控制信号为关断PFC主开关管的 控制信号。
  6. 根据权利要求2所述的过流保护电路，其特征在于，所述D触发器的复位端连接到所述电流控制单元的PWM控制信号输出端，用于接收所述PWM控制信号，并根据所述PWM控制信号的上升沿或者下降沿来对所述D触发器复位，从而使得所述D触发器停止输出所述第一电平信号。
  7. 根据权利要求6所述的过流保护电路，其特征在于，所述被控支路包括电机驱动电流回路，所述电机驱动电流回路的电流由包括6个IGBT的逆变电路转换得到，所述使被控支路的电流减小的控制信号为关断所述IGBT的控制信号。
  8. 根据权利要求6所述的过流保护电路，其特征在于，所述被控支路包括PFC电路，所述使被控支路的电流减小的控制信号为关断PFC主开关管的控制信号；所述D触发器的
    Figure PCTCN2019107772-appb-100001
    端连接到所述电流控制单元的PWM控制信号输出端，接收驱动所述PFC主开关管的所述PWM控制信号。
  9. 根据权利要求8所述的PFC过流保护电路，其特征在于，所述输出信号控制电路具体用于：获取到所述第一电平信号后，生成用于关断PFC主开关管的、低电平的关断控制信号。
  10. 根据权利要求8所述的PFC过流保护电路，其特征在于，所述D触发器的CK端口与所述比较电路的输出端相连，所述D触发器D端口和
    Figure PCTCN2019107772-appb-100002
    端口与电源相连。
  11. 根据权利要求10所述的PFC过流保护电路，其特征在于，所述D触发器的
    Figure PCTCN2019107772-appb-100003
    端口与所述输出信号控制电路的输入端相连，所述输出信号控制电路的输出端与所述PFC电路的主开关管控制端相连。
  12. 根据权利要求11所述的PFC过流保护电路，其特征在于，所述输出信号控制电路包括：
    第三二极管，所述第三二极管的阴极作为所述输出信号控制电路的输入端、与所述D触发器的
    Figure PCTCN2019107772-appb-100004
    端口相连，所述第三二极管的阳极与所述PFC电路相连，所述第三二极管的阴极与所述D触发器的
    Figure PCTCN2019107772-appb-100005
    端口相连，阳极作为所述输出信号控制电路的输出端与所述PFC电路的主开关管的控制端相连。
  13. 根据权利要求11所述的PFC过流保护电路，其特征在于，所述输出信号控制电路包括：
    第一与门电路；
    所述第一与门电路的第一输入端获取输入至所述PFC电路的主开关管控制端的PWM控制信号；所述第一与门电路的第二输入端作为所述输出信号控制电路的输入端与电流源和所述D触发器的
    Figure PCTCN2019107772-appb-100006
    端口相连，所述第一与门电路的输出端作为所述输出信号控制电路的输出端、与所述PFC电路的主开关管控制端相连。
  14. 根据权利要求10所述的PFC过流保护电路，其特征在于，所述D触发器的Q端口与所述输出信号控制电路的输入端相连，所述输出信号控制电路的输出端与所述PFC电路的主开关管控制端相连。
  15. 根据权利要求14所述的PFC过流保护电路，其特征在于，所述输出信号控制电路包括：
    第一开关管；
    所述第一开关管的第一端为所述输出信号控制电路的输出端、与所述PFC电路的主开关管控制端相连，所述第一开关管的第二端接地；所述第一开关管的控制端作为所述输出信号控制电路的输入端、与所述D触发器的Q端口相连。
  16. 根据权利要求14所述的PFC过流保护电路，其特征在于，所述输出信号控制电路包括：
    第二与门电路和第二开关管；
    所述第二与门电路的第一输入端用于获取输入至所述PFC电路的PWM控制信号，所述第二与门电路的第二输入端与电源和所述第二开关管的第一端相连，所述第二与门电路的输出端作为所述输出信号控制电路的输出端与PFC电路主开关管的控制端相连；
    所述第二开关管的第一端与所述第二与门电路的第二输入端相连；
    所述第二开关管的第二端接地；
    所述第二开关管的控制端作为所述输出信号控制电路的输入端、与所述D触发器的Q端相连。
  17. 一种控制器，用于控制空调，其特征在于，包括被控支路和权利要求1-16任意一项所述的过流保护电路。
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