WO2020233480A1 - 低介电常数膜及其制备方法 - Google Patents

低介电常数膜及其制备方法 Download PDF

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WO2020233480A1
WO2020233480A1 PCT/CN2020/090119 CN2020090119W WO2020233480A1 WO 2020233480 A1 WO2020233480 A1 WO 2020233480A1 CN 2020090119 W CN2020090119 W CN 2020090119W WO 2020233480 A1 WO2020233480 A1 WO 2020233480A1
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dielectric constant
compound
low dielectric
constant film
film according
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English (en)
French (fr)
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宗坚
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Jiangsu Favored Nanotechnology Co Ltd
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Jiangsu Favored Nanotechnology Co Ltd
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Priority to JP2021568365A priority Critical patent/JP7475371B2/ja
Priority to KR1020217040802A priority patent/KR20220008319A/ko
Priority to EP20809129.8A priority patent/EP3971320A4/en
Priority to US17/595,436 priority patent/US11904352B2/en
Publication of WO2020233480A1 publication Critical patent/WO2020233480A1/zh
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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B05—SPRAYING OR ATOMISING IN GENERAL; APPLYING FLUENT MATERIALS TO SURFACES, IN GENERAL
    • B05D—PROCESSES FOR APPLYING FLUENT MATERIALS TO SURFACES, IN GENERAL
    • B05D1/00—Processes for applying liquids or other fluent materials
    • B05D1/62—Plasma-deposition of organic layers
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6921—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
    • H10P14/6922—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material containing Si, O and at least one of H, N, C, F or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B05—SPRAYING OR ATOMISING IN GENERAL; APPLYING FLUENT MATERIALS TO SURFACES, IN GENERAL
    • B05D—PROCESSES FOR APPLYING FLUENT MATERIALS TO SURFACES, IN GENERAL
    • B05D5/00—Processes for applying liquids or other fluent materials to surfaces to obtain special surface effects, finishes or structures
    • B05D5/12—Processes for applying liquids or other fluent materials to surfaces to obtain special surface effects, finishes or structures to obtain a coating with specific electrical properties
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/50—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/56—After-treatment
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C28/00—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326—Deposition processes
    • H10P14/6328—Deposition from the gas or vapour phase
    • H10P14/6334—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H10P14/6336—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/66—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials
    • H10P14/665—Porous materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/66—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials
    • H10P14/668—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials
    • H10P14/6681—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si
    • H10P14/6684—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si the compound comprising silicon and oxygen
    • H10P14/6686—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si the compound comprising silicon and oxygen the compound being a molecule comprising at least one silicon-oxygen bond and the compound having hydrogen or an organic group attached to the silicon or oxygen, e.g. a siloxane
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/45—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their insulating parts
    • H10W20/47—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their insulating parts comprising two or more dielectric layers having different properties, e.g. different dielectric constants
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/45—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their insulating parts
    • H10W20/48—Insulating materials thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B05—SPRAYING OR ATOMISING IN GENERAL; APPLYING FLUENT MATERIALS TO SURFACES, IN GENERAL
    • B05D—PROCESSES FOR APPLYING FLUENT MATERIALS TO SURFACES, IN GENERAL
    • B05D2504/00—Epoxy polymers
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B05—SPRAYING OR ATOMISING IN GENERAL; APPLYING FLUENT MATERIALS TO SURFACES, IN GENERAL
    • B05D—PROCESSES FOR APPLYING FLUENT MATERIALS TO SURFACES, IN GENERAL
    • B05D2506/00—Halogenated polymers
    • B05D2506/10—Fluorinated polymers
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B05—SPRAYING OR ATOMISING IN GENERAL; APPLYING FLUENT MATERIALS TO SURFACES, IN GENERAL
    • B05D—PROCESSES FOR APPLYING FLUENT MATERIALS TO SURFACES, IN GENERAL
    • B05D2518/00—Other type of polymers
    • B05D2518/10—Silicon-containing polymers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/072—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising air gaps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/45—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their insulating parts
    • H10W20/46—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their insulating parts comprising air gaps

Definitions

  • the present invention relates to the field of ultra-large-scale integrated circuit manufacturing. In detail, it relates to a low dielectric constant film and a preparation method thereof.
  • PECVD plasma-enhanced chemical vapor deposition
  • one or more organic silicon compounds are introduced into a plasma-enhanced chemical vapor deposition chamber Into the chamber, and introduce a porogen into the chamber, make the one or more organosilicon compounds react with the porogen under constant RF power conditions to deposit a low-k film on a substrate in the chamber
  • post-treatment is applied to this low-k film to substantially remove the pore former on this low-k film.
  • these materials need to be added with a pore-forming agent to form pores. After the pores are formed, the pore-forming agent is further removed, but the pore-forming agent is generally not completely removed, and sometimes even more remains.
  • these materials are formed by directly forming a film with pores on the substrate, and the formation of pores reduces the bonding strength of the film and the substrate, or the adhesion of the film on the substrate is low, and the film has a high porosity.
  • the rate makes the dielectric constant lower, but the high porosity also makes the bond strength lower, that is, there is a contradiction between the two aspects.
  • these materials have poor mechanical strength and poor corrosion resistance, causing the nano-film layer to be easily damaged during subsequent semiconductor processing.
  • the film layer is attached to the substrate by reacting with the pore-forming agent in the chamber by PECVD technology, but when it is formed, the uniformity of the film layer in different areas of the substrate is not controlled, and the concentration in different areas in the chamber Different, so it is easy to cause uneven distribution of the film layer on the substrate.
  • the existing low dielectric constant nano film has poor hydrophobicity.
  • the surface of the substrate is easily corroded in the salt spray test. Therefore, the long-term use of the product is not used. The requirements are also relatively high.
  • An advantage of the present invention is to provide a low dielectric constant film and a preparation method thereof, which includes at least a two-layer structure.
  • the k value of the low dielectric constant film is adjusted through the cooperation of the multilayer structure, and the low dielectric constant film is improved. Constant film adhesion and/or mechanical properties.
  • An advantage of the present invention is to provide a low dielectric constant film and a preparation method thereof.
  • a plasma enhanced chemical vapor deposition (PECVD) method is used to form an anticorrosive layer and a porous layer. It adheres to the substrate to form a low dielectric constant (k) film with strong bonding force to the substrate, and has good corrosion resistance.
  • PECVD plasma enhanced chemical vapor deposition
  • An advantage of the present invention is to provide a low dielectric constant film and a preparation method thereof, wherein under an inert gas atmosphere, vinyl organic silicon monomer and vinyl epoxy monomer are subjected to PECVD to form an anticorrosive layer.
  • an advantage of the present invention is to provide a low dielectric constant film and a preparation method thereof.
  • the anti-corrosion layer is made of alkylene oxide containing unsaturated carbon-carbon double bonds and silicon containing unsaturated double bonds. A compound obtained by the reaction of oxane or silane.
  • An advantage of the present invention is to provide a low dielectric constant film and a preparation method thereof, which separate the anticorrosive layer between the porous layer and the substrate, so that the porosity of the porous layer will not or less affect the low dielectric constant
  • the binding force between the film and the substrate is constant, and the k value can be made smaller by increasing the porosity.
  • An advantage of the present invention is to provide a low-dielectric constant film and a preparation method thereof, which adopts a dynamic coating method to make the low-dielectric constant film more uniformly adhere to the substrate, reducing the difference in the coating of the substrate at different positions, The problem of uneven thickness caused by different concentrations of deposits in different regions of the substrate is solved.
  • An advantage of the present invention is to provide a low dielectric constant film and a preparation method thereof, which are obtained by PECVD in a single atmosphere or mixed atmosphere of organosilane and organosiloxane under a single atmosphere or mixed atmosphere of oxygen, nitrogen/hydrogen Porous layer.
  • An advantage of the present invention is to provide a low dielectric constant film and a preparation method thereof, which form a fluorosilicon polymer on the surface layer to further reduce the k value of the low dielectric constant film.
  • An advantage of the present invention is to provide a low dielectric constant film and a preparation method thereof, which form an organic fluorosilicon containing aromatic groups on the surface layer, and use the rigid structure of the aromatic groups to improve the mechanical properties of the low dielectric constant film.
  • An advantage of the present invention is to provide a low dielectric constant film and a preparation method thereof.
  • the fluorosilicone polymer with low surface energy on the surface has superhydrophobic characteristics and the static contact angle of water on the surface is large.
  • An advantage of the present invention is to provide a low-dielectric constant film and a preparation method thereof.
  • the organic silicon nano film and the organic silicon/oxygen are deposited alternately to form an organic Oxygen is introduced after the silicon layer, the hydrocarbon part of the organic silicon layer reacts with oxygen to form an irregular rough surface, and then SiOCNH is deposited on the surface, which helps to form large pores with a higher specific surface area, and the alternating structure helps The adhesion between the low dielectric constant film and the substrate is enhanced.
  • An advantage of the present invention is to provide a low dielectric constant film and a preparation method thereof, which can adjust the dielectric properties and mechanical properties of the low dielectric constant film by adjusting the content of the fluorine-containing aromatic group.
  • An advantage of the present invention is to provide a low dielectric constant film and a preparation method thereof.
  • a PECVD method is used to form a two-layer structure consisting of a porous layer and a fluorine-containing layer, which reduces the value of k.
  • the hydrophobic performance of the low dielectric constant film is improved, and the corrosion resistance of the deposited substrate is improved.
  • An advantage of the present invention is to provide a low dielectric constant film and a preparation method thereof.
  • a PECVD method is used to form a two-layer structure composed of an anti-corrosion layer and a porous layer, which reduces the k value while enhancing The bonding force and viscosity between the low dielectric constant film and the substrate.
  • An advantage of the present invention is to provide a low dielectric constant film and a preparation method thereof.
  • a PECVD method is used to form a three-layer structure consisting of an anticorrosive layer, a porous layer, and a fluorine-containing layer, which passes
  • the alternate arrangement of different layers improves the dielectric properties, mechanical properties and hydrophobicity of the low dielectric constant film as a whole, and the alternate arrangement is beneficial to forming a porous layer with a large pore volume.
  • An advantage of the present invention is to provide a low dielectric constant film and a preparation method thereof, which does not require a pore former to form a pore structure, and therefore does not require high temperature annealing treatment to remove the pore former.
  • one aspect of the present invention provides a low dielectric constant film, which uses alkylene oxides, organosilicon compounds, and fluorine-containing siloxane compounds as raw materials, through a plasma-enhanced chemical vapor deposition method.
  • the surface of the substrate is formed.
  • the low dielectric constant film includes an anticorrosive layer composed of an alkylene oxide compound A containing unsaturated double bonds and a siloxane containing unsaturated double bonds or
  • the silane compound B is formed on the surface of the substrate by plasma enhanced chemical vapor deposition.
  • the low dielectric constant film includes a porous layer
  • the porous layer is formed of organosilane and/or organosiloxane compound C and alkane compound and/or benzene compound E by plasma enhanced chemical vapor deposition.
  • the low dielectric constant film according to at least one embodiment of the present invention includes a porous layer formed by plasma-enhanced chemical vapor deposition of compound C and compound E, and compound C includes organosilicon Compounds, the compound E includes alkane compounds and benzene compounds.
  • the low dielectric constant film according to at least one embodiment of the present invention includes a porous layer formed by plasma-enhanced chemical vapor deposition of compound C and compound E, and compound C includes organosilicon
  • compound C includes organosilicon
  • the compound E includes an alkane compound.
  • the low dielectric constant film according to at least one embodiment of the present invention includes a porous layer formed by plasma-enhanced chemical vapor deposition of compound C and compound E, and compound C includes organosilicon Compound, the compound E includes a benzene compound.
  • the low dielectric constant film includes a fluorine-containing layer formed by arylfluorosilane D by plasma enhanced chemical vapor deposition.
  • the bottom layer is formed by plasma-enhanced chemical vapor deposition of vinyl epoxy compound and vinyl organosilicon compound on the surface of the substrate.
  • the low dielectric constant film according to at least one embodiment of the present invention, wherein the compound A is selected from the group consisting of: vinyl oxirane, glycidyl methacrylate, allyl glycidyl ether, 1, 2 -One or more mixtures of epoxy-4-vinylcyclohexane, 2,3-epoxypropyldimethylvinylsilane, and 2,3-epoxypropyldichlorovinylsilane.
  • the compound A is selected from the group consisting of: vinyl oxirane, glycidyl methacrylate, allyl glycidyl ether, 1, 2 -One or more mixtures of epoxy-4-vinylcyclohexane, 2,3-epoxypropyldimethylvinylsilane, and 2,3-epoxypropyldichlorovinylsilane.
  • the low dielectric constant film according to at least one embodiment of the present invention, wherein the compound B is selected from the group consisting of allyltrimethoxysilane, vinyltriethoxysilane, trimethylvinylsilane, 3 -Butenyl trimethyl silane, vinyl tributyl ketoxime silane, tetramethyl divinyl disiloxane, tetramethyl tetravinyl cyclotetrasiloxane, 1,2,2-trifluoroethylene
  • the compound C is an organosiloxane.
  • the compound C is an organosilane.
  • the low dielectric constant film according to at least one embodiment of the present invention, wherein the compound C is selected from the group consisting of: ⁇ -glycidoxypropyltrimethoxysilane; D4H cyclotetrasiloxane, hexamethyl ring Trisiloxane, tris-(trimethoxysilane) phenylsilane, tert-butyldimethylchlorosilane, phenylethynyltrimethylsilane, biphenylvinyltrimethylsilane, octaphenylcyclotetra Siloxane, triphenylhydroxysilane, trifluoropropylmethyl cyclotrisiloxane, 2,2,4,4-tetramethyl-6,6,8,8-tetraphenylcyclotetrasiloxane , Tetramethyltetravinylcyclotetrasiloxane, 3-glycidoxypropyltriethoxysilane,
  • the low dielectric constant film wherein the compound E is selected from the group consisting of: cyclobutane, cyclopentane, cyclohexane, benzene, toluene, p-xylene, or Multiple mixtures.
  • the low dielectric constant film wherein the compound D is selected from the group consisting of: pentafluorophenyltriethoxysilane, pentafluorophenyltrimethoxysilane, pentafluorophenyltrimethoxysilane, Chlorosilane, pentafluorophenyldimethylchlorosilane, perfluorooctylethylpentafluorophenyldichlorosilane, pentafluorodichlorophenylperfluorohexylethylsilane, perfluorooctyldichlorophenylsilane, Perfluorooctyldiethoxyphenylsilane, perfluorooctylethylpentafluorophenyldimethoxysilane, perfluorobutylethylpentafluorophenyldichlor
  • an auxiliary gas is introduced during the vapor deposition process for reaction, and the auxiliary gas is selected from one or more mixtures of He and Ar.
  • the low dielectric constant film wherein an auxiliary gas is introduced during the vapor deposition process for reaction, and the auxiliary gas is selected from one of nitrogen/hydrogen, ammonia, oxygen, and hydrocarbons. kind or mixed.
  • the low dielectric constant film according to at least one embodiment of the present invention, wherein the range of the dielectric constant value of the low dielectric constant film is selected from 2.1 to 2.2, 2.2 to 2.3, 2.4 to 2.5, 2.5 to 2.6, Or 2.6 ⁇ 2.7.
  • the low dielectric constant film according to at least one embodiment of the present invention, wherein the range of the Young's modulus of the low dielectric constant film is: 10-11 GPa, 11-12 GPa, 12-13 GPa, 23-24 GPa, 26 ⁇ 27GPa, 27 ⁇ 28GPa, 29 ⁇ 30GPa, 31 ⁇ 32GPa or 33 ⁇ 34GPa.
  • the low dielectric constant film according to at least one embodiment of the present invention, wherein the static contact angle of the low dielectric constant film ranges from 110° to 115°, 115° to 120°, 120° to 125°, 125° ⁇ 130°, 130° ⁇ 135°, 135° ⁇ 140°, 140° ⁇ 145°, 145° ⁇ 150° or 150° ⁇ 155°.
  • the low dielectric constant film according to at least one embodiment of the present invention, wherein the thickness of the low dielectric constant film ranges from 10 nm to 2000 nm.
  • Another aspect of the present invention provides a low dielectric constant film, which includes:
  • a fluorine-containing layer; the fluorine-containing layer is formed by aryl fluorosilane D through plasma enhanced chemical vapor deposition.
  • the low dielectric constant film wherein the porous layer is directly deposited on the surface of a substrate, and the fluorine-containing layer is deposited on the surface of the porous layer.
  • the low dielectric constant film includes an anticorrosive layer composed of an alkylene oxide compound A containing unsaturated double bonds and a siloxane containing unsaturated double bonds or
  • the silane compound B is formed on the surface of the substrate by plasma enhanced chemical vapor deposition, and the porous layer is deposited on the anticorrosive layer.
  • Another aspect of the present invention provides a method for preparing a low dielectric constant film, which includes the steps:
  • step (A) includes:
  • the low dielectric constant preparation method wherein the step (B) includes:
  • (B2) Gas is introduced, wherein the gas is selected from one or more of the combined nitrogen plus hydrogen and ammonia;
  • the porous layer is formed by the vapor deposition reaction of the compound C and the compound E under a predetermined power.
  • the low dielectric constant preparation method wherein the step (B) includes:
  • (B2) Gas is introduced, wherein the gas is selected from one or more of the combined nitrogen plus hydrogen and ammonia;
  • the porous layer is formed by the vapor deposition reaction of the compound C and the compound E under a predetermined power.
  • the low dielectric constant preparation method wherein the step (B) includes:
  • (B2) Gas is introduced, wherein the gas is selected from one or more of the combined nitrogen plus hydrogen and ammonia;
  • the oxygen gas is fed in intermittently.
  • the method for preparing a low dielectric constant film according to at least one embodiment of the present invention further includes step (C): vapor-depositing a fluorine-containing layer onto the porous layer.
  • step (C) includes:
  • the low dielectric constant preparation method further includes the step of cleaning and treating the surface of the substrate.
  • the method for preparing a low dielectric constant film of the present invention further includes the step of: operating the substrate to make the substrate move in the chamber.
  • FIG. 1 is a block diagram of the preparation process of a low dielectric constant film according to an embodiment of the present invention.
  • FIG. 2 is a block diagram of the formation process of the anticorrosive layer of the low dielectric constant film according to an embodiment of the present invention.
  • FIG. 3 is a block diagram of the formation process of a porous layer of a low dielectric constant film according to an embodiment of the present invention.
  • FIG. 4 is a block diagram of the formation process of the fluorine-containing layer of the low dielectric constant film according to an embodiment of the present invention.
  • the invention provides a low dielectric constant film and a preparation method thereof.
  • the low dielectric constant film contains silicon, oxygen, and carbon.
  • the low dielectric constant film contains silicon, oxygen, carbon and fluorine.
  • the low dielectric constant film has nano-sized pores.
  • the low dielectric constant has good dielectric properties.
  • the k value of the low dielectric constant film is less than 2.8.
  • the k value range of the low dielectric constant module is 1.9 to 2.7.
  • the k value range of the low dielectric constant module is 2.0 ⁇ 2.7.
  • the k value of the low dielectric constant film ranges from 2.1 to 2.2, 2.2 to 2.3, 2.4 to 2.5, 2.5 to 2.6, or 2.6 to 2.7.
  • the low dielectric constant film has good mechanical properties, and the Young's modulus of the low dielectric constant film is greater than 10 GPa.
  • the range of the Young's modulus of the low dielectric constant film is 10 to 41 GPa
  • the range of Young's modulus is 10 to 11 GPa, 11 to 12 GPa, 12 to 13 GPa, 23 to 24 GPa, 26 to 27 GPa, 27 to 28 GPa, 29 to 30 GPa, 31 to 32 GPa, or 33 to 34 GPa.
  • the hardness of the low dielectric constant film is greater than 1.5 GPa.
  • the hardness of the low dielectric constant film is in the range of 1.6 to 2.9 GPa, for example, the hardness is in the range of 1.62 to 2.79 GPa.
  • the low dielectric constant film has good hydrophobic properties, and the static contact angle of water attached to the low dielectric constant film is greater than 110°, for example, the static contact angle is greater than 120°, for example, the static contact angle is greater than 140°
  • the static contact angle ranges are: 110° ⁇ 115°, 115° ⁇ 120°, 120° ⁇ 125°, 125° ⁇ 130°, 130° ⁇ 135°, 135° ⁇ 140°, 140° ⁇ 145°, 145° ⁇ 150°or, 150° ⁇ 155° or 155° ⁇ 160°. Therefore, the low dielectric constant film has good corrosion resistance.
  • the iron sheet when the low dielectric constant film is deposited on the surface of metallic iron and undergoes a salt spray test for 90 hours, the iron sheet is not corroded or there are only a small number of corrosion points.
  • the low dielectric constant film is deposited on the metal iron surface after 96 hours of salt spray test, the iron sheet is not corroded.
  • the low dielectric constant film is a nano film, and its thickness ranges for example but not limited to 10 to 2000 nm.
  • the low dielectric constant film is formed on the surface of a substrate by a plasma enhanced chemical vapor deposition (PECVD) method.
  • PECVD plasma enhanced chemical vapor deposition
  • the raw materials constituting the low dielectric constant film are deposited on the surface of the substrate through a PECVD process, and the low dielectric constant film is formed on the surface of the substrate.
  • the low dielectric constant film is deposited on the surface of the circuit board of the LSI, so as to improve the RC delay phenomenon of the LSI.
  • the plasma enhanced chemical vapor deposition (PECVD) method generates plasma by glow discharge, and the discharge method includes microwave discharge, radio frequency discharge, ultraviolet, and electric spark discharge.
  • the low dielectric constant film is formed on the surface of a substrate by a plasma-enhanced chemical vapor deposition method using alkylene oxides, organic silicon compounds and fluorine-containing siloxane compounds as raw materials.
  • the low dielectric constant film has a multilayer structure.
  • the low dielectric constant film includes an anticorrosive layer, a porous layer, and a fluorine-containing layer.
  • the anti-corrosion layer, the porous layer and the fluorine-containing layer are formed on the surface of the substrate by a PECVD method.
  • the anti-corrosion layer is composed of silicone polymer, and further, the anti-corrosion layer is composed of nano-scale silicone polymer.
  • the organic silicon polymer or the raw material forming the organic silicon polymer is deposited on the surface of the substrate by PECVD to form the anticorrosive layer of the low dielectric constant film, or the first layer of the low dielectric constant film.
  • the anti-corrosion layer is a composite obtained by reacting an alkylene oxide compound A containing an unsaturated carbon-carbon double bond and a siloxane or silane compound B containing an unsaturated double bond.
  • the anti-corrosion layer can be made of vinyl alkylene oxide and vinyl organosilicon silane or vinyl organosiloxane, under the predetermined power and temperature of the reaction device, through PECVD, the surface of the substrate is deposited and reacted.
  • Vinyl alkylene oxide is an organic substance including epoxy groups and carbon-carbon double bonds, and its boiling point under normal pressure is not higher than 400°C.
  • Vinyl silanes or vinyl siloxanes include linear and cyclic silanes and siloxanes containing carbon-carbon unsaturated double bonds, and have a boiling point not higher than 300°C under normal pressure.
  • the compound A is selected from the combination: vinyl ethylene oxide, glycidyl methacrylate, allyl glycidyl ether, 1,2-epoxy-4-vinylcyclohexane, 2,3 -One or more mixtures of epoxypropyldimethylvinylsilane and 2,3-epoxypropyldichlorovinylsilane.
  • the compound B is selected from the combination: allyl trimethoxy silane, vinyl triethoxy silane, trimethyl vinyl silane, 3-butenyl trimethyl silane, vinyl trimethyl ketoxime Silane, tetramethyldivinyldisiloxane, tetramethyltetravinylcyclotetrasiloxane, 1,2,2-trifluorovinyltriphenylsilane, dimethylmethoxyvinylsilane , One or more mixtures of 4-styryl (trimethoxysiloxy) silane.
  • an auxiliary gas needs to be introduced for vapor deposition.
  • the auxiliary gas is exemplified but not limited to inert gas He, Ar, or a mixed gas of He and Ar.
  • the anti-corrosion layer is formed of a composite of epoxy resin and organic silicon.
  • the epoxy resin material and the organic silicon material are deposited on the surface of the substrate by PECVD to form a polymer layer with anti-corrosion properties.
  • a single atmosphere or a mixed atmosphere of vinyl alkylene oxide, vinyl siloxane, and vinyl silane is used as the reaction source, and the organic silicon polymer composite nano film layer is obtained by vapor deposition in a low temperature and low pressure plasma environment, that is, The anti-corrosion layer is obtained.
  • the porous layer is silicone with a plurality of pores, and the k value of the low dielectric constant film is adjusted by the porosity of the porous layer.
  • the organic silicon material is deposited on the surface of the substrate by PECVD to form an organic silicon nano-layer with a porous structure, thereby forming a porous layer of the low dielectric constant nano film, or the second layer of the low dielectric constant film .
  • auxiliary gas needs to be introduced to form the porous layer.
  • the hydrocarbon organics in the auxiliary gas are mainly branched chain alkanes, cycloalkanes, and aromatic hydrocarbons with a carbon number of 12 or less.
  • the porous layer may be formed by the reaction of compound C and compound E.
  • the compound C is an organosilicon compound, for example, it may be an organosiloxane or an organosilane.
  • the compound E may be an alkane compound or a benzene compound.
  • the porous layer may be made of organosilane and/or organosiloxane compound C and alkane compound and/or benzene compound E.
  • the surface deposition reaction of the anti-corrosion layer is obtained.
  • the organosilicon compound C includes branched, cyclic silane or siloxane, and a liquid or gas with a boiling point of less than 350°C under normal pressure.
  • compound C is selected from the combination: ⁇ -glycidoxypropyltrimethoxysilane; D4H cyclotetrasiloxane, hexamethylcyclotrisiloxane, tris-(trimethoxysilane) phenylsilane, Tert-butyldimethylchlorosilane, phenylethynyltrimethylsilane, biphenylvinyltrimethylsilane, octaphenylcyclotetrasiloxane, triphenylhydroxysilane, trifluoropropylmethyl ring Trisiloxane, 2,2,4,4-tetramethyl-6,6,8,8-tetraphenylcyclotetrasiloxane, tetramethyltetravinylcyclotetrasiloxane, 3-glycidol Etheroxypropyltriethoxysilane, tetramethyldivinyldisiloxane, t
  • the compound E is selected from the combination: one or more mixtures of cyclobutane, cyclopentane, cyclohexane, benzene, toluene, and p-xylene.
  • the porous layer is continuously deposited by the PECVD method in the same reaction chamber.
  • oxygen gas is introduced into the gap at a predetermined frequency under a nitrogen/hydrogen and/or ammonia atmosphere, and the compound C and The compound E deposition reaction results in the porous layer.
  • the anticorrosive layer is spaced between the porous layer and the substrate, so that the porosity of the porous layer will not or less affect the low dielectric constant film and the substrate.
  • the binding force of, and the k value can be made smaller by increasing the porosity.
  • the fluorine-containing layer is a fluorosilicone polymer, and further, the fluorine-containing layer is an organofluorosilicon containing an aromatic group with a low dielectric constant.
  • the rigid structure of the aromatic group is used to improve the The mechanical properties of the fluorine-containing layer.
  • the fluorine-containing layer is organofluorosilicon containing phenyl groups. The steric hindrance of the benzene ring is relatively large, and the roughness of the low dielectric constant film can be adjusted.
  • the content of the fluorine-containing phenyl group in the low dielectric constant film can be changed by changing the ratio of the amount of fluorine-containing aromatic organosilane and cyclosiloxane. , By adjusting the content of the fluorine-containing aromatic group to adjust the electrical and mechanical properties of the low dielectric constant film, and further reduce the k value of the low dielectric constant film.
  • a fluorine-silicon layer containing an aromatic structure is deposited on the surface of the porous layer, in other words, the third layer of the low dielectric constant film.
  • the fluorine-containing layer is obtained by deposition reaction of aromatic fluorosilane D on the surface of the porous layer by PECVD.
  • the fluorine-containing layer has low surface energy, good hydrophobic properties, and a large static contact angle of water on its surface.
  • the low dielectric constant film forms organofluorosilicon containing aromatic groups on the surface layer, and the rigid structure of the aromatic groups is used to improve the mechanical properties of the low dielectric constant film.
  • compound D is selected from the combination: pentafluorophenyltriethoxysilane, pentafluorophenyltrimethoxysilane, pentafluorophenyltrichlorosilane, pentafluorophenyldimethylchlorosilane, perfluorooctyl Ethylpentafluorophenyldichlorosilane, pentafluorodichlorophenylperfluorohexylethylsilane, perfluorooctyldichlorophenylsilane, perfluorooctyldiethoxyphenylsilane, perfluorooctylethylsilane One or more mixtures of pentafluorophenyldimethoxysilane, perfluorobutylethylpentafluorophenyldichlorosilane, and perfluorobutylethylpent
  • the gaseous compound D is continuously introduced into the same reaction chamber at a predetermined power, and deposited for a predetermined time to obtain the low dielectric constant film The surface.
  • a plasma-enhanced chemical vapor deposition technique is used on the surface of the low dielectric constant film to deposit a fluorine-containing aromatic silane on the cavity of the porous three-dimensional organic silicon coating and the surface of the coating.
  • the fluorine-containing aromatic silane has a low dielectric constant, and the steric hindrance of the benzene ring is large, which can adjust the roughness of the nano-coating.
  • the ratio of the amount of fluoroaromatic silicone monomer and cyclosiloxane is used to change the content of fluorine-containing phenyl groups in the molecule; the electrical properties of low dielectric constant material films can be adjusted by adjusting the content of fluorine-containing aromatic groups in the molecule. Other aspects of performance.
  • the low dielectric constant film of the present invention is composed of a multilayer structure, such as two layers or three or more layers.
  • the low dielectric constant film is composed of a two-layer structure. constitute.
  • the low dielectric constant film is composed of the anti-corrosion layer and the porous layer to form a two-layer structure.
  • chemical vapor deposition of compound A and compound B can be formed on the surface of the substrate.
  • the anti-corrosion layer and then continue to chemical vapor deposition of compound C and compound E to form the porous layer, the anti-corrosion layer is the bottom layer, and the porous layer is the surface layer.
  • the low dielectric constant film of the two-layer structure composed of the anticorrosive layer and the porous layer while reducing the k value, enhances the bonding force and viscosity between the low dielectric constant film and the substrate.
  • the low dielectric constant film is composed of the porous layer and the fluorine-containing layer to form a two-layer structure.
  • the compound C and the compound E can be formed by chemical vapor deposition on the surface of the substrate.
  • the porous layer, and then the chemical vapor deposition of compound D is continued to form the fluorine-containing layer, the porous layer is the bottom layer, and the fluorine-containing layer is the surface layer.
  • the low dielectric constant film of the two-layer structure composed of the porous layer and the fluorine-containing layer reduces the k value while improving the hydrophobic performance of the low dielectric constant film and improving the deposited substrate Anti-corrosion performance.
  • the low dielectric constant film is composed of the anti-corrosion layer, the porous layer, and the fluorine-containing layer to form a three-layer structure.
  • chemical vapor deposition of compounds on the surface of the substrate A and compound B form the anti-corrosion layer
  • chemical vapor deposition of compound C and compound E to form the porous layer continue chemical vapor deposition of compound D on the porous layer to form the fluorine-containing layer
  • the anti-corrosion layer is The bottom layer
  • the porous layer is the middle layer
  • the fluorine-containing layer is the surface layer.
  • the low dielectric constant film of the three-layer structure composed of the anti-corrosion layer, the porous layer and the fluorine-containing layer improves the overall dielectric constant of the low dielectric constant film through the alternate arrangement of different layers Performance, mechanical properties and hydrophobicity, and the alternate arrangement is conducive to the formation of a porous layer with large pore volume.
  • the pore structure in the low dielectric constant nanomembrane has a greater impact on the reduction of the dielectric constant, and also affects the mechanical properties and hydrophobicity. For example, when the porosity increases, the k value can be significantly reduced. It is small, but the increase in porosity also affects the decrease of the mechanical and the bonding force with the surface of the substrate, and when there are many surface pores, the hydrophobicity decreases.
  • the reduction of the dielectric constant of the nanomembrane depends on the total air volume after the introduction of the porous material, which includes three aspects: (1) the void volume caused by the incomplete filling of the porous SiOCNH channels; (2) the random arrangement of the fluorine-silicon chains The void created; (3) The free volume created by the addition of porous SiOCNH.
  • the low-dielectric constant film has a two-layer or three-layer structure formed by the anti-corrosion layer, the porous layer and/or the fluorine-containing layer, so that the dielectric constant is reduced and the mechanical properties are reduced. And the balance between hydrophobicity.
  • the organic silicon nano-film and the organic silicon/oxygen are deposited alternately, and oxygen is introduced after the organic silicon layer is formed.
  • the hydrocarbon part reacts with oxygen to form an irregular rough surface, and then SiOCNH is deposited on the surface, which helps to form large pores with a higher specific surface area, and the alternating structure helps to strengthen the low dielectric constant film and the substrate The adhesion.
  • the low dielectric constant film obtained by multiple plasma-enhanced chemical vapor deposition forms a three-dimensional network structure, which does not need to form pores with the aid of a pore former, and does not require high-temperature annealing treatment.
  • a cyclic organosilicon monomer is selected to copolymerize with a large-volume monomer with larger steric hindrance. This copolymerization is carried out in an O 2 plasma atmosphere, and the O 2 In this way, the Si-O bond and the hydrocarbon bond are ensured, so that the organic silicon nano coating with a three-dimensional structure and low dielectric constant can be prepared in a controllable manner.
  • FIG. 1 is a block diagram of the preparation process of a low dielectric constant film according to an embodiment of the present invention.
  • 2 is a block diagram of the formation process of the anticorrosive layer of the low dielectric constant film according to an embodiment of the present invention.
  • 3 is a block diagram of the formation process of a porous layer of a low dielectric constant film according to an embodiment of the present invention.
  • 4 is a block diagram of the formation process of the fluorine-containing layer of the low dielectric constant film according to an embodiment of the present invention.
  • the low dielectric constant is obtained by performing multiple PECVD reactions through a plasma-enhanced chemical vapor deposition reaction device.
  • the method for preparing the low dielectric constant film includes the steps:
  • the formation process of the anti-corrosion layer includes the steps:
  • the substrate Before step 101, the substrate may also be pre-treated, such as cleaning the surface of the substrate.
  • the pre-treatment process of the substrate includes the steps:
  • Ultrasonic cleaning of the substrate Put the substrate into a container filled with deionized water, perform ultrasonic cleaning, the cleaning time is 10-30 minutes, and then take it out and put it in a drying oven to dry;
  • one or more of the above-mentioned methods can be selected for pre-treatment, and the present invention does not limit this aspect.
  • the process of step 101 may be: placing a body with a clean surface in the reaction chamber of a plasma-enhanced chemical vapor deposition reaction device, and then continuously evacuating the reaction chamber to reduce the vacuum degree in the reaction chamber to 10 ⁇ 200 mtorr, and pass in the inert gas He, Ar, or He and Ar mixed gas, open the movement mechanism to make the substrate move in the reaction chamber, and pass into the vinyl ring after the pressure and temperature reach the set value Oxygen compound A and vinyl organosilicon compound B, the plasma power is adjusted to 30 ⁇ 500W, the chamber temperature is adjusted to 10 ⁇ 100°C, and plasma enhanced chemical vapor deposition is performed. After the reaction is completed, stop passing the reactants and increase the temperature. High cavity pressure to atmospheric pressure.
  • the step 101 may also be referred to as an anti-corrosion treatment step. This process enables the low dielectric constant film to be more tightly bonded to the substrate and prevents the substrate from being corroded.
  • a dynamic coating method is adopted, so that the low dielectric constant film is more uniformly attached to the substrate, and the substrate is less
  • the difference in coatings at different positions solves the problem of uneven thickness caused by different concentrations of deposits in different areas of the substrate.
  • the substrate is moved in the reaction chamber, so that different positions of the substrate can be uniformly attached to the anti-corrosion layer.
  • the operation mode of the substrate may include multiple modes.
  • the substrate may revolve around the center axis of the substrate or a predetermined axis with the center point of the reaction chamber as a reference point or a predetermined axis, or ,
  • the base body respectively rotates around two axes in the horizontal and vertical directions.
  • the porous layer needs to be formed by vapor deposition of organosilane and/or organosiloxane compound C and alkane compound and/or benzene compound E.
  • step 102 is performed after step 101, that is, after the anti-corrosion layer is formed, the porous layer is formed on the anti-corrosion vehicle, and the in an embodiment, step 102 can also be performed directly, that is, the porous layer is directly formed on the surface of the substrate without forming the anti-corrosion layer.
  • the formation process of the porous layer includes the steps:
  • the porous layer is formed by a vapor deposition reaction of organosilane and/or organosiloxane compound C and alkane compound and/or benzene compound E;
  • the formation process of the porous layer in the step 102 may be: after the antiseptic treatment, while continuing to pass in the compound C and the compound E, the inlet gas is nitrogen/hydrogen and/or ammonia while passing in Gas oxygen, oxygen is fed in intermittently, the frequency is 10 to 600 seconds, that is, oxygen is fed in every 10 to 600 seconds, the oxygen reaction time is 10 to 600 seconds, and the feeding of compound C and compound E is stopped after the reaction is completed. That is, the porous layer is formed.
  • step 102 may also include step 1013, that is, making the substrate continue to move in the reaction chamber. That is, the porous layer is formed under dynamic conditions.
  • the reactive gases nitrogen/hydrogen and/or ammonia are added for the deposition of N-containing nano-coatings.
  • the nitrogen content of the nano-coatings is determined by the nitrogen content of the mixed monomer and the nitrogen content of the mixed gas. / Determined by the nitrogen content of hydrogen and/or ammonia.
  • the flow of O 2 is one of the factors that affect the oxygen content of the nano coating.
  • the organic silicon nano film and the organic silicon/oxygen are deposited alternately, oxygen is intermittently introduced after the organic silicon layer is formed, and the hydrocarbon part of the organic silicon layer reacts with the oxygen Forming an irregular rough surface and then depositing SiOCNH on the surface helps to form large pores with a higher specific surface area, and the alternating structure helps to enhance the adhesion of the low dielectric constant film to the substrate.
  • the fluorine-containing layer is formed by vapor deposition of aromatic fluorosilane D.
  • the formation process of the fluorine-containing layer in the step 103 includes the steps:
  • the fluorine-containing layer is formed by an aromatic fluorosilane D vapor deposition reaction.
  • the formation process of the fluorine-containing layer in the step 103 may be: after the porous layer is formed, inert gas is introduced, nitrogen/hydrogen and/or ammonia gas is stopped, and compound D is simultaneously introduced. , Adjust the plasma power to 30-150W, continue the plasma polymerization reaction, take out the sample after 10-60 minutes of vapor deposition, and then obtain the required multifunctional nano coating, that is, the low dielectric constant film.
  • the step 103 is after the step 102, that is, the fluorine-containing layer is formed after the porous layer is formed, in other words, the fluorine-containing layer is attached to the surface of the porous layer , Thereby greatly enhancing the hydrophobicity of the low dielectric constant film.
  • step 103 may also include step 1013, that is, making the substrate continue to move in the reaction chamber. That is, the fluorine-containing layer is formed under dynamic conditions.
  • a high temperature annealing step may also be included.
  • the pore-forming agent such as norbornadiene or ⁇ -terpinene, is not used to form the pore structure. Therefore, it is necessary to remove the pore-forming agent later. Therefore, high temperature annealing treatment is not necessary.
  • the reaction chamber or coating chamber has a volume of 10L to 2000L, and the process parameters can be adjusted according to coating requirements and the size of the coating chamber volume.
  • the plasma coating power range is 0.01W ⁇ 500W
  • the coating time is 30s ⁇ 7200s
  • the vaporization temperature is 30°C ⁇ 100°C
  • the cavity temperature is 20°C ⁇ 100°C
  • the flow rate can be selected as 0 ⁇ 1000sccm respectively.
  • the flow rate of oxygen and/or N 2 /H 2 , NH 3 , and hydrocarbons is set to be 1 to 200 sccm
  • the selectable range of the access frequency is from 10 s to 500 s.
  • the power is 100W
  • the coating time is 1800s
  • the vaporization temperature is 95°C.
  • the cavity temperature is room temperature
  • He atmosphere He flow rate is 10 ssccm
  • reactant gases A and B are introduced, which are vinyl oxirane and trimethyl vinyl silane, respectively, and the flow rates are 100 sccm and 100 sccm, respectively.
  • the flow rates are 100 sccm and 100 sccm respectively.
  • O 2 is introduced intermittently, the O 2 frequency is 300 seconds once, the power is changed to 50W, the coating time is 3600s, the vaporization temperature is 110°C, the cavity temperature is 25°C, the O 2 flow rate is 10 sccm, and the O 2 is closed after the coating time is completed. 2.
  • N 2 and H 2 are introduced into the reactant D perfluorooctyl dichlorophenyl silane, other parameters remain unchanged, after the coating is completed, the gas pressure is increased to normal pressure, and the sample is taken out to obtain the invention
  • the low-permittivity nano-coating with a porous structure, that is, the low-permittivity film is formed on the substrate.
  • the power is 100W
  • the coating time is 1800s
  • the vaporization temperature is 95°C
  • the cavity temperature is room temperature
  • the He atmosphere is 10 sccm
  • the reactants A and B, vinyl oxirane and trimethoxy vinyl silane are introduced, and the flow rates are 100 sccm and 100 sccm, respectively.
  • the flow of N 2 is 5 sccm, pass in reactants C and E, respectively
  • the flow rates are 100 sccm and 100 sccm respectively.
  • O 2 is introduced intermittently, the O 2 frequency is 300 seconds once, the power is changed to 50W, the coating time is 3600s, the vaporization temperature is 110°C, the cavity temperature is 25°C, the O 2 flow rate is 10 sccm, and the O 2 is closed after the coating time is completed. 2.
  • the power is 100W
  • the coating time is 1800s
  • the vaporization temperature is 95°C
  • the cavity temperature is room temperature
  • He atmosphere He
  • the flow rate is 10 sccm
  • the reactants A and B are introduced, which are allyl glycidyl ether and trimethyl vinyl silane, respectively, and the flow rates are 100 sccm and 100 sccm, respectively.
  • the reactants allyl glycidyl ether and trimethyl vinyl silane continue feeding He, and at the same time feeding NH 3 , the flow of NH 3 is 100 sccm, and the reactants C and E are fed, respectively These are tris-(triethoxysilane) phenylsilane and toluene, and the flow rates are 100 sccm and 100 sccm, respectively.
  • O 2 is fed in intermittently, the O 2 frequency is 150 seconds once, the power is changed to 50W, the coating time is 3600s, the vaporization temperature is 110°C, the cavity temperature is 25°C, and the O 2 and NH 3 are closed after the coating time is completed.
  • the power is 100W
  • the coating time is 1800s
  • the pressure is 80mTorr
  • the vaporization temperature is 95°C
  • the cavity temperature is room temperature.
  • Ar atmosphere He flow rate is 10 sccm
  • reactants A and B are introduced, which are 2,3-epoxypropyl dimethyl vinyl silane and dimethyl methoxy vinyl silane, and the flow rates are 80 sccm and 120 sccm, respectively.
  • the O 2 is fed in intermittently, the O 2 frequency is 150 seconds once, the power is changed to 50W, the coating time is 3600s, the vaporization temperature is 110°C, the cavity temperature is 25°C, the O 2 flow rate is 30sccm, and the O2 is turned off after the coating time is completed , Pass the reactant D perfluorooctylethyl pentafluorophenyl dimethoxysilane, the power is changed to 50W, the coating time is changed to 1800s, the pressure is 120mTorr, the vaporization temperature is 110°C, and the cavity temperature is 30°C After the coating is completed, the gas pressure is increased to normal pressure, and the sample is taken out to obtain the low-dielectric constant nano-coating with porous structure according to the present invention.
  • the power is 80W
  • the coating time is 3600s
  • the pressure is 80mTorr
  • the vaporization temperature is 95°C
  • the cavity temperature is room temperature.
  • Ar atmosphere Ar flow rate is 20 sccm
  • reactants A and B are introduced, which are 2,3-epoxypropyl dimethyl vinyl silane and trimethyl vinyl silane, and the flow rates are 80 sccm and 120 sccm, respectively.
  • O 2 is introduced intermittently, the O 2 frequency is 120 seconds once, the power is changed to 90W, the coating time is 3600s, the vaporization temperature is 110°C, the cavity temperature is 50°C, the O 2 flow rate is 80sccm, and the O 2 is closed after the coating time is completed. 2.
  • N 2 and H 2 pass the reactant D perfluorooctylethyl pentafluorophenyl dimethoxysilane, the power is changed to 80W, the coating time is changed to 1800s, the pressure is 120mTorr, and the vaporization temperature is 110°C , The cavity temperature is 30 DEG C, after the coating is completed, the gas pressure is increased to normal pressure, and the sample is taken out to obtain the low dielectric constant nano coating with porous structure according to the present invention.
  • the power is 80W
  • the coating time is 3600s
  • the pressure is 80mTorr
  • the vaporization temperature is 95°C
  • the cavity temperature is room temperature.
  • Ar atmosphere Ar flow rate is 20 sccm
  • reactants A and B are introduced, which are 2,3-epoxypropyl dimethyl vinyl silane and 4-styryl (trimethoxysiloxy) silane, and the flow rates are respectively 80sccm and 120sccm.
  • H 2 , N 2 and H 2 are 30 sccm and 90 sccm, respectively, and the reactants C and E are introduced, which are tris-(triethylsilane) phenyl silane and cyclopentane, respectively.
  • the flow rate is 20 sccm. And 180sccm.
  • O 2 is introduced intermittently, the O 2 frequency is 100 seconds once, the power is changed to 90W, the coating time is 3600s, the vaporization temperature is 110°C, the cavity temperature is 50°C, the O 2 flow rate is 20sccm, and the O 2 is closed after the coating time is completed. 2.
  • N 2 and H 2 pass the reactant D perfluorobutylethyl pentafluorophenyl dichlorosilane, the power is changed to 80W, the coating time is changed to 1800s, the pressure is 120mTorr, the vaporization temperature is 110°C, the cavity The body temperature is 30°C, after the coating is completed, the gas pressure is increased to normal pressure, and the sample is taken out to obtain the low dielectric constant nano coating with porous structure according to the present invention.
  • the power is 80W
  • the coating time is 3600s
  • the pressure is 80mTorr
  • the vaporization temperature is 95°C
  • the cavity temperature is room temperature.
  • Ar atmosphere Ar flow rate is 20 sccm
  • reactants A and B are introduced, respectively 2,3-epoxypropyldichlorovinylsilane and tetramethyltetravinylcyclotetrasiloxane, and flow rates are 150 sccm and 50 sccm, respectively.
  • H 2 and H 2 are 30 sccm sccm and 90 sccm sccm, and reactants C and E are introduced, which are trifluoropropyl methyl cyclotrisiloxane and benzene, respectively, and the flow rates are 50 sccm and 150 sccm, respectively.
  • O 2 is introduced intermittently, O 2 frequency is 600 seconds once, power is changed to 90W, O 2 flow is 50sccm, coating time is 3600s, vaporization temperature is 110°C, cavity temperature is 50°C, O 2 flow is 60sccm, coating After the time is over, turn off O 2 , N 2 and H 2 , and pass in reactant D perfluorobutylethyl pentafluorophenyl dimethoxysilane.
  • the power is changed to 80W, the coating time is changed to 3600s, and the pressure is 100mTorr.
  • the temperature is 110°C and the temperature of the cavity is 30°C.
  • the gas pressure is increased to normal pressure, and the sample is taken out to obtain the low dielectric constant nano-coating with porous structure of the present invention.
  • the power is 80W
  • the coating time is 3600s
  • the pressure is 80mTorr
  • the vaporization temperature is 95°C
  • the cavity temperature is room temperature.
  • Ar atmosphere Ar flow rate is 20 sccm
  • reactants A and B are introduced, respectively 2,3-epoxypropyldichlorovinylsilane and tetramethyltetravinylcyclotetrasiloxane, and flow rates are 150 sccm and 50 sccm, respectively.
  • N 2 and H 2 are 30 sccm and 90 sccm, respectively, and reactants C and E are passed through, which are tris-(triethylsilyl) phenyl silane and cyclohexane, respectively, and the flow rates are 20 sccm and 180 sccm, respectively.
  • O 2 is fed in intermittently, the O 2 frequency is 180 seconds once, the power is changed to 90W, the coating time is 3600s, the vaporization temperature is 110°C, the cavity temperature is 50°C, the O 2 flow rate is 30sccm, and the O 2 is closed after the coating time is completed. 2.
  • N 2 and H 2 pass the reactant D perfluorooctylethyl pentafluorophenyl dimethoxysilane, the power is changed to 80W, the coating time is changed to 1800s, the pressure is 120mTorr, and the vaporization temperature is 110°C , The cavity temperature is 30 °C, after the coating is completed, the gas pressure is increased to normal pressure, the sample is taken out, and finally annealed at 450 °C for 90 min, the low dielectric constant nanometer with porous structure of the present invention can be obtained. coating.
  • the power is 80W
  • the coating time is 3600s
  • the pressure is 80mTorr
  • the vaporization temperature is 95°C
  • the cavity temperature is room temperature.
  • Ar atmosphere Ar flow rate is 20 sccm
  • reactants A and B are introduced, respectively 2,3-epoxypropyldichlorovinylsilane and tetramethyltetravinylcyclotetrasiloxane, and flow rates are 150 sccm and 50 sccm, respectively.
  • the flow rates are 50sccm and 150sccm, respectively.
  • O 2 is introduced intermittently, the O 2 frequency is 150 seconds once, the power is changed to 90W, the coating time is 3600s, the O 2 flow rate is 20sccm, the vaporization temperature is 110°C, the cavity temperature is 50°C, and the O is closed after the coating time is completed. 2.
  • the power is changed to 80W
  • the coating time is changed to 1800s
  • the pressure is 100mTorr
  • the vaporization temperature is 110°C
  • the cavity temperature is 30
  • the gas pressure is increased to normal pressure and the sample is taken out to obtain the low dielectric constant nano coating with porous structure according to the present invention.
  • Example 9 Compared with Example 9, the anti-corrosion layer was not prepared. Take a clean PCB, place it in the fixture of the plasma coating equipment, pass in Ar, and directly pass in reactants C and E, which are hexamethyldisilazane and cyclopentane, respectively, and the flow rate is 100sccm. And 150sccm. O 2 is introduced intermittently, the O 2 frequency is 150 seconds once, the power is changed to 90W, the coating time is 3600s, the O 2 flow rate is 20sccm, the vaporization temperature is 110°C, the cavity temperature is 50°C, and the O is closed after the coating time is completed. 2.
  • the power is changed to 80W
  • the coating time is changed to 1800s
  • the pressure is 100mTorr
  • the vaporization temperature is 110°C
  • the cavity temperature is 30
  • the gas pressure is increased to normal pressure and the sample is taken out to obtain the low dielectric constant nano coating with porous structure according to the present invention.
  • the thickness of the nano-coating is measured by the American Filmetrics F20-UV-film thickness measuring instrument.
  • the water contact angle of the nano coating is tested according to the GB/T 30447-2013 standard.
  • the dielectric constant is tested according to the recommended method of GB/T 1409-2006 for measuring the permittivity and dielectric loss factor of electrical insulating materials at power frequency, audio frequency, and high frequency (including meter wave wavelength).
  • Salt spray resistance test is carried out in accordance with GB/T 2423.18-2000 Environmental Test Method for Electrical and Electronic Products.
  • the Young's modulus of the nano-coating is measured according to the technical specifications of JB/T 12721-2016 solid material in-situ nanoindentation/scratch tester.

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Abstract

本发明提供一低介电常数膜及其制备方法，其中所述低介电常数膜以环氧烷烃、有机硅化合物和含氟硅氧烷化合物为原材料，通过等离子体增强化学沉积方法在一基体表面形成，由此在基体表面形成具有较低介电常数，且具有良好疏水性的纳米膜。

Description

低介电常数膜及其制备方法 技术领域
本发明涉及超大规模集成电路制造领域，详而言之，涉及一低介电常数膜及其制备方法。
背景技术
随着全球统一的5G标准出炉，无线电或者微电子领域的发展将越来越快，电子芯片的性能需求飞速提高，集成电路的尺寸不断缩小，也就是说，芯片上集成的器件数目越来越多，集成度要求越来越高。
由于大规模集成电路的集成度越来越高，器件特征尺寸逐渐减小，导致导线电阻以及导线间和层间电容增加，引起电阻-电容(RC)延迟上升，从而出现信号传输延时、噪声干扰增强和功率损耗增大等一系列问题，这极大限制了器件的高速性能。缓解这些问题的重要方法之一就是降低介质材料的介电常数(k)。
在无线电通讯技术领域中，尤其是在GHz范围的通信技术中，具有低介电常数的低损耗材料已经引起了人们越来越广泛的关注。
一般来说，降低材料的k值的方法有两种，一种方式是降低分子极化率，即选择或者研发低极化能力的材料，比如，在材料中形成低极化率的键(如Si-C、Si-F、C-H等)；另一种方式是减小单位体积内极化分子数N，这个可以通过向材料中引入具有纳米尺寸的孔隙加以实现，随着孔隙率的增加，介电常数会较快的降低。目前，在现有技术中，这两个方面都已有一些研究。
在已有的一些研究中，采用等离子体增强化学气相沉积(PECVD)技术来制备低介电常数的纳米膜，举例地，将一种或多种有机硅化合物引入一等离子体增强化学气相沉积腔室中，并且引入一成孔剂到腔室内，在恒定射频功率条件下使得该一种或多种有机硅化合物与该成孔剂反应，以沉积一低k膜在该腔室的一基板上，进一步，对此低k膜施以后处理，以基本上移出此低k膜上的成孔剂。
虽然已经研发出一些具有低介电常数的有机硅膜，但是这些低介电常数膜存在一些不尽人意的地方。发明人发现现有的方式中存在一些有待改进的方面。
一方面，这些材料都需要加入成孔剂来形成孔隙，在形成孔隙后，再进一步去除该成孔剂，但是成孔剂一般都不能被完全去除，有时甚至残留较多，
另一方面，这些材料都是由直接在基板上形成带孔隙的膜层，而孔隙的形成使得膜层与基板的结合强度降低，或者说膜层在基板上的附着力较低，且高孔隙率使得介电常数更低，但是高孔隙率也使得结合强度更低，即，在这两方面存在矛盾。
另一方面，这些材料的机械强度较差、耐腐蚀性能差，造成纳米膜层容易在后续半导体处理过程中受到损伤。
另一方面，膜层通过PECVD技术在腔室中与成孔剂反应附着于基板，但是在形成时，膜层在基板的不同区域的均匀性没有任何控制，在腔室中的不同区域的浓度不同，因此容易造成膜层在基板上的不均匀的分布。
另一方面，现有的低介电常数纳米膜的疏水性较差，沉积于基体表面时，盐雾试验中，容易使得基体的表面被腐蚀，因此也不利用产品的长期使用，对于使用环境的要求也比较高。
这里的陈述仅提供与本发明有关的背景信息，而不必然地构成现有技术。
发明内容
本发明的一个优势在于提供一低介电常数膜及其制备方法，其包括至少两层结构，通过多层结构的配合调节所述低介电常数膜的k值，且改善所述低介电常数膜的结合力和/或者机械性能。
本发明的一个优势在于提供一低介电常数膜及其制备方法，其在一个实施例中，采用等离子体增强化学气相沉积(PECVD)方法形成一防腐层和一多孔层，所述防腐层附着于基体，形成与基体具有较强结合力的低介电常数(k)膜，并且具有较好的耐腐蚀性能。
本发明的一个优势在于提供一低介电常数膜及其制备方法，其中在惰性气体气氛下，将乙烯基有机硅单体和乙烯基环氧单体进行PECVD形成防腐层。
本发明的一个优势在于提供一低介电常数膜及其制备方法，其中在一个实施例中，所述防腐层是由含不饱和碳碳双键的环氧烷烃和含不饱和双键的硅氧烷或者硅烷反应得到的复合物。
本发明的一个优势在于提供一低介电常数膜及其制备方法，其将防腐层间隔 于多孔层和基体之间，使得所述多孔层的空隙率不会或较少影响所述低介电常数膜与基体的结合力，且通过提高孔隙率可以使得k值更小。
本发明的一个优势在于提供一低介电常数膜及其制备方法，其采用动态镀膜的方法，使得所述低介电常数膜更加均匀地附着于基体，减少了基体在不同位置镀膜的差异，解决了基体不同区域沉积物的浓度不同导致厚度不均匀的问题。
本发明的一个优势在于提供一低介电常数膜及其制备方法，其在氧气、氮气/氢气的单一气氛或者混合气氛下，将有机硅烷、有机硅氧烷的单一气氛或者混合气氛进行PECVD得到多孔层。
本发明的一个优势在于提供一低介电常数膜及其制备方法，其在表层形成氟硅聚合物，进一步降低所述低介电常数膜的k值。
本发明的一个优势在于提供一低介电常数膜及其制备方法，其在表层形成含有芳香基团的有机氟硅，利用芳香基的刚性结构，提高所述低介电常数膜的机械性能。
本发明的一个优势在于提供一低介电常数膜及其制备方法，其表面具有低表面能的氟硅聚合物，具有超疏水特性，水在其表面时的静态接触角大。
本发明的一个优势在于提供一低介电常数膜及其制备方法，其在形成所述低介电常数膜时，交替地进行有机硅纳米膜和所述有机硅/氧气的沉积，在形成有机硅层后通入氧气，有机硅层的碳氢部分与氧气反应形成不规则的粗糙表面，然后在表面沉积SiOCNH，有助于形成具有较高的比表面积的大孔隙，且交替结构有助于增强所述低介电常数膜与基体的附着力。
本发明的一个优势在于提供一低介电常数膜及其制备方法，其能够通过调节含氟芳香基的含量来调节所述低介电常数膜的介电性能以及机械性能。
本发明的一个优势在于提供一低介电常数膜及其制备方法，其在一个实施例中，采用PECVD方法形成一多孔层和一含氟层构成的两层结构，其在降低k值的同时，提高所述低介电常数膜的疏水性能，改善被沉积的基体的防腐蚀性能。
本发明的一个优势在于提供一低介电常数膜及其制备方法，其在一个实施例中，采用PECVD方法形成一防腐层和多孔层构成的两层结构，其在降低k值的同时，增强所述低介电常数膜和基体之间的结合力和黏性。
本发明的一个优势在于提供一低介电常数膜及其制备方法，其在一个实施例中，采用PECVD方法形成一防腐层、一多孔层和一含氟层构成的三层结构，其 通过不同层的交替布置，整体改善所述低介电常数膜的介电性能、机械性能以及疏水性，且交替布置的方式，有利于形成大孔容的多孔层。
本发明的一个优势在于提供一低介电常数膜及其制备方法，其不需要成孔剂形成孔隙结构，因此不需要进行高温退火处理去除成孔剂。
为了实现以上至少一发明目的，本发明的一方面提供一低介电常数膜，其以环氧烷烃、有机硅化合物和含氟硅氧烷化合物为原材料，通过等离子体增强化学气相沉积方法在一基体表面形成。
根据本发明的至少一个实施例所述的低介电常数膜，其包括一防腐层，所述防腐层由含不饱和双键的环氧烷烃化合物A和含不饱和双键的硅氧烷或者硅烷化合物B通过等离子体增强化学气相沉积于基体表面形成。
根据本发明的至少一个实施例所述的低介电常数膜，其包括一多孔层，
所述多孔层由有机硅烷和/或有机硅氧烷化合物C和烷烃化合物和/或者苯化合物E通过等离子体增强化学气相沉积形成。
根据本发明的至少一个实施例所述的低介电常数膜，其包括一多孔层，所述多孔层通过化合物C和化合物E通过等离子体增强化学气相沉积形成，所述化合物C包括有机硅化合物，所述化合物E包括烷烃化合物和苯化合物。
根据本发明的至少一个实施例所述的低介电常数膜，其包括一多孔层，所述多孔层通过化合物C和化合物E通过等离子体增强化学气相沉积形成，所述化合物C包括有机硅化合物，所述化合物E包括烷烃化合物。
根据本发明的至少一个实施例所述的低介电常数膜，其包括一多孔层，所述多孔层通过化合物C和化合物E通过等离子体增强化学气相沉积形成，所述化合物C包括有机硅化合物，所述化合物E包括苯化合物。
根据本发明的至少一个实施例所述的低介电常数膜，其包括一含氟层，所述含氟层由芳香基氟硅烷D通过等离子体增强化学气相沉积形成。
根据本发明的至少一个实施例所述的低介电常数膜，其底层由乙烯基环氧化合物和乙烯基有机硅化合物通过等离子体增强化学气相沉积于基体表面形成。
根据本发明的至少一个实施例所述的低介电常数膜，其中所述化合物A选自组合：乙烯基环氧乙烷、甲基丙烯酸缩水甘油酯、烯丙基缩水甘油醚、1,2-环氧-4-乙烯基环己烷、2,3-环氧丙基二甲基乙烯基硅烷、2,3-环氧丙基二氯乙烯基硅烷中的一种或多种混合物。
根据本发明的至少一个实施例所述的低介电常数膜，其中所述化合物B选自组合：烯丙基三甲氧基硅烷、乙烯基三乙氧基硅烷、三甲基乙烯基硅烷、3-丁烯基三甲基硅烷、乙烯基三丁酮肟基硅烷、四甲基二乙烯基二硅氧烷、四甲基四乙烯基环四硅氧烷、1,2,2-三氟乙烯基三苯基硅烷、二甲基甲氧基乙烯基硅烷、4-苯乙烯基(三甲氧基硅氧)基硅烷中的一种或多种混合物。
根据本发明的至少一个实施例，所述化合物C是有机硅氧烷。
根据本发明的至少一个实施例，所述化合物C是有机硅烷。
根据本发明的至少一个实施例所述的低介电常数膜，其中所述化合物C选自组合：γ-缩水甘油醚氧丙基三甲氧基硅烷；D4H环四硅氧烷、六甲基环三硅氧烷、三-(三甲氧硅烷)基苯基硅烷、叔丁基二甲基氯硅烷、苯基乙炔基三甲基硅烷、联苯基乙烯基三甲基硅烷、八苯基环四硅氧烷、三苯基羟基硅烷、三氟丙基甲基环三硅氧烷、2,2,4,4-四甲基-6,6,8,8-四苯基环四硅氧烷、四甲基四乙烯基环四硅氧烷、3-缩水甘油醚氧基丙基三乙氧基硅烷、四甲基二乙烯基二硅氧烷、四乙基二硅氧烷、六甲基二硅氧烷、苯基三(三甲基硅氧烷基)硅烷、三甲基苯基硅烷、六甲基二硅氮烷、烯丙基三苯基硅烷、苯基三氯硅烷、苯基三氟硅烷、苯基三乙氧基硅烷、苯基三甲基氧基硅烷、甲基苯基二甲氧基硅烷、二甲氧基甲基苯基硅烷、1,3-二氯四苯基二硅氧烷、苯基乙烯基三甲基硅烷、萘基乙烯基三甲基硅烷、二苯基二羟基硅烷、八甲基环四硅氧烷、六苯基环三硅氧烷、十甲基环五硅氧烷、苯基三氯硅烷、甲基苯基二氯硅烷、苯基二甲基氯硅烷、甲基苯基环三硅氧烷、三甲氧基甲基硅烷、三氟丙基甲基环三硅氧烷、三-(三乙氧硅烷)基苯基硅烷、全氟辛基乙基五氟苯基二甲氧基硅烷、三-(三乙基硅烷)基苯基硅烷。
根据本发明的至少一个实施例所述的低介电常数膜，其中所述化合物E选自组合：环丁烷、环戊烷、环己烷、苯、甲苯、对二甲苯中的一种或多种混合物。
根据本发明的至少一个实施例所述的低介电常数膜，其中所述化合物D选自组合：五氟苯基三乙氧基硅烷、五氟苯基三甲氧基硅烷、五氟苯基三氯硅烷、五氟苯基二甲基氯硅烷、全氟辛基乙基五氟苯基二氯硅烷、五氟二氯苯基全氟己基乙基硅烷、全氟辛基二氯苯基硅烷、全氟辛基二乙氧基苯基硅烷、全氟辛基乙基五氟苯基二甲氧基硅烷、全氟丁基乙基五氟苯基二氯硅烷、全氟丁基乙基五氟苯基二甲氧基硅烷中的一种或多种混合物。
根据本发明的至少一个实施例所述低介电常数膜，其中在气相沉积过程中通入辅助气体进行反应，所述辅助气体选自He、Ar中的一种或多种混合。
根据本发明的至少一个实施例所述低介电常数膜，其中在气相沉积过程中通入辅助气体进行反应，所述辅助气体选自氮气/氢气、氨气、氧气、碳氢有机物中的一种或多种混合。
根据本发明的至少一个实施例所述的低介电常数膜，其中所述低介电常数膜的介电常数值的范围选自2.1～2.2、2.2～2.3、2.4～2.5、2.5～2.6，或2.6～2.7。
根据本发明的至少一个实施例所述的低介电常数膜，其中所述低介电常数膜的杨氏模量范围为：10～11GPa、11～12GPa、12～13GPa、23～24GPa、26～27GPa、27～28GPa、29～30GPa、31～32GPa或33～34GPa。
根据本发明的至少一个实施例所述的低介电常数膜，其中所述低介电常数膜的静态接触角范围为：110°～115°、115°～120°、120°～125°、125°～130°、130°～135°、135°～140°、140°～145°、145°～150°或150°～155°。
根据本发明的至少一个实施例所述的低介电常数膜，其中所述低介电常数膜的厚度范围为10～2000nm。
本发明的另一方面提供一低介电常数膜，其包括：
一多孔层，所述多孔层由有机硅烷和/或有机硅氧烷化合物C和烷烃化合物和/或者苯化合物E通过等离子体增强化学气相沉积形成；和
一含氟层；所述含氟层由芳香基氟硅烷D通过等离子体增强化学气相沉积形成。
根据本发明的至少一个实施例所述的低介电常数膜，其中所述多孔层直接沉积于一基体的表面，所述含氟层沉积于多孔层表面。
根据本发明的至少一个实施例所述的低介电常数膜，其包括一防腐层，所述防腐层由含不饱和双键的环氧烷烃化合物A和含不饱和双键的硅氧烷或者硅烷化合物B通过等离子体增强化学气相沉积于基体表面形成，所述多孔层沉积于所述防腐层。
本发明的另一方面提供一低介电常数膜的制备方法，其包括步骤：
(A)在一基体的表面气相沉积一防腐层；和
(B)气相沉积一多孔层。
根据本发明的至少一个实施例所述的低介电常数膜的制备方法，其中所述步 骤(A)包括：
(A1)引入乙烯基环氧烷烃化合物A和乙烯基有机硅化合物B至反应装置的腔室内；
(A2)通入惰性气体至反应装置的腔室中；和
(A3)在预定功率下，由所述化合物A和化合物B反应沉积至所述基体表面形成所述防腐层。
根据本发明的至少一个实施例所述的低介电常数制备方法，其中所述步骤(B)包括：
(B1)通入化合物C和化合物E，其中所述化合物C包括有机硅化合物，所述化合物E包括烷烃化合物和苯化合物；
(B2)通入气体，其中所述气体选自组合氮气加氢气和氨气中的一种或者几种；
(B3)通入氧气；和
(B4)在预定功率下，由所述化合物C和所述化合物E气相沉积反应形成所述多孔层。
根据本发明的至少一个实施例所述的低介电常数制备方法，其中所述步骤(B)包括：
(B1)通入化合物C和化合物E，其中所述化合物C包括有机硅化合物，所述化合物E包括烷烃化合物；
(B2)通入气体，其中所述气体选自组合氮气加氢气和氨气中的一种或者几种；
(B3)通入氧气；和
(B4)在预定功率下，由所述化合物C和所述化合物E气相沉积反应形成所述多孔层。
根据本发明的至少一个实施例所述的低介电常数制备方法，其中所述步骤(B)包括：
(B1)通入化合物C和化合物E，其中所述化合物C包括有机硅化合物，所述化合物E包括苯化合物；
(B2)通入气体，其中所述气体选自组合氮气加氢气和氨气中的一种或者几种；
(B3)通入氧气；和
(B4)在预定功率下，由所述化合物C和所述化合物E气相沉积反应形成
所述多孔层。
根据本发明的至少一个实施例所述的低介电常数膜制备方法，其中通入氧气的方式为间歇通入。
根据本发明的至少一个实施例所述的低介电常数膜制备方法，其还包括步骤(C)：气相沉积一含氟层至所述多孔层。
根据本发明的至少一个实施例所述的低介电常数膜制备方法，其中所述步骤(C)包括：
(C1)通入惰性气体；
(C2)通入芳香基氟硅烷D；和
(C3)在预定功率下，使得芳香基氟硅烷D气相沉积反应形成所述含氟层
根据本发明的至少一个实施例所述的低介电常数制备方法，其还包括步骤：清洗处理所述基体表面。
根据本发明的至少一个实施例所述的低介电常数膜的制备方法，其还包括步骤：运转所述基体，使得所述基体在腔室中运动。
附图说明
图1是根据本发明的一个实施例的低介电常数膜的制备过程框图。
图2是根据本发明的一个实施例的低介电常数膜的防腐层的形成过程框图。
图3是根据本发明的一个实施例的低介电常数膜的多孔层的形成过程框图。
图4是根据本发明的一个实施例的低介电常数膜的含氟层的形成过程框图。
具体实施方式
以下描述用于揭露本发明以使本领域技术人员能够实现本发明。以下描述中的优选实施例只作为举例，本领域技术人员可以想到其他显而易见的变型。在以下描述中界定的本发明的基本原理可以应用于其他实施方案、变形方案、改进方案、等同方案以及没有背离本发明的精神和范围的其他技术方案。
本领域技术人员应理解的是，在本发明的揭露中，术语“纵向”、“横向”、“上”、“下”、“前”、“后”、“左”、“右”、“竖直”、“水平”、“顶”、“底”、“内”、“外”等指 示的方位或位置关系是基于附图所示的方位或位置关系，其仅是为了便于描述本发明和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此上述术语不能理解为对本发明的限制。
可以理解的是，术语“一”应理解为“至少一”或“一个或多个”，即在一个实施例中，一个元件的数量可以为一个，而在另外的实施例中，该元件的数量可以为多个，术语“一”不能理解为对数量的限制。
本发明提供一低介电常数膜及其制备方法。所述低介电常数膜含硅、氧和碳。优选地，所述低介电常数膜含硅、氧、碳和氟。所述低介电常数膜具有纳米尺寸的孔隙。
所述低介电常数具有良好的介电性能。所述低介电常数膜的k值小于2.8，举例地，优选地，所述低介电常数模块的k值范围为1.9～2.7，举例地，所述低介电常数模块的k值范围为2.0～2.7。举例地，所述低介电常数膜的k值范围为2.1～2.2、2.2～2.3、2.4～2.5、2.5～2.6，或2.6～2.7。
所述低介电常数膜具有较好的力学性能，所述低介电常数膜的杨氏模量大于10GPa，优选地，所述低介电常数膜的杨氏模量的范围为10～41GPa，举例地，杨氏模量的范围为10～11GPa、11～12GPa、12～13GPa、23～24GPa、26～27GPa、27～28GPa、29～30GPa、31～32GPa或33～34GPa。所述低介电常数膜的硬度大于1.5GPa，优选地，所述低介电常数膜的硬度范围为1.6～2.9GPa，举例地，硬度的范围为1.62～2.79GPa。
所述低介电常数膜具有良好的疏水性能，水附着于所述低介电常数膜的静态接触角大于110°，举例地，静态接触角大于120°，举例地，静态接触角大于140°，举例地，静态接触角的范围为：110°～115°、115°～120°、120°～125°、125°～130°、130°～135°、135°～140°、140°～145°、145°～150°或、150°～155°或155°～160°。，由此使得所述低介电常数膜具有良好的防腐性。比如，当所述低介电常数膜沉积于金属铁表面经过盐雾试验90小时后，铁片没有被腐蚀或者仅有较少量的腐蚀点。优选地，在一些实施例中，所述低介电常数膜沉积于金属铁表面经过盐雾试验96小时后，铁片没有被腐蚀。
所述低介电常数膜是纳米膜，其厚度范围举例地但不限于10～2000nm。
根据本发明的这个实施例，所述低介电常数膜通过等离子体增强化学气相沉积(PECVD)方法形成于一基体表面。也就是说，构成所述低介电常数膜的原 料经过PECVD工艺沉积于基体表面，在基体的表面形成所述低介电常数膜。举例地但不限于，所述低介电常数膜沉积于大规模集成电路的电路板表面，从而改善该大规模集成电路的RC延迟现象。
所述等离子体增强化学气相沉积(PECVD)法通过辉光放电产生等离体子，放电的方法包括微波放电、射频放电、紫外、电火花放电。
举例地，所述低介电常数膜以环氧烷烃、有机硅化合物和含氟硅氧烷化合物为原材料，通过等离子体增强化学气相沉积方法在一基体表面形成。
所述低介电常数膜具有多层结构，举例地，所述低介电常数膜包括一防腐层、一多孔层和一含氟层。所述防腐层、所述多孔层和所述含氟层通过PECVD方法形成于基体表面。
根据本发明的一个实施例，所述防腐层由有机硅聚合物组成，更进一步，所述防腐层由纳米级的有机硅聚合物组成。举例地，有机硅聚合物或形成有机硅聚合物的原材料通过PECVD沉积于基体的表面，而形成所述低介电常数膜的防腐层，或者说所述低介电常数膜的第一层。
举例地，所述防腐层是含不饱和碳碳双键的环氧烷烃化合物A和含不饱和双键的硅氧烷或者硅烷化合物B反应得到的复合物。
举例地，所述防腐层可以是由乙烯基环氧烷烃和乙烯基有机硅硅烷或乙烯基有机硅氧烷，在反应装置的预定功率和预定温度条件下，通过PECVD，在基体表面沉积反应得到。乙烯基环氧烷烃是一种包括环氧基团和碳碳双键的有机物，其常压下沸点不高于400℃。乙烯基硅烷或者乙烯基硅氧烷包括含碳碳不饱和双键的直链、环状的硅烷、硅氧烷，且常压下沸点不高于300℃。
举例地，所述化合物A选自组合：乙烯基环氧乙烷、甲基丙烯酸缩水甘油酯、烯丙基缩水甘油醚、1,2-环氧-4-乙烯基环己烷、2,3-环氧丙基二甲基乙烯基硅烷、2,3-环氧丙基二氯乙烯基硅烷中的一种或多种混合物。
举例地，所述化合物B选自组合：烯丙基三甲氧基硅烷、乙烯基三乙氧基硅烷、三甲基乙烯基硅烷、3-丁烯基三甲基硅烷、乙烯基三丁酮肟基硅烷、四甲基二乙烯基二硅氧烷、四甲基四乙烯基环四硅氧烷、1,2,2-三氟乙烯基三苯基硅烷、二甲基甲氧基乙烯基硅烷、4-苯乙烯基(三甲氧基硅氧)基硅烷中的一种或多种混合物。
举例地，在制备所述防腐层的过程中需要通入辅助气体进行气相沉积，所述 辅助气体举例地但不限于惰性气体He、Ar、或He和Ar混合气体。
在一个实施例中，所述防腐层由环氧树脂和有机硅的复合物形成，举例地，环氧树脂材料和有机硅材料通过PECVD沉积于基体的表面形成具有防腐性能的聚合物层。举例地，以乙烯基环氧烷、乙烯基硅氧烷、乙烯基硅烷的单一气氛或者混合气氛为反应源，在低温低压等离子体环境中气相沉积得到有机硅聚合物复合纳米膜层，即，得到所述防腐层。
在一个实施例中，所述多孔层是具有多个孔隙的有机硅，并且由所述多孔层的孔隙率调节所述低介电常数膜的k值。举例地，有机硅材料通过PECVD沉积于基体的表面形成具有多孔结构的有机硅纳米层，从而形成所述低介电常数纳米膜的多孔层，或者说所述低介电常数膜的第二层。举例地，在制备所述多孔层的过程中，需要通入辅助气体来形成所述多孔层，比如在氮气/氢气、氨气、氧气、碳氢有机物的单一气氛或者混合气氛下，将有机硅、有机硅氧烷的单一或者混合气氛气相沉积得到多孔的SiOCNH纳米膜层，即，得到所述低介电常数膜的多孔层。更具体地，所述辅助气体中的碳氢有机物主要是碳原子数在12以下的支链烷烃、环烷烃、芳烃。
在一个实施例中，所述多孔层可以是化合物C和化合物E反应生成，所述化合物C是有机硅化合物，比如说可以是有机硅氧烷，也可以是有机硅烷。所述化合物E可以是烷烃化合物，也可以是苯化合物。
在一个实施例中，所述多孔层可以是由有机硅烷和/或有机硅氧烷化合物C和烷烃化合物和/或者苯化合物E，在反应装置的预定功率和预定温度条件下，通过PECVD，在防腐层表面沉积反应得到。有机硅化合物C包括支链、环状的硅烷或者硅氧烷，且常压下沸点小于350℃的液体或气体。
举例地，化合物C选自组合：γ-缩水甘油醚氧丙基三甲氧基硅烷；D4H环四硅氧烷、六甲基环三硅氧烷、三-(三甲氧硅烷)基苯基硅烷、叔丁基二甲基氯硅烷、苯基乙炔基三甲基硅烷、联苯基乙烯基三甲基硅烷、八苯基环四硅氧烷、三苯基羟基硅烷、三氟丙基甲基环三硅氧烷、2,2,4,4-四甲基-6,6,8,8-四苯基环四硅氧烷、四甲基四乙烯基环四硅氧烷、3-缩水甘油醚氧基丙基三乙氧基硅烷、四甲基二乙烯基二硅氧烷、四乙基二硅氧烷、六甲基二硅氧烷、苯基三(三甲基硅氧烷基)硅烷、三甲基苯基硅烷、六甲基二硅氮烷、烯丙基三苯基硅烷、苯基三氯硅烷、苯基三氟硅烷、苯基三乙氧基硅烷、苯基三甲基氧基硅烷、甲基苯基 二甲氧基硅烷、二甲氧基甲基苯基硅烷、1,3-二氯四苯基二硅氧烷、苯基乙烯基三甲基硅烷、萘基乙烯基三甲基硅烷、二苯基二羟基硅烷、八甲基环四硅氧烷、六苯基环三硅氧烷、十甲基环五硅氧烷、苯基三氯硅烷、甲基苯基二氯硅烷、苯基二甲基氯硅烷、甲基苯基环三硅氧烷、三甲氧基甲基硅烷、三氟丙基甲基环三硅氧烷、三-(三乙氧硅烷)基苯基硅烷、全氟辛基乙基五氟苯基二甲氧基硅烷、三-(三乙基硅烷)基苯基硅烷。
举例地，化合物E选自组合：环丁烷、环戊烷、环己烷、苯、甲苯、对二甲苯中的一种或多种混合物。
在一个实施例中，在制造所述低介电常数膜时，在基体上PECVD方法沉积所述防腐层之后，继续在同一反应腔室中，通过PECVD方法沉积所述多孔层。
在一个实施例中，在制造所述低介电常数膜时，在形成所述防腐层后，在氮气/氢气和/或氨气气氛下，在预定频率下间隙通入氧气，由化合物C和化合物E沉积反应得到所述多孔层。
值得一提的是，根据本发明的一个实施例，其将防腐层间隔于多孔层和基体之间，使得所述多孔层的空隙率不会或较少影响所述低介电常数膜与基体的结合力，且通过提高孔隙率可以使得k值更小。
在一个实施例中，所述含氟层是氟硅聚合物，进一步，所述含氟层是含有低介电常数的芳香基团的有机氟硅，利用芳香基团的刚性结构，提高所述含氟层的机械性能。举例地，在一个实施例中，所述含氟层是含有苯基的有机氟硅。苯环的空间位阻较大，可调节所述低介电常数膜的粗糙度。
在所述低介电常数膜的制备过程中，可以通过改变含氟芳香基有机硅烷和环硅氧烷的物质的量的比例来改变所述低介电常数膜中的含氟苯基的含量，通过调节含氟芳香基的含量来调节所述低介电常数膜的电学性能以及机械性能，进一步降低所述低介电常数膜的k值。
在一个实施例中，在惰性气体气氛下，在所述多孔层的表面沉积一层含有芳香结构的氟硅层，或者说，所述低介电常数膜的第三层。
在一个实施中，所述含氟层由芳香基氟硅烷D，通过PECVD，在的多孔层表面沉积反应得到。所述含氟层的表面能较低，具有良好的疏水性能，水在其表面的静态接触角较大。所述低介电常数膜在表层形成含有芳香基团的有机氟硅，利 用芳香基的刚性结构，提高所述低介电常数膜的机械性能。
举例地，化合物D选自组合：五氟苯基三乙氧基硅烷、五氟苯基三甲氧基硅烷、五氟苯基三氯硅烷、五氟苯基二甲基氯硅烷、全氟辛基乙基五氟苯基二氯硅烷、五氟二氯苯基全氟己基乙基硅烷、全氟辛基二氯苯基硅烷、全氟辛基二乙氧基苯基硅烷、全氟辛基乙基五氟苯基二甲氧基硅烷、全氟丁基乙基五氟苯基二氯硅烷、全氟丁基乙基五氟苯基二甲氧基硅烷中的一种或多种混合物。
在制造所述低介电常数膜时，在形成所述多孔层之后，在预定功率下，继续在同一反应腔室中通入气态的化合物D，沉积预定时间，得到所述低介电常数膜的表层。
在一个实施例，在所述低介电常数膜的表面通过等离体增强化学气相沉积技术，将含氟芳香基硅烷沉积在多孔三维有机硅涂层的空穴及涂层的表面。含氟芳香基硅烷具有较低的介电常数，且苯环的空间位阻较大，可调节纳米涂层的粗糙度，因此，在低介电常数材料薄膜的制备过程中，可通过改变含氟芳香基有机硅单体和环硅氧烷的物质的量的比例来改变分子中含氟苯基的含量；通过调节分子中含氟芳香基的含量来调节低介电常数材料薄膜的电学及其他方面的性能。
值得一提的是，本发明所述低介常数膜由多层结构构成，比如两层或者三层或者更多层，在本发明的一个实施中，所述低介电常数膜由两层结构构成。举例地，在一个实施例中，所述低介常数膜由所述防腐层和所述多孔层构成形成两层结构，在制造时，可以在基体表面先化学气相沉积化合物A和化合物B形成所述防腐层，而后继续化学气相沉积化合物C和化合物E形成所述多孔层，所述防腐层是底层，所述多孔层是表层。由所述防腐层和所述多孔层构成的两层结构的所述低介电常数膜，在降低k值的同时，增强所述低介电常数膜和基体之间的结合力和黏性。
举例地，在一个实施例中，所述低介常数膜由所述多孔层和所述含氟层构成形成两层结构，在制造时，可以在基体表面先化学气相沉积化合物C和化合物E形成所述多孔层，而后继续化学气相沉积化合物D形成所述含氟层，所述多孔层是底层，所述含氟层是表层。由所述多孔层和所述含氟层构成的两层结构的所述低介电常数膜，其在降低k值的同时，提高所述低介电常数膜的疏水性能，改善被沉积的基体的防腐蚀性能。
举例地，在一个实施例中，所述低介常数膜由所述防腐层、所述多孔层和所 述含氟层构成形成三层结构，在制造时，可以在基体表面先化学气相沉积化合物A和化合物B形成所述防腐层，而后继续化学气相沉积化合物C和化合物E形成所述多孔层，继续在所述多孔层上化学气相沉积化合物D形成所述含氟层，所述防腐层是底层，所述多孔层是中间层，所述含氟层是表层。由所述防腐层、所述多孔层和所述含氟层构成的三层结构的所述低介电常数膜，其通过不同层的交替布置，整体改善所述低介电常数膜的介电性能、机械性能以及疏水性，且交替布置的方式，有利于形成大孔容的多孔层。
值得一提的是，在低介电常数纳米膜中的孔结构对介电常数的减少有较大影响，同时也影响机械性能和疏水性，比如，当孔隙率增加时，k值可以明显减小，但是孔隙率的增多也会影响机械的降低以及与基体的表面的结合力降低，且表面孔隙多时，疏水性降低。纳米膜的介电常数的减小取决于多孔材料引入后的全部空气体积，其包括三个方面，(1)多孔SiOCNH孔道不完全填充带来的空体积；(2)氟硅链无规排列产生的空隙；(3)多孔SiOCNH的加入产生的自由体积。根据本发明的实施例，所述低介电常数膜通过所述防腐层、所述多孔层和/或所述含氟层构成的两层或者三层结构，使得介电常数的降低和机械性能以及疏水性之间进行平衡。
根据本发明的至少一个实施例，在形成所述低介电常数膜时，交替地进行有机硅纳米膜和所述有机硅/氧气的沉积，在形成有机硅层后通入氧气，有机硅层的碳氢部分与氧气反应形成不规则的粗糙表面，然后在表面沉积SiOCNH，有助于形成具有较高的比表面积的大孔隙，且交替结构有助于增强所述低介电常数膜与基体的附着力。
通过多次等离子体增强化学气相沉积得到的所述低介电常数膜形成三维网状结构，其不需要借助成孔剂形成孔隙，其不需要高温退火处理来处理。本发明的一个实施例中选用了环状有机硅单体与大体积的具有较大空间位阻的单体共聚合，这种共聚合是在O 2等离子体气氛中进行的，通过控制O 2的量，保证Si-O键与碳氢化合物键连，这样即可可控的制备具有三维结构的低介电常数的有机硅纳米涂层。
参照图1-图4，图1是根据本发明的一个实施例的低介电常数膜的制备过程框图。图2是根据本发明的一个实施例的低介电常数膜的防腐层的形成过程框图。图3是根据本发明的一个实施例的低介电常数膜的多孔层的形成过程框图。图4 是根据本发明的一个实施例的低介电常数膜的含氟层的形成过程框图。所述低介电常数通过等离子体增强化学气相沉积反应装置，进行多次PECVD反应得到。
根据本发明的一个实施例，所述低介电常数膜的制备方法，所述方法包括步骤：
101：在一基体的表面气相沉积一防腐层；
102：气相沉积一多孔层；和
103：气相沉积一含氟层；
其中在所述步骤101中需要通过引入乙烯基环氧化合物A和乙烯基有机硅化合物B气相沉积形成所述防腐层，具体地，所述防腐层的形成过程包括步骤：
1011：引入环氧烷烃化合物A和硅氧烷或者硅烷化合物B至反应装置的腔室内；
1012：通入惰性气体至反应装置的腔室中；
1013：运转所述基体；
1014：在预定功率下，使得所述化合物A和化合物B反应沉积至所述基体表面形成所述防腐层。
在所述步骤101之前还可以对所述基体进行前处理，比如对基体表面进行清洗，具体地，对所述基体的前处理过程包括步骤：
1001：对基体进行超声波清洗：将基体放入装有去离子水的容器中，进行超声清洗，清洗时间为10～30分钟，然后取出放到干燥箱干燥；和
1002：对基材表面进行丙酮清洗：用干净的纱布沾丙酮对零件表面擦拭三次，然后放到干燥箱干燥。
在清洗过程中，可以选择上述的其中一种或多种方式对其进行前处理，本发明对这方面并不限制。
举例地，所述步骤101的过程可以是：将表面洁净的机体置于等离子体增强化学气相沉积反应装置的反应腔室内，然后对反应腔室连续抽真空，将反应腔室内的真空度抽到10～200毫托，并通入惰性气体He、Ar、或He和Ar混合气体，开启运动机构，使基材在反应腔室内产生运动，待压力、温度达到设定值后通入乙烯基环氧化合物A和乙烯基有机硅化合物B，将等离子体功率调到30～500W，腔体温度调到10～100℃，进行等离子体增强化学气相沉积，反应完成后，停止通入反应物，升高腔体压力到常压。所述步骤101也可以称为防腐处理步骤，这 个过程使得所述低介电常数膜更加紧密地结合于所述基体，而防止所述基体被腐蚀。
值得一提的是，根据本发明的实施例，所述低介电常数膜的形成过程中，采用动态镀膜的方法，使得所述低介电常数膜更加均匀地附着于基体，减少了基体在不同位置镀膜的差异，解决了基体不同区域沉积物的浓度不同导致厚度不均匀的问题。举例地，如步骤1013中，使得所述基体在反应腔室中运动，使得所述基体的不同位置都能够均匀地附着所述防腐层。所述基体的运转方式可以包括多种方式，比如，所述基体可以以反应腔室的中心点为参考点或者预定的轴线进行公转，绕所述基体的中心轴线或预定的轴线进行自转，或者，所述基体分别绕横向和纵向的两个轴分别进行转动。
在所述步骤102中需要通过有机硅烷和/或有机硅氧烷化合物C和烷烃化合物和/或者苯化合物E气相沉积形成所述多孔层。
值得一提的是，在一个实施例中，在步骤101之后进行所述步骤102，也就是说，在形成所述防腐层之后，在所述防腐车上形成所述多孔层，而在另一个实施例中，也可以直接进行步骤102，也就说，直接在所述基体的表面先形成所述多孔层，而不形成所述防腐层。具体地，所述多孔层的形成过程包括步骤：
1021：通入有机硅烷和/或有机硅氧烷化合物C和烷烃化合物和/或者苯化合物E；
1022：通入气体氮气/氢气和/或氨气；
1023：间歇通入氧气；和
1024：在预定功率下，由有机硅烷和/或有机硅氧烷化合物C和烷烃化合物和/或者苯化合物E气相沉积反应形成所述多孔层；
举例地，所述步骤102中所述多孔层的形成过程可以是：在防腐处理之后，继续通入化合物C和化合物E的同时，通入气体为氮气/氢气和/或氨气，同时通入气体氧气，氧气为间歇式通入，频率为10～600秒，即每隔10～600秒通入一次氧气，氧气反应时间为10～600秒，反应完成后停止通入化合物C和化合物E，即，形成所述多孔层。
值得一提的是，在所述步骤102中也可以包括步骤1013，即，使得所述基体在所述反应腔室中持续运动。即，在动态条件下形成所述多孔层。
值得一提的是，反应性气体氮气/氢气和/或氨气，是为沉积含N纳米涂层而 添加的，纳米涂层的含氮量由混合单体的含氮量和混合气体的氮气/氢气和/或氨气的含氮量决定。O 2的流量是影响纳米涂层的含氧量的因素之一。
在形成所述低介电常数膜时，交替地进行有机硅纳米膜和所述有机硅/氧气的沉积，在形成有机硅层后间歇地通入氧气，有机硅层的碳氢部分与氧气反应形成不规则的粗糙表面，然后在表面沉积SiOCNH，有助于形成具有较高的比表面积的大孔隙，且交替结构有助于增强所述低介电常数膜与基体的附着力。
在所述步骤103中，通过芳香基氟硅烷D气相沉积形成所述含氟层。基体地，所述步骤103的所述含氟层的形成过程包括步骤：
1031：通入惰性气体；
1032：通入芳香基氟硅烷D；和
1033：在预定功率下，由芳香基氟硅烷D气相沉积反应形成所述含氟层。
举例地，所述步骤103中的所述含氟层的形成过程可以是：在形成所述多孔层之后，通入惰性气体，停止通入氮气/氢气和/或氨气，同时通入化合物D，将等离子体功率调到30～150W，继续进行等离子体聚合反应，气相沉积10～60min后取出样品，即可得到所需要的多功能纳米涂层，即，得到所述低介电常数膜。
值得一提的是，所述步骤103在所述步骤102之后，即，在形成所述多孔层之后形成所述含氟层，或者说，将所述含氟层附着于所述多孔层的表面，从而极大地增强所述低介电常数膜的疏水性。
值得一提的是，在所述步骤103中也可以包括步骤1013，即，使得所述基体在所述反应腔室中持续运动。即，在动态条件下形成所述含氟层。
在所述步骤103之后，也可以包括高温退火步骤。值得一提的是，在本发明的实施例中，形成孔隙结构时，并不是借助成孔剂，如降冰片二烯或α-松油烯等，因此需要后期移除成孔剂的操作，因此也并不是必须要进行高温退火处理。
进一步，在本发明的一些实施例中，所述反应腔室或者说镀膜腔室体积为10L～2000L，根据镀膜要求和镀膜腔室体积的大小，工艺参数可以进行调整。等离子体镀膜功率范围是0.01W～500W，镀膜时间30s～7200s，气化温度30℃～100℃，腔体温度为20℃～100℃，流量分别为可选择为0～1000sccm。氧气和/或N 2/H 2、NH 3、碳氢有机物流量设定为1～200sccm，通入的频次可选择范围是10s一次～500s一次。
以下举例说明具体的实施例。
实施例1
取洁净的PCB板一块，将其放在等离子增强化学气相沉积反应装置或者说等离子体镀膜设备的治具中，按程序设定各参数，其中功率100W，镀膜时间1800s，气化温度95℃，腔体温度为室温，He气氛，He流量10ssccm，通入反应气体A和B，分别为乙烯基环氧乙烷和三甲基乙烯基硅烷，流量分别为100sccm和100sccm。待底层沉积完成后停止通入单体乙烯基环氧乙烷和三甲基乙烯基硅烷，继续通入He，同时通入N 2，N 2流量为5sccm，通入反应物C和E，分别为六甲基二硅氧烷和单体环己烷，流量分别为流量分别为100sccm和100sccm。间歇式通入O 2，O 2频率为300秒一次，功率改为50W，镀膜时间为3600s，气化温度为110℃，腔体温度为25℃，O 2流量10sccm，镀膜时间完成后关闭O 2、N 2和H 2，通入反应物D全氟辛基二氯苯基硅烷，其他参数不变，镀膜完成后，将气体压力升高到常压，取出样品即可得到本发明所述的具有多孔结构的低介电常数纳米涂层，即在基体上形成所述低介电常数膜。
实施例2
取洁净的PCB板一块，将其放在等离子体镀膜设备的治具中，按程序设定各参数，其中功率100W，镀膜时间1800s，气化温度95℃，腔体温度为室温，He气氛，He流量10sccm，通入反应物A和B，乙烯基环氧乙烷和三甲氧基乙烯基硅烷，流量分别为100sccm和100sccm。待底层沉积完成后停止通入反应物乙烯基环氧乙烷和三甲氧基乙烯基硅烷，继续通入He，同时通入N 2，N 2流量为5sccm，通入反应物C和E，分别为三-(三甲氧硅烷)基苯基硅烷和环丁烷，流量分别为流量分别为100sccm和100sccm。间歇式通入O 2，O 2频率为300秒一次，功率改为50W，镀膜时间为3600s，气化温度为110℃，腔体温度为25℃，O 2流量10sccm，镀膜时间完成后关闭O 2、N 2，通入反应物D全氟辛基二乙氧基苯基硅烷，其他参数不变，镀膜完成后，将气体压力升高到常压，取出样品，即可得到本发明所述的具有多孔结构的低介电常数纳米涂层。
实施例3
取洁净的PCB一块，将其放在等离子体镀膜设备的治具中，按程序设定各参数，其中功率100W，镀膜时间1800s，气化温度95℃，腔体温度为室温，He气氛，He流量10sccm，通入反应物A和B，分别为烯丙基缩水甘油醚和三甲基乙烯基硅烷，流量分别为100sccm和100sccm。待底层沉积完成后停止通入反应 物烯丙基缩水甘油醚和三甲基乙烯基硅烷，继续通入He，同时通入NH 3，NH 3流量为100sccm，通入反应物C和E，分别为三-(三乙氧硅烷)基苯基硅烷和甲苯，流量分别为流量分别为100sccm和100sccm。间歇式通入O 2，O 2频率为150秒一次，功率改为50W，镀膜时间为3600s，气化温度为110℃，腔体温度为25℃，镀膜时间完成后关闭O 2和NH 3，通入反应物D全氟辛基乙基五氟苯基二氯硅烷，功率改为50W，镀膜时间改为1800s，压力为100mTorr，气化温度为110℃，腔体温度为30℃，O 2流量50sccm，镀膜完成后，将气体压力升高到常压，取出样品，即可得到本发明所述的具有多孔结构的低介电常数纳米涂层。
实施例4
取洁净的PCB一块，将其放在等离子体镀膜设备的治具中，按程序设定各参数，其中功率100W，镀膜时间1800s，压力为80mTorr，气化温度95℃，腔体温度为室温，Ar气氛，He流量10sccm，通入反应物A和B，分别为2,3-环氧丙基二甲基乙烯基硅烷和二甲基甲氧基乙烯基硅烷，流量分别为80sccm和120sccm。待底层沉积完成后停止通入反应物2,3-环氧丙基二甲基乙烯基硅烷和二甲基甲氧基乙烯基硅烷，继续通入Ar，通入反应物C和E，分别为三-(三乙基硅烷)基苯基硅烷和环己烷，流量分别为流量分别为20sccm和180sccm。间歇式通入O 2，O 2频率为150秒一次，功率改为50W，镀膜时间为3600s，气化温度为110℃，腔体温度为25℃，O 2流量30sccm，镀膜时间完成后关闭O2，通入反应物D全氟辛基乙基五氟苯基二甲氧基硅烷，功率改为50W，镀膜时间改为1800s，压力为120mTorr，气化温度为110℃，腔体温度为30℃，镀膜完成后，将气体压力升高到常压，取出样品，即可得到本发明所述的具有多孔结构的低介电常数纳米涂层。
实施例5
取洁净的PCB一块，将其放在等离子体镀膜设备的治具中，按程序设定各参数，其中功率80W，镀膜时间3600s，压力为80mTorr，气化温度95℃，腔体温度为室温，Ar气氛，Ar流量20sccm，通入反应物A和B，分别为2,3-环氧丙基二甲基乙烯基硅烷和三甲基乙烯基硅烷，流量分别为80sccm和120sccm。待底层沉积完成后停止通入反应物2,3-环氧丙基二甲基乙烯基硅烷和三甲基乙烯基硅烷，继续通入Ar，同时通入N 2、H 2，N 2和H 2流量分别为30sccm和90sccm，通入反应物C和E，分别为三-(三乙基硅烷)基苯基硅烷和对二甲苯，流量分 别为流量分别为20sccm和180sccm。间歇式通入O 2，O 2频率为120秒一次，功率改为90W，镀膜时间为3600s，气化温度为110℃，腔体温度为50℃，O 2流量80sccm，镀膜时间完成后关闭O 2、N 2和H 2，通入反应物D全氟辛基乙基五氟苯基二甲氧基硅烷，功率改为80W，镀膜时间改为1800s，压力为120mTorr，气化温度为110℃，腔体温度为30℃，镀膜完成后，将气体压力升高到常压，取出样品，即可得到本发明所述的具有多孔结构的低介电常数纳米涂层。
实施例6
取洁净的PCB一块，将其放在等离子体镀膜设备的治具中，按程序设定各参数，其中功率80W，镀膜时间3600s，压力为80mTorr，气化温度95℃，腔体温度为室温，Ar气氛，Ar流量20sccm，通入反应物A和B，分别为2,3-环氧丙基二甲基乙烯基硅烷和4-苯乙烯基(三甲氧基硅氧)基硅烷，流量分别为80sccm和120sccm。待底层沉积完成后停止通入反应物2,3-环氧丙基二甲基乙烯基硅烷和4-苯乙烯基(三甲氧基硅氧)基硅烷，继续通入Ar，同时通入N 2、H 2，N 2和H 2流量分别为30sccm和90sccm，通入反应物C和E，分别为三-(三乙基硅烷)基苯基硅烷和环戊烷，流量分别为流量分别为20sccm和180sccm。间歇式通入O 2，O 2频率为100秒一次，功率改为90W，镀膜时间为3600s，气化温度为110℃，腔体温度为50℃，O 2流量20sccm，镀膜时间完成后关闭O 2、N 2和H 2，通入反应物D全氟丁基乙基五氟苯基二氯硅烷，功率改为80W，镀膜时间改为1800s，压力为120mTorr，气化温度为110℃，腔体温度为30℃，镀膜完成后，将气体压力升高到常压，取出样品，即可得到本发明所述的具有多孔结构的低介电常数纳米涂层。
实施例7
取洁净的PCB一块，将其放在等离子体镀膜设备的治具中，按程序设定各参数，其中功率80W，镀膜时间3600s，压力为80mTorr，气化温度95℃，腔体温度为室温，Ar气氛，Ar流量20sccm，通入反应物A和B，分别为2,3-环氧丙基二氯乙烯基硅烷和四甲基四乙烯基环四硅氧烷，流量分别为150sccm和50sccm。待底层沉积完成后停止通入反应物2,3-环氧丙基二氯乙烯基硅烷和四甲基四乙烯基环四硅烷，继续通入Ar，同时通入N 2、H 2，N 2和H 2流量分别为30sccmsccm和90sccmsccm，通入反应物C和E，分别为三氟丙基甲基环三硅氧烷和苯，流量分别为流量分别为50sccm和150sccm。间歇式通入O 2，O 2频率为 600秒一次，功率改为90W，O 2流量50sccm，镀膜时间为3600s，气化温度为110℃，腔体温度为50℃，O 2流量60sccm，镀膜时间完成后关闭O 2、N 2和H 2，通入反应物D全氟丁基乙基五氟苯基二甲氧基硅烷，功率改为80W，镀膜时间改为3600s，压力为100mTorr，气化温度为110℃，腔体温度为30℃，镀膜完成后，将气体压力升高到常压，取出样品，即可得到本发明所述的具有多孔结构的低介电常数纳米涂层。
实施例8
取洁净的PCB一块，将其放在等离子体镀膜设备的治具中，按程序设定各参数，其中功率80W，镀膜时间3600s，压力为80mTorr，气化温度95℃，腔体温度为室温，Ar气氛，Ar流量20sccm，通入反应物A和B，分别为2,3-环氧丙基二氯乙烯基硅烷和四甲基四乙烯基环四硅氧烷，流量分别为150sccm和50sccm。待底层沉积完成后停止通入反应物2,3-环氧丙基二氯乙烯基硅烷和四甲基四乙烯基环四硅氧烷，继续通入Ar，同时通入N 2、H 2，N 2和H 2流量分别为30sccm和90sccm，通入反应物C和E，分别为三-(三乙基硅烷)基苯基硅烷和环己烷，流量分别为流量分别为20sccm和180sccm。间歇式通入O 2，O 2频率为180秒一次，功率改为90W，镀膜时间为3600s，气化温度为110℃，腔体温度为50℃，O 2流量30sccm，镀膜时间完成后关闭O 2、N 2和H 2，通入反应物D全氟辛基乙基五氟苯基二甲氧基硅烷，功率改为80W，镀膜时间改为1800s，压力为120mTorr，气化温度为110℃，腔体温度为30℃，镀膜完成后，将气体压力升高到常压，取出样品，最后在450℃下退火处理90min，即可得到本发明所述的具有多孔结构的低介电常数纳米涂层。
实施例9
取洁净的PCB一块，将其放在等离子体镀膜设备的治具中，按程序设定各参数，其中功率80W，镀膜时间3600s，压力为80mTorr，气化温度95℃，腔体温度为室温，Ar气氛，Ar流量20sccm，通入反应物A和B，分别为2,3-环氧丙基二氯乙烯基硅烷和四甲基四乙烯基环四硅氧烷，流量分别为150sccm和50sccm。待底层沉积完成后停止通入反应物2,3-环氧丙基二氯乙烯基硅烷和四甲基四乙烯基环四硅氧烷，继续通入Ar，通入反应物C和E，分别为六甲基二硅氮烷和环戊烷，流量分别为50sccm和150sccm。间歇式通入O 2，O 2频率为150秒一次，功率改为90W，镀膜时间为3600s，O 2流量20sccm，气化温度为110℃，腔体温 度为50℃，镀膜时间完成后关闭O 2，通入反应物E全氟辛基乙基五氟苯基二甲氧基硅烷，功率改为80W，镀膜时间改为1800s，压力为100mTorr，气化温度为110℃，腔体温度为30℃，镀膜完成后，将气体压力升高到常压，取出样品，即可得到本发明所述的具有多孔结构的低介电常数纳米涂层。
实施例10
与实施例9相比，不制备所述防腐层。取洁净的PCB一块，将其放在等离子体镀膜设备的治具中，通入Ar，直接通入反应物C和E，分别为六甲基二硅氮烷和环戊烷，流量分别为100sccm和150sccm。间歇式通入O 2，O 2频率为150秒一次，功率改为90W，镀膜时间为3600s，O 2流量20sccm，气化温度为110℃，腔体温度为50℃，镀膜时间完成后关闭O 2，通入反应物E全氟辛基乙基五氟苯基二甲氧基硅烷，功率改为80W，镀膜时间改为1800s，压力为100mTorr，气化温度为110℃，腔体温度为30℃，镀膜完成后，将气体压力升高到常压，取出样品，即可得到本发明所述的具有多孔结构的低介电常数纳米涂层。
进一步，对上述实施例的参数进行检测。
纳米涂层厚度，使用美国Filmetrics F20-UV-薄膜厚度测量仪进行检测。纳米涂层水接触角，根据GB/T 30447-2013标准进行测试。
介电常数，根据GB/T 1409-2006测量电气绝缘材料在工频、音频、高频(包括米波波长在内)下电容率和介质损耗因数的推荐方法进行检测。
耐盐雾测试，根据GB/T 2423.18-2000电工电子产品环境试验方法进行检测。
纳米涂层的杨氏模量根据JB/T 12721-2016固体材料原位纳米压痕/划痕测试仪技术规范进行测定。
附表：实施例1-10各性能参数
表一
Figure PCTCN2020090119-appb-000001
Figure PCTCN2020090119-appb-000002
本领域的技术人员应理解，上述描述及附图中所示的本发明的实施例只作为举例而并不限制本发明。本发明的目的已经完整并有效地实现。本发明的功能及结构原理已在实施例中展示和说明，在没有背离所述原理下，本发明的实施方式可以有任何变形或修改。

Claims (91)

  1. 一低介电常数膜，其以环氧烷烃、有机硅化合物和含氟硅氧烷化合物为原材料，通过等离子体增强化学气相沉积方法在一基体表面形成。
  2. 根据权利要求1所述的低介电常数膜，其包括一防腐层，所述防腐层通过含不饱和双键的环氧烷烃化合物A和化合物B通过等离子体增强化学气相沉积于基体表面形成，其中所述化合物B选自组合不饱和双键的硅氧烷和硅烷中的一种或者几种。
  3. 根据权利要求1所述的低介电常数膜，其包括一多孔层，所述多孔层通过化合物C和化合物E通过等离子体增强化学气相沉积形成，其中所述化合物C包括有机硅烷和有机硅氧烷中的一种或者两种，所述化合物E选自组合烷烃化合物和苯化合物中的一种或者两种。
  4. 根据权利要求1所述的低介电常数膜，其包括一多孔层，所述多孔层通过化合物C和化合物E通过等离子体增强化学气相沉积形成，所述化合物C包括有机硅化合物，所述化合物E包括烷烃化合物和苯化合物。
  5. 根据权利要求1所述的低介电常数膜，其包括一多孔层，所述多孔层通过化合物C和化合物E通过等离子体增强化学气相沉积形成，所述化合物C包括有机硅化合物，所述化合物E包括烷烃化合物。
  6. 根据权利要求1所述的低介电常数膜，其包括一多孔层，所述多孔层通过化合物C和化合物E通过等离子体增强化学气相沉积形成，所述化合物C包括有机硅化合物，所述化合物E包括苯化合物。
  7. 根据权利要求4至6任一所述的低介电常数膜，其中所述化合物C是有机硅氧烷。
  8. 根据权利要求4至6任一所述的低介电常数膜，其中所述化合物C是有机硅烷。
  9. 根据权利要求1所述的低介电常数膜，其包括一含氟层，所述含氟层由芳香基氟硅烷D通过等离子体增强化学气相沉积形成。
  10. 根据权利要求1所述的低介电常数膜，其底层由乙烯基环氧化合物和乙烯基有机硅化合物通过等离子体增强化学气相沉积于基体表面形成。
  11. 根据权利要求2所述的低介电常数膜，其中所述化合物A选自组合： 乙烯基环氧乙烷、甲基丙烯酸缩水甘油酯、烯丙基缩水甘油醚、1,2-环氧-4-乙烯基环己烷、2,3-环氧丙基二甲基乙烯基硅烷、2,3-环氧丙基二氯乙烯基硅烷中的一种或几种。
  12. 根据权利要求2所述的低介电常数膜，其中所述化合物B选自组合：烯丙基三甲氧基硅烷、乙烯基三乙氧基硅烷、三甲基乙烯基硅烷、3-丁烯基三甲基硅烷、乙烯基三丁酮肟基硅烷、四甲基二乙烯基二硅氧烷、四甲基四乙烯基环四硅氧烷、1,2,2-三氟乙烯基三苯基硅烷、二甲基甲氧基乙烯基硅烷、4-苯乙烯基(三甲氧基硅氧)基硅烷中的一种或几种。
  13. 根据权利要求3至6任一所述的低介电常数膜，其中所述化合物C选自组合：γ-缩水甘油醚氧丙基三甲氧基硅烷；D4H环四硅氧烷、六甲基环三硅氧烷、三-(三甲氧硅烷)基苯基硅烷、叔丁基二甲基氯硅烷、苯基乙炔基三甲基硅烷、联苯基乙烯基三甲基硅烷、八苯基环四硅氧烷、三苯基羟基硅烷、三氟丙基甲基环三硅氧烷、2,2,4,4-四甲基-6,6,8,8-四苯基环四硅氧烷、四甲基四乙烯基环四硅氧烷、3-缩水甘油醚氧基丙基三乙氧基硅烷、四甲基二乙烯基二硅氧烷、四乙基二硅氧烷、六甲基二硅氧烷、苯基三(三甲基硅氧烷基)硅烷、三甲基苯基硅烷、六甲基二硅氮烷、烯丙基三苯基硅烷、苯基三氯硅烷、苯基三氟硅烷、苯基三乙氧基硅烷、苯基三甲基氧基硅烷、甲基苯基二甲氧基硅烷、二甲氧基甲基苯基硅烷、1,3-二氯四苯基二硅氧烷、苯基乙烯基三甲基硅烷、萘基乙烯基三甲基硅烷、二苯基二羟基硅烷、八甲基环四硅氧烷、六苯基环三硅氧烷、十甲基环五硅氧烷、苯基三氯硅烷、甲基苯基二氯硅烷、苯基二甲基氯硅烷、甲基苯基环三硅氧烷、三甲氧基甲基硅烷、三氟丙基甲基环三硅氧烷、三-(三乙氧硅烷)基苯基硅烷、全氟辛基乙基五氟苯基二甲氧基硅烷、三-(三乙基硅烷)基苯基硅烷中的一种或者几种。
  14. 根据权利要求3、4或者5所述的低介电常数膜，其中所述化合物E选自组合：环丁烷、环戊烷、环己烷中的一种或者几种。
  15. 根据权利要求3、4或者6所述的低介电常数膜，其中所述化合物E选自组合：苯、甲苯、对二甲苯中的一种或者几种。
  16. 根据权利要求9所述的低介电常数膜，其中所述化合物D选自组合：五氟苯基三乙氧基硅烷、五氟苯基三甲氧基硅烷、五氟苯基三氯硅烷、五氟苯基二甲基氯硅烷、全氟辛基乙基五氟苯基二氯硅烷、五氟二氯苯基全氟己基乙基硅 烷、全氟辛基二氯苯基硅烷、全氟辛基二乙氧基苯基硅烷、全氟辛基乙基五氟苯基二甲氧基硅烷、全氟丁基乙基五氟苯基二氯硅烷、全氟丁基乙基五氟苯基二甲氧基硅烷中的一种或者几种。
  17. 根据权利要求1-6任一所述的低介电常数膜，其中在气相沉积过程中通入辅助气体进行反应，所述辅助气体选自组合He、Ar中的一种或几种。
  18. 根据权利要求1-6任一所述的低介电常数膜，其中在气相沉积过程中通入辅助气体进行反应，所述辅助气体选自组合氮气加氢气、氨气、氧气、碳氢有机物中的一种或者几种。
  19. 根据权利要求1-6任一所述的低介电常数膜，其中所述低介电常数膜的介电常数值的范围选自组合2.1～2.2、2.2～2.3、2.4～2.5、2.5～2.6或2.6～2.7。
  20. 根据权利要求1-6任一所述的低介电常数膜，其中所述低介电常数膜的杨氏模量范围选自组合10～11GPa、11～12GPa、12～13GPa、23～24GPa、26～27GPa、27～28GPa、29～30GPa、31～32GPa或33～34GPa。
  21. 根据权利要求1-6任一所述的低介电常数膜，其中所述低介电常数膜的静态接触角范围选自组合：110°～115°、115°～120°、120°～125°、125°～130°、130°～135°、135°～140°、140°～145°、145°～150°或150°～155°。
  22. 根据权利要求1-6任一所述的低介电常数膜，其中所述低介电常数膜的厚度范围为10～2000nm。
  23. 一低介电常数膜，包括：
    一多孔层，所述多孔层通过化合物C和化合物E通过等离子体增强化学气相沉积形成，其中所述化合物C包括有机硅化合物，所述化合物E包括烷烃化合物和苯化合物；和
    一含氟层；所述含氟层由芳香基氟硅烷D通过等离子体增强化学气相沉积形成。
  24. 根据权利要求23所述的低介电常数膜，其中所述多孔层直接沉积于一基体的表面，所述含氟层沉积于多孔层表面。
  25. 根据权利要求23所述的低介电常数膜，其包括一防腐层，所述防腐层由含不饱和双键的环氧烷烃化合物A和化合物B通过等离子体增强化学气相沉积于基体表面形成，所述多孔层沉积于所述防腐层，其中所述化合物B选自组合不饱和双键的硅氧烷和不饱和双键的硅烷化合物中的一种或者几种。
  26. 根据权利要求25所述的低介电常数膜，其中所述化合物A选自组合：乙烯基环氧乙烷、甲基丙烯酸缩水甘油酯、烯丙基缩水甘油醚、1,2-环氧-4-乙烯基环己烷、2,3-环氧丙基二甲基乙烯基硅烷、2,3-环氧丙基二氯乙烯基硅烷中的一种或几种。
  27. 根据权利要求25所述的低介电常数膜，其中所述化合物B选自组合：烯丙基三甲氧基硅烷、乙烯基三乙氧基硅烷、三甲基乙烯基硅烷、3-丁烯基三甲基硅烷、乙烯基三丁酮肟基硅烷、四甲基二乙烯基二硅氧烷、四甲基四乙烯基环四硅氧烷、1,2,2-三氟乙烯基三苯基硅烷、二甲基甲氧基乙烯基硅烷、4-苯乙烯基(三甲氧基硅氧)基硅烷中的一种或几种。
  28. 根据权利要求23所述的低介电常数膜，其中所述化合物C包括有机硅氧烷。
  29. 根据权利要求23所述的低介电常数膜，其中所述化合物C包括有机硅烷。
  30. 根据权利要求23所述的低介电常数膜，其中所述化合物C选自组合：γ-缩水甘油醚氧丙基三甲氧基硅烷；D4H环四硅氧烷、六甲基环三硅氧烷、三-(三甲氧硅烷)基苯基硅烷、叔丁基二甲基氯硅烷、苯基乙炔基三甲基硅烷、联苯基乙烯基三甲基硅烷、八苯基环四硅氧烷、三苯基羟基硅烷、三氟丙基甲基环三硅氧烷、2,2,4,4-四甲基-6,6,8,8-四苯基环四硅氧烷、四甲基四乙烯基环四硅氧烷、3-缩水甘油醚氧基丙基三乙氧基硅烷、四甲基二乙烯基二硅氧烷、四乙基二硅氧烷、六甲基二硅氧烷、苯基三(三甲基硅氧烷基)硅烷、三甲基苯基硅烷、六甲基二硅氮烷、烯丙基三苯基硅烷、苯基三氯硅烷、苯基三氟硅烷、苯基三乙氧基硅烷、苯基三甲基氧基硅烷、甲基苯基二甲氧基硅烷、二甲氧基甲基苯基硅烷、1,3-二氯四苯基二硅氧烷、苯基乙烯基三甲基硅烷、萘基乙烯基三甲基硅烷、二苯基二羟基硅烷、八甲基环四硅氧烷、六苯基环三硅氧烷、十甲基环五硅氧烷、苯基三氯硅烷、甲基苯基二氯硅烷、苯基二甲基氯硅烷、甲基苯基环三硅氧烷、三甲氧基甲基硅烷、三氟丙基甲基环三硅氧烷、三-(三乙氧硅烷)基苯基硅烷、全氟辛基乙基五氟苯基二甲氧基硅烷、三-(三乙基硅烷)基苯基硅烷中的一种或者几种。
  31. 根据权利要求23所述的低介电常数膜，其中所述化合物E选自组合：环丁烷、环戊烷、环己烷、苯、甲苯、对二甲苯中的一种或几种。
  32. 根据权利要求23所述的低介电常数膜，其中所述化合物D选自组合：五氟苯基三乙氧基硅烷、五氟苯基三甲氧基硅烷、五氟苯基三氯硅烷、五氟苯基二甲基氯硅烷、全氟辛基乙基五氟苯基二氯硅烷、五氟二氯苯基全氟己基乙基硅烷、全氟辛基二氯苯基硅烷、全氟辛基二乙氧基苯基硅烷、全氟辛基乙基五氟苯基二甲氧基硅烷、全氟丁基乙基五氟苯基二氯硅烷、全氟丁基乙基五氟苯基二甲氧基硅烷中的一种或几种。
  33. 根据权利要求23-32任一所述的低介电常数膜，其中在气相沉积过程中通入辅助气体进行反应，所述辅助气体选自He、Ar中的一种或几种。
  34. 根据权利要求23-32任一所述的低介电常数膜，其中在气相沉积过程中通入辅助气体进行反应，所述辅助气体选自组合氮气加氢气、氨气、氧气、碳氢有机物中的一种或者几种。
  35. 根据权利要求23-32任一所述的低介电常数膜，其中所述低介电常数膜的介电常数值的范围选自组合2.1～2.2、2.2～2.3、2.4～2.5、2.5～2.6或2.6～2.7。
  36. 根据权利要求23-32任一所述的低介电常数膜，其中所述低介电常数膜的杨氏模量范围选自组合：10～11GPa、11～12GPa、12～13GPa、23～24GPa、26～27GPa、27～28GPa、29～30GPa、31～32GPa或33～34GPa。
  37. 根据权利要求23-32任一所述的低介电常数膜，其中所述低介电常数膜的静态接触角范围选自组合110°～115°、115°～120°、120°～125°、125°～130°、130°～135°、135°～140°、140°～145°、145°～150°或150°～155°。
  38. 根据权利要求23-32任一所述的低介电常数膜，其中所述低介电常数膜的厚度范围为10～2000nm。
  39. 一低介电常数膜，包括：
    一多孔层，所述多孔层通过化合物C和化合物E通过等离子体增强化学气相沉积形成，其中所述化合物C包括有机硅化合物，所述化合物E包括苯化合物；和
    一含氟层；所述含氟层由芳香基氟硅烷D通过等离子体增强化学气相沉积形成。
  40. 根据权利要求39所述的低介电常数膜，其中所述多孔层直接沉积于一基体的表面，所述含氟层沉积于多孔层表面。
  41. 根据权利要求39所述的低介电常数膜，其包括一防腐层，所述防腐层 由含不饱和双键的环氧烷烃化合物A和化合物B通过等离子体增强化学气相沉积于基体表面形成，所述多孔层沉积于所述防腐层，其中所述化合物B选自组合不饱和双键的硅氧烷和不饱和双键的硅烷化合物中的一种或者几种。
  42. 根据权利要求41所述的低介电常数膜，其中所述化合物A选自组合：乙烯基环氧乙烷、甲基丙烯酸缩水甘油酯、烯丙基缩水甘油醚、1,2-环氧-4-乙烯基环己烷、2,3-环氧丙基二甲基乙烯基硅烷、2,3-环氧丙基二氯乙烯基硅烷中的一种或几种。
  43. 根据权利要求41所述的低介电常数膜，其中所述化合物B选自组合：烯丙基三甲氧基硅烷、乙烯基三乙氧基硅烷、三甲基乙烯基硅烷、3-丁烯基三甲基硅烷、乙烯基三丁酮肟基硅烷、四甲基二乙烯基二硅氧烷、四甲基四乙烯基环四硅氧烷、1,2,2-三氟乙烯基三苯基硅烷、二甲基甲氧基乙烯基硅烷、4-苯乙烯基(三甲氧基硅氧)基硅烷中的一种或几种。
  44. 根据权利要求39所述的低介电常数膜，其中所述化合物C包括有机硅氧烷。
  45. 根据权利要求39所述的低介电常数膜，其中所述化合物C包括有机硅烷。
  46. 根据权利要求39所述的低介电常数膜，其中所述化合物C选自组合：γ-缩水甘油醚氧丙基三甲氧基硅烷；D4H环四硅氧烷、六甲基环三硅氧烷、三-(三甲氧硅烷)基苯基硅烷、叔丁基二甲基氯硅烷、苯基乙炔基三甲基硅烷、联苯基乙烯基三甲基硅烷、八苯基环四硅氧烷、三苯基羟基硅烷、三氟丙基甲基环三硅氧烷、2,2,4,4-四甲基-6,6,8,8-四苯基环四硅氧烷、四甲基四乙烯基环四硅氧烷、3-缩水甘油醚氧基丙基三乙氧基硅烷、四甲基二乙烯基二硅氧烷、四乙基二硅氧烷、六甲基二硅氧烷、苯基三(三甲基硅氧烷基)硅烷、三甲基苯基硅烷、六甲基二硅氮烷、烯丙基三苯基硅烷、苯基三氯硅烷、苯基三氟硅烷、苯基三乙氧基硅烷、苯基三甲基氧基硅烷、甲基苯基二甲氧基硅烷、二甲氧基甲基苯基硅烷、1,3-二氯四苯基二硅氧烷、苯基乙烯基三甲基硅烷、萘基乙烯基三甲基硅烷、二苯基二羟基硅烷、八甲基环四硅氧烷、六苯基环三硅氧烷、十甲基环五硅氧烷、苯基三氯硅烷、甲基苯基二氯硅烷、苯基二甲基氯硅烷、甲基苯基环三硅氧烷、三甲氧基甲基硅烷、三氟丙基甲基环三硅氧烷、三-(三乙氧硅烷)基苯基硅烷、全氟辛基乙基五氟苯基二甲氧基硅烷、三-(三乙基硅烷)基苯基硅烷中的一种 或者几种。
  47. 根据权利要求39所述的低介电常数膜，其中所述化合物E选自组合：苯、甲苯、对二甲苯中的一种或几种。
  48. 根据权利要求39所述的低介电常数膜，其中所述化合物D选自组合：五氟苯基三乙氧基硅烷、五氟苯基三甲氧基硅烷、五氟苯基三氯硅烷、五氟苯基二甲基氯硅烷、全氟辛基乙基五氟苯基二氯硅烷、五氟二氯苯基全氟己基乙基硅烷、全氟辛基二氯苯基硅烷、全氟辛基二乙氧基苯基硅烷、全氟辛基乙基五氟苯基二甲氧基硅烷、全氟丁基乙基五氟苯基二氯硅烷、全氟丁基乙基五氟苯基二甲氧基硅烷中的一种或几种。
  49. 根据权利要求39-48任一所述的低介电常数膜，其中在气相沉积过程中通入辅助气体进行反应，所述辅助气体选自He、Ar中的一种或几种。
  50. 根据权利要求39-48任一所述的低介电常数膜，其中在气相沉积过程中通入辅助气体进行反应，所述辅助气体选自组合氮气加氢气、氨气、氧气、碳氢有机物中的一种或者几种。
  51. 根据权利要求39-48任一所述的低介电常数膜，其中所述低介电常数膜的介电常数值的范围选自组合2.1～2.2、2.2～2.3、2.4～2.5、2.5～2.6或2.6～2.7。
  52. 根据权利要求39-48任一所述的低介电常数膜，其中所述低介电常数膜的杨氏模量范围选自组合：10～11GPa、11～12GPa、12～13GPa、23～24GPa、26～27GPa、27～28GPa、29～30GPa、31～32GPa或33～34GPa。
  53. 根据权利要求39-48任一所述的低介电常数膜，其中所述低介电常数膜的静态接触角范围选自组合110°～115°、115°～120°、120°～125°、125°～130°、130°～135°、135°～140°、140°～145°、145°～150°或150°～155°。
  54. 根据权利要求39-48任一所述的低介电常数膜，其中所述低介电常数膜的厚度范围为10～2000nm。
  55. 一低介电常数膜，包括：
    一多孔层，所述多孔层通过化合物C和化合物E通过等离子体增强化学气相沉积形成，其中所述化合物C包括有机硅化合物，所述化合物E包括烷烃化合物；和
    一含氟层；所述含氟层由芳香基氟硅烷D通过等离子体增强化学气相沉积形成。
  56. 根据权利要求55所述的低介电常数膜，其中所述多孔层直接沉积于一基体的表面，所述含氟层沉积于多孔层表面。
  57. 根据权利要求55所述的低介电常数膜，其包括一防腐层，所述防腐层由含不饱和双键的环氧烷烃化合物A和化合物B通过等离子体增强化学气相沉积于基体表面形成，所述多孔层沉积于所述防腐层，其中所述化合物B选自组合不饱和双键的硅氧烷和不饱和双键的硅烷化合物中的一种或者几种。
  58. 根据权利要求57所述的低介电常数膜，其中所述化合物A选自组合：乙烯基环氧乙烷、甲基丙烯酸缩水甘油酯、烯丙基缩水甘油醚、1,2-环氧-4-乙烯基环己烷、2,3-环氧丙基二甲基乙烯基硅烷、2,3-环氧丙基二氯乙烯基硅烷中的一种或几种。
  59. 根据权利要求57所述的低介电常数膜，其中所述化合物B选自组合：烯丙基三甲氧基硅烷、乙烯基三乙氧基硅烷、三甲基乙烯基硅烷、3-丁烯基三甲基硅烷、乙烯基三丁酮肟基硅烷、四甲基二乙烯基二硅氧烷、四甲基四乙烯基环四硅氧烷、1,2,2-三氟乙烯基三苯基硅烷、二甲基甲氧基乙烯基硅烷、4-苯乙烯基(三甲氧基硅氧)基硅烷中的一种或几种。
  60. 根据权利要求55所述的低介电常数膜，其中所述化合物C包括有机硅氧烷。
  61. 根据权利要求55所述的低介电常数膜，其中所述化合物C包括有机硅烷。
  62. 根据权利要求55所述的低介电常数膜，其中所述化合物C选自组合：γ-缩水甘油醚氧丙基三甲氧基硅烷；D4H环四硅氧烷、六甲基环三硅氧烷、三-(三甲氧硅烷)基苯基硅烷、叔丁基二甲基氯硅烷、苯基乙炔基三甲基硅烷、联苯基乙烯基三甲基硅烷、八苯基环四硅氧烷、三苯基羟基硅烷、三氟丙基甲基环三硅氧烷、2,2,4,4-四甲基-6,6,8,8-四苯基环四硅氧烷、四甲基四乙烯基环四硅氧烷、3-缩水甘油醚氧基丙基三乙氧基硅烷、四甲基二乙烯基二硅氧烷、四乙基二硅氧烷、六甲基二硅氧烷、苯基三(三甲基硅氧烷基)硅烷、三甲基苯基硅烷、六甲基二硅氮烷、烯丙基三苯基硅烷、苯基三氯硅烷、苯基三氟硅烷、苯基三乙氧基硅烷、苯基三甲基氧基硅烷、甲基苯基二甲氧基硅烷、二甲氧基甲基苯基硅烷、1,3-二氯四苯基二硅氧烷、苯基乙烯基三甲基硅烷、萘基乙烯基三甲基硅烷、二苯基二羟基硅烷、八甲基环四硅氧烷、六苯基环三硅氧烷、十甲基环五硅氧烷、 苯基三氯硅烷、甲基苯基二氯硅烷、苯基二甲基氯硅烷、甲基苯基环三硅氧烷、三甲氧基甲基硅烷、三氟丙基甲基环三硅氧烷、三-(三乙氧硅烷)基苯基硅烷、全氟辛基乙基五氟苯基二甲氧基硅烷、三-(三乙基硅烷)基苯基硅烷中的一种或者几种。
  63. 根据权利要求55所述的低介电常数膜，其中所述化合物E选自组合：环丁烷、环戊烷、环己烷中的一种或几种。
  64. 根据权利要求55所述的低介电常数膜，其中所述化合物D选自组合：五氟苯基三乙氧基硅烷、五氟苯基三甲氧基硅烷、五氟苯基三氯硅烷、五氟苯基二甲基氯硅烷、全氟辛基乙基五氟苯基二氯硅烷、五氟二氯苯基全氟己基乙基硅烷、全氟辛基二氯苯基硅烷、全氟辛基二乙氧基苯基硅烷、全氟辛基乙基五氟苯基二甲氧基硅烷、全氟丁基乙基五氟苯基二氯硅烷、全氟丁基乙基五氟苯基二甲氧基硅烷中的一种或几种。
  65. 根据权利要求55-64任一所述的低介电常数膜，其中在气相沉积过程中通入辅助气体进行反应，所述辅助气体选自组合He、Ar中的一种或几种。
  66. 根据权利要求55-64任一所述的低介电常数膜，其中在气相沉积过程中通入辅助气体进行反应，所述辅助气体选自组合氮气加氢气、氨气、氧气、碳氢有机物中的一种或者几种。
  67. 根据权利要求55-64任一所述的低介电常数膜，其中所述低介电常数膜的介电常数值的范围选自组合2.1～2.2、2.2～2.3、2.4～2.5、2.5～2.6或2.6～2.7。
  68. 根据权利要求55-64任一所述的低介电常数膜，其中所述低介电常数膜的杨氏模量范围选自组合：10～11GPa、11～12GPa、12～13GPa、23～24GPa、26～27GPa、27～28GPa、29～30GPa、31～32GPa或33～34GPa。
  69. 根据权利要求55-64任一所述的低介电常数膜，其中所述低介电常数膜的静态接触角范围选自组合110°～115°、115°～120°、120°～125°、125°～130°、130°～135°、135°～140°、140°～145°、145°～150°或150°～155°。
  70. 根据权利要求55-64任一所述的低介电常数膜，其中所述低介电常数膜的厚度范围为10～2000nm。
  71. 低介电常数膜的制备方法，包括步骤：
    (A)在一基体的表面气相沉积一防腐层；和
    (B)气相沉积一多孔层。
  72. 根据权利要求71所述的低介电常数膜的制备方法，其中所述步骤(A)包括：
    (A1)引入乙烯基环氧烷烃化合物A和乙烯基有机硅化合物B至反应装置的腔室内；
    (A2)通入惰性气体至反应装置的腔室中；和
    (A3)在预定功率下，由所述化合物A和化合物B反应沉积至所述基体表面形成所述防腐层。
  73. 根据权利要求71所述的低介电常数制备方法，其中所述步骤(B)包括：
    (B1)通入化合物C和化合物E，其中所述化合物C包括有机硅化合物，所述化合物E包括烷烃化合物和苯化合物；
    (B2)通入气体，其中所述气体选自组合氮气加氢气和氨气中的一种或者几种；
    (B3)通入氧气；和
    (B4)在预定功率下，由所述化合物C和所述化合物E气相沉积反应形成所述多孔层。
  74. 根据权利要求71所述的低介电常数制备方法，其中所述步骤(B)包括：
    (B1)通入化合物C和化合物E，其中所述化合物C包括有机硅化合物，所述化合物E包括烷烃化合物；
    (B2)通入气体，其中所述气体选自组合氮气加氢气和氨气中的一种或者几种；
    (B3)通入氧气；和
    (B4)在预定功率下，由所述化合物C和所述化合物E气相沉积反应形成所述多孔层。
  75. 根据权利要求71所述的低介电常数制备方法，其中所述步骤(B)包括：
    (B1)通入化合物C和化合物E，其中所述化合物C包括有机硅化合物，所述化合物E包括苯化合物；
    (B2)通入气体，其中所述气体选自组合氮气加氢气和氨气中的一种或者几 种；
    (B3)通入氧气；和
    (B4)在预定功率下，由所述化合物C和所述化合物E气相沉积反应形成所述多孔层。
  76. 根据权利要求73至75任一所述的低介电常数制备方法，其中所述化合物C包括有机硅氧烷。
  77. 根据权利要求73至75任一所述的低介电常数制备方法，其中所述化合物C包括有机硅烷。
  78. 根据权利要求73-75任一所述的低介电常数膜制备方法，其中通入氧气的方式为间歇通入。
  79. 根据权利要求71所述的低介电常数膜制备方法，其还包括步骤(C)：气相沉积一含氟层至所述多孔层。
  80. 根据权利要求79所述的低介电常数膜制备方法，其中所述步骤(C)包括：
    (C1)通入惰性气体；
    (C2)通入芳香基氟硅烷D；和
    (C3)在预定功率下，由芳香基氟硅烷D气相沉积反应形成所述含氟层。
  81. 根据权利要求71所述的低介电常数制备方法，其还包括步骤：清洗处理所述基体表面。
  82. 根据权利要求71所述的低介电常数膜的制备方法，其还包括步骤：运转所述基体，使得所述基体在腔室中运动。
  83. 根据权利要求72所述的低介电常数膜的制备方法，其中所述化合物A选自组合：乙烯基环氧乙烷、甲基丙烯酸缩水甘油酯、烯丙基缩水甘油醚、1,2-环氧-4-乙烯基环己烷、2,3-环氧丙基二甲基乙烯基硅烷、2,3-环氧丙基二氯乙烯基硅烷中的一种或几种。
  84. 根据权利要求72所述的低介电常数膜的制备方法，其中所述化合物B选自组合：烯丙基三甲氧基硅烷、乙烯基三乙氧基硅烷、三甲基乙烯基硅烷、3-丁烯基三甲基硅烷、乙烯基三丁酮肟基硅烷、四甲基二乙烯基二硅氧烷、四甲基四乙烯基环四硅氧烷、1,2,2-三氟乙烯基三苯基硅烷、二甲基甲氧基乙烯基硅烷、4-苯乙烯基(三甲氧基硅氧)基硅烷中的一种或几种。
  85. 根据权利要求73至75任一所述的低介电常数膜的制备方法，其中所述化合物C选自组合：γ-缩水甘油醚氧丙基三甲氧基硅烷；D4H环四硅氧烷、六甲基环三硅氧烷、三-(三甲氧硅烷)基苯基硅烷、叔丁基二甲基氯硅烷、苯基乙炔基三甲基硅烷、联苯基乙烯基三甲基硅烷、八苯基环四硅氧烷、三苯基羟基硅烷、三氟丙基甲基环三硅氧烷、2,2,4,4-四甲基-6,6,8,8-四苯基环四硅氧烷、四甲基四乙烯基环四硅氧烷、3-缩水甘油醚氧基丙基三乙氧基硅烷、四甲基二乙烯基二硅氧烷、四乙基二硅氧烷、六甲基二硅氧烷、苯基三(三甲基硅氧烷基)硅烷、三甲基苯基硅烷、六甲基二硅氮烷、烯丙基三苯基硅烷、苯基三氯硅烷、苯基三氟硅烷、苯基三乙氧基硅烷、苯基三甲基氧基硅烷、甲基苯基二甲氧基硅烷、二甲氧基甲基苯基硅烷、1,3-二氯四苯基二硅氧烷、苯基乙烯基三甲基硅烷、萘基乙烯基三甲基硅烷、二苯基二羟基硅烷、八甲基环四硅氧烷、六苯基环三硅氧烷、十甲基环五硅氧烷、苯基三氯硅烷、甲基苯基二氯硅烷、苯基二甲基氯硅烷、甲基苯基环三硅氧烷、三甲氧基甲基硅烷、三氟丙基甲基环三硅氧烷、三-(三乙氧硅烷)基苯基硅烷、全氟辛基乙基五氟苯基二甲氧基硅烷、三-(三乙基硅烷)基苯基硅烷中的一种或者几种。
  86. 根据权利要求73至75任一所述的低介电常数膜的制备方法，其中所述化合物E选自组合：环丁烷、环戊烷、环己烷、苯、甲苯、对二甲苯中的一种或几种。
  87. 根据权利要求73至75任一所述的低介电常数膜的制备方法，其中所述化合物D选自组合：五氟苯基三乙氧基硅烷、五氟苯基三甲氧基硅烷、五氟苯基三氯硅烷、五氟苯基二甲基氯硅烷、全氟辛基乙基五氟苯基二氯硅烷、五氟二氯苯基全氟己基乙基硅烷、全氟辛基二氯苯基硅烷、全氟辛基二乙氧基苯基硅烷、全氟辛基乙基五氟苯基二甲氧基硅烷、全氟丁基乙基五氟苯基二氯硅烷、全氟丁基乙基五氟苯基二甲氧基硅烷中的一种或者几种。
  88. 根据权利要求71-75任一所述的低介电常数膜的制备方法，其中所述低介电常数膜的介电常数值的范围选自组合2.1～2.2、2.2～2.3、2.4～2.5、2.5～2.6或2.6～2.7。
  89. 根据权利要求71-75任一所述的低介电常数膜的制备方法，其中所述低介电常数膜的杨氏模量范围选自组合10～11GPa、11～12GPa、12～13GPa、23～24GPa、26～27GPa、27～28GPa、29～30GPa、31～32GPa或33～34GPa。
  90. 根据权利要求71-75任一所述的低介电常数膜的制备方法，其中所述低介电常数膜的静态接触角范围选自组合110°～115°、115°～120°、120°～125°、125°～130°、130°～135°、135°～140°、140°～145°、145°～150°或150°～155°。
  91. 根据权利要求71-75任一所述的低介电常数膜的制备方法，其中所述低介电常数膜的厚度范围为10～2000nm。
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