WO2021007806A1 - 一种光子芯片及其制备方法 - Google Patents

一种光子芯片及其制备方法 Download PDF

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Publication number
WO2021007806A1
WO2021007806A1 PCT/CN2019/096361 CN2019096361W WO2021007806A1 WO 2021007806 A1 WO2021007806 A1 WO 2021007806A1 CN 2019096361 W CN2019096361 W CN 2019096361W WO 2021007806 A1 WO2021007806 A1 WO 2021007806A1
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Prior art keywords
silicon dioxide
waveguide
substrate
buried
thin film
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Ceased
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PCT/CN2019/096361
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English (en)
French (fr)
Inventor
杨林
杨尚霖
张磊
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Institute of Semiconductors of CAS
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Institute of Semiconductors of CAS
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Priority to JP2022503400A priority Critical patent/JP7417320B2/ja
Priority to US17/627,544 priority patent/US11874497B2/en
Priority to EP19938090.8A priority patent/EP4001977B1/en
Priority to PCT/CN2019/096361 priority patent/WO2021007806A1/zh
Publication of WO2021007806A1 publication Critical patent/WO2021007806A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B6/122—Basic optical elements, e.g. light-guiding paths
    • G02B6/1228—Tapered waveguides, e.g. integrated spot-size transformers
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B6/12007—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind forming wavelength selective elements, e.g. multiplexer, demultiplexer
    • G02B6/12009—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind forming wavelength selective elements, e.g. multiplexer, demultiplexer comprising arrayed waveguide grating [AWG] devices, i.e. with a phased array of waveguides
    • G02B6/12011—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind forming wavelength selective elements, e.g. multiplexer, demultiplexer comprising arrayed waveguide grating [AWG] devices, i.e. with a phased array of waveguides characterised by the arrayed waveguides, e.g. comprising a filled groove in the array section
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/03—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on ceramics or electro-optical crystals, e.g. exhibiting Pockels effect or Kerr effect
    • G02F1/035—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on ceramics or electro-optical crystals, e.g. exhibiting Pockels effect or Kerr effect in an optical waveguide structure
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/21—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  by interference
    • G02F1/212—Mach-Zehnder type
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B2006/12035—Materials
    • G02B2006/1204—Lithium niobate (LiNbO3)
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B2006/12035—Materials
    • G02B2006/12061—Silicon
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B2006/12133—Functions
    • G02B2006/12142—Modulator
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B2006/12133—Functions
    • G02B2006/12164—Multiplexing; Demultiplexing

Definitions

  • the present disclosure relates to the technical field of optical fiber communication and integrated optics, and in particular, to a photonic chip and a preparation method thereof.
  • the present disclosure provides a photonic chip and a manufacturing method thereof.
  • the lithium niobate thin film modulator, the wavelength division multiplexer and the first optical coupling structure of the two are integrated on the photonic chip, so that the volume of the prepared device is Small size, high process accuracy, good repeatability, and high device yield.
  • the present disclosure provides a photonic chip, which includes a lithium niobate thin film modulator array, a first optical coupling array, and a silicon dioxide waveguide wavelength division multiplexer.
  • the lithium niobate thin film modulator array consists of one or more niobate Lithium thin film modulator is used to modulate optical signals;
  • the first optical coupling array is composed of one or more first optical coupling structures, one end of the first optical coupling structure is connected to the corresponding lithium niobate thin film modulator, and The other end is connected to the silica waveguide wavelength division multiplexer to transmit the modulated optical signal to the silica waveguide wavelength division multiplexer; the silica waveguide wavelength division multiplexer is used to modulate the modulated optical signal Perform wavelength division multiplexing.
  • the lithium niobate thin film modulator includes: a first substrate; a first buried silicon dioxide layer disposed on the first substrate; a first lithium niobate thin film waveguide disposed on the first substrate according to a first preset shape On a buried layer of silicon dioxide; metal electrodes are arranged on both sides of the first lithium niobate thin film waveguide layer; a first capping layer of silicon dioxide covers the first buried layer of silicon dioxide, the first lithium niobate thin film waveguide and The metal electrode is provided with a through hole to expose the metal electrode; the terminal resistor is connected to the metal electrode through the through hole; the metal lead is connected to the metal electrode through the through hole; the first top layer of silicon dioxide is covered on the first cover layer 2. Silicon oxide and terminal resistors.
  • the first light coupling structure includes: a second substrate; a second buried silicon dioxide layer disposed on the second substrate; and a second lithium niobate thin film waveguide disposed on the second buried silicon dioxide layer , Its shape is a tapered structure, and the end with the larger cross-sectional area is connected to the first lithium niobate thin film waveguide, and the end with the smaller cross-sectional area is connected to the silica waveguide wavelength division multiplexer; the second cover layer two Silicon oxide covers the second buried silicon dioxide and the second lithium niobate thin film waveguide; the second top layer silicon dioxide covers the second cap layer silicon dioxide.
  • the silicon dioxide waveguide wavelength division multiplexer includes: a third substrate; a third buried silicon dioxide layer arranged on the third substrate; a silicon dioxide waveguide arranged on the second substrate according to a second preset shape Three buried layers of silicon dioxide are connected to the end of the second lithium niobate thin film waveguide with a smaller cross-sectional area; the third top layer of silicon dioxide covers the silicon dioxide waveguide.
  • the first buried silicon dioxide, the second buried silicon dioxide, or the third buried silicon dioxide is a single-layer silicon dioxide or a double-layer silicon dioxide, and the refractive index of the single-layer silicon dioxide is higher than The refractive index of the first substrate, the second substrate, or the third substrate, the refractive index of the double-layer silicon dioxide is lower than the refractive index of the first, second, or third substrate, and the double-layer The refractive index of the lower layer of silicon dioxide is lower than that of the upper layer of silicon dioxide.
  • the refractive index of the first cap layer silicon dioxide, the second cap layer silicon dioxide or the silicon dioxide waveguide is the same as the first buried layer silicon dioxide, the second buried layer silicon dioxide or the third buried layer dioxide
  • the difference in refractive index of silicon is smaller than the first preset value.
  • the difference between the refractive indexes of the first top layer silicon dioxide, the second top layer silicon dioxide, and the third top layer silicon dioxide and the refractive index of the first substrate, the second substrate and the third substrate is smaller than that of the second default value.
  • the refractive index of the first buried silicon dioxide, the second buried silicon dioxide or the third buried silicon dioxide is equal to the refractive index of the first, second and third substrates.
  • the difference in refractive index is greater than the third preset value, and the refractive index of the first cap layer silicon dioxide, the second cap layer silicon dioxide or the silicon dioxide waveguide is equal to that of the first top layer silicon dioxide and the second top layer silicon dioxide.
  • the difference between the refractive index of silicon oxide and the third top layer silicon dioxide is greater than the third preset value.
  • the present disclosure also provides a method for preparing a photonic chip, including: S1, preparing a substrate, the substrate including a first substrate, a second substrate, and a third substrate; S2, preparing a buried layer dioxide on the substrate Silicon, buried silicon dioxide includes the first buried silicon dioxide, the second buried silicon dioxide and the third buried silicon dioxide; S3, the first lithium niobate film is prepared on the first buried silicon dioxide Waveguide, a tapered second lithium niobate thin film waveguide is prepared on the second buried silicon dioxide; S4, metal electrodes are prepared on both sides of the first lithium niobate thin film waveguide; S5, a second buried silicon dioxide, Prepare a first cap layer of silicon dioxide on the first lithium niobate thin film waveguide and the metal electrode, and prepare a second cap layer of silicon dioxide on the second lithium niobate thin film waveguide, and prepare a third buried layer of silicon dioxide Silicon dioxide waveguide; S6, preparing terminal resistors and metal leads on the
  • the end of the second lithium niobate thin film waveguide with a larger cross-sectional area is connected to the first lithium niobate thin film waveguide, and the end with a smaller cross-sectional area is connected to the silicon dioxide waveguide.
  • the photonic chip and the preparation method thereof provided in the present disclosure realize the monolithic integration of the optical modulation and wavelength division multiplexing functions in the optical communication process, reduce the insertion loss introduced by the discrete device constituting the system, and the device is small in size and integrated High, high process accuracy, good repeatability, high yield rate, and the use of lithium niobate thin film modulator makes the device modulation efficiency high, large bandwidth, high modulation rate.
  • Fig. 1 schematically shows a structural diagram of a photonic chip provided by an embodiment of the present disclosure.
  • Figure 2A schematically shows a front view of the base material after the lithium niobate thin film layer is prepared in operation S3 according to an embodiment of the present disclosure.
  • FIG. 2B schematically shows a front view of another base material after the lithium niobate thin film layer is prepared in operation S3 according to an embodiment of the present disclosure.
  • 3A and 3B respectively schematically show a front view and a top view of the cross-section of the device after the first lithium niobate thin film waveguide is prepared in operation S3 provided by an embodiment of the present disclosure.
  • 3C and 3D respectively schematically show a front view and a top view of another device cross-section after the first lithium niobate thin film waveguide is prepared in operation S3 provided by an embodiment of the present disclosure.
  • FIG. 4 schematically shows a cross-sectional front view of the silica waveguide wavelength division multiplexer area after operation S3 provided by an embodiment of the present disclosure.
  • 5A and 5B respectively schematically show a front view and a top view of a cross-section of the device after the metal electrode is prepared in operation S4 provided by an embodiment of the present disclosure.
  • FIG. 6 schematically shows a cross-sectional front view of the silicon dioxide waveguide wavelength division multiplexer area after the deposition in operation S5 according to an embodiment of the present disclosure.
  • 7A and 7B respectively schematically show a cross-sectional front view and a top view of the first light coupling structure region after the deposition in operation S5 provided by an embodiment of the present disclosure.
  • 8A and 8B respectively schematically show a cross-sectional front view and a top view of a lithium niobate thin film modulator region after etching in operation S5 provided by an embodiment of the present disclosure.
  • FIG. 9 schematically shows a cross-sectional front view of the silicon dioxide waveguide wavelength division multiplexer area after etching in operation S5 provided by an embodiment of the present disclosure.
  • 10A and 10B respectively schematically show a cross-sectional front view and a top view of the first light coupling structure region after etching in operation S5 provided by an embodiment of the present disclosure.
  • 11A and 11B schematically show a cross-sectional front view and a top view of the lithium niobate thin film modulator region after operation S6 provided by an embodiment of the present disclosure, respectively.
  • 12A and 12B schematically show a cross-sectional front view and a top view of the lithium niobate thin film modulator region after operation S7, respectively, according to an embodiment of the present disclosure.
  • FIG. 13 schematically shows a cross-sectional front view of the first light coupling structure region after operation S7 according to an embodiment of the present disclosure.
  • FIG. 14 schematically shows a flowchart of a method for manufacturing a photonic chip provided by an embodiment of the present disclosure.
  • the first embodiment of the present disclosure provides a photonic chip. Referring to FIG. 1, the structure shown in FIG. 1 will be described in detail with reference to FIGS. 2-13.
  • the photonic chip in the embodiment of the present disclosure includes a lithium niobate thin film modulator array 1, a first optical coupling array 2 and a silicon dioxide waveguide wavelength division multiplexer 3.
  • the lithium niobate thin film modulator array 1 consists of one or more lithium niobate thin film modulators for modulating optical signals.
  • the first optical coupling array 2 is composed of one or more first optical coupling structures, one end of the first optical coupling structure is connected to the corresponding lithium niobate thin film modulator, and the other end is connected to the silicon dioxide waveguide wavelength division multiplexer 3 , To transmit the modulated optical signal to the silica waveguide wavelength division multiplexer 3.
  • the silica waveguide wavelength division multiplexer 3 is used to perform wavelength division multiplexing on the modulated optical signal.
  • the lithium niobate thin film modulator includes the following structures from bottom to top:
  • the first substrate 4 is a quartz substrate, and the material composition is, for example, pure silicon dioxide or doped silicon dioxide, or other materials.
  • the first buried silicon dioxide 5 is arranged on the first substrate 4, and the material composition is pure silicon dioxide or doped silicon dioxide.
  • the first buried silicon dioxide 5 is a single layer silicon dioxide (refer to FIG. 2A) or a double layer silicon dioxide (refer to FIG. 2B). Specifically, when the refractive index of the first buried silicon dioxide 5 is higher than that of the first When the substrate 4 is used, a single layer of silicon dioxide is used. When the refractive index of the first buried layer of silicon dioxide 5 is lower than that of the first substrate 4, a double layer of silicon dioxide is selected, and the lower layer of the double layer of silicon dioxide The refractive index of silicon is lower than that of the upper silicon dioxide.
  • the first lithium niobate thin film waveguide 6 is a lithium niobate thin film optical waveguide structure arranged on the first buried silicon dioxide 5 according to a first preset shape, and the material composition is lithium niobate or doped lithium niobate
  • the first predetermined shape is, for example, Mach-Zehnder interference type (see FIGS. 3A and 3B) or a micro-ring coupler type (see FIGS. 3C and 3D).
  • the first lithium niobate thin film waveguide 6 may also be, for example, a single Waveguide, the single waveguide and the metal electrode cooperate to form a phase modulator, which is also a kind of lithium niobate thin film modulator.
  • the working wavelength of the lithium niobate thin film modulator should include light waves in the typical optical communication bands of 1310nm and 1550nm, but its working wavelength is not limited to this;
  • the modulation mode of the lithium niobate thin film modulator should include intensity modulation, Phase modulation, modulation methods should also include non-coherent modulation and coherent modulation, but the modulation method is not limited to this.
  • the structure of the first lithium niobate thin film waveguide 6 in the lithium niobate thin film modulator is not limited to the above example shape, and may also be other structures capable of converting electrical signals into optical signals.
  • the metal electrodes 7 are arranged on both sides near the first lithium niobate thin film waveguide layer 6 (see FIGS. 5A and 5B), and the material composition is gold, copper or other conductive materials.
  • the first capping layer silicon dioxide 8 covers the first buried layer silicon dioxide 5, the first lithium niobate thin film waveguide 6 and the metal electrode 7, and the first capping layer silicon dioxide 8 is provided with through holes to expose Metal electrode 7 (see Figures 8A and 8B).
  • the first cap layer silicon dioxide 8 is pure silicon dioxide or doped silicon dioxide, and its refractive index is similar to that of the first buried layer silicon dioxide 5, that is, the first cap layer silicon dioxide 8 and the first buried silicon dioxide The difference in refractive index of the layer silica 5 is smaller than the first preset value.
  • the terminal resistor 9 is connected to the metal electrode 7 through a through hole in the first cap layer silicon dioxide 8 for impedance matching of the traveling wave electrode (see FIGS. 11A and 11B). At this time, the terminal resistor 9 is formed in the photon On chip.
  • the terminal resistor 9 may not be provided on the photonic chip.
  • the terminal resistor 9 may be mounted on an already packaged photonic chip and connected to the metal electrode 7 of the photonic chip.
  • the metal lead 10 is connected to the metal electrode 7 through other through holes in the first cap layer silicon dioxide 8 for providing electrical signals to the metal electrode (see FIGS. 11A and 11B).
  • the first top layer silicon dioxide 11 covers the first cap layer silicon dioxide 8 and the terminal resistor 9. It is alcohol silicon dioxide or doped silicon dioxide, which is similar to the refractive index of the first substrate 4 (see figure 12A and 12B), that is, the refractive index difference between the first top layer silicon dioxide 11 and the first substrate 4 is smaller than the second preset value.
  • the difference between the refractive index of the first buried layer silicon dioxide 5 and the first cap layer silicon dioxide 8 and the refractive index of the first substrate 4 and the first top layer silicon dioxide 11 is greater than a third preset value to Ensure that the refractive indexes of the first buried layer silicon dioxide 5 and the first cap layer silicon dioxide 8 are not close to the refractive indexes of the first substrate 4 and the first top layer silicon dioxide 11.
  • the first light coupling structure includes the following structures from bottom to top:
  • the second substrate 4' is a quartz substrate, and the material composition is pure silicon dioxide or doped silicon dioxide, or other materials.
  • the second buried silicon dioxide 5' is arranged on the second substrate 4', and the material composition is pure silicon dioxide or doped silicon dioxide.
  • the second buried silicon dioxide 5' is a single-layer silicon dioxide (refer to FIG. 2A) or a double-layer silicon dioxide (refer to FIG. 2B).
  • a single layer of silicon dioxide is used, and when the refractive index of the second buried layer of silicon dioxide 5'is lower than that of the second substrate 4', a double layer of silicon dioxide is used, and a double layer of silicon dioxide is used.
  • the refractive index of the lower silicon dioxide in silicon is lower than that of the upper silicon dioxide.
  • the second lithium niobate thin film waveguide 6' is arranged on the second buried silicon dioxide 5', and its shape is a tapered structure, and the end with a larger cross-sectional area is connected to the lithium niobate thin film modulator, specifically, The end with the larger cross-sectional area is connected to the first lithium niobate thin film waveguide 6, and the end with the smaller cross-sectional area is connected to the silica waveguide wavelength division multiplexer. Specifically, the end with the smaller cross-sectional area extends into the second In the silicon oxide waveguide 12, the material composition is lithium niobate or doped lithium niobate.
  • the second capping layer of silicon dioxide 8' covers the second buried layer of silicon dioxide 5'and the second lithium niobate thin film waveguide 6'(see Figures 7A and 7B), and its material composition is pure silicon dioxide or
  • the refractive index of the doped silicon dioxide is similar to that of the second buried silicon dioxide 5'.
  • the second cap layer silicon dioxide 8'and the second buried layer silicon dioxide 5' together form a silicon dioxide waveguide core layer, and the core layer wraps the second lithium niobate thin film waveguide 6'.
  • the second top layer silicon dioxide 11' covers the second cap layer silicon dioxide 8'. Its composition is pure silicon dioxide or doped silicon dioxide, and its refractive index is the same as that of the second substrate 4' similar.
  • the second top layer silicon dioxide 11' and the second substrate 4' respectively serve as the upper and lower cladding layers of the silicon dioxide waveguide core layer, and the refractive indexes of the upper and lower cladding layers are lower than the refractive index of the silicon dioxide waveguide core layer.
  • the difference between the refractive index of the second buried layer silicon dioxide 5'and the second cap layer silicon dioxide 8'and the refractive index of the second substrate 4'and the second top layer silicon dioxide 11' Set value is the difference between the refractive index of the second buried layer silicon dioxide 5'and the second cap layer silicon dioxide 8'and the refractive index of the second substrate 4'and the second top layer silicon dioxide 11' Set value.
  • the silica waveguide wavelength division multiplexer 3 includes the following structures from bottom to top:
  • the third substrate 4" is a quartz substrate, and the material composition is pure silicon dioxide or doped silicon dioxide, or other materials.
  • the third buried silicon dioxide 5" is arranged on the third substrate 4" (refer to FIG. 4), and its material composition is pure silicon dioxide or doped silicon dioxide.
  • the third buried silicon dioxide 5" is a single-layer silicon dioxide or a double-layer silicon dioxide. Specifically, when the refractive index of the third buried silicon dioxide 5" is higher than that of the third substrate 4", a single-layer silicon dioxide is selected. Layer silicon dioxide, when the refractive index of the third buried silicon dioxide 5" is lower than that of the third substrate 4", use double-layer silicon dioxide, and the refractive index of the lower silicon dioxide in the double-layer silicon dioxide is low The refractive index of the upper silica.
  • the silicon dioxide waveguide 12 is arranged on the third buried silicon dioxide 5′′ according to the second preset shape (refer to FIG. 9). Its material composition is pure silicon dioxide or doped silicon dioxide, and its refractive index is the same as The refractive index of the second buried silicon dioxide is similar.
  • the structure of the silicon dioxide waveguide 12 should include, but is not limited to, a silicon dioxide straight waveguide, a gradually narrowing silicon dioxide waveguide, and a gradually widening silicon dioxide waveguide.
  • the third top layer silicon dioxide 11" covers the silicon dioxide waveguide 12, and its material composition is pure silicon dioxide or doped silicon dioxide, and its refractive index is similar to that of the third substrate 4".
  • the third top layer silicon dioxide 11" and the third substrate 4" respectively serve as the upper and lower cladding layers of the silicon dioxide waveguide 12, and the refractive indexes of the third top layer silicon dioxide 11" and the third substrate 4" are both lower than two.
  • the difference between the refractive index of the third buried layer silicon dioxide 5" and the third cap layer silicon dioxide 8" and the refractive index of the third substrate 4" and the third top layer silicon dioxide 11" Set value.
  • the refractive index of the first substrate 4, the second substrate 4'and the third substrate 4" is between 1.444 and 1.532
  • the first preset value is preferably 0.1
  • the second preset value is preferably Is 0.2
  • the third preset value is preferably 0.002. It can be understood that the refractive index of the first substrate 4, the second substrate 4', and the third substrate 4" and the first preset value and the second preset
  • the numerical value of the value and the third preset value are not limited to the above-mentioned preferred values.
  • the photonic chip in this embodiment further includes a second light coupling array 13 and a third light coupling array 14.
  • the second optical coupling array 13 is composed of one or more second optical coupling structures, and the second optical coupling structures are used to couple optical signals to the lithium niobate thin film modulators connected thereto.
  • the third optical coupling array 14 is composed of one or more third optical coupling structures, which are connected to the silica waveguide wavelength division multiplexer 3 for performing wavelength division multiplexing on the silica waveguide wavelength division multiplexer 3 The optical signal is coupled out.
  • the optical signal is coupled into the chip through the second optical coupling structure, and the beam splitting and beam combining operations are performed on the chip to make the number of optical paths meet the requirements;
  • the coupled optical signal is modulated by the lithium niobate modulator and is on-chip
  • the beam combining and splitting operations it enters the first optical coupling structure.
  • the beam combining and splitting operations are performed again to enter the silica waveguide wavelength division multiplexer 3; the silica waveguide wavelength division multiplexer 3
  • the optical signal output by the user will also be split and combined on the chip so that the number of optical paths meets the demand.
  • the number of first lithium niobate modulators and the number of first optical coupling structures and the number of second optical coupling structures can be the same or different; the number of input ends of the silica waveguide wavelength division multiplexer 3 is the same as that of the first optical coupling structure.
  • the number of optical coupling structures can be the same or different; the number of output ends of the silica waveguide wavelength division multiplexer 3 and the number of first optical coupling structures can be the same or different.
  • the structure shown in Figure 1 only takes the structure of a 4-channel lithium niobate thin film modulator and a 4 ⁇ 4 silica waveguide arrayed waveguide grating (Arrayed Waveguide Grating, AWG) wavelength division multiplexer structure as an example to show the structure of the photonic chip.
  • the photonic chip structure should include and is not limited to 4 input and output channels, and the number of input links may not be equal to the number of output links
  • the silica wavelength division multiplexer structure should include but is not limited to AWG wavelength division multiplexing
  • the structure can also be other optical communication WDM devices with similar functions such as dielectric films or grating WDM devices.
  • the working wavelength of the wavelength division multiplexing device should include light waves in the typical optical communication bands of 1310 nm and 1550 nm, but the working wavelength is not limited thereto.
  • the first substrate 4, the second substrate 4', and the third substrate 4" are integrally prepared in the same process; the first buried silicon dioxide 5, the second The buried silicon dioxide 5'and the third buried silicon dioxide 5" are also integrally prepared in the same process; the first capping layer silicon dioxide 8, the second capping layer silicon dioxide 8', and the third capping layer two
  • the silicon oxide 8" is also a whole prepared in the same process; the first top silicon dioxide 11, the second top silica 11', and the third top silica 11" are also the whole prepared in the same process. Only the above-mentioned whole is divided into three different functional areas to form a lithium niobate thin film modulator, a first optical coupling structure, and a silica waveguide wavelength division multiplexer.
  • the second embodiment of the present disclosure provides a method for preparing a photonic chip.
  • the preparation method shown in FIG. 14 will be described in detail in conjunction with FIGS. 2-13.
  • the preparation method includes the following operations.
  • the substrate includes a first substrate 4, a second substrate 4'and a third substrate 4".
  • a quartz substrate layer is prepared to support the entire wafer.
  • the quartz substrate layer is divided into three regions: a first substrate 4, a second substrate 4', and a third substrate 4", which are used to support niobic acid.
  • a buried silicon dioxide is prepared on the substrate.
  • the buried silicon dioxide is divided into a first buried silicon dioxide 5, a second buried silicon dioxide 5'and a third buried silicon dioxide 5" In these three areas, the third buried silicon dioxide 5" is used to form the lower part of the core layer of the silicon dioxide waveguide 12.
  • the refractive index range of the quartz substrate layer for light with a wavelength of 1550 nm is about 1.4 to 1.6
  • the refractive index range of the buried silicon dioxide for light with a wavelength of 1550 nm is about 1.4 to 1.6.
  • the prepared buried layer dioxide The refractive index of silicon is higher than the refractive index of the quartz substrate layer, and the structure formed by the quartz substrate and buried silicon dioxide is shown in FIG. 2A.
  • materials other than quartz can also be used to prepare the substrate. If the refractive index of the material is lower than that of the quartz substrate, the single-layer silicon dioxide structure shown in Figure 2A is still used; if the refractive index of the material is high For the refractive index of buried silicon dioxide, the double-layer silicon dioxide structure shown in Figure 2B is adopted. The refractive index of the lower buried oxide layer is lower than that of the upper buried oxide layer.
  • the lower buried oxide layer serves as the upper buried oxide layer and
  • the buffer layer between the high refractive index substrates makes the refractive index of the silicon dioxide layer close to the first lithium niobate thin film waveguide 6 and the second lithium niobate thin film waveguide 6'always greater than that far away from the first lithium niobate thin film waveguide 6 And the refractive index of the silicon dioxide layer of the second lithium niobate thin film waveguide 6'.
  • a first lithium niobate thin film waveguide 6 is prepared on the first buried silicon dioxide 5, and a second lithium niobate thin film waveguide 6'is prepared on the second buried silicon dioxide 5'.
  • the quartz substrate layer, the buried silicon dioxide, and the lithium niobate thin film layer constitute the initial base, wherein the quartz substrate layer is the lowermost layer of the initial base material, and the buried silicon dioxide is the intermediate layer of the initial base material , The lithium niobate thin film layer is the uppermost layer of the initial base material.
  • the lithium niobate thin film layer 6" on the first buried silicon dioxide 5 is photoetched into a first predetermined shape of the optical waveguide structure, thereby forming a first lithium niobate thin film waveguide 6.
  • the shape includes, but is not limited to, Mach-Zehnder interference type and micro-ring coupler type structures.
  • the cross-sectional size of the first lithium niobate thin film waveguide 6 is on the order of square micrometers, and the Mach-Zehnder interference type is a strip as shown in FIGS. 3A and 3B.
  • the waveguide of this shape is a rectangular parallelepiped waveguide.
  • the micro-ring coupler type is a ridge structure as shown in FIGS. 3C and 3D.
  • the waveguide of this shape is a rectangular parallelepiped waveguide on a substrate.
  • the lithium niobate thin film layer 6" on the second buried silicon dioxide 5' is lithographically formed into a tapered optical waveguide structure to form a second lithium niobate thin film waveguide 6'with a cross-sectional area
  • the larger end is connected to the first lithium niobate thin film waveguide 6, the smaller end of the tapered structure is located in a direction away from the first lithium niobate thin film waveguide 6, and the tapered structure is preferably a quadrangular pyramid.
  • the shape of the second lithium niobate thin film waveguide 6' can also include two shapes, a rectangular parallelepiped and a quadrangular pyramid.
  • the larger end of the quadrangular pyramid waveguide is connected to the rectangular parallelepiped waveguide, and the rectangular parallelepiped waveguide is connected to the first lithium niobate thin film waveguide 6.
  • the side of the quadrangular pyramid waveguide with a smaller cross section extends in a direction away from the first lithium niobate thin film waveguide 6.
  • the lithium niobate thin film layer 6" on the third buried silicon dioxide 5" is completely etched and removed, as shown in FIG. 4, so that the silicon dioxide waveguide 12 is prepared on the third buried silicon dioxide 5".
  • the etching method of the lithium niobate thin film layer 6" is, for example, dry etching, preferably plasma-enhanced reactive ion etching.
  • the etching gas can be fluorine-based or chlorine-based gas, which includes but is not limited to CF 4 , CHF 3 , SF 6 , Cl 2 , BCl 3 , Ar, O 2, etc. It can be understood that the etching method of the lithium niobate thin film layer 6 ′′ is not limited to the above dry etching.
  • the width and height of the rectangular parallelepiped waveguide are preferably in the range of 0.5 to 2 ⁇ m, and the quadrangular pyramid waveguide is between the end face close to the silica waveguide and the end face far away from the silica waveguide.
  • the vertical distance is preferably 200 ⁇ m, so that the light field can slowly transition from the first lithium niobate thin film waveguide 6 to the silica waveguide 12. It can be understood that the value range of the width and height of the rectangular parallelepiped waveguide is not limited to 0.5-2 ⁇ m, and the selection of the vertical distance between the two end faces is not limited to 200 ⁇ m.
  • the metal electrode 7 is used to form an electrical modulation structure together with the first lithium niobate thin film waveguide 6, which is only present in the lithium niobate thin film modulator of the embodiment of the present disclosure.
  • the material of the metal electrode 7 is gold, copper, aluminum or other conductive materials.
  • the conductive material can be deposited on both sides of the first lithium niobate thin film waveguide 6 by physical vapor deposition to form the metal electrode 7, as shown in FIGS. 5A and 5B Shown.
  • a cap layer of silicon dioxide is first deposited on the exposed surface of the prepared device, including the first buried layer of silicon dioxide 5, the first lithium niobate thin film waveguide 6, the metal electrode 7, and the second buried layer.
  • the silicon oxide 5′, the second lithium niobate thin film waveguide 6′ and the third buried silicon dioxide 5′′ are deposited on the surface of the cap layer silicon dioxide.
  • the refractive index of the cap layer silicon dioxide and the refractive index of the buried silicon dioxide Similar or equal (for example, the difference in refractive index between the two is within 10%), and is higher than the refractive index of the quartz substrate layer, the high refractive index cap layer can be prepared by doping in the deposition process or adjusting the deposition process gas ratio Silicon dioxide.
  • the wavelength division multiplexer area after the cap layer silicon dioxide is deposited is shown in FIG. 6, and the first light coupling structure after the cap layer silicon dioxide is deposited is shown in FIGS. 7A and 7B.
  • a plasma-enhanced chemical vapor deposition process is used to form the cap layer silicon dioxide, and the silicon dioxide is generated by the reaction of silane and nitric oxide at 350°C.
  • the reaction equation is SiH 4 (gaseous) + 2N 2 O (gaseous) )——SiO 2 (solid) + 2N 2 (gaseous) + 2H 2 (gaseous).
  • the capping layer silica that meets the above refractive index requirements can be obtained by adjusting the ratio of SiH 4 and 2N 2 O. Doping to obtain the cap layer silica meeting the above refractive index requirements.
  • the cap layer silicon dioxide After the cap layer silicon dioxide is deposited, the deposited silicon dioxide needs to be flattened, for example, chemical mechanical polishing is used to flatten the cap layer silicon dioxide.
  • the first buried silicon dioxide 5, the first lithium niobate thin film waveguide 6 and the planarized cap silicon dioxide on the surface of the metal electrode 7 are etched to etch through holes, thereby obtaining The first capping layer of silicon dioxide 8, as shown in Figures 8A and 8B.
  • the capping silicon dioxide after etching is The second capping layer of silicon dioxide 8 ′, the second capping layer of silicon dioxide 8 ′ completely covers the second lithium niobate thin film waveguide 6 ′ and extends in a direction away from the modulator area, as shown in FIG. 9.
  • the capping silicon dioxide after etching is The silica waveguide 12, further, the silica waveguide 12 is prepared as an arrayed waveguide grating device or the like to be used as a silica waveguide wavelength division multiplexer.
  • the end surface of the silicon dioxide waveguide 12 is rectangular or positive, and its cross-sectional area is on the order of hundreds of square microns, as shown in FIGS. 10A and 10B.
  • the etching process of the capping layer silicon dioxide is specifically: coating photoresist on the capping layer silicon dioxide, using a mask for exposure and development, and transferring the mask pattern to the photoresist , And then transfer the photoresist pattern to the cap layer silicon dioxide by etching.
  • a mixed gas of CF 4 and H 2 is selected as the etching gas for silicon dioxide, wherein the content of H 2 in the mixed gas is 50% of the volume of the mixed gas, and the CF 4 /H 2 mixed gas of this component is The selection ratio of silicon dioxide and silicon exceeds 40:1, and the etching selectivity is better.
  • CF 4 can generate fluorine atoms, which react with silicon dioxide to etch silicon dioxide.
  • the reaction equation is:
  • the role of H 2 is to reduce the reaction rate of CF 4 and silicon, and to increase the selective etching ratio of CF 4 to silicon dioxide and silicon.
  • the etching process continues to etch up to the quartz substrate layer.
  • a terminal resistor 9 and a metal lead 10 are prepared on the first cap layer silica 8 and connected to the metal electrode 7 through the through hole in the first cap layer silica 8.
  • metal is deposited in the through holes of the first cap layer silicon dioxide 8 and part of the surface thereof to prepare the terminal resistor 9 and the metal lead 10, as shown in FIGS. 11A and 11B.
  • the metal lead 10 is prepared by a physical vapor deposition method, and the material of the metal lead 10 may be aluminum or other conductive materials.
  • the terminal resistance 9 is the terminal load resistance of the transmission line of the lithium niobate thin film modulator.
  • the electrode and resistance structure can be optimized to match the impedance of the two to improve the modulation efficiency of the lithium niobate thin film modulator. It can be understood that the material of the terminal resistor 9 includes but is not limited to titanium nitride.
  • the top silicon dioxide is prepared on the exposed surface of the prepared device.
  • the top silicon dioxide includes the above-mentioned first top silicon dioxide 11, second top silicon dioxide 11' and third top silicon dioxide 11", and
  • the refractive index of the top layer silicon dioxide is lower than the refractive index of the buried layer silicon dioxide and the cap layer silicon dioxide.
  • the top layer silicon dioxide can be prepared by a deposition process and doped or adjusted during the deposition process. Process gas ratio to prepare low refractive index top silicon dioxide.
  • first top layer silicon dioxide 11 needs to be etched to form a metal pad.
  • the second top layer silicon dioxide 11' and the third top layer silicon dioxide 11" do not need to be etched.
  • the lithium niobate thin film modulator formed after operation S7 is shown in FIGS. 12A and 12B, and the first light coupling structure is shown in FIG. Shown.
  • the alignment of the single-mode fiber and the silica waveguide can be achieved by etching the V-shaped groove on the base material, and the optical fiber is placed in the V-shaped groove, and the single-mode fiber and the silica waveguide are aligned Afterwards, it is fixed with a cover plate and adhesive.

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Abstract

一种光子芯片及其制备方法，芯片包括铌酸锂薄膜调制器阵列(1)、第一光耦合阵列(2)和二氧化硅波导波分复用器(3)，其中：铌酸锂薄膜调制器阵列(1)由一个及以上的铌酸锂薄膜调制器组成，用于对光信号进行调制；第一光耦合阵列(2)由一个及以上的第一光耦合结构组成，第一光耦合结构的一端连接至对应的铌酸锂薄膜调制器，并且其另一端连接至二氧化硅波导波分复用器(3)，以将调制后的光信号传输至二氧化硅波导波分复用器(3)；二氧化硅波导波分复用器(3)用于对调制后的光信号进行波分复用。实现了片上铌酸锂薄膜调制器与片上波分复用结构的单芯片集成，并提高了器件集成度。

Description

一种光子芯片及其制备方法 技术领域
本公开涉及光纤通信与集成光学技术领域，具体地，涉及一种光子芯片及其制备方法。
背景技术
传统光纤通信技术中采用调制器和波分复用器等分立器件结构实现光信号的调制与复用，其具有体积大、插损高等缺陷。铌酸锂薄膜加工工艺平台及异质集成的出现，使得在单个芯片上集成铌酸锂调制与波分复用结构成为可能。现有技术中，尚未可靠地将铌酸锂调制与波分复用结构进行集成。
发明内容
(一)要解决的技术问题
本公开鉴于上述问题，提供了一种光子芯片及其制备方法，将铌酸锂薄膜调制器、波分复用器以及二者的第一光耦合结构集成在光子芯片上，使得制备的器件体积小、工艺精度高、重复性好，并且器件良品率高。
(二)技术方案
本公开提供了一种光子芯片，包括铌酸锂薄膜调制器阵列、第一光耦合阵列和二氧化硅波导波分复用器，其中：铌酸锂薄膜调制器阵列由一个及以上的铌酸锂薄膜调制器组成，用于对光信号进行调制；第一光耦合阵列由一个及以上的第一光耦合结构组成，第一光耦合结构的一端连接至对应的铌酸锂薄膜调制器，并且其另一端连接至二氧化硅波导波分复用器，以将调制后的光信号传输至二氧化硅波导波分复用器；二氧化硅波导波分复用器用于对调制后的光信号进行波分复用。
可选地，铌酸锂薄膜调制器包括：第一衬底；第一埋层二氧化硅，设置在第一衬底上；第一铌酸锂薄膜波导，按照第一预设形状设置在第一埋层二氧化硅上；金属电极，设置在第一铌酸锂薄膜波导层两侧；第一盖层二氧化硅，覆盖在第一埋层二氧化硅、第一铌酸锂薄膜波导和金属电极上，并设置有通孔以露出金属电极；终端电阻，通过通孔与金属电极连接；金属引线，通过通孔与金属电极连接；第一顶层二氧化硅，覆盖在第一盖层二氧化硅和终端电阻上。
可选地，第一光耦合结构包括：第二衬底；第二埋层二氧化硅，设置在第二衬底上；第二铌酸锂薄膜波导，设置在第二埋层二氧化硅上，其形状为锥形结构，且横截面积较大的一端连接至第一铌酸锂薄膜波导，横截面积较小的一端连接至二氧化硅波导波分复用器；第二盖层二氧化硅，覆盖在第二埋层二氧化硅和第二铌酸锂薄膜波导上；第二顶层二氧化硅，覆盖在第二盖层二氧化硅上。
可选地，二氧化硅波导波分复用器包括：第三衬底；第三埋层二氧化硅，设置在第三衬底上；二氧化硅波导，按照第二预设形状设置在第三埋层二氧化硅上，并与第二铌酸锂薄膜波导横截面积较小的一端相连；第三顶层二氧化硅，覆盖在二氧化硅波导上。
可选地，第一埋层二氧化硅、第二埋层二氧化硅或第三埋层二氧化硅为单层二氧化硅或双层二氧化硅，单层二氧化硅的折射率高于第一衬底、第二衬底或第三衬底的折射率，双层二氧化硅的折射率低于第一衬底、第二衬底或第三衬底的折射率，且该双层二氧化硅中下层二氧化硅的折射率低于上层二氧化硅的折射率。
可选地，第一盖层二氧化硅、第二盖层二氧化硅或二氧化硅波导的折射率与第一埋层二氧化硅、第二埋层二氧化硅或第三埋层二氧化硅的折射率之差小于第一预设值。
可选地，第一顶层二氧化硅、第二顶层二氧化硅和第三顶层二氧化硅的折射率与第一衬底、第二衬底和第三衬底的折射率之差小于第二预设值。
可选地，所述第一埋层二氧化硅、第二埋层二氧化硅或第三埋层二 氧化硅的折射率与所述第一衬底、第二衬底和第三衬底的折射率之差大于第三预设值，所述第一盖层二氧化硅、第二盖层二氧化硅或二氧化硅波导的折射率与所述第一顶层二氧化硅、第二顶层二氧化硅和第三顶层二氧化硅的折射率之差大于所述第三预设值。
本公开还提供了一种光子芯片的制备方法，包括：S1，制备衬底，衬底包括第一衬底、第二衬底和第三衬底；S2，在衬底上制备埋层二氧化硅，埋层二氧化硅包括第一埋层二氧化硅、第二埋层二氧化硅和第三埋层二氧化硅；S3，在第一埋层二氧化硅上制备第一铌酸锂薄膜波导，在第二埋层二氧化硅上制备锥形的第二铌酸锂薄膜波导；S4，在第一铌酸锂薄膜波导两侧制备金属电极；S5，在第一埋层二氧化硅、第一铌酸锂薄膜波导和金属电极上制备第一盖层二氧化硅，并在第二铌酸锂薄膜波导上制备第二盖层二氧化硅，以及在第三埋层二氧化硅上制备二氧化硅波导；S6，在所述第一盖层二氧化硅(8)上制备终端电阻和金属引线，并通过所述第一盖层二氧化硅(8)中的通孔连接至金属电极；S7，在第一盖层二氧化硅和终端电阻上制备第一顶层二氧化硅，并在第二盖层二氧化硅上制备第二顶层二氧化硅，以及在二氧化硅波导上制备第三顶层二氧化硅。
可选地，第二铌酸锂薄膜波导横截面积较大的一端连接至第一铌酸锂薄膜波导，横截面积较小的一端连接至二氧化硅波导。
(三)有益效果
本公开提供的光子芯片及其制备方法，实现了光通信过程中的光调制与波分复用功能的单片集成，降低了分立器件构成系统而引入的插入损耗，并且器件体积小、集成度高、工艺精度高、重复性好、良品率高，并且采用铌酸锂薄膜调制器使得器件调制效率高、带宽大、调制速率高。
附图说明
图1示意性示出了本公开实施例提供的光子芯片的结构示意图。
图2A示意性示出了本公开实施例提供的操作S3中制备铌酸锂薄膜 层后的基底材料正视图。
图2B示意性示出了本公开实施例提供的操作S3中制备铌酸锂薄膜层后的另一种基底材料正视图。
图3A和3B分别示意性示出了本公开实施例提供的操作S3中制备第一铌酸锂薄膜波导后器件截面的正视图和俯视图。
图3C和3D分别示意性示出了本公开实施例提供的操作S3中制备第一铌酸锂薄膜波导后另一种器件截面的正视图和俯视图。
图4示意性示出了本公开实施例提供的操作S3后二氧化硅波导波分复用器区的截面正视图。
图5A和5B分别示意性示出了本公开实施例提供的操作S4中制备金属电极后器件截面的正视图和俯视图。
图6示意性示出了本公开实施例提供的操作S5淀积后二氧化硅波导波分复用器区的截面正视图。
图7A和7B分别示意性示出了本公开实施例提供的操作S5淀积后第一光耦合结构区的截面正视图和俯视图。
图8A和8B分别示意性示出了本公开实施例提供的操作S5刻蚀后铌酸锂薄膜调制器区的截面正视图和俯视图。
图9示意性示出了本公开实施例提供的操作S5刻蚀后二氧化硅波导波分复用器区的截面正视图。
图10A和10B分别示意性示出了本公开实施例提供的操作S5刻蚀后第一光耦合结构区的截面正视图和俯视图。
图11A和11B分别示意性示出了本公开实施例提供的操作S6后铌酸锂薄膜调制器区的截面正视图和俯视图。
图12A和12B分别示意性示出了本公开实施例提供的操作S7后铌酸锂薄膜调制器区的截面正视图和俯视图。
图13示意性示出了本公开实施例提供的操作S7后第一光耦合结构区的截面正视图。
图14示意性示出了本公开实施例提供的光子芯片的制备方法流程图。
附图标记说明：
1-铌酸锂薄膜调制器阵列；
2-第一光耦合阵列；
3-二氧化硅波导波分复用器；
4-第一衬底；
4′-第二衬底；
4″-第三衬底；
5-第一埋层二氧化硅；
5′-第二埋层二氧化硅；
5″-第三埋层二氧化硅；
6-第一铌酸锂薄膜波导；
6′-第二铌酸锂薄膜波导；
6″-铌酸锂薄膜层；
7-金属电极；
8-第一盖层二氧化硅；
8′-第二盖层二氧化硅；
9-终端电阻；
10-金属引线；
11-第一顶层二氧化硅；
11′-第二顶层二氧化硅；
11″-第三顶层二氧化硅；
12-二氧化硅波导；
13-第二光耦合阵列；
14-第三光耦合阵列。
具体实施方式
为使本公开的目的、技术方案和优点更加清楚明白，以下结合具体实施例，并参照附图，对本公开进一步详细说明。
本公开的第一实施例提供了一种光子芯片，参阅图1，结合图2-13，对图1所示结构进行详细说明。
本公开实施例中光子芯片包括铌酸锂薄膜调制器阵列1、第一光耦合阵列2和二氧化硅波导波分复用器3。铌酸锂薄膜调制器阵列1由一个及以上的铌酸锂薄膜调制器组成，用于对光信号进行调制。第一光耦合阵列2由一个及以上的第一光耦合结构组成，第一光耦合结构的一端连接至对应的铌酸锂薄膜调制器，另一端连接至二氧化硅波导波分复用器3，以将调制后的光信号传输至二氧化硅波导波分复用器3。二氧化硅波导波分复用器3用于对调制后的光信号进行波分复用。
铌酸锂薄膜调制器自下往上包括以下结构：
第一衬底4，其为石英衬底，材料组分例如为纯二氧化硅或掺杂二氧化硅，也可以为其它材料。
第一埋层二氧化硅5，设置在第一衬底4上，材料组分为纯二氧化硅或掺杂二氧化硅。第一埋层二氧化硅5为单层二氧化硅(参阅图2A)或双层二氧化硅(参阅图2B)，具体地，当第一埋层二氧化硅5的折射率高于第一衬底4时，选用单层二氧化硅，当第一埋层二氧化硅5的折射率低于第一衬底4时，选用双层二氧化硅，并且双层二氧化硅中下层二氧化硅的折射率低于上层二氧化硅的折射率。
第一铌酸锂薄膜波导6，其是按照第一预设形状设置在第一埋层二氧化硅5上的铌酸锂薄膜光波导结构，材料组分为铌酸锂或掺杂铌酸锂，第一预设形状例如为马赫曾德尔干涉型(参阅图3A和3B)或者为微环耦合器型(参阅图3C和3D)等，第一铌酸锂薄膜波导6还可以例如为单根波导，该单根波导与金属电极相配合构成相位调制器，该相位调制器也是铌酸锂薄膜调制器的一种。本公开实施例中，铌酸锂薄膜调制器的工作波长应包括典型的光通讯波段1310nm和1550nm的光波，但其工作波长不限于此；铌酸锂薄膜调制器的调制方式应包括强度调制、相位调制，调制方式还应包括非相干调制和相干调制，但调制方式不限于此。可以理解的是，铌酸锂薄膜调制器中第一铌酸锂薄膜波导6的结构不限于上述示例形状，也可以为其它能够将电信号转化为光信号的结构。
金属电极7，设置在第一铌酸锂薄膜波导层6附近的两侧(参阅图5A和5B)，其材料组分为金、铜或其它导电材料。
第一盖层二氧化硅8，覆盖在第一埋层二氧化硅5、第一铌酸锂薄膜波导6和金属电极7上，并且第一盖层二氧化硅8中设置有通孔以露出金属电极7(参阅图8A和8B)。第一盖层二氧化硅8为纯二氧化硅或掺杂二氧化硅，其折射率与第一埋层二氧化硅5的折射率相近，即第一盖层二氧化硅8和第一埋层二氧化硅5的折射率之差小于第一预设值。
可选地，终端电阻9通过第一盖层二氧化硅8中的通孔连接至金属电极7，用于实现行波电极阻抗匹配(参阅图11A和11B)，此时终端电阻9形成在光子芯片上。此外，也可以不在光子芯片上设置终端电阻9，而是例如将终端电阻9挂载在已经封装好的光子芯片上，并且连接至光子芯片的金属电极7。
金属引线10通过第一盖层二氧化硅8中的其它通孔连接至金属电极7，用于为金属电极提供电学信号(参阅图11A和11B)。
第一顶层二氧化硅11，覆盖在第一盖层二氧化硅8和终端电阻9上，其为醇二氧化硅或掺杂二氧化硅，与第一衬底4的折射率相近(参阅图12A和12B)，即第一顶层二氧化硅11和第一衬底4的折射率之差小于第二预设值。
进一步地，第一埋层二氧化硅5和第一盖层二氧化硅8的折射率与第一衬底4和第一顶层二氧化硅11的折射率之差大于第三预设值，以确保第一埋层二氧化硅5和第一盖层二氧化硅8的折射率与第一衬底4和第一顶层二氧化硅11的折射率不相近。
第一光耦合结构自下往上包括以下结构：
第二衬底4′，其为石英衬底，材料组分为纯二氧化硅或掺杂二氧化硅，也可以为其它材料。
第二埋层二氧化硅5′，设置在第二衬底4′上，材料组分为纯二氧化硅或掺杂二氧化硅。第二埋层二氧化硅5′为单层二氧化硅(参阅图2A)或双层二氧化硅(参阅图2B)，具体地，当第二埋层二氧化硅5′的折射率高于第二衬底4′时，选用单层二氧化硅，当第二埋层二氧化硅5′的折 射率低于第二衬底4′时，选用双层二氧化硅，并且双层二氧化硅中下层二氧化硅的折射率低于上层二氧化硅的折射率。
第二铌酸锂薄膜波导6′，设置在第二埋层二氧化硅5′上，其形状为锥形结构，并且横截面积较大的一端连接至铌酸锂薄膜调制器，具体地，横截面积较大的一端连接至第一铌酸锂薄膜波导6，横截面积较小的一端连接至二氧化硅波导波分复用器，具体地，横截面积较小的一端伸入二氧化硅波导12中，材料组分为铌酸锂或掺杂铌酸锂。
第二盖层二氧化硅8′，覆盖在第二埋层二氧化硅5′和第二铌酸锂薄膜波导6′上(参阅图7A和7B)，其材料组分为纯二氧化硅或掺杂二氧化硅，其折射率与第二埋层二氧化硅5′的折射率相近。第二盖层二氧化硅8′与第二埋层二氧化硅5′共同形成二氧化硅波导芯层，该芯层包裹着第二铌酸锂薄膜波导6′。
第二顶层二氧化硅11′，覆盖在第二盖层二氧化硅8′上，其组分为纯二氧化硅或掺杂二氧化硅，其折射率与第二衬底4′的折射率相近。第二顶层二氧化硅11′与第二衬底4′分别作为二氧化硅波导芯层的上下包层，并且该上下包层的折射率都低于二氧化硅波导芯层的折射率。
进一步地，第二埋层二氧化硅5′和第二盖层二氧化硅8′的折射率与第二衬底4′和第二顶层二氧化硅11′的折射率之差大于第三预设值。
二氧化硅波导波分复用器3自下往上依次包括以下结构：
第三衬底4″，其为石英衬底，材料组分为纯二氧化硅或掺杂二氧化硅，也可以为其它材料。
第三埋层二氧化硅5″，设置在第三衬底4″上(参阅图4)，其材料组分为纯二氧化硅或掺杂二氧化硅。第三埋层二氧化硅5″为单层二氧化硅或双层二氧化硅，具体地，当第三埋层二氧化硅5″的折射率高于第三衬底4″时，选用单层二氧化硅，当第三埋层二氧化硅5″的折射率低于第三衬底4″时，选用双层二氧化硅，并且双层二氧化硅中下层二氧化硅的折射率低于上层二氧化硅的折射率。
二氧化硅波导12，按照第二预设形状设置在第三埋层二氧化硅5″上(参阅图9)，其材料组分为纯二氧化硅或掺杂二氧化硅，其折射率与 第二埋层二氧化硅的折射率相近。二氧化硅波导12的结构应包含但不限于二氧化硅直波导、逐渐变窄的二氧化硅波导和逐渐变宽的二氧化硅波导。
第三顶层二氧化硅11″，覆盖在二氧化硅波导12上，其材料组分为纯二氧化硅或掺杂二氧化硅，其折射率与第三衬底4″的折射率相近。第三顶层二氧化硅11″与第三衬底4″分别作为二氧化硅波导12的上下包层，且第三顶层二氧化硅11″与第三衬底4″的折射率都低于二氧化硅波导12的折射率。
进一步地，第三埋层二氧化硅5″和第三盖层二氧化硅8″的折射率与第三衬底4″和第三顶层二氧化硅11″的折射率之差大于第三预设值。
本公开实施例中，第一衬底4、第二衬底4′和第三衬底4″的折射率在1.444～1.532之间，第一预设值优选为0.1，第二预设值优选为0.2，第三预设值优选为0.002。可以理解的是，第一衬底4、第二衬底4′和第三衬底4″的折射率以及第一预设值、第二预设值、第三预设值的数值不限于上述优选值。
进一步地，本实施例中光子芯片还包括第二光耦合阵列13和第三光耦合阵列14。第二光耦合阵列13由一个及以上的第二光耦合结构组成，第二光耦合结构用于将光信号耦合至其连接的铌酸锂薄膜调制器。第三光耦合阵列14由一个及以上的第三光耦合结构组成，其连接至二氧化硅波导波分复用器3，用于对二氧化硅波导波分复用器3波分复用后的光信号进行耦合输出。
本公开实施例中，光信号经第二光耦合结构耦合进芯片，并在片上进行分束、合束操作以使得光路数目满足需求；耦合进来的光信号经铌酸锂调制器调制并在片上进行合束、分束操作后进入第一光耦合结构，第一光耦合结构耦合后再次进行合束、分束操作以进入二氧化硅波导波分复用器3；二氧化硅波导波分复用器输出的光信号也会在片上进行分束、合束等处理以使得光路数目满足需求。因此，第一铌酸锂调制器的数量与第一光耦合结构的数量以及第二光耦合结构的数量可以相同，也可以不同；二氧化硅波导波分复用器3的输入端的数量与第一光耦合结 构的数量可以相同，也可以不同；二氧化硅波导波分复用器3的输出端的数量与第一光耦合结构的数量可以相同，也可以不同。
图1中所示结构仅以4路铌酸锂薄膜调制器阵列和4×4二氧化硅波导阵列波导光栅(Arrayed Waveguide Grating，AWG)波分复用器结构为例示出光子芯片的结构，可以理解的是，光子芯片结构应当包含并且不限于4路输入输出，并且输入链路数量也可以不等于输出链路数量，并且二氧化硅波分复用器结构应当包含但不限于AWG波分复用结构，还可以是其它如介质膜或光栅型波分复用器件等具有相似功能的光通信波分复用器件。本公开实施例中，波分复用器件的工作波长应包括典型的光通讯波段1310nm和1550nm的光波，但其工作波长不限于此。
可以理解的是，本实施例中，第一衬底4、第二衬底4′、第三衬底4″是在同一工艺中制备出的整体；第一埋层二氧化硅5、第二埋层二氧化硅5′、第三埋层二氧化硅5″也是同一工艺中制备出的整体；第一盖层二氧化硅8、第二盖层二氧化硅8′、第三盖层二氧化硅8″也是同一工艺中制备出的整体；第一顶层二氧化硅11、第二顶层二氧化硅11′、第三顶层二氧化硅11″也是同一工艺中制备出的整体。只是上述整体被划分为三个不同的功能区域以分别形成铌酸锂薄膜调制器、第一光耦合结构、二氧化硅波导波分复用器。
本公开的第二实施例提供了一种光子芯片的制备方法，参阅图14，结合图2-13，对图14所示制备方法进行详细说明，该制备方法包括以下操作。
S1，制备衬底，衬底包括第一衬底4、第二衬底4′和第三衬底4″。
操作S1中制备石英衬底层，用于支撑整个晶片，该石英衬底层分为第一衬底4、第二衬底4′和第三衬底4″这三个区域，分别用于支撑铌酸锂薄膜调制器、第一光耦合结构和二氧化硅波导波分复用器3。
S2，在衬底上制备埋层二氧化硅，埋层二氧化硅包括第一埋层二氧化硅5、第二埋层二氧化硅5′和第三埋层二氧化硅5″。
操作S2在是衬底上制备埋层二氧化硅，该埋层二氧化硅分为第一埋层二氧化硅5、第二埋层二氧化硅5′和第三埋层二氧化硅5″这三个区 域，第三埋层二氧化硅5″用于形成二氧化硅波导12芯层的下部。
石英衬底层对于1550nm波长的光的折射率范围约为1.4～1.6，埋层二氧化硅对于1550nm波长的光的折射率范围约为1.4～1.6，本公开实施例中，制备的埋层二氧化硅的折射率高于石英衬底层的折射率，石英衬底和埋层二氧化硅形成的结构如图2A所示。
此外，也可以选用石英之外的其它材料制备衬底，若该材料的折射率低于石英衬底的折射率，依然采用图2A所示单层二氧化硅结构；若该材料的折射率高于埋层二氧化硅的折射率，则采用图2B所示双层二氧化硅结构，下层埋氧层的折射率低于上层埋氧层的折射率，下层埋氧层作为上层埋氧层和高折射率衬底之间的缓冲层，使得靠近第一铌酸锂薄膜波导6和第二铌酸锂薄膜波导6′的二氧化硅层折射率总是大于远离第一铌酸锂薄膜波导6和第二铌酸锂薄膜波导6′的二氧化硅层折射率。
S3，在第一埋层二氧化硅5上制备第一铌酸锂薄膜波导6，在第二埋层二氧化硅5′上制备第二铌酸锂薄膜波导6′。
操作S3中，首先通过特殊工艺在埋层二氧化硅(包括第一埋层二氧化硅5、第二埋层二氧化硅5′和第三埋层二氧化硅5″)上键合铌酸锂薄膜层6″，如图2A和2B所示。
本公开实施例中，石英衬底层、埋层二氧化硅、铌酸锂薄膜层构成初始基底，其中，石英衬底层为初始基底材料的最下层，埋层二氧化硅为初始基底材料的中间层，铌酸锂薄膜层为初始基底材料的最上层。
然后，将第一埋层二氧化硅5上的铌酸锂薄膜层6″光刻成第一预设形状的光波导结构，由此形成第一铌酸锂薄膜波导6，该第一预设形状包括但不限于马赫曾德尔干涉型和微环耦合器型结构。第一铌酸锂薄膜波导6的截面尺寸在平方微米量级，马赫曾德尔干涉型为如图3A和3B所示的条形结构，该形状的波导为长方体波导，微环耦合器型为如图3C和3D所示的脊形结构，该形状的波导为位于一个基板上的长方体波导。
将第二埋层二氧化硅5′上的铌酸锂薄膜层6″光刻成锥形结构的光波导结构，以形成第二铌酸锂薄膜波导6′，该锥形结构中横截面积较大的一端连接至第一铌酸锂薄膜波导6，该锥形结构中面积较小的一端位于 远离第一铌酸锂薄膜波导6的方向，并且该锥形结构优选为四棱锥形。此外，第二铌酸锂薄膜波导6′的形状还可以同时包括长方体和四棱锥两种形状，四棱锥波导截面较大的一端与长方体波导相连，长方体波导连接至第一铌酸锂薄膜波导6，并且四棱锥波导截面变小的一面向远离第一铌酸锂薄膜波导6的方向延伸。
将第三埋层二氧化硅5″上的铌酸锂薄膜层6″完全刻蚀去除，如图4所示，以便于在第三埋层二氧化硅5″上制备二氧化硅波导12。
操作S3中，铌酸锂薄膜层6″的刻蚀方法例如选用干法刻蚀，优选采用等离子体增强反应离子刻蚀，刻蚀气体可以选用氟基或氯基气体，该气体包括但不限于CF 4、CHF 3、SF 6、Cl 2、BCl 3、Ar、O 2等。可以理解的是，铌酸锂薄膜层6″的刻蚀方法不限于上述干法刻蚀。
本公开实施例中，为了保证单模式传输，长方体波导的宽度以及高度的取值范围优选为0.5～2μm，四棱锥波导中靠近二氧化硅波导的端面与远离二氧化硅波导的端面之间的垂直距离优选为200μm，以使得光场可以缓慢地从第一铌酸锂薄膜波导6中过渡到二氧化硅波导12中。可以理解的是，长方体波导的宽度以及高度的取值范围不限于0.5～2μm，两端面的垂直距离选择不限于200μm。
S4，在第一铌酸锂薄膜波导6两侧制备金属电极7。
金属电极7用于与第一铌酸锂薄膜波导6一起形成电调制结构，其仅存在于本公开实施例的铌酸锂薄膜调制器中。金属电极7的材料为金、铜、铝或其它导电材料，可以通过物理气相沉积的方法将导电材料淀积在第一铌酸锂薄膜波导6两侧以形成金属电极7，如图5A和5B所示。
S5，在第一埋层二氧化硅5、第一铌酸锂薄膜波导6和金属电极7上制备第一盖层二氧化硅8，并在第二铌酸锂薄膜波导6′上制备第二盖层二氧化硅8′，以及在第三埋层二氧化硅5″上制备二氧化硅波导12。
操作S5中，首先在已经制备的器件露出的表面上沉积盖层二氧化硅，包括在第一埋层二氧化硅5、第一铌酸锂薄膜波导6、金属电极7、第二埋层二氧化硅5′、第二铌酸锂薄膜波导6′和第三埋层二氧化硅5″表面上沉积盖层二氧化硅。盖层二氧化硅的折射率与埋层二氧化硅的折射 率相近或相等(例如二者折射率的差值在10％以内)，并且高于石英衬底层的折射率，可以通过淀积工艺掺杂或调整淀积工艺气体比例来制备高折射率的盖层二氧化硅。淀积盖层二氧化硅后波分复用器区如图6所示，淀积盖层二氧化硅后第一光耦合结构如图7A和7B所示。
本实施例中，例如采用等离子增强化学气相沉积工艺方法形成盖层二氧化硅，350℃下利用硅烷和一氧化氮反应生成二氧化硅，反应方程式为SiH 4(气态)+2N 2O(气态)——SiO 2(固态)+2N 2(气态)+2H 2(气态)，可以通过调整SiH 4与2N 2O两种气体比例得到满足上述折射率需求的盖层二氧化硅，也可以通过掺杂得到满足上述折射率需求的盖层二氧化硅。沉积形成盖层二氧化硅后，需要对沉积的二氧化硅进行平整化处理，例如利用化学机械抛光对盖层二氧化硅进行平整化处理。
然后，对第一埋层二氧化硅5、第一铌酸锂薄膜波导6、金属电极7表面上平整化处理后的盖层二氧化硅进行刻蚀，以刻蚀出通孔，由此得到第一盖层二氧化硅8，如图8A和8B所示。
对第二埋层二氧化硅5′及其表面上平整化处理后的盖层二氧化硅进行刻蚀，刻蚀深度直到第二衬底4′，刻蚀后的盖层二氧化硅即为第二盖层二氧化硅8′，第二盖层二氧化硅8′完全包覆了第二铌酸锂薄膜波导6′并向远离调制器区的方向延伸，如图9所示。
对第三埋层二氧化硅5″及其表面上平整化处理后的盖层二氧化硅进行刻蚀，刻蚀深度直到第三衬底4″，刻蚀后的盖层二氧化硅即为二氧化硅波导12，进一步地，二氧化硅波导12被制备成阵列波导光栅器件等，以用作二氧化硅波导波分复用器。二氧化硅波导12的端面为矩形或正方向，其断面面积为百平方微米量级，如图10A和10B所示。
本实施例中，盖层二氧化硅的刻蚀过程具体为：在盖层二氧化硅上涂覆光刻胶，利用掩膜版进行曝光和显影，将掩膜版图形转移到光刻胶上，然后通过刻蚀将光刻胶图形转移到盖层二氧化硅上。具体地，选择CF 4与H 2的混合气体作为二氧化硅的刻蚀气体，其中H 2在混合气体内的含量为混合气体体积的50％，该组分的CF 4/H 2混合气体对二氧化硅和硅的选择比超过40∶1，刻蚀选择性较好。在等离子体环境中，CF 4可以 产生氟原子，氟原子与二氧化硅发生反应，从而刻蚀二氧化硅，反应方程式为：
CF 4+e -——CF 3+F+e -
4F(自由基)+SiO 2(固态)——SiF 4(气态)+O 2(气态)
上述反应过程中，H 2的作用是降低CF 4与硅的反应速率，提高CF 4对二氧化硅和硅的选择刻蚀比，该刻蚀过程一直持续刻蚀到石英衬底层上方。
S6，在第一盖层二氧化硅8上制备终端电阻9和金属引线10，并通过第一盖层二氧化硅8中的通孔连接至金属电极7。
操作S6中，在第一盖层二氧化硅8的通孔中及其部分表面淀积金属以制备终端电阻9和金属引线10，如图11A和11B所示。
具体地，利用物理气相沉积的方法制备该金属引线10，金属引线10的材料可以是铝或其它导电材料。
在第一盖层二氧化硅8上层的部分表面上淀积金属以及氮化钛，然后利用图形转移的方法(例如光刻刻蚀或剥离)将淀积的金属和氮化钛光刻刻蚀或剥离成终端电阻9，并通过在通孔中淀积金属以将上层的终端电阻9与下层的金属电极7之间电导通。该终端电阻9是铌酸锂薄膜调制器传输线的终端负载电阻，可以通过优化设计电极和电阻结构，使得二者阻抗匹配以提高铌酸锂薄膜调制器的调制效率。可以理解的是，终端电阻9的材料包括但不限于氮化钛。
S7，在第一盖层二氧化硅8和终端电阻9上制备第一顶层二氧化硅11，并在第二盖层二氧化硅8′上制备第二顶层二氧化硅11′，以及在二氧化硅波导12上制备第三顶层二氧化硅11″。
在已经制备的器件露出的表面上制备顶层二氧化硅，该顶层二氧化硅包括上述第一顶层二氧化硅11、第二顶层二氧化硅11′和第三顶层二氧化硅11″，并且该顶层二氧化硅的折射率低于埋层二氧化硅和盖层二氧化硅的折射率。优选地，可以通过淀积工艺制备顶层二氧化硅，并在淀积过程中掺杂或调整淀积工艺气体比例来制备低折射率的顶层二氧化硅。
进一步地，还需要刻蚀第一顶层二氧化硅11以形成金属垫。第二顶层二氧化硅11′和第三顶层二氧化硅11″不需要被刻蚀。操作S7后形成的铌酸锂薄膜调制器如图12A和12B所示，第一光耦合结构如图13所示。
本公开实施例中，可以通过在基底材料上刻蚀V型槽实现单模光纤与二氧化硅波导的对准，将光纤放置于V型槽中，单模光纤与二氧化硅波导进行对准后，利用盖板与粘接剂进行固定。
以上所述的具体实施例，对本公开的目的、技术方案和有益效果进行了进一步详细说明，所应理解的是，以上所述仅为本公开的具体实施例而已，并不用于限制本公开，凡在本公开的精神和原则之内，所做的任何修改、等同替换、改进等，均应包含在本公开的保护范围之内。

Claims (10)

  1. 一种光子芯片，包括铌酸锂薄膜调制器阵列(1)、第一光耦合阵列(2)和二氧化硅波导波分复用器(3)，其中：
    所述铌酸锂薄膜调制器阵列(1)由一个及以上的铌酸锂薄膜调制器组成，用于对光信号进行调制；
    所述第一光耦合阵列(2)由一个及以上的第一光耦合结构组成，所述第一光耦合结构的一端连接至对应的铌酸锂薄膜调制器，并且其另一端连接至所述二氧化硅波导波分复用器(3)，以将所述调制后的光信号传输至所述二氧化硅波导波分复用器(3)；
    所述二氧化硅波导波分复用器(3)用于对所述调制后的光信号进行波分复用。
  2. 根据权利要求1所述的光子芯片，其中，所述铌酸锂薄膜调制器包括：
    第一衬底(4)；
    第一埋层二氧化硅(5)，设置在所述第一衬底(4)上；
    第一铌酸锂薄膜波导(6)，按照第一预设形状设置在所述第一埋层二氧化硅(5)上；
    金属电极(7)，设置在所述第一铌酸锂薄膜波导层(6)两侧；
    第一盖层二氧化硅(8)，覆盖在所述第一埋层二氧化硅(5)、第一铌酸锂薄膜波导(6)和金属电极(7)上，并设置有通孔以露出所述金属电极(7)；
    终端电阻(9)，通过所述通孔与所述金属电极(7)连接；
    金属引线(10)，通过所述通孔与所述金属电极(7)连接；
    第一顶层二氧化硅(11)，覆盖在所述第一盖层二氧化硅(8)和终端电阻(9)上。
  3. 根据权利要求2所述的光子芯片，其中，所述第一光耦合结构包括：
    第二衬底(4′)；
    第二埋层二氧化硅(5′)，设置在所述第二衬底(4′)上；
    第二铌酸锂薄膜波导(6′)，设置在所述第二埋层二氧化硅(5′)上，其形状为锥形结构，且横截面积较大的一端连接至所述第一铌酸锂薄膜波导(6)，横截面积较小的一端连接至所述二氧化硅波导波分复用器(3)；
    第二盖层二氧化硅(8′)，覆盖在所述第二埋层二氧化硅(5′)和第二铌酸锂薄膜波导(6′)上；
    第二顶层二氧化硅(11′)，覆盖在所述第二盖层二氧化硅(8′)上。
  4. 根据权利要求3所述的光子芯片，其中，所述二氧化硅波导波分复用器(3)包括：
    第三衬底(4″)；
    第三埋层二氧化硅(5″)，设置在所述第三衬底(4″)上；
    二氧化硅波导(12)，按照第二预设形状设置在所述第三埋层二氧化硅(5″)上，并与所述第二铌酸锂薄膜波导(6′)横截面积较小的一端相连；
    第三顶层二氧化硅(11″)，覆盖在所述二氧化硅波导(12)上。
  5. 根据权利要求4所述的光子芯片，其中，所述第一埋层二氧化硅(5)、第二埋层二氧化硅(5′)或第三埋层二氧化硅(5″)为单层二氧化硅或双层二氧化硅，所述单层二氧化硅的折射率高于所述第一衬底(4)、第二衬底(4′)或第三衬底(4″)的折射率，所述双层二氧化硅的折射率低于所述第一衬底(4)、第二衬底(4′)或第三衬底(4″)的折射率，且该双层二氧化硅中下层二氧化硅的折射率低于上层二氧化硅的折射率。
  6. 根据权利要求4所述的光子芯片，其中，所述第一盖层二氧化硅(8)、第二盖层二氧化硅(8′)或二氧化硅波导(12)的折射率与所述第一埋层二氧化硅(5)、第二埋层二氧化硅(5′)或第三埋层二氧化硅(5″)的折射率之差小于第一预设值。
  7. 根据权利要求4所述的光子芯片，其中，所述第一顶层二氧化硅(11)、第二顶层二氧化硅(11′)和第三顶层二氧化硅(11″)的折射率与所述第一衬底(4)、第二衬底(4′)和第三衬底(4″)的折射率之 差小于第二预设值。
  8. 根据权利要求4所述的光子芯片，其中，所述第一埋层二氧化硅(5)、第二埋层二氧化硅(5′)或第三埋层二氧化硅(5″)的折射率与所述第一衬底(4)、第二衬底(4′)和第三衬底(4″)的折射率之差大于第三预设值，所述第一盖层二氧化硅(8)、第二盖层二氧化硅(8′)或二氧化硅波导(12)的折射率与所述第一顶层二氧化硅(11)、第二顶层二氧化硅(11′)和第三顶层二氧化硅(11″)的折射率之差大于所述第三预设值。
  9. 一种光子芯片的制备方法，包括：
    S1，制备衬底，所述衬底包括第一衬底(4)、第二衬底(4′)和第三衬底(4″)；
    S2，在所述衬底上制备埋层二氧化硅，所述埋层二氧化硅包括第一埋层二氧化硅(5)、第二埋层二氧化硅(5′)和第三埋层二氧化硅(5″)；
    S3，在所述第一埋层二氧化硅(5)上制备第一铌酸锂薄膜波导(6)，在所述第二埋层二氧化硅(5′)上制备锥形的第二铌酸锂薄膜波导(6′)；
    S4，在所述第一铌酸锂薄膜波导(6)两侧制备金属电极(7)；
    S5，在所述第一埋层二氧化硅(5)、第一铌酸锂薄膜波导(6)和金属电极(7)上制备第一盖层二氧化硅(8)，并在所述第二铌酸锂薄膜波导(6′)上制备第二盖层二氧化硅(8′)，以及在所述第三埋层二氧化硅(5″)上制备二氧化硅波导(12)；
    S6，在所述第一盖层二氧化硅(8)上制备终端电阻(9)和金属引线(10)，并通过所述第一盖层二氧化硅(8)中的通孔连接至所述金属电极(7)；
    S7，在所述第一盖层二氧化硅(8)和终端电阻(9)上制备第一顶层二氧化硅(11)，并在所述第二盖层二氧化硅(8′)上制备第二顶层二氧化硅(11′)，以及在所述二氧化硅波导(12)上制备第三顶层二氧化硅(11″)。
  10. 根据权利要求9所述的光子芯片的制备方法，其中，所述第二铌酸锂薄膜波导(6′)横截面积较大的一端连接至所述第一铌酸锂薄膜 波导(6)，横截面积较小的一端连接至所述二氧化硅波导(12)。
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