WO2021035401A1 - 发光二极管显示面板及其制作方法、显示装置 - Google Patents

发光二极管显示面板及其制作方法、显示装置 Download PDF

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Publication number
WO2021035401A1
WO2021035401A1 PCT/CN2019/102288 CN2019102288W WO2021035401A1 WO 2021035401 A1 WO2021035401 A1 WO 2021035401A1 CN 2019102288 W CN2019102288 W CN 2019102288W WO 2021035401 A1 WO2021035401 A1 WO 2021035401A1
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Prior art keywords
light
blocking structure
light blocking
color film
emitting diode
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Ceased
Application number
PCT/CN2019/102288
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English (en)
French (fr)
Inventor
李东升
黄冠达
李云龙
杨盛际
卢鹏程
陈小川
王青
童慧
董永发
申晓斌
袁雄
王宇
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BOE Technology Group Co Ltd
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BOE Technology Group Co Ltd
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Application filed by BOE Technology Group Co Ltd filed Critical BOE Technology Group Co Ltd
Priority to PCT/CN2019/102288 priority Critical patent/WO2021035401A1/zh
Priority to EP19933199.2A priority patent/EP4020573A4/en
Priority to US16/959,480 priority patent/US11515511B2/en
Priority to CN201980001448.6A priority patent/CN112740415B/zh
Publication of WO2021035401A1 publication Critical patent/WO2021035401A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30—Devices specially adapted for multicolour light emission
    • H10K59/38—Devices specially adapted for multicolour light emission comprising colour filters or colour changing media [CCM]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/86—Arrangements for improving contrast, e.g. preventing reflection of ambient light
    • H10K50/865—Arrangements for improving contrast, e.g. preventing reflection of ambient light comprising light absorbing layers, e.g. light-blocking layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/126—Shielding, e.g. light-blocking means over the TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30—Devices specially adapted for multicolour light emission
    • H10K59/35—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
    • H10K59/353—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels characterised by the geometrical arrangement of the RGB subpixels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/8791—Arrangements for improving contrast, e.g. preventing reflection of ambient light
    • H10K59/8792—Arrangements for improving contrast, e.g. preventing reflection of ambient light comprising light absorbing layers, e.g. black layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass

Definitions

  • At least one embodiment of the present disclosure relates to a light emitting diode display panel, a manufacturing method thereof, and an organic light emitting diode display device.
  • One of the source and the drain is connected to The first electrode is coupled, the gate is coupled to the storage capacitor, and the storage capacitor is configured to store a data signal; a color resist layer is located on a side of the second electrode away from the base substrate , The light emitted by the light emitting element is emitted through the color resist layer; and the light blocking structure is located in the peripheral area and is a ring structure surrounding the plurality of sub-pixels.
  • the light blocking structure includes a first light blocking structure and a second light blocking structure, the second light blocking structure is located on a side of the first light blocking structure away from the base substrate, and the second light blocking structure
  • the second orthographic projection of the base substrate is located in the first orthographic projection of the first light blocking structure on the base substrate, and the first orthographic projection and the second orthographic projection do not completely overlap.
  • At least a part of the edge of the first light blocking structure is not covered by the second light blocking structure.
  • neither the inner edge nor the outer edge of the first light blocking structure is covered by the second light blocking structure.
  • the outer contour of the first light blocking structure includes a first side extending in a first direction and a second side extending in a second direction, the first direction intersects the second direction, and The first side and the second side are connected by an arc-shaped side, and the arc-shaped side is curved in a direction away from the display area.
  • the arc-shaped side includes rounded corners, and the outer contour of the first light blocking structure is a rounded rectangle.
  • the shape of the first light blocking structure is a closed ring.
  • the shape of the second light blocking structure is the same as the shape of the first light blocking structure, and the area of the second orthographic projection is smaller than the area of the first orthographic projection.
  • the color resist layer includes a plurality of sub-color resist layers corresponding to the plurality of sub-pixels one-to-one, and the plurality of adjacent sub-color resist layers are at least partially non-overlapping, and the plurality of sub-color resist layers It includes a plurality of first sub-color resist layers, and the plurality of first sub-color resist layers and the first light blocking structure are arranged in the same layer and have the same material.
  • the light blocking structure further includes a third light blocking structure, and the third light blocking structure is located on a side of the second light blocking structure away from the first light blocking structure.
  • the orthographic projection of the first light blocking structure on the base substrate is within the orthographic projection of the third light blocking structure on the base substrate.
  • the orthographic projection of the third light blocking structure on the base substrate is within the orthographic projection of the second light blocking structure on the base substrate.
  • the plurality of sub-color resist layers further include a plurality of third sub-color resist layers, and the plurality of third sub-color resist layers are arranged in the same layer as the third light blocking structure and have the same material.
  • the first sub-color resist layer, the second sub-color resist layer, and the third sub-color resist layer are color film layers of different colors.
  • the light blocking structure covers part of the second electrode.
  • the light-emitting diode display panel further includes a sensing area located in the peripheral area, and the orthographic projection of the sensing area on the base substrate is located in the first light blocking structure on the substrate. In the orthographic projection on the base substrate.
  • At least a part of the driving transistor is located in the silicon substrate.
  • At least one embodiment of the present disclosure provides a method for manufacturing the above-mentioned light-emitting diode display panel, including: providing the base substrate; forming the light-emitting element in the display area on the base substrate; The light-emitting element is coated with a first color resist material by a spin coating method; the first color resist material is patterned to form a first color resist layer in the display area, and a first color resist layer is formed in the peripheral area to surround the display area The first light-blocking structure; the first color-resist layer and the first light-blocking structure are coated with a second color-resist material by spin coating; and the second color-resist material is patterned to The display area forms a second color resist layer that is at least partially non-overlapping with the first color resist layer, and the second light blocking structure surrounding the display area is formed in the peripheral area.
  • Forming the second light blocking structure includes: patterning the second color resist material so that the second orthographic projection is located in the first orthographic projection, and the first orthographic projection
  • forming the first light blocking structure includes: patterning the first color resist material so that the outer contour of the first light blocking structure includes a first side extending in a first direction and a second A second side extending in a direction, the first direction intersects the second direction, and the first side and the second side are connected by an arc-shaped side, and the arc-shaped side is away from the display area The direction is curved.
  • At least one embodiment of the present disclosure provides an organic light emitting diode display device, including the light emitting diode display panel provided in any of the above examples.
  • 2A-2H are schematic diagrams of a color filter structure provided according to an embodiment of the present disclosure.
  • 3A-3E are schematic diagrams of a color filter structure provided according to another embodiment of the present disclosure.
  • FIG. 5 is a schematic diagram of a circuit principle of a silicon-based organic light emitting display panel provided by an embodiment of the present disclosure
  • FIG. 6 is a circuit diagram of a voltage control circuit and a pixel circuit provided by an embodiment of the present disclosure.
  • FIG. 7 is a flowchart of forming a light emitting diode display panel according to an embodiment of the present disclosure.
  • Embodiments of the present disclosure provide a light emitting diode display panel and a manufacturing method thereof, and an organic light emitting diode display device.
  • the light emitting diode display panel includes a base substrate, a plurality of sub-pixels located on the base substrate, a color resist layer and a light blocking structure on a side of the plurality of sub-pixels away from the base substrate.
  • the base substrate includes a display area and a peripheral area surrounding the display area; a plurality of sub-pixels are located in the display area, and at least one of the plurality of sub-pixels includes: a light-emitting element, including a first electrode, a light-emitting functional layer, and a second electrode stacked in sequence.
  • the light-blocking structure includes a first light-blocking structure and a second light-blocking structure.
  • the second light-blocking structure is located on the side of the first light-blocking structure away from the base substrate.
  • the second light-blocking structure is located at the second orthographic projection of the base substrate.
  • the first light blocking structure is in the first orthographic projection of the base substrate, and the first orthographic projection and the second orthographic projection do not completely overlap.
  • the distance between the inner and outer rings of the second light-blocking structure is designed to be smaller than the distance between the inner and outer rings of the first light-blocking structure to form a step structure, so that the spin coating method is used to form the subsequent color resist layer.
  • the flow of the color resist material is promoted to further improve the uniformity of the color resist layer formed in the display area, and to prevent the display unevenness in the subsequent display process.
  • the light-emitting diode display panel provided by the embodiment of the present disclosure includes a color resist layer located in the display area 101, the color resist layer includes a plurality of sub-color resist layers corresponding to a plurality of sub-pixels, and the adjacent sub-color resist layers are at least The parts are not overlapped, and the plurality of sub-color resist layers include a plurality of first sub-color resist layers.
  • the following content of the embodiments of the present disclosure takes the first sub-color resist layer as the first pixel color film 210 as an example, and the first light blocking structure included in the light emitting diode display panel is the first frame color film 220 as an example for description.
  • the circle including the rounded corner 221 is tangent to the first side or the second side connected to the rounded corner 221 to facilitate manufacturing.
  • the round shape including the rounded corner 221 is tangent to the straight edge to avoid the adverse effect of the included angle on the color glue coating.
  • the larger the radius of curvature of the rounded corners 221 the greater the shading area at the four rounded corners of the frame color film will be. Small, so in the case of ensuring to cover the lower layer of wiring, the larger the radius of curvature of the rounded corners, the better.
  • the shape of the first frame color film 220 is a closed ring. That is, the first frame color film is a continuous ring-shaped light shielding layer covering the peripheral area to prevent the structure located in the peripheral area of the display panel including the color film structure from reflecting light, thereby achieving a better anti-reflective effect.
  • FIG. 2C is a schematic diagram of the planar structure of the second color filter layer
  • FIG. 2D is a schematic diagram of the cross-sectional structure of the second color filter layer shown in FIG. 2C taken along line AA.
  • the color filter structure further includes a second color filter layer 300.
  • the second color filter layer 300 includes a second pixel color filter 310 located in the display area 101 and at least partially not overlapping the first pixel color filter 210, and a second border color filter 320 located in the peripheral area 102. That is, the light-blocking structure further includes a second light-blocking structure, and the plurality of sub-color resist layers further include a plurality of second sub-color resist layers.
  • 2C and 2D schematically show that the second pixel color film 310 is connected to the first pixel color film 210, but it is not limited thereto.
  • the second pixel color film may also partially overlap with the first pixel color film, and the overlapped portion of the two pixels may serve as a light shield, thereby saving the black matrix.
  • the second pixel color film can also be separated from the first pixel color film, and a black matrix is provided in the space between the two to prevent crosstalk.
  • the second pixel color film 310 includes a plurality of second sub-pixel color films (ie, a plurality of second sub-color resist layers), and the second sub-pixel color film and the first sub-pixel color film
  • the film does not overlap at least partially, and one side of the second sub-pixel color film can be connected to the first sub-pixel color film, and there is a certain distance between the other side and the first sub-pixel color film to form subsequent and first sub-pixel color films.
  • the embodiments of the present disclosure are not limited to this, and the first sub-pixel color film and the second sub-pixel color film may be alternately and connected to each other.
  • the spin coating method is used to form the second color film layer 300, and the second pixel color film of the display area 101 is spin-coated.
  • the thickness of the film 310 is relatively uniform, so as to prevent the display unevenness in the subsequent display process.
  • the second orthographic projection of the second light-blocking structure 320 on the transparent bottom layer 100 is located in the first orthographic projection of the first light-blocking structure 220 on the transparent bottom layer 100, and the first orthographic projection and The second orthographic projection does not completely overlap.
  • the area of the second orthographic projection is smaller than the area of the first orthographic projection.
  • At least a part of the edge of the first light blocking structure 220 is not covered by the second light blocking structure 320, that is, a step structure is formed at the edge of the first light blocking structure 220 that is not covered. .
  • neither the inner edge nor the outer edge of the first light blocking structure 220 is covered by the second light blocking structure 320, that is, the positions of the inner and outer contours of the first light blocking structure 220 Two circles of steps are formed at the place.
  • the first color filter layer 200 and the second color filter layer 300 are two color filter layers with different colors.
  • the first color film layer 200 and the second color film layer 300 may be a red color film layer and a green color film layer, or a red color film layer and a blue color film layer, or a green color film layer and a blue color film layer.
  • the disclosed embodiments do not limit this. That is, the first sub-color resist layer and the second sub-color resist layer are two color film layers with different colors.
  • the light-blocking structure further includes a third light-blocking structure
  • the plurality of sub-color resist layers further include a plurality of third sub-color resist layers.
  • the following content in the embodiments of the present disclosure uses the third frame color film 420 as the third light-blocking structure.
  • the third pixel color film 410 is the third sub-color resist layer as an example for description.
  • the multiple third sub-color resist layers and the third light blocking structure are arranged in the same layer and have the same material. That is, the third sub-color resist layer and the third light-blocking structure are two film layers formed by performing the same patterning process on the third color resist material.
  • the third pixel color film 410 is connected to the first pixel color film 210 and the second pixel color film 310, but it is not limited thereto.
  • the third pixel color filter can also partially overlap with the second pixel color filter and the first pixel color filter, and the overlapped part can play a role in shielding light, thereby saving the black matrix.
  • the third pixel color film may also be separated from the second pixel color film and the first pixel color film, and the spacing between adjacent pixel color films is provided with a black matrix to prevent crosstalk.
  • the third pixel color film 410 includes a plurality of third sub-pixel color films (ie, a plurality of third sub-color resist layers), and one side of the third sub-pixel color film may be connected to the first sub-pixel color film.
  • One sub-pixel color film is connected, and the other side is connected to a second sub-pixel color film.
  • the third border color film 420 is a ring-shaped color film layer surrounding the display area 101, for example, a closed ring-shaped color film layer.
  • the third frame color film 420 is located on the side of the second frame color film 320 away from the transparent bottom layer 100 to overlap the second frame color film 320 and the first frame color film 220, so as to overlap with the first frame color film and the second frame color film. Together they play a role in shading.
  • 2E schematically shows that the corners of the outer ring of the color film of the third frame are also rounded.
  • the embodiment of the present disclosure is not limited to this. In the case that the subsequent color film is not formed, the corners of the outer ring of the color film of the third frame It can also be sharp corners.
  • the third pixel color film is spin-coated on the display area 101
  • the thickness of 410 is relatively uniform, which can prevent uneven display during subsequent display.
  • the width of the second frame color film is designed to be smaller than the width of the first frame color film to form a step structure that can promote the flow of the material of the third color film layer. In order to further improve the uniformity of the third pixel color film formed in the display area, the display unevenness phenomenon can be prevented in the subsequent display process.
  • the first color filter layer 200, the second color filter layer 300, and the third color filter layer 400 are color filter layers of different colors.
  • the above-mentioned three color film layers are respectively a red color film layer, a green color film layer, and a blue color film layer.
  • the first sub-color resist layer, the second sub-color resist layer, and the third sub-color resist layer are color film layers of different colors.
  • the first sub-color resist layer, the second sub-color resist layer, and the third sub-color resist layer may be a red color film layer, a green color film layer, and a blue color film layer, respectively.
  • FIG. 2G is a schematic diagram of the planar structure of the third color filter layer
  • FIG. 2H is a schematic diagram of the cross-sectional structure of the third color filter layer shown in FIG. 2G taken along the line AA.
  • the orthographic projection of the third frame color film 420 (third light blocking structure 420) on the transparent bottom layer 100 is located on the second frame color film 320 (second light blocking structure 320) on the transparent bottom layer 100 Therefore, the light blocking structure with a larger thickness can prevent the image light emitted from the display area from being blocked.
  • the outer contour of the third light blocking structure 420 may include an arc-shaped edge 421, but is not limited thereto, as long as the orthographic projection of the third light blocking structure 420 on the base substrate is located in the second light blocking structure 320 can be in the orthographic projection on the base substrate.
  • FIG. 2H schematically shows that the width of the third light blocking structure 420 in the extending direction perpendicular to the light blocking structure is smaller than the width of the second light blocking structure 320 in the extending direction perpendicular to the light blocking structure, but it is not limited to this.
  • the orthographic projection of the third light-blocking structure 420 on the transparent bottom layer 100 and the orthographic projection of the second light-blocking structure 320 on the transparent bottom layer 100 completely overlap to facilitate the production.
  • FIGS. 3A-3E are schematic diagrams of a color filter structure provided according to another embodiment of the present disclosure.
  • 3A is a schematic plan view of the first color filter layer and the fourth color filter layer
  • FIG. 3B is a schematic cross-sectional structure view of the first color filter layer and the fourth color filter layer shown in FIG. 3A taken along line BB.
  • the color filter structure includes: a transparent bottom layer 100 and a first color filter layer 200 on the transparent bottom layer 100.
  • the transparent bottom layer 100 includes a display area 101 and a peripheral area 102 surrounding the display area 101.
  • the first color filter layer 200 includes a first pixel color filter 210 located in the display area 101 and a first border color filter 220 located in the peripheral area 102.
  • the first frame color film 220 is an annular color film surrounding the display area 101, and is used to cover the structure of the peripheral area of the display panel including the color film structure described above, for example, wiring for connecting light-emitting elements, and a sensor located in the sensing area.
  • a sensing circuit structure that detects the current of the pixel can be connected to a temperature sensor), etc., to prevent light reflection or light leakage in the peripheral area.
  • the outer ring of the first frame color filter 220 is a polygon, and at least one corner of the polygon is a rounded corner 221.
  • the outer ring of the first frame color film 220 is polygonal, which means that the outer frame of the ring-shaped first frame color film is polygonal.
  • the shape and effect of the first frame color film in the embodiment of the present disclosure are the same as the shape and effect of the first frame color film shown in FIGS. 2A and 2B, and will not be repeated here.
  • the color filter structure further includes a fourth color filter layer 500, which only includes a fourth pixel color film 510 that is located in the display area 101 and does not overlap with the first pixel color film 210 at least partially. That is, the fourth color film layer 500 does not include the border color film located in the peripheral area 102, that is, when the display area 101 includes two color pixel color films, the peripheral area 102 includes only one color film layer, which can reduce The thickness of the border color film in the peripheral area.
  • the first color filter layer is formed after the fourth color filter layer is formed. Since the fourth color filter layer does not include the frame color filter, it will not affect the uniformity of the subsequent first color filter layer.
  • the first pixel color film in the display area formed by the spin coating method is uniform.
  • the first color film layer, the second color film layer, and the fourth color film layer may be a red color film layer, a green color film layer, and a blue color film layer, respectively.
  • the colors of the first color filter layer and the second color filter layer in this embodiment are the same as the colors of the first color filter layer and the second color filter layer in the foregoing embodiment.
  • the color of the fourth color film layer in this embodiment may be the same as or different from the color of the third color film layer in the foregoing embodiment. In this embodiment, the color of the fourth color film layer is different from that of the foregoing embodiment.
  • the same color of the third color film layer is described as an example.
  • FIG. 3C is a schematic partial cross-sectional structure diagram of a color filter structure provided by another example in an embodiment of the disclosure.
  • the fourth pixel color film 510 may also partially overlap the first pixel color film 210, and the overlapped portion of the two pixels may serve as a light shield, thereby saving the black matrix.
  • the fourth pixel color film 510 is located on the side of the first pixel color film 210 close to the transparent bottom layer 100.
  • the fourth pixel color film can also be separated from the first pixel color film, and a black matrix is arranged at the distance between the two to prevent crosstalk.
  • FIG. 3D is a schematic diagram of the planar structure after forming the second color filter layer
  • FIG. 3E is a schematic diagram of the cross-sectional structure of the second color filter layer shown in FIG. 3D taken along the line BB.
  • the color filter structure further includes a second color filter layer 300.
  • the second color film layer 300 includes a second pixel color film 310 located in the display area 101 and at least partially not overlapping the first pixel color film 210 and the fourth pixel color film 510, and a second border color film located in the peripheral area 102 320.
  • 3D and 3E schematically show that the second pixel color film 310 is connected to the first pixel color film 210 and the fourth pixel color film 510, but is not limited thereto.
  • the second pixel color filter can also partially overlap the first pixel color filter and the fourth pixel color filter, and the overlapped portion can play a role in shielding light, thereby saving the black matrix.
  • the fourth pixel color film is located on the side of the second pixel color film close to the transparent bottom layer.
  • the second pixel color film may also be separated from the first pixel color film and the fourth pixel color film, and a black matrix is arranged between adjacent pixel color films to prevent crosstalk.
  • each pixel color film includes a portion that does not overlap with other pixel color films.
  • the second frame color film 320 is a ring-shaped color film layer surrounding the display area 101, for example, a closed ring-shaped color film layer.
  • the second frame color film 320 is located on the side of the first frame color film 220 away from the transparent bottom layer 100 to overlap the first frame color film 220, and the orthographic projection of the first frame color film 220 on the transparent bottom layer 100 is located in the second frame color film.
  • the film 220 is in the orthographic projection on the transparent bottom layer 100, so that the second frame color film and the first frame color film together play a role of shading.
  • the orthographic projection of the first frame color film 220 on the transparent bottom layer 100 completely overlaps with the orthographic projection of the second frame color film 220 on the transparent bottom layer 100 to facilitate production.
  • the spin coating method is used to form the second color film layer 300, and the second color film layer 300 is spin-coated on the display area 101.
  • the pixel color film 310 has a relatively uniform thickness, which can prevent uneven display during subsequent display.
  • the first color filter layer 200, the second color filter layer 300, and the fourth color filter layer 500 are color filter layers of different colors.
  • the above-mentioned three color film layers are respectively a red color film layer, a green color film layer, and a blue color film layer.
  • FIG. 4 is a schematic partial cross-sectional view of a light emitting diode display panel provided according to an embodiment of the present disclosure. Taking FIG. 4 as an example including the color filter structure shown in FIG. 2E, FIG. 4 is a schematic cross-sectional view of the light emitting diode display panel taken along the CC line shown in FIG. 2E. However, it is not limited to this.
  • the light-emitting diode display panel provided by the embodiments of the present disclosure may also be a color film structure shown in FIG.
  • the width of the second light-blocking structure is smaller than the width of the second light-blocking structure in the direction perpendicular to the extending direction of the light-blocking structure.
  • the width of the first light blocking structure is sufficient to form a stepped structure.
  • the light-emitting diode display panel provided by the embodiment of the present disclosure may include any of the color film structures described above.
  • the light-emitting diode display panel includes a base substrate 600, a plurality of sub-pixels on the base substrate 600, and a color filter structure (such as a color resist layer and a light-blocking structure) on the display side of the sub-pixels.
  • the structure is the color filter structure shown in FIG. 2E as an example for description.
  • a plurality of sub-pixels are located in the display area 101 and on one side of the base substrate 600, at least one of the plurality of sub-pixels includes: a light-emitting element 700 and a driving circuit located between the light-emitting element 700 and the base substrate 600 610.
  • the light-emitting element 700 includes a first electrode 710, a light-emitting function layer 720 and a second electrode 730 that are sequentially stacked, and the first electrode 710 is closer to the base substrate 600 than the second electrode 730.
  • the driving circuit 610 includes a driving transistor and a storage capacitor.
  • the driving transistor includes a source, a drain, and a gate.
  • One of the source and the drain is coupled to the first electrode 710, the gate is coupled to the storage capacitor, and the storage capacitor is configured to Store data signals.
  • the color resist layer is located on the side of the second electrode 730 away from the base substrate 600, and the light emitted by the light emitting element 700 is emitted through the color resist layer.
  • FIG. 4 only schematically shows the structure of the driving circuit.
  • the structure of the driving circuit please refer to the description in conjunction with FIG. 6 below.
  • the light emitting diode display panel further includes a sensing area 103 located in the peripheral area 102.
  • the sensing area 103 may include a sensing circuit structure (not shown in the figure) for detecting the current of the pixel.
  • the circuit structure can be connected to the temperature sensor, and the sensing circuit is located on the side of the color filter structure facing the base substrate 600.
  • the orthographic projection of the sensing area 103 on the transparent bottom layer 100 is within the orthographic projection of the first frame color film 220 (ie, the first light blocking structure) on the transparent bottom layer 100.
  • the second electrode 730 of the light-emitting element 700 in the display area 101 can extend to the sensing area 103, and the first frame color film 220 (ie, the first light blocking structure), the second frame color film 320 (ie The second light blocking structure) and the third frame color film 420 (that is, the third light blocking structure) cover the second electrode 730 extending to the sensing area.
  • the first frame color film 220 ie, the first light blocking structure
  • the second frame color film 320 ie The second light blocking structure
  • the third frame color film 420 that is, the third light blocking structure
  • the sensing area 103 includes a light-emitting element 700' and a sensing circuit structure 610' arranged on the same layer as the light-emitting element 700 of the display area, the first frame color film 220, the second frame color film 320, and the third frame color film 420 serves as a light blocking structure to block the light emitted from the light emitting element in the sensing area.
  • FIG. 4 only shows an exemplary structure in which the first frame color film 220, the second frame color film 320, and the third frame color film 420 are located in the peripheral area.
  • the various color filter structures described in the above embodiments can all be applied to the structure in FIG. 4.
  • the color filter structure in FIG. 4 can be replaced with any color filter structure in the foregoing embodiments.
  • each sub-pixel SP includes a light-emitting element 700, as shown by the dashed frame shown in FIG. 4.
  • Each sub-pixel corresponds to a sub-color-resist layer, for example, sub-color-resist layers 210, 310, 410, etc., so that the light emitted from each sub-pixel is filtered by the corresponding color-resist layer to display a corresponding color.
  • the base substrate 600 is a silicon substrate 600
  • the side of the silicon substrate 600 facing the light-emitting element 700 includes a driving circuit 610
  • the driving circuit 610 is connected to the light-emitting element 700. That is, the driving circuit 610 is integrated on the silicon substrate 600.
  • the source and drain of the driving transistor in the driving circuit 610 are integrated on the silicon substrate 600.
  • a gate driving circuit and a data driving circuit may also be integrated on the silicon substrate, and a flexible circuit board is provided in the peripheral area of the silicon substrate, which is configured to transmit to the gate driving circuit, the data driving circuit, and the light emitting element. electric signal.
  • the gate drive circuit (not shown in the figure) is used to generate a gate drive signal
  • the data drive circuit (not shown in the figure) is used to generate a data signal.
  • the gate drive circuit and the data drive circuit can use this Conventional circuit structures in the field are not limited by the embodiments of the present disclosure.
  • the driving circuit 610 is used to provide a driving current to the light-emitting element 700 under the control of a driving signal such as a gate scan signal, a data signal, and a voltage signal, so that the organic light-emitting layer included in the light-emitting element emits light.
  • a driving signal such as a gate scan signal, a data signal, and a voltage signal
  • the driving circuit 610 may adopt 4T1C, 4T2C, 7T1C, 8T2C and other circuit structures of pixel circuits, and the driving method thereof may adopt conventional methods in the art, which will not be repeated here.
  • the pixel circuit structure can be fabricated on a silicon substrate using a CMOS process, which is not limited in the embodiments of the present disclosure.
  • the silicon substrate 600 further includes a first insulating layer 620 and a second insulating layer 650 located between the driving circuit 610 and the light emitting element 700, and via holes 630 are provided in both insulating layers.
  • the via 630 may be a tungsten hole filled with tungsten metal.
  • the formation of the tungsten via in the first insulating layer 620 and the second insulating layer 650 can ensure The stability of the conductive path, and because the process of making tungsten vias is mature, the obtained first insulating layer 620 and the second insulating layer 650 have good surface flatness, which is beneficial to reduce the first insulating layer 620 and the second insulating layer.
  • the contact resistance between the 650 and the electrode included in the light-emitting element 700 is very thin film thickness of the first insulating layer 620 and the second insulating layer 650.
  • a metal layer 640 is provided between the vias 630 in the two insulating layers to electrically connect the light-emitting element 700 and the driving circuit 610.
  • the first electrode 710 included in the light-emitting element 700 is electrically connected to the driving circuit 610 through a via 630 located in the insulating layer, and the driving circuit 610 is used to drive the light-emitting element 700 to emit light.
  • the light-emitting element 700 includes a plurality of light-emitting sub-elements, and the light-emitting functional layers 720 of adjacent light-emitting sub-elements are separated by a pixel defining layer 800.
  • the driving circuit 610 includes at least a driving transistor and a switching transistor (not shown in FIG. 4, please refer to FIG. 6), and the driving transistor and the first electrode 710 are electrically connected to each other.
  • the electrical signal for driving the light emitting element 700 is transmitted to the first electrode 710, thereby controlling the light emitting element 700 to emit light.
  • the driving transistor includes a gate electrode, a source electrode, and a drain electrode.
  • the source electrode of the driving transistor is electrically connected to the first electrode 710.
  • the electrical signal provided by the power line may be transmitted to the first electrode 710 through the source electrode of the driving transistor. Since a voltage difference is formed between the first electrode 710 and the second electrode 730, an electric field is formed between the two, and the light-emitting function layer 720 emits light under the action of the electric field.
  • each light-emitting sub-element included in the light-emitting element 700 corresponds to each sub-pixel color film in a one-to-one correspondence.
  • the light emitted by the light-emitting element 700 is white light, and the white light can realize color display after passing through the color film of different color pixels on the display side of the light-emitting element 700.
  • the sensing area 103 located in the peripheral area 102 is also provided with the same light emitting element as the light emitting element 700 in the display area 101.
  • the light emitting element located in the sensing area 103 is not used for display, but used In order to detect the attenuation degree of the light emission of the pixel, it needs to be blocked by the border color film located in the peripheral area 102.
  • the transparent bottom layer 100 is a thin-film encapsulation layer, and the thin-film encapsulation layer is located on the side of the first color filter layer 200 facing the light-emitting element 700.
  • the above-mentioned transparent bottom layer 100 is a first thin-film encapsulation layer, and a second thin-film encapsulation layer 100' is also provided on the side of the color filter structure away from the light-emitting element 700.
  • the first thin-film encapsulation layer 100 and the second thin-film encapsulation layer 100' can be The effective packaging of the light-emitting element is realized, the effective barrier to water vapor, oxygen, etc. is realized, and the purpose of protecting the light-emitting element and extending the service life of the light-emitting element is achieved.
  • a cover plate (not shown) is also provided on the side of the second thin film encapsulation layer away from the color filter structure, and the second thin film encapsulation layer and the cover plate are sequentially arranged on the color filter structure to protect the color filter structure.
  • the second thin-film encapsulation layer is made of one or more of organic materials or inorganic materials with better sealing properties to achieve a better sealing effect and protect the silicon-based OLED display device.
  • the cover plate can be made of a transparent material.
  • the transparent material can be an inorganic material such as glass or an organic material such as polyimide.
  • glass with high transmittance can be used. The embodiment does not limit this.
  • FIG. 5 is a schematic diagram of a circuit principle of a silicon-based organic light emitting display panel provided by some embodiments of the present disclosure.
  • the silicon-based organic light-emitting display panel includes a plurality of display devices L (ie, light-emitting elements) located in a display area 101 (area AA) and a pixel circuit 110 coupled to each display device L in a one-to-one correspondence.
  • the pixel circuit 110 includes a driving transistor.
  • the silicon-based organic light-emitting display panel may further include a plurality of voltage control circuits 120 located in the peripheral area 102 of the silicon-based organic light-emitting display panel (a region other than the display area 101 in the silicon-based organic light-emitting display panel).
  • At least two pixel circuits 110 in a row share one voltage control circuit 120, and the first electrode of the driving transistor in a row of pixel circuits 110 is coupled to the common voltage control circuit 120, and the second electrode of each driving transistor is connected to the corresponding display The device L is coupled.
  • the voltage control circuit 120 is configured to output an initialization signal Vinit to the first pole of the driving transistor in response to the reset control signal RE, and control the corresponding display device L to reset; and in response to the light emission control signal EM, output the first power signal VDD To the first pole of the driving transistor to drive the display device L to emit light.
  • the voltage control circuit 120 By sharing the voltage control circuit 120, the structure of each pixel circuit in the display area 101 can be simplified, and the occupied area of the pixel circuit in the display area 101 can be reduced, so that more pixel circuits and display devices can be arranged in the display area 101 to achieve high PPI. Organic light emitting display panel.
  • the voltage control circuit 120 outputs the initialization signal Vinit to the first pole of the driving transistor under the control of the reset control signal RE to control the reset of the corresponding display device, thereby avoiding the voltage pair applied to the display device when the previous frame emits light. The effect of the next frame of light, thereby improving the afterimage phenomenon.
  • the silicon-based organic light emitting display panel may further include a plurality of pixel units PX located in the display area 101, each pixel unit PX includes a plurality of sub-pixels; each sub-pixel includes a display device L and a pixel circuit 110 respectively.
  • the pixel unit PX may include three sub-pixels of different colors. The three sub-pixels may be red sub-pixels, green sub-pixels, and blue sub-pixels, respectively.
  • the pixel unit PX may also include 4, 5 or more sub-pixels, which need to be designed and determined according to the actual application environment, which is not limited here.
  • the pixel circuits 110 in at least two adjacent sub-pixels in the same row may share one voltage control circuit 120.
  • all the pixel circuits 110 in the same row may share one voltage control circuit 120.
  • the pixel circuits 110 in two, three or more adjacent sub-pixels in the same row may share one voltage control circuit 120, which is not limited here. In this way, by sharing the voltage control circuit 120, the occupied area of the pixel circuit in the display area 101 can be reduced.
  • FIG. 6 is a circuit diagram of a specific implementation example of a voltage control circuit and a pixel circuit in a display panel provided by some embodiments of the present disclosure.
  • the driving transistor M0 in the pixel circuit 110 ie, the driving circuit 610 in FIG. 4
  • the light emitting element L may include an OLED.
  • the anode of the OLED is electrically connected to the second electrode D of the driving transistor M0
  • the cathode of the OLED is electrically connected to the second power terminal VSS.
  • the voltage of the second power terminal VSS is generally a negative voltage or the ground voltage VGND (generally 0V), and the voltage of the initialization signal Vinit can also be set to the ground voltage VGND, which is not limited here.
  • the OLED can be set to Micro-OLED or Mini-OLED, which is further conducive to the realization of a high PPI organic light emitting display panel.
  • the voltage control circuit 120 may include a first switching transistor M1 and a second switching transistor M2; in addition to the driving transistor M0, the pixel circuit 110 may also include a third switching transistor M3 and a fourth switching transistor. M4 and the fifth switching transistor M5 and the storage capacitor Cst.
  • the gate of the first switch transistor M1 is used to receive the reset control signal RE
  • the first pole of the first switch transistor M1 is used to receive the initialization signal Vinit
  • the second pole of the first switch transistor M1 is connected to The first pole of the third switch transistor M3 is coupled.
  • the gate of the second switch transistor M2 is used to receive the light emission control signal EM
  • the first pole of the second switch transistor M2 is used to receive the first power signal VDD
  • the second pole of the second switch transistor M2 is connected to the third switch transistor M3. The first pole is coupled.
  • the types of the first switching transistor M1 and the second switching transistor M2 may be different.
  • the first switch transistor M1 is an N-type transistor
  • the second switch transistor M2 is a P-type transistor
  • the first switch transistor M1 is a P-type transistor
  • the second switch transistor M2 is an N-type transistor.
  • the type of the first switching transistor M1 and the second switching transistor M2 can also be the same.
  • the types of the first switching transistor M1 and the second switching transistor M2 need to be designed according to the actual application environment, which is not limited here.
  • the gate of the third switch transistor M3 is used to receive the transmission control signal VT, and the first pole of the third switch transistor M3 is connected to the second pole of the first switch transistor M1 and the second pole of the second switch transistor M2.
  • the second electrode is coupled to receive the initialization signal Vinit transmitted from the first switch transistor M1 or the first power signal VDD transmitted from the second switch transistor M2.
  • the second electrode of the third switch transistor M3 is connected to the second electrode of the driving transistor M0.
  • the third switching transistor M3 can be controlled to be turned on or off by controlling whether the transmission control signal VT is input, so as to control the light-emitting time of the light-emitting element L, thereby realizing PWM (Pulse Width Modulation, pulse width modulation) dimming.
  • the control method is beneficial to ensure the uniformity of the PWM control of each sub-pixel.
  • the pixel circuit 110 may further include a fourth switching transistor M4 and a storage capacitor Cst.
  • the gate of the fourth switch transistor M4 is used to receive the gate scan signal SN
  • the first pole of the fourth switch transistor M4 is used to receive the data signal DATA
  • the second pole of the fourth switch transistor M4 is connected to the gate of the driving transistor M0. ⁇ G coupling.
  • the first terminal of the storage capacitor Cst is coupled to the gate G of the driving transistor M0
  • the second terminal of the storage capacitor Cst is coupled to the first voltage terminal V1.
  • the voltage of the first voltage terminal V1 may be the ground voltage VGND, and embodiments of the present disclosure include but are not limited to this.
  • the storage capacitor is used to store the written data signal DATA, so that the driving transistor M0 drives the light emitting element L to emit light according to the stored data signal DATA.
  • the pixel circuit 110 may further include a fifth switch transistor M5.
  • the gate of the fifth switch transistor M5 is used to receive the inverted signal SN' of the gate scan signal SN
  • the first pole of the fifth switch transistor M5 is used to receive the data signal DATA
  • the second pole of the fifth switch transistor M5 It is coupled to the gate G of the driving transistor M0.
  • the fifth switch transistor M5 and the fourth switch transistor M4 have different types.
  • the fourth switching transistor M4 is an N-type transistor
  • the fifth switching transistor M5 is a P-type transistor; or, in other examples, the fourth switching transistor M4 is a P-type transistor.
  • the fifth switch transistor M5 is an N-type transistor.
  • pixel circuit structure shown in FIG. 6 is only exemplary, and any other pixel circuit structure may also be adopted according to the embodiments of the present disclosure.
  • the driving transistor M0, the first switching transistor M1, the second switching transistor M2, the third switching transistor M3, the fourth switching transistor M4, and the fifth switching transistor M5 are prepared on a substrate 600 (for example, a silicon-based substrate) MOS transistors in.
  • a substrate 600 for example, a silicon-based substrate
  • MOS transistors for example, at least a part of these transistors are located in the base substrate.
  • the source and drain regions of these transistors are located in the base substrate 600.
  • the light-emitting diode display device includes the above-mentioned light-emitting diode display panel.
  • the light emitting diode display device provided by the embodiment of the present disclosure is a small-sized light emitting diode display device, that is, a micro light emitting diode display device.
  • the light-emitting diode display device can be applied to any products or components with display functions such as televisions, digital cameras, mobile phones, watches, tablets, notebook computers, navigators, etc., and is particularly suitable for use in helmet-mounted displays, stereoscopic display mirrors, and eye-type displays, etc. .
  • the above-mentioned micro-light-emitting diode display device can be connected with a mobile communication network, satellite positioning and other systems to obtain accurate image information at any place and at any time.
  • This embodiment is not limited to this, and the light emitting diode display device provided by the embodiment of the present disclosure may also be applied to a virtual reality device or an augmented reality device.
  • FIG. 7 is a flowchart of a light emitting diode display panel provided according to an embodiment of the present disclosure. Referring to FIGS. 2A-2H and FIGS. 4-7, the manufacturing method includes the following steps.
  • S101 Provide a base substrate.
  • the base substrate 600 may be a silicon substrate.
  • the base substrate 600 includes a display area 101 and a peripheral area 102 surrounding the display area 101.
  • a driving circuit 610, a gate driving circuit, and a data driving circuit are integrated on the silicon substrate 600.
  • the peripheral area 102 of the silicon substrate 600 may be provided with a flexible circuit board configured to transmit electrical signals to the gate driving circuit, the data driving circuit, and the like.
  • the driving circuit 610 may adopt 4T1C, 4T2C, 7T1C, 8T2C and other circuit structures of pixel circuits, and the driving method thereof may adopt conventional methods in the art, which will not be repeated here.
  • the pixel circuit structure can be fabricated on a silicon substrate using a CMOS process, which is not limited in the embodiments of the present disclosure.
  • forming the light-emitting element 700 includes forming a first electrode 710, a light-emitting functional layer 720, and a second electrode 730 that are sequentially stacked.
  • the first electrode 710 is electrically connected to the driving circuit 610, and the driving circuit 610 is used for driving.
  • the light emitting element 700 emits light.
  • a silicon substrate includes a plurality of LED display panel regions for forming a plurality of LED display panels, and after forming a light-emitting element in each LED display panel region, a spin coating method is used to coat the first A color film material layer (that is, the first color resist material) covers each LED display panel area.
  • the embodiments of the present disclosure are not limited to the spin coating method, and other methods may also be used to coat the first color resist material.
  • the spin coating method refers to a coating process that relies on the centrifugal force and gravity generated when the workpiece rotates to spread the coating droplets on the workpiece on the surface of the workpiece.
  • Applying the first color film material layer by spin coating includes: injecting the first color film material at a position outside the area of the light emitting diode display panel of the silicon substrate (for example, dripping the color film material in the center of the entire silicon substrate).
  • the silicon substrate enables the first color filter material to be uniformly distributed on the light emitting elements in the area including all the LED display panel regions to form a first color filter material layer with uniform thickness.
  • the glue application speed can be different.
  • the first color filter material layer before forming the first color filter material layer, it also includes forming a transparent bottom layer on the light-emitting element, that is, a thin film encapsulation layer covering the light-emitting element.
  • S104 Pattern the first color resist material to form a first color resist layer in the display area, and form a first light blocking structure surrounding the display area in the peripheral area.
  • the first pixel color film 210 (ie, the first color resist layer) can be formed in the display area 101, and
  • the peripheral area 102 forms a first frame color film 220 (ie, a first light blocking structure).
  • the formed first frame color film 220 is an annular color film layer.
  • the outer contour of the first light blocking structure may include a first side extending in a first direction and a second side extending in a second direction, the first direction intersects the second direction, and the first side and the second side pass through an arc The edges are connected, and the arc-shaped edges are bent in a direction away from the display area.
  • both the first side and the second side are straight sides.
  • the color of the first color film material layer is different, and the exposure intensity and development time used are different.
  • forming the first light blocking structure includes: patterning the first color resist material so that the outer contour of the first light blocking structure includes two first sides extending in a first direction and two sides extending in a second direction. A second side, the first direction and the second direction intersect, and the first side and the second side are connected by an arc-shaped side, and the arc-shaped side is curved in a direction away from the display area.
  • At least one corner of the outer ring of the color film of the first frame may be designed as an arc-shaped edge, so as to reduce the dripping outside the area of the LED display panel during the subsequent process of forming other color film layers.
  • the color film material is affected by the sharp corners of the outer frame of the color film of the first frame during the spin coating process, and the probability that the color film layer coated on the display area is more uniform. In order to prevent the display device including the color film structure from displaying unevenly.
  • the first pixel color film and the first frame color film formed by the embodiments of the present disclosure have the same features and effects as the first pixel color film and the first frame color film shown in FIGS. 2A and 2B, and will not be repeated here. .
  • S105 Apply a spin coating method to the second color resist material on the first color resist layer and the first light blocking structure.
  • the manufacturing method further includes: adopting a rotation on the first pixel color film 210 and the first frame color film 220
  • the coating method coats the second color film material layer (that is, the second color resist material).
  • the embodiments of the present disclosure are not limited to the spin coating method, and other methods may also be used to apply the second color resist material.
  • the second color film material is dripped in the area outside the first frame color film 220, and then the silicon substrate 600 is rotated to uniformly coat the second color film material on the display area 101 and the peripheral area 102 of each LED display panel area.
  • the silicon substrate 600 is rotated to uniformly coat the second color film material on the display area 101 and the peripheral area 102 of each LED display panel area.
  • a second color filter material layer When the corners of the outer ring of the color film of the first frame formed are rounded, in the process of spin coating the second color film material, the thickness of the second color film material spin-coated on the display area of each LED display panel area is compared Uniformity, which can prevent uneven display during subsequent display.
  • S106 Pattern the second color resist material to form a second color resist layer that is at least partially non-overlapping with the first color resist layer in the display area, and form a second light blocking structure surrounding the display area in the peripheral area.
  • the second color filter material layer is patterned, such as exposure and development, to form a color film with the first pixel in the display area 101 210
  • the second pixel color film 310 that is, the second color resist layer
  • the second pixel color film 310 that is, the second color resist layer
  • the second pixel color film 310 that is, the second color resist layer
  • the second bezel color film 220 that is, the second light blocking layer
  • Forming the second light blocking structure includes: patterning the second color resist material so that in a direction perpendicular to the extending direction of the first light blocking structure, the width of the second light blocking structure is smaller than the width of the first light blocking structure to form a step structure.
  • the width of the second frame color film is formed to be smaller than the width of the first frame color film to form a stepped structure.
  • the flow of the color film material is promoted, so as to further improve the uniformity of the pixel color film formed in the display area and prevent the display unevenness during the subsequent display process.
  • the above-mentioned step structure may be located on the side of the second frame color film close to the display area, or may be located on the side of the second frame color film away from the display area.
  • the second frame color film is provided with a step structure on the side close to the display area and the side far from the display area to facilitate the uniformity of the pixel color film subsequently formed in the display area.
  • the second pixel color film manufactured by the manufacturing method provided by the embodiment of the present disclosure has the same characteristics and effects as the second pixel color film shown in FIG. 2C and FIG. 2D, and will not be repeated here.
  • the shape of the second frame color film 320 formed on the first frame color film 220 and the shape of the first frame color film 220 may be the same.
  • the corners of the outer ring of the second frame color film 320 may also be rounded corners, so that in the process of forming the subsequent color film layer by the spin coating method, the uniformity of the color film layer spin-coated in the display area is better.
  • the manufacturing method further includes: adopting spinning on the second pixel color film 310 and the second frame color film 320 The coating method coats the third color film material layer.
  • a third color film material (that is, a third color resist material) is dripped in the area outside the second frame color film 320, and then the silicon substrate 600 is rotated to uniformly coat the third color film material on each LED display panel area
  • the display area 101 and the peripheral area 102 are formed to form a third color filter material layer. Since the corners of the outer ring of the first frame color film and the second frame color film formed are rounded, and the first frame color film and the second frame color film form a step structure, the process of spin coating the third color film material Among them, the thickness of the third color film material spin-coated on the display area of each LED display panel area is relatively uniform, thereby preventing uneven display during subsequent display.
  • the third color filter material layer is patterned, such as exposure and development, to form a color film with the first pixel in the display area 101
  • the third pixel color film 410 that is, the third color resist layer
  • a third frame color film 420 surrounding the display area 101 is formed on the second frame color film 320 ( That is, the third light blocking structure).
  • the third pixel color film and the third frame color film formed by the embodiments of the present disclosure have the same features and effects as the third pixel color film and the third frame color film shown in FIGS. 2E and 2F, and will not be repeated here.
  • the third pixel color film and the third frame color film formed by the embodiments of the present disclosure may also have the same features and effects as the third pixel color film and the third frame color film shown in FIG. 2G and FIG. 2H. Go into details again.
  • Another example of the embodiment of the present disclosure provides a manufacturing method of a light emitting diode display panel.
  • the difference from the manufacturing method provided in the previous example is that before forming the first color filter material layer, the method includes: The fourth color filter material layer is coated on the light-emitting element by a spin coating method, and the fourth color filter material layer is patterned to form the fourth pixel color film 510 in the display area 101 only.
  • the fourth color filter material layer in this example is the same color filter material layer as the third color filter material layer in the previous example, but the fourth color filter material layer in this example is formed before the first color filter layer.
  • the peripheral area only includes two color film layers of the first frame color film and the second frame color film.
  • the embodiments of the present disclosure are not limited to this, and the fourth color filter material layer may also be a color filter material layer of a different color from the third color filter material layer in the previous example.
  • the fourth color filter material is dripped at a position outside the LED display panel area of the silicon substrate, and the fourth color filter material is evenly distributed on the light emitting elements in the plurality of LED display panel areas by rotating the silicon substrate to form The fourth color film material layer with uniform thickness. Then, after pre-baking, exposing, developing, and post-baking the fourth color filter material layer, the fourth pixel color film is formed only in the display area.
  • the fourth pixel color film spin coating is used to coat the first color film material layer on the fourth pixel color film, that is, the first color film is dripped on the silicon substrate outside the LED display panel area.
  • Material by rotating the silicon substrate to make the first color filter material uniformly spread in the peripheral area and the display area (including the fourth pixel color filter) in the multiple LED display panel regions to form a first color filter material layer with uniform thickness.
  • the first color filter material layer is patterned to form a first pixel color film that at least partially does not overlap with the fourth pixel color film in the display area, and a first border color film surrounding the display area is formed in the peripheral area.
  • the first pixel color film and the first frame color film formed in this example have the same characteristics and effects as the first pixel color film and the first frame color film formed by the manufacturing method provided in the previous example, and will not be repeated here.
  • the second pixel color film formed has the same characteristics and effects as the second pixel color film formed in the previous example. This will not be repeated here.
  • the second frame color film formed by the manufacturing method provided in this example not only needs to have the same shape as the first frame color film, but also needs to form the orthographic projection of the second frame color film on the transparent bottom layer and the first frame color film.
  • the orthographic projection on the transparent bottom layer is at least completely overlapped so as to play a role of shading together with the first frame color film.
  • the manufacturing method provided by the embodiment of the present disclosure further includes forming a thin film encapsulation layer on the side of the color filter structure away from the light-emitting element.
  • the two thin film encapsulation layers located on both sides of the color filter structure can realize the effective packaging of the light-emitting element, realize the effective barrier to water vapor, oxygen, etc., and achieve the purpose of protecting the light-emitting element and prolonging the service life of the light-emitting element.
  • the two thin-film encapsulation layers can both be made of one or more of organic materials or inorganic materials with better sealing properties to achieve a better sealing effect and protect the light-emitting elements of the silicon-based organic light-emitting diode.
  • the manufacturing method further includes forming a cover plate on the side of the thin film encapsulation layer away from the color filter structure to realize the function of protecting the color filter structure.
  • the cover plate can be made of a transparent material.
  • the transparent material can be an inorganic material such as glass or an organic material such as polyimide.
  • plain glass with high transmittance can be used. The embodiment does not limit this.
  • the technical effects of the light-emitting diode display panel manufactured by the manufacturing method provided in the embodiments of the present disclosure may refer to the technical effects of the color film structure provided in the embodiments of the present disclosure, which will not be repeated here.

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Abstract

一种发光二极管显示面板及其制作方法以及有机发光二极管显示装置。发光二极管显示面板包括：衬底基板（600）、位于衬底基板（600）上的多个子像素、色阻层和挡光结构。衬底基板（600）包括显示区（101）和周边区（102）；多个子像素位于显示区（101）；挡光结构位于周边区（102），且为围绕多个子像素的环形结构。挡光结构包括第一挡光结构（220）和第二挡光结构（320），第二挡光结构（320）位于第一挡光结构（220）远离衬底基板（600）的一侧，第二挡光结构（320）在衬底基板（600）的第二正投影位于第一挡光结构（220）在衬底基板（600）的第一正投影中，且第一正投影与第二正投影不完全重合。调整第二挡光结构（320）和第一挡光结构（220）的尺寸关系以形成台阶结构，从而提高形成在显示区（101）的色阻层的均匀度，防止出现显示不均匀的现象。

Description

发光二极管显示面板及其制作方法、显示装置 技术领域
本公开至少一个实施例涉及一种发光二极管显示面板及其制作方法以及有机发光二极管显示装置。
背景技术
目前，硅基有源矩阵有机发光二极管(AMOLED)的彩色显示一般采用白光有机发光二极管(WOLED)配合彩色滤光片(CF)的方式实现。包括硅基有源矩阵有机发光二极管的微显示器具有广阔的市场应用空间，特别适合应用于头盔显示器、立体显示镜以及眼镜式显示器等。
发明内容
本公开的至少一实施例提供一种发光二极管显示面板及其制作方法以及有机发光二极管显示装置。一种发光二极管显示面板，包括：衬底基板，包括显示区和围绕所述显示区的周边区；多个子像素，位于所述显示区且位于所述衬底基板的一侧，所述多个子像素中的至少一个包括：发光元件，包括依次层叠的第一电极、发光功能层和第二电极，所述第一电极比所述第二电极更靠近所述衬底基板；以及驱动电路，位于所述发光元件与所述衬底基板之间，所述驱动电路包括驱动晶体管和存储电容，所述驱动晶体管包括源极、漏极和栅极，所述源极和所述漏极之一与所述第一电极耦接，所述栅极与所述存储电容耦接，所述存储电容被配置为存储数据信号；色阻层，位于所述第二电极远离所述衬底基板的一侧，所述发光元件发出的光线通过所述色阻层射出；以及挡光结构，位于所述周边区，且为围绕所述多个子像素的环形结构。所述挡光结构包括第一挡光结构和第二挡光结构，所述第二挡光结构位于所述第一挡光结构远离所述衬底基板的一侧，所述第二挡光结构在所述衬底基板的第二正投影位于所述第一挡光结构在所述衬底基板的第一正投影中，且所述第一正投影与所述第二正投影不完全重合。
在一些示例中，所述第一挡光结构的边缘的至少一部分没有被所述第二挡光结构覆盖。
在一些示例中，所述第一挡光结构的内边缘和外边缘均没有被所述第二挡光结构覆盖。
在一些示例中，所述第一挡光结构的外轮廓包括沿第一方向延伸的第一边和沿第二方向延伸的第二边，所述第一方向与所述第二方向相交，且所述第一边和所述第二边通过弧形边连接，所述弧形边向远离所述显示区的方向弯曲。
在一些示例中，所述弧形边包括圆角，所述第一挡光结构的外轮廓为圆角矩形。
在一些示例中，包括所述弧形边的圆形与所述第一边或所述第二边相切。
在一些示例中，所述第一挡光结构的形状为闭合的环形。
在一些示例中，所述第二挡光结构的形状为闭合的环形。
在一些示例中，所述第二挡光结构的形状与所述第一挡光结构的形状相同，且所述第二正投影的面积小于所述第一正投影的面积。
在一些示例中，所述色阻层包括与所述多个子像素一一对应的多个子色阻层，相邻的所述多个子色阻层至少部分不交叠，所述多个子色阻层包括多个第一子色阻层，且所述多个第一子色阻层与所述第一挡光结构同层设置且材料相同。
在一些示例中，所述多个子色阻层还包括多个第二子色阻层，所述多个第二子色阻层与所述第二挡光结构同层设置且材料相同。
在一些示例中，所述挡光结构还包括第三挡光结构，所述第三挡光结构位于所述第二挡光结构远离所述第一挡光结构的一侧。
在一些示例中，所述第一挡光结构在所述衬底基板上的正投影位于所述第三挡光结构在所述衬底基板上的正投影内。
在一些示例中，所述第三挡光结构在所述衬底基板上的正投影位于所述第二挡光结构在所述衬底基板上的正投影内。
在一些示例中，所述多个子色阻层还包括多个第三子色阻层，所述多个第三子色阻层与所述第三挡光结构同层设置且材料相同。
在一些示例中，所述第一子色阻层、所述第二子色阻层以及所述第三子 色阻层为不同颜色的彩膜层。
在一些示例中，所述挡光结构覆盖部分所述第二电极。
在一些示例中，发光二极管显示面板还包括：位于所述周边区的感测区，且所述感测区在所述衬底基板上的正投影位于所述第一挡光结构在所述衬底基板上的正投影内。
在一些示例中，所述衬底基板为硅基板。
在一些示例中，所述驱动晶体管的至少一部分位于所述硅基板中。
在一些示例中，所述色阻层面向所述衬底基板的一侧设置有第一薄膜封装层，且所述色阻层远离所述衬底基板的一侧设置有第二薄膜封装层。
本公开的至少一实施例提供一种制作上述发光二极管显示面板的制作方法，包括：提供所述衬底基板；在所述衬底基板上的所述显示区形成所述发光元件；在所述发光元件上采用旋涂法涂覆第一色阻材料；对所述第一色阻材料进行图案化以在所述显示区形成第一色阻层，在所述周边区形成围绕所述显示区的第一挡光结构；在所述第一色阻层和所述第一挡光结构上采用旋涂法涂覆第二色阻材料；以及对所述第二色阻材料进行图案化以在所述显示区形成与所述第一色阻层至少部分不交叠的第二色阻层，在所述周边区形成围绕所述显示区的所述第二挡光结构。形成所述第二挡光结构包括：图案化所述第二色阻材料以使所述第二正投影位于所述第一正投影中，且所述第一正投影与所述第二正投影不完全重合。
在一些示例中，形成所述第一挡光结构包括：图案化所述第一色阻材料以使所述第一挡光结构的外轮廓包括沿第一方向延伸的第一边和沿第二方向延伸的第二边，所述第一方向与所述第二方向相交，且所述第一边和所述第二边通过弧形边连接，所述弧形边向远离所述显示区的方向弯曲。
本公开的至少一实施例提供一种有机发光二极管显示装置，包括上述任一示例提供的发光二极管显示面板。
附图说明
为了更清楚地说明本公开实施例的技术方案，下面将对实施例的附图作简单地介绍，显而易见地，下面描述中的附图仅仅涉及本公开的一些实施例，而非对本公开的限制。
图1为一种硅基有机发光二极管显示面板的彩膜结构的局部结构示意图；
图2A-图2H为根据本公开一实施例提供的彩膜结构的示意图；
图3A-图3E为根据本公开另一实施例提供的彩膜结构的示意图；
图4为根据本公开一实施例提供的发光二极管显示面板的局部截面示意图；
图5为本公开一实施例提供的一种硅基有机发光显示面板的电路原理示意图；
图6为本公开一实施例提供的一种电压控制电路和像素电路的电路图；以及
图7为根据本公开一实施例提供的形成发光二极管显示面板的流程图。
具体实施方式
为使本公开实施例的目的、技术方案和优点更加清楚，下面将结合本公开实施例的附图，对本公开实施例的技术方案进行清楚、完整地描述。显然，所描述的实施例是本公开的一部分实施例，而不是全部的实施例。基于所描述的本公开的实施例，本领域普通技术人员在无需创造性劳动的前提下所获得的所有其它实施例，都属于本公开保护的范围。
除非另外定义，本公开使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同，而不排除其他元件或者物件。
本公开的实施例提供一种发光二极管显示面板及其制作方法以及有机发光二极管显示装置。发光二极管显示面板包括：衬底基板、位于衬底基板上的多个子像素、位于多个子像素远离衬底基板的一侧的色阻层和挡光结构。衬底基板包括显示区和围绕显示区的周边区；多个子像素位于显示区，多个子像素中的至少一个包括：发光元件，包括依次层叠的第一电极、发光功能层和第二电极，第一电极比第二电极更靠近衬底基板；以及驱动电路，位于 发光元件与衬底基板之间，驱动电路包括驱动晶体管和存储电容，驱动晶体管包括源极、漏极和栅极，源极和漏极之一与第一电极耦接，栅极与存储电容耦接，存储电容被配置为存储数据信号；色阻层位于第二电极远离衬底基板的一侧，发光元件发出的光线通过色阻层射出；挡光结构位于周边区，且为围绕多个子像素的环形结构。挡光结构包括第一挡光结构和第二挡光结构，第二挡光结构位于第一挡光结构远离衬底基板的一侧，第二挡光结构在衬底基板的第二正投影位于第一挡光结构在衬底基板的第一正投影中，且第一正投影与第二正投影不完全重合。本公开实施例通过将第二挡光结构的内外环之间的距离设计为小于第一挡光结构的内外环之间的距离以形成台阶结构，从而在采用旋涂法形成后续色阻层的过程中促进色阻材料的流动，以进一步提高形成在显示区的色阻层的均匀度，防止后续显示过程中出现显示不均匀的现象。
下面结合附图对本公开实施例提供的发光二极管显示面板及其制作方法以及有机发光二极管显示装置进行描述。
图1为本公开一实施例提供的一种硅基有机发光二极管显示面板的彩膜结构的局部结构示意图。如图1所示，有机发光二极管显示面板包括显示区11和围绕显示区11的周边区12，彩膜结构10包括位于显示区11的色阻层(未示出)和位于周边区12的环形的挡光结构。挡光结构用于覆盖显示面板周边区12的结构，例如连接显示面板的发光元件的阳极走线、像素感测电路等，以防止周边区反光或漏光。
为了对硅基有机发光二极管显示面板的周边区实现较好的遮挡效果，挡光结构可以包括至少两层彩膜叠层。在挡光结构包括两层或者三层彩膜叠层时，周边区的挡光结构的厚度为显示区的像素彩膜的2～3倍，会在显示区周边形成一圈挡墙。
图2A-图2F为根据本公开一实施例提供的彩膜结构的示意图。图2A为第一彩膜层的平面结构示意图，图2B为图2A所示的第一彩膜层沿AA线所截的截面结构示意图。如图2A和图2B所示，彩膜结构包括：透明底层100和位于透明底层100上的第一彩膜层200。透明底层100包括显示区101和围绕显示区101的周边区102。例如，显示区101为用于显示画面的区域，即出光区；周边区102为不显示画面的区域，即非出光区。
如图2A和图2B所示，第一彩膜层200包括位于显示区101的第一像素彩膜210以及位于周边区102的第一边框彩膜220。第一边框彩膜220为围绕显示区101的环形彩膜，用于覆盖包括上述彩膜结构的显示面板周边区的结构，例如用于连接发光元件的走线，以及位于感测区的用于检测像素的电流的感测电路结构(该感测电路结构可以连接至温度传感器)等，以防止周边区反光或者漏光。也就是，本公开实施例提供的发光二极管显示面板包括位于显示区101的色阻层，该色阻层包括与多个子像素一一对应的多个子色阻层，相邻的子色阻层至少部分不交叠，多个子色阻层包括多个第一子色阻层。本公开实施例下面的内容以第一子色阻层即为第一像素彩膜210为例，发光二极管显示面板包括的第一挡光结构即为第一边框彩膜220为例进行描述。例如，多个第一子色阻层与第一挡光结构同层设置且材料相同。这里以及后续出现的“同层”指同一材料在经过同一步骤(例如一步图案化工艺)后形成的多个膜层之间的关系。这里的“同层”并不总是指多个膜层的厚度相同或者多个膜层在截面图中的高度相同。
在一些示例中，如图2A所示，第一挡光结构220的外轮廓包括沿第一方向(即X方向)延伸的第一边S1和沿第二方向(即Y方向)延伸的第二边S2，第一方向与第二方向相交，且第一边S1和第二边S2通过弧形边221连接，弧形边221向远离显示区101的方向弯曲。例如，第一边和第二边均为直边。
在一些示例中，如图2A和图2B所示，第一边框彩膜220(即第一挡光结构)的外轮廓的至少一个角可以为圆角221。第一边框彩膜220的外轮廓的形状指环形形状的第一边框彩膜的外边框的形状。
相比于图1所示的外边框包括尖角的挡光结构，本公开实施例通过将第一边框彩膜的外环中的至少一个角设计为弧形边，以在后续形成其他彩膜层的过程中，降低滴注在第一边框彩膜外侧的彩膜材料在旋涂过程受到第一边框彩膜外边框的尖角的影响而呈发散状的几率，从而使得涂覆在显示区的彩膜层的均匀程度更好，以防止包括该彩膜结构的显示装置出现显示不均匀的现象。
例如，第一边框彩膜220的外环(即外轮廓)的所有角均为圆角，从而在后续形成其他彩膜层的过程中，使得滴注在第一边框彩膜外侧的彩膜材料 在旋涂过程不会受到第一边框彩膜外边框的尖角的影响而呈发散状，从而进一步提高涂覆在显示区的彩膜层的均匀度。
在一些示例中，如图2A所示，第一边框彩膜220的外环为圆角矩形。也即是，第一边框彩膜220的外环为四个角均为圆角的矩形。而第一边框彩膜220的内环根据实际需要的显示区101的形状而定，例如可以为直角矩形，即第一边框彩膜220的内环为四个角均为直角的矩形。
在一些示例中，如图2A所示，包括圆角221的圆形与连接于圆角221的第一边或第二边相切以方便制作。包括圆角221的圆形与直边相切可以避免夹角对彩胶涂覆的不利影响。并且，圆角221的曲率半径越大，越利于改善位于显示区的彩膜层不均匀的问题，但是圆角221的曲率半径越大会导致边框彩膜的四个圆角处的遮光区域会越小，因此在确保覆盖下层走线的情况下，圆角的曲率半径越大越好。
在一些示例中，如图2A所示，第一边框彩膜220的形状为闭合的环形。也就是，第一边框彩膜为覆盖周边区的连续的环形遮光层，以防止位于包括上述彩膜结构的显示面板的周边区的结构反光，从而起到较好的防反光效果。
例如，如图2A和图2B所示，位于显示区101的第一像素彩膜210包括阵列排布的多个第一子像素彩膜(即多个第一子色阻层)，且相邻第一子像素彩膜之间具有一定间距以形成后续的不同颜色的像素彩膜。本公开实施例中位于显示区的第一像素彩膜被配置为显示面板中的发光元件正相对以对发光元件发出的白光实现彩色滤光作用。
图2C为第二彩膜层的平面结构示意图，图2D为图2C所示的第二彩膜层沿AA线所截的截面结构示意图。如图2C和图2D所示，彩膜结构还包括第二彩膜层300。第二彩膜层300包括位于显示区101且与第一像素彩膜210至少部分不交叠的第二像素彩膜310，以及位于周边区102的第二边框彩膜320。也就是挡光结构还包括第二挡光结构，多个子色阻层还包括多个第二子色阻层，本公开实施例下面的内容以第二像素彩膜310即为第二子色阻层，第二边框彩膜320即为第二挡光结构为例进行描述。例如，多个第二子色阻层与第二挡光结构同层设置且材料相同。也就是，第二子色阻层和第二挡光结构为对第二色阻材料进行同一步图案化工艺形成的两个膜层。
图2C和图2D示意性的示出第二像素彩膜310与第一像素彩膜210相接， 但不限于此。例如，第二像素彩膜还可以与第一像素彩膜部分重叠，两者重叠的部分可以起到遮光作用，从而节省了黑矩阵。例如，第二像素彩膜还可以与第一像素彩膜彼此分离，两者之间的间距设置黑矩阵以防止发生串扰。
例如，如图2C和图2D所示，第二像素彩膜310包括多个第二子像素彩膜(即多个第二子色阻层)，第二子像素彩膜与第一子像素彩膜至少部分不交叠，且第二子像素彩膜的一侧可与第一子像素彩膜相接，另一侧与第一子像素彩膜之间具有一定间距以形成后续与第一像素彩膜和第二像素彩膜的颜色均不同的像素彩膜。当然，本公开实施例不限于此，还可以是第一子像素彩膜与第二子像素彩膜交替且相接设置。
如图2C所示，第二边框彩膜320为围绕显示区101的环形彩膜层，例如为闭合的环形彩膜层。第二边框彩膜320位于第一边框彩膜220远离透明底层100的一侧以与第一边框彩膜220重叠，从而与第一边框彩膜共同起到遮光以及防反光的作用。
例如，如图2C所示，在第一边框彩膜220外轮廓的角为圆角时，采用旋涂法形成第二彩膜层300的过程中，旋涂在显示区101的第二像素彩膜310的厚度比较均匀，从而可以防止后续显示过程中出现显示不均匀的现象。
在一些示例中，如图2C所示，第二边框彩膜320的形状可以与第一边框彩膜220的形状相同。也即是，第二边框彩膜320的外轮廓的包括位于第一边和第二边的夹角处的弧形边321，从而采用旋涂法形成后续彩膜层的过程中，旋涂在显示区中的彩膜层的均匀度更好。在第一边框彩膜的内环用于限定显示区形状时，第二边框彩膜的内环的形状不做限定。例如，第二边框彩膜的内环可以为直角矩形，也可以为圆角矩形。
在一些示例中，如图2C和图2D所示，第二边框彩膜320在透明底层100上的正投影位于第一边框彩膜220在透明底层100上的正投影内，且沿显示区101的中心指向周边的方向，第一边框彩膜220的尺寸大于第二边框彩膜320的尺寸以形成台阶结构。第一边框彩膜220的内外环之间的距离大于第二边框彩膜320的内外环之间的距离以形成台阶结构。也就是，参见图2C所示的俯视图，第二挡光结构320在透明底层100的第二正投影位于第一挡光结构220在透明底层100的第一正投影中，且第一正投影与第二正投影不完全重合。例如，第二正投影的面积小于第一正投影的面积。
相对于第一边框彩膜和第二边框彩膜的尺寸完全相同的情况，本公开实施例中，将第二边框彩膜的内外环之间的距离设计为小于第一边框彩膜的内外环之间的距离以形成台阶结构，可以在采用旋涂法形成后续彩膜层的过程中促进彩膜材料的流动，以进一步提高形成在显示区的像素彩膜的均匀度，防止后续显示过程中出现显示不均匀的现象。
在一些示例中，如图2C所示，第一挡光结构220的边缘的至少一部分没有被第二挡光结构320覆盖，也就是第一挡光结构220没有被覆盖的边缘处形成了台阶结构。
在一些示例中，如图2C所示，第一挡光结构220的内边缘和外边缘均没有被第二挡光结构320覆盖，也就是第一挡光结构220的内轮廓和外轮廓所在位置处形成两圈台阶结构。
例如，上述台阶结构可以位于第二边框彩膜靠近显示区的一侧，也可以位于第二边框彩膜远离显示区的一侧。或者，第二边框彩膜靠近显示区的一侧和远离显示区的一侧均设置有台阶结构以利于后续形成在显示区的像素彩膜的均匀度。
例如，第一彩膜层200和第二彩膜层300为颜色不同的两层彩膜层。例如，第一彩膜层200和第二彩膜层300可以为红色彩膜层和绿色彩膜层，或者红色彩膜层和蓝色彩膜层，或者绿色彩膜层和蓝色彩膜层，本公开实施例对此不做限制。也即是，第一子色阻层与第二子色阻层为颜色不同的两层彩膜层。
图2E为第三彩膜层的平面结构示意图，图2F为图2E所示的第三彩膜层沿AA线所截的截面结构示意图。如图2E和图2F所示，彩膜结构还包括：第三彩膜层400。第三彩膜层400包括位于显示区101且与第一像素彩膜210和第二像素彩膜310至少部分不交叠的第三像素彩膜410，以及位于周边区102的第三边框彩膜320。也就是，挡光结构还包括第三挡光结构，多个子色阻层还包括多个第三子色阻层，本公开实施例下面的内容以第三边框彩膜420即为第三挡光结构，第三像素彩膜410即为第三子色阻层为例进行描述。例如，多个第三子色阻层与第三挡光结构同层设置且材料相同。也就是，第三子色阻层和第三挡光结构为对第三色阻材料进行同一步图案化工艺形成的两个膜层。
图2E和图2F示意性的示出第三像素彩膜410与第一像素彩膜210和第二像素彩膜310相接，但不限于此。例如，第三像素彩膜还可以与第二像素彩膜和第一像素彩膜均部分重叠，上述重叠的部分可以起到遮光作用，从而节省了黑矩阵。例如，第三像素彩膜还可以与第二像素彩膜和第一像素彩膜彼此分离，相邻像素彩膜之间的间距设置有黑矩阵以防止发生串扰。
例如，如图2E和图2F所示，第三像素彩膜410包括多个第三子像素彩膜(即多个第三子色阻层)，第三子像素彩膜的一侧可以与第一子像素彩膜相接，另一侧与第二子像素彩膜相接。
如图2E所示，第三边框彩膜420为围绕显示区101的环形彩膜层，例如为闭合的环形彩膜层。第三边框彩膜420位于第二边框彩膜320远离透明底层100的一侧以与第二边框彩膜320和第一边框彩膜220重叠，从而与第一边框彩膜和第二边框彩膜共同起到遮光作用。图2E示意性的示出第三边框彩膜的外环的角也为圆角，本公开实施例不限于此，在不形成后续彩膜的情况下，第三边框彩膜的外环的角也可以为尖角。
例如，如图2E所示，在第二边框彩膜外环的角为圆角时，采用旋涂法形成第三彩膜层400的过程中，旋涂在显示区101的第三像素彩膜410的厚度比较均匀，从而可以防止后续显示过程中出现显示不均匀的现象。并且，采用旋涂法形成第三彩膜层的过程中，第二边框彩膜的宽度设计为小于第一边框彩膜的宽度以形成的台阶结构可以促进第三彩膜层的材料的流动，以进一步提高形成在显示区的第三像素彩膜的均匀度，防止后续显示过程中出现显示不均匀的现象。
例如，如图2E和图2F所示，第三边框彩膜420在透明底层100上的正投影可以与第一边框彩膜220在透明底层100上的正投影完全重合以实现更好的遮光效果。本公开实施例包括但不限于此，例如，第一边框彩膜在透明底层上的正投影还可以位于第三边框彩膜在透明底层上的正投影内，当第三边框彩膜的尺寸大于第一边框彩膜时，第三边框彩膜的内轮廓用于限定显示区的形状。
在一些示例中，如图2E和图2F所示，第一彩膜层200、第二彩膜层300以及第三彩膜层400为不同颜色的彩膜层。例如，上述三层彩膜层分别为红色彩膜层、绿色彩膜层以及蓝色彩膜层。也就是，第一子色阻层、第二子色 阻层以及第三子色阻层为不同颜色的彩膜层。例如，上述第一子色阻层、第二子色阻层以及第三子色阻层可以分别为红色彩膜层、绿色彩膜层以及蓝色彩膜层。
图2G为第三彩膜层的平面结构示意图，图2H为图2G所示的第三彩膜层沿AA线所截的截面结构示意图。如图2H和图2G所示，第三边框彩膜420(第三挡光结构420)在透明底层100上的正投影位于第二边框彩膜320(第二挡光结构320)在透明底层100上的正投影内，从而可以防止厚度较大的挡光结构遮挡显示区向外发射的图像光。
例如，如图2G所示，第三挡光结构420的外轮廓可以包括弧形边421，但不限于此，只要第三挡光结构420在衬底基板上的正投影位于第二挡光结构320在衬底基板上的正投影中即可。
图2H示意性的示出第三挡光结构420沿垂直于挡光结构的延伸方向的宽度小于第二挡光结构320沿垂直于挡光结构的延伸方向的宽度，但不限于此，还可以第三挡光结构420在透明底层100上的正投影与第二挡光结构320在透明底层100上的正投影完全重合以方便制作。
图3A-图3E为根据本公开另一实施例提供的彩膜结构的示意图。图3A为第一彩膜层和第四彩膜层的平面结构示意图，图3B为图3A所示的第一彩膜层和第四彩膜层沿BB线所截的截面结构示意图。如图3A和图3B所示，彩膜结构包括：透明底层100和位于透明底层100上的第一彩膜层200。透明底层100包括显示区101和围绕显示区101的周边区102。
如图3A和图3B所示，第一彩膜层200包括位于显示区101的第一像素彩膜210以及位于周边区102的第一边框彩膜220。第一边框彩膜220为围绕显示区101的环形彩膜，用于覆盖包括上述彩膜结构的显示面板周边区的结构，例如用于连接发光元件的走线，以及位于感测区的用于检测像素的电流的感测电路结构(该感测电路结构可以连接至温度传感器)等，以防止周边区反光或漏光。
如图3A和图3B所示，第一边框彩膜220的外环为多边形，且多边形的至少一个角为圆角221。第一边框彩膜220的外环为多边形指环形形状的第一边框彩膜的外边框为多边形。本公开实施例中的第一边框彩膜的形状以及效果与图2A和图2B所示的第一边框彩膜的形状以及效果相同，在此不再赘 述。
如图3A和图3B所示，彩膜结构还包括第四彩膜层500，仅包括位于显示区101且与第一像素彩膜210至少部分不交叠的第四像素彩膜510。也就是，第四彩膜层500不包括位于周边区102的边框彩膜，即，在显示区101包括两种颜色的像素彩膜时，周边区102仅包括一层彩膜层，从而可以降低周边区的边框彩膜的厚度。本公开实施例中在形成第四彩膜层以后形成了第一彩膜层，由于第四彩膜层没有包括边框彩膜，不会影响后续形成的第一彩膜层的均匀度，所以采用旋涂法形成的位于显示区的第一像素彩膜是均匀的。上述第一彩膜层、第二彩膜层以及第四彩膜层可以分别为红色彩膜层、绿色彩膜层以及蓝色彩膜层。本实施例中的第一彩膜层和第二彩膜层的颜色与上述实施例中的第一彩膜层和第二彩膜层的颜色相同。本实施例中的第四彩膜层的颜色可以与上述实施例中的第三彩膜层的颜色相同，也可以不同，本实施例中以第四彩膜层的颜色与上述实施例中的第三彩膜层的颜色相同为例进行描述。
图3A和图3B示意性的示出第四像素彩膜510与第一像素彩膜210相接，但不限于此。图3C为本公开实施例中另一示例提供的彩膜结构的局部截面结构示意图。例如，如图3C所示，第四像素彩膜510还可以与第一像素彩膜210部分重叠，两者重叠的部分可以起到遮光作用，从而节省了黑矩阵。例如，如图3C所示，在第四像素彩膜510和第一像素彩膜210彼此重叠的部分215中，第四像素彩膜510位于第一像素彩膜210靠近透明底层100的一侧。
当然本公开实施例不限于此，例如，第四像素彩膜还可以与第一像素彩膜彼此分离，两者之间的间距设置黑矩阵以防止发生串扰。
图3D为形成第二彩膜层后的平面结构示意图，图3E为图3D所示的第二彩膜层沿BB线所截的截面结构示意图。如图3D和图3E所示，彩膜结构还包括第二彩膜层300。第二彩膜层300包括位于显示区101且与第一像素彩膜210和第四像素彩膜510至少部分不交叠的第二像素彩膜310，以及位于周边区102的第二边框彩膜320。图3D和图3E示意性的示出第二像素彩膜310与第一像素彩膜210和第四像素彩膜510相接，但不限于此。例如，第二像素彩膜还可以与第一像素彩膜和第四像素彩膜部分重叠，上述重叠的 部分可以起到遮光作用，从而节省了黑矩阵。例如，在第二像素彩膜与第四像素彩膜彼此交叠的部分，第四像素彩膜位于第二像素彩膜靠近透明底层的一侧。例如，第二像素彩膜还可以与第一像素彩膜和第四像素彩膜彼此分离，相邻像素彩膜之间的间距设置黑矩阵以防止发生串扰。
例如，在本公开的实施例中，每种像素彩膜均包括与其他像素彩膜不交叠的部分。
如图3D所示，第二边框彩膜320为围绕显示区101的环形彩膜层，例如为闭合的环形彩膜层。第二边框彩膜320位于第一边框彩膜220远离透明底层100的一侧以与第一边框彩膜220重叠，且第一边框彩膜220在透明底层100上的正投影位于第二边框彩膜220在透明底层100上的正投影内，从而第二边框彩膜与第一边框彩膜共同起到遮光作用。
例如，如图3D和图3E所示，第一边框彩膜220在透明底层100上的正投影与第二边框彩膜220在透明底层100上的正投影完全重合以方便制作。
例如，如图3A-3E所示，在第一边框彩膜220外环的角为圆角时，采用旋涂法形成第二彩膜层300的过程中，旋涂在显示区101的第二像素彩膜310的厚度比较均匀，从而可以防止后续显示过程中出现显示不均匀的现象。
在一些示例中，如图3D和图3E所示，第一彩膜层200、第二彩膜层300以及第四彩膜层500为不同颜色的彩膜层。例如，上述三层彩膜层分别为红色彩膜层、绿色彩膜层以及蓝色彩膜层。
本公开另一实施例提供一种发光二极管显示面板。图4为根据本公开一实施例提供的发光二极管显示面板的局部截面示意图。以图4为包括图2E所示的彩膜结构为例，图4为沿图2E所示的CC线所截的发光二极管显示面板的截面示意图。但不限于此，本公开实施例提供的发光二极管显示面板还可以为图3E所示的彩膜结构等，只要在垂直于挡光结构的延伸方向的方向上，第二挡光结构的宽度小于第一挡光结构的宽度以形成台阶结构即可。例如，本公开实施例提供的发光二极管显示面板可以包括以上描述的任意一种彩膜结构。
如图4所示，发光二极管显示面板包括衬底基板600、位于衬底基板600上的多个子像素以及位于子像素显示侧的彩膜结构(例如色阻层和挡光结构)，以彩膜结构为图2E所示的彩膜结构为例进行描述。
如图4所示，多个子像素位于显示区101且位于衬底基板600的一侧，多个子像素中的至少一个包括：发光元件700以及位于发光元件700与衬底基板600之间的驱动电路610。发光元件700包括依次层叠的第一电极710、发光功能层720和第二电极730，第一电极710比第二电极730更靠近衬底基板600。驱动电路610包括驱动晶体管和存储电容，驱动晶体管包括源极、漏极和栅极，源极和漏极之一与第一电极710耦接，栅极与存储电容耦接，存储电容被配置为存储数据信号。色阻层位于第二电极730远离衬底基板600的一侧，发光元件700发出的光线通过色阻层射出。
图4中仅仅示意性地示出了驱动电路结构，更详细的驱动电路结构示例请参考下文中结合图6的描述。
如图4所示，发光二极管显示面板还包括位于周边区102的感测区103，感测区103可以包括用于检测像素的电流的感测电路结构(图中未示出)，该感测电路结构可以连接至温度传感器，且感测电路位于彩膜结构面向衬底基板600的一侧。感测区103在透明底层100上的正投影位于第一边框彩膜220(即第一挡光结构)在透明底层100上的正投影内。
如图4所示，显示区101内发光元件700的第二电极730可以延伸到感测区103，且第一边框彩膜220(即第一挡光结构)、第二边框彩膜320(即第二挡光结构)和第三边框彩膜420(即第三挡光结构)覆盖在延伸到感测区的第二电极730上。例如，感测区103包括与显示区的发光元件700同层设置的发光元件700’以及感测电路结构610’，上述第一边框彩膜220、第二边框彩膜320和第三边框彩膜420作为挡光结构可以遮挡从感测区的发光元件出射的光线。此外，需要说明的是，图4中仅仅示出了第一边框彩膜220、第二边框彩膜320和第三边框彩膜420位于周边区的示例性结构，然而，根据本公开的实施例不限于此。例如，上述实施例中所描述的各种彩膜结构均可以应用于图4中结构。也就是说，可以将图4中的彩膜结构替换为上述实施例中的任一种彩膜结构。
例如，每个子像素SP包括发光元件700，如图4所示的虚线框所示。每个子像素对应一个子色阻层，例如，子色阻层210、310、410等，以使得从每个子像素出射的光经过相应的色阻层的过滤而显示相应的颜色。
在一些示例中，如图4所示，衬底基板600为硅基板600，硅基板600 面向发光元件700的一侧包括驱动电路610，驱动电路610与发光元件700连接。也即是，硅基板600上集成有驱动电路610。例如，硅基板600上集成有驱动电路610中的驱动晶体管的源极和漏极。
例如，硅基板上还可以集成有栅极驱动电路和数据驱动电路(图中未示出)，硅基板的周边区设置有柔性电路板，配置为向栅驱动电路、数据驱动电路以及发光元件传输电信号。例如，该栅极驱动电路(图中未示出)用于产生栅极驱动信号，数据驱动电路(图中未示出)用于产生数据信号，该栅极驱动电路和数据驱动电路可以采用本领域内的常规电路结构，本公开的实施例对此不作限制。
例如，驱动电路610用于在栅极扫描信号、数据信号以及电压信号等驱动信号的控制下，向发光元件700提供驱动电流，以使得发光元件包括的有机发光层发光。例如，驱动电路610可以采用4T1C、4T2C、7T1C、8T2C等电路结构的像素电路，其驱动方法可以采用本领域的常规方法，在此不再赘述。例如，像素电路结构可以采用CMOS工艺制作在硅基板上，本公开的实施例对此不作限制。
例如，如图4所示，硅基板600还包括位于驱动电路610与发光元件700之间的第一绝缘层620和第二绝缘层650，两层绝缘层中均设置有过孔630。例如过孔630可以为填充钨金属的钨孔，第一绝缘层620和第二绝缘层650厚度较大的情况下，在第一绝缘层620和第二绝缘层650中形成钨过孔可以保证导电通路的稳定性，而且，由于制作钨过孔的工艺成熟，所得到的第一绝缘层620和第二绝缘层650的表面平坦度好，有利于降低第一绝缘层620和第二绝缘层650与发光元件700包括的电极之间的接触电阻。
例如，如图4所示，两层绝缘层中的过孔630之间设置有金属层640以实现将发光元件700与驱动电路610电连接。
例如，如图4所示，发光元件700包括的第一电极710通过位于绝缘层中的过孔630与驱动电路610电连接，驱动电路610用于驱动发光元件700发光。发光元件700包括多个发光子元件，相邻发光子元件的发光功能层720通过像素限定层800分隔。
例如，驱动电路610至少包括驱动晶体管和开关晶体管(图4中未示出，请参考图6)，驱动晶体管与第一电极710之间彼此电连接。由此，驱动发 光元件700的电信号传输到第一电极710，从而控制发光元件700发光。例如，驱动晶体管包括栅电极、源电极和漏电极。驱动晶体管的源电极电连接于第一电极710。在驱动晶体管处于开启状态时，由电源线提供的电信号可经过驱动晶体管的源电极传输到第一电极710。由于第一电极710与第二电极730之间形成电压差，在二者之间形成电场，发光功能层720在该电场作用下发光。
例如，如图4所示，发光元件700包括的各发光子元件分别与各子像素彩膜一一对应。例如，发光元件700发出的光为白光，白光通过位于发光元件700显示侧的不同颜色像素彩膜后可以实现彩色显示。
例如，如图4所示，位于周边区102的感测区103还设置有与显示区101中的发光元件700相同的发光元件，位于感测区103的发光元件并不用于显示，而是用于检测像素发光的衰减程度，因此需要被位于周边区102的边框彩膜遮挡。
在一些示例中，如图4所示，透明底层100为薄膜封装层，且薄膜封装层位于第一彩膜层200面向发光元件700的一侧。
例如，上述透明底层100为第一薄膜封装层，在彩膜结构远离发光元件700的一侧还设置有第二薄膜封装层100’，第一薄膜封装层100和第二薄膜封装层100’可以实现发光元件的有效封装，实现对水汽、氧气等的有效阻挡，达到保护发光元件以及延长发光元件的使用寿命的目的。
例如，在第二薄膜封装层远离彩膜结构的一侧还设置有盖板(未示出)，第二薄膜封装层和盖板依次设置在彩膜结构的上面，可以实现保护彩膜结构的功能。例如，第二薄膜封装层采用密封特性较好的有机材料或无机材料中的一种或者多种结合制作而成，以达到较好的密封作用，保护硅基OLED显示器件。例如，盖板可以采用透明材料，例如透明材料可以为玻璃等无机材料或者聚酰亚胺等有机材料，例如，在本公开的实施例中，可以采用具有高透过率的玻璃，本公开的实施例对此不做限定。
关于本公开实施例提供的发光二极管显示面板的技术效果可以参考本公开的实施例中提供的彩膜结构的技术效果，这里不再赘述。
图5为本公开一些实施例提供的一种硅基有机发光显示面板的电路原理示意图。该硅基有机发光显示面板包括位于显示区101(AA区)中的多个显 示器件L(即发光元件)以及与各显示器件L一一对应耦接的像素电路110，像素电路110包括驱动晶体管。并且，该硅基有机发光显示面板还可以包括位于硅基有机发光显示面板的周边区102(硅基有机发光显示面板中除显示区101之外的区域)中的多个电压控制电路120。例如，一行中至少两个像素电路110共用一个电压控制电路120，且一行像素电路110中驱动晶体管的第一极与共用的电压控制电路120耦接，各驱动晶体管的第二极与对应的显示器件L耦接。电压控制电路120被配置为响应于复位控制信号RE，将初始化信号Vinit输出至驱动晶体管的第一极，控制对应的显示器件L复位；以及响应于发光控制信号EM，将第一电源信号VDD输出至驱动晶体管的第一极，以驱动显示器件L发光。通过共用电压控制电路120，可以简化显示区101中各像素电路的结构，降低显示区101中像素电路的占用面积，从而可以使显示区101设置更多的像素电路和显示器件，实现高PPI的有机发光显示面板。并且，电压控制电路120在复位控制信号RE的控制下将初始化信号Vinit输出至驱动晶体管的第一极，控制对应的显示器件复位，从而可以避免上一帧发光时加载于显示器件上的电压对下一帧发光的影响，进而改善残影现象。
例如，该硅基有机发光显示面板还可以包括位于显示区101的多个像素单元PX，每个像素单元PX包括多个子像素；各子像素分别包括一个显示器件L与一个像素电路110。进一步地，像素单元PX可以包括3个不同颜色的子像素。这3个子像素可以分别为红色子像素、绿色子像素以及蓝色子像素。当然，像素单元PX也可以包括4个、5个或更多的子像素，这需要根据实际应用环境来设计确定，在此不作限定。
例如，可以使同一行中相邻的至少两个子像素中的像素电路110共用一个电压控制电路120。例如，在一些示例中，如图5所示，可以使同一行中的所有像素电路110共用一个电压控制电路120。或者，在其他示例中，也可以使同一行中相邻的两个、三个或更多子像素中的像素电路110共用一个电压控制电路120，在此不作限定。这样，通过共用电压控制电路120可以降低显示区101中像素电路的占用面积。
图6为本公开一些实施例提供的显示面板中的电压控制电路和像素电路的具体实现示例的电路图。例如，像素电路110(即图4中的驱动电路610) 中的驱动晶体管M0可以为N型晶体管。并且，发光元件L可以包括OLED。这样，OLED的正极与驱动晶体管M0的第二极D电连接，OLED的负极与第二电源端VSS电连接。第二电源端VSS的电压一般为负电压或接地电压VGND(一般为0V)，初始化信号Vinit的电压也可以设置为接地电压VGND，在此不作限定。例如，可以将OLED设置为Micro-OLED或Mini-OLED，这样进一步有利于实现高PPI的有机发光显示面板。
例如，如图6所示，电压控制电路120可以包括第一开关晶体管M1和第二开关晶体管M2；像素电路110除了包括驱动晶体管M0之外，还可以包括第三开关晶体管M3、第四开关晶体管M4和第五开关晶体管M5以及存储电容Cst。
例如，如图6所示，第一开关晶体管M1的栅极用于接收复位控制信号RE，第一开关晶体管M1的第一极用于接收初始化信号Vinit，第一开关晶体管M1的第二极与第三开关晶体管M3的第一极耦接。第二开关晶体管M2的栅极用于接收发光控制信号EM，第二开关晶体管M2的第一极用于接收第一电源信号VDD，第二开关晶体管M2的第二极与第三开关晶体管M3的第一极耦接。
例如，可以使第一开关晶体管M1与第二开关晶体管M2的类型不同。例如，第一开关晶体管M1为N型晶体管，第二开关晶体管M2为P型晶体管。或者，第一开关晶体管M1为P型晶体管，第二开关晶体管M2为N型晶体管。当然，也可以使第一开关晶体管M1与第二开关晶体管M2的类型相同。在实际应用中，需要根据实际应用环境来设计第一开关晶体管M1与第二开关晶体管M2的类型，在此不作限定。
例如，如图6所示，第三开关晶体管M3的栅极用于接收传输控制信号VT，第三开关晶体管M3的第一极与第一开关晶体管M1的第二极和第二开关晶体管M2的第二极耦接，用于接收第一开关晶体管M1传输过来的初始化信号Vinit或第二开关晶体管M2传输过来的第一电源信号VDD，第三开关晶体管M3的第二极与驱动晶体管M0的第一极S耦接。例如，可以通过控制是否输入传输控制信号VT来控制第三开关晶体管M3的导通或截止，从而控制发光元件L的发光时间，进而实现PWM(Pulse Width Modulation，脉冲宽度调制)调光，该种控制方式有利于保证各子像素的PWM控制的均 一性。
例如，像素电路110还可以包括第四开关晶体管M4和存储电容Cst。例如，第四开关晶体管M4的栅极用于接收栅极扫描信号SN，第四开关晶体管M4的第一极用于接收数据信号DATA，第四开关晶体管M4的第二极与驱动晶体管M0的栅极G耦接。存储电容Cst的第一端与驱动晶体管M0的栅极G耦接，存储电容Cst的第二端与第一电压端V1耦接。第一电压端V1的电压可以为接地电压VGND，本公开的实施例包括但不限于此。例如，存储电容用于存储写入的数据信号DATA，以使驱动晶体管M0根据存储的数据信号DATA驱动发光元件L发光。
例如，像素电路110还可以包括第五开关晶体管M5。例如，第五开关晶体管M5的栅极用于接收栅极扫描信号SN的反相信号SN’，第五开关晶体管M5的第一极用于接收数据信号DATA，第五开关晶体管M5的第二极与驱动晶体管M0的栅极G耦接。并且，第五开关晶体管M5与第四开关晶体管M4的类型不同。例如，在一些示例中，如图6所示，第四开关晶体管M4为N型晶体管，第五开关晶体管M5为P型晶体管；或者，在另一些示例中，第四开关晶体管M4为P型晶体管，第五开关晶体管M5为N型晶体管。
需要说明的是，图6所示的像素电路结构仅仅为示例性的，根据本公开的实施例还可以采用任意其他的像素电路结构。
上述驱动晶体管M0、第一开关晶体管M1、第二开关晶体管M2、第三开关晶体管M3、第四开关晶体管M4和第五开关晶体管M5为制备在衬底基板600(例如，硅基衬底基板)中的MOS晶体管。例如，这些晶体管的至少一部分位于衬底基板中。例如，这些晶体管的源极区和漏极区位于衬底基板600中。
本公开另一实施例提供一种发光二极管显示装置，包括上述发光二极管显示面板。本公开实施例提供的发光二极管显示装置为小尺寸的发光二极管显示装置，即微发光二极管显示装置。该发光二极管显示装置可以应用于电视、数码相机、手机、手表、平板电脑、笔记本电脑、导航仪等任何具有显示功能的产品或者部件，特别适合应用于头盔显示器、立体显示镜以及眼睛式显示器等。上述微发光二极管显示装置可与移动通讯网络、卫星定位等系 统联在一起，以在任何地方、任何时间获得精确的图像信息。
本实施例不限于此，本公开实施例提供的发光二极管显示装置还可以应用于虚拟现实设备或者增强现实设备。
关于本公开实施例提供的发光二极管显示装置的技术效果可以参考本公开的实施例中提供的彩膜结构的技术效果，这里不再赘述。
本公开另一实施例提供一种发光二极管显示面板的制作方法。图7为根据本公开一实施例提供的发光二极管显示面板的流程图。参考图2A-图2H以及图4-图7，制作方法包括如下步骤。
S101:提供衬底基板。
例如，如图4所示，衬底基板600可以为硅基板。
例如，如图4所示，衬底基板600包括显示区101和围绕显示区101的周边区102。硅基板600上集成有驱动电路610、栅极驱动电路和数据驱动电路(图中未示出)。硅基板600的周边区102可以设置有柔性电路板，配置为向栅驱动电路和数据驱动电路等传输电信号。
例如，驱动电路610可以采用4T1C、4T2C、7T1C、8T2C等电路结构的像素电路，其驱动方法可以采用本领域的常规方法，在此不再赘述。例如，像素电路结构可以采用CMOS工艺制作在硅基板上，本公开的实施例对此不作限制。
S102：在衬底基板上的显示区形成发光元件。
例如，如图4所示，形成发光元件700包括形成依次层叠设置的第一电极710、发光功能层720以及第二电极730，第一电极710与驱动电路610电连接，驱动电路610用于驱动发光元件700发光。
S103：在发光元件上采用旋涂法涂覆第一色阻材料。
例如，实际工艺中，硅基板上包括多个发光二极管显示面板区域以用于形成多个发光二极管显示面板，在每个发光二极管显示面板区域中形成发光元件之后，采用旋涂法涂覆的第一彩膜材料层(即第一色阻材料)覆盖了每个发光二极管显示面板区域。当然，本公开实施例不限于旋涂法，还可以采用其他方法涂敷第一色阻材料。
例如，旋涂法指依靠工件旋转时产生的离心力及重力作用，将落在工件上的涂料液滴全面流布于工件表面的涂覆过程。采用旋涂法涂覆第一彩膜材 料层包括：在硅基板的发光二极管显示面板区域以外的位置滴注第一彩膜材料(例如在整个硅基板的中心滴注彩膜材料)，通过旋转硅基板以使第一彩膜材料均匀流布于包括所有发光二极管显示面板区域的区域中的发光元件上以形成厚度均匀的第一彩膜材料层。
例如，第一彩膜材料的颜色不同，采用的涂胶速度可以不同。
例如，在形成第一彩膜材料层之前，还包括在发光元件上形成透明底层，也就是一层覆盖发光元件的薄膜封装层。
S104：对第一色阻材料进行图案化以在显示区形成第一色阻层，在周边区形成围绕显示区的第一挡光结构。
例如，如图2A所示，对第一彩膜材料层进行前烘、曝光、显影和后烘后，可以在显示区101形成第一像素彩膜210(即第一色阻层)，并在周边区102形成第一边框彩膜220(即第一挡光结构)。形成的第一边框彩膜220为环形彩膜层。例如第一挡光结构的外轮廓可以包括沿第一方向延伸的第一边和沿第二方向延伸的第二边，第一方向与第二方向相交，且第一边和第二边通过弧形边连接，弧形边向远离显示区的方向弯曲。例如，第一边和第二边均为直边。
例如，第一彩膜材料层的颜色不同，采用的曝光强度以及显影时间不同。
在一些示例中，形成第一挡光结构包括：图案化第一色阻材料以使第一挡光结构的外轮廓包括沿第一方向延伸的两条第一边和沿第二方向延伸的两条第二边，第一方向与第二方向相交，且第一边和第二边通过弧形边连接，弧形边向远离显示区的方向弯曲。
本公开实施例可以将第一边框彩膜的外环中的至少一个角设计为弧形边，以在后续形成其他彩膜层的过程中，降低滴注在发光二极管显示面板区域以外的(第一边框彩膜外侧)彩膜材料在旋涂过程受到第一边框彩膜外边框的尖角的影响而呈发散状的几率，从而使得涂覆在显示区的彩膜层的均匀程度更好，以防止包括该彩膜结构的显示装置出现显示不均匀的现象。
例如，本公开实施例形成的第一像素彩膜和第一边框彩膜具有图2A和图2B所示的第一像素彩膜和第一边框彩膜相同的特征和效果，在此不再赘述。
S105：在第一色阻层和第一挡光结构上采用旋涂法涂覆第二色阻材料。
在一些示例中，如图2C和图2D所示，形成第一像素彩膜和第一边框彩膜以后，制作方法还包括：在第一像素彩膜210和第一边框彩膜220上采用旋涂法涂覆第二彩膜材料层(即第二色阻材料)。当然，本公开实施例不限于旋涂法，还可以采用其他方法涂敷第二色阻材料。
例如，在第一边框彩膜220外侧的区域滴注第二彩膜材料，然后旋转硅基板600以使第二彩膜材料均匀涂覆在各个发光二极管显示面板区域的显示区101和周边区102以形成第二彩膜材料层。在形成的第一边框彩膜的外环的角为圆角时，旋涂第二彩膜材料的过程中，旋涂在各个发光二极管显示面板区域的显示区的第二彩膜材料的厚度比较均匀，从而可以防止后续显示过程中出现显示不均匀的现象。
S106：对第二色阻材料进行图案化以在显示区形成与第一色阻层至少部分不交叠的第二色阻层，在周边区形成围绕显示区的第二挡光结构。
例如，如图2C和图2D所示，在涂覆第二彩膜材料层以后，对第二彩膜材料层进行图案化，例如曝光和显影，以在显示区101形成与第一像素彩膜210至少部分不交叠的第二像素彩膜310(即第二色阻层)，在第一边框彩膜220上形成围绕显示区101的环形的第二边框彩膜320(即第二挡光结构)。
形成第二挡光结构包括：图案化第二色阻材料以使在垂直于第一挡光结构的延伸方向的方向上，第二挡光结构的宽度小于第一挡光结构的宽度以形成台阶结构。
相对于第一边框彩膜和第二边框彩膜的尺寸完全相同的情况，本公开实施例中，将第二边框彩膜的宽度形成为小于第一边框彩膜的宽度以形成台阶结构，可以在采用旋涂法形成后续彩膜层的过程中促进彩膜材料的流动，以进一步提高形成在显示区的像素彩膜的均匀度，防止后续显示过程中出现显示不均匀的现象。
例如，上述台阶结构可以位于第二边框彩膜靠近显示区的一侧，也可以位于第二边框彩膜远离显示区的一侧。或者，第二边框彩膜靠近显示区的一侧和远离显示区的一侧均设置有台阶结构以利于后续形成在显示区的像素彩膜的均匀度。本公开实施例提供的制作方法制作的第二像素彩膜具有图2C和图2D所示的第二像素彩膜相同的特征和效果，在此不再赘述。
例如，如图2C和图2D所示，第一边框彩膜220上形成的第二边框彩膜 320形状与第一边框彩膜220的形状可以相同。例如，第二边框彩膜320的外环的角也可以为圆角，从而采用旋涂法形成后续彩膜层的过程中，旋涂在显示区中的彩膜层的均匀度更好。
在一些示例中，如图2E和图2F所示，形成第二像素彩膜和第二边框彩膜以后，制作方法还包括：在第二像素彩膜310和第二边框彩膜320上采用旋涂法涂覆第三彩膜材料层。
例如，在第二边框彩膜320外侧的区域滴注第三彩膜材料(即第三色阻材料)，然后旋转硅基板600以使第三彩膜材料均匀涂覆在各个发光二极管显示面板区域的显示区101和周边区102以形成第三彩膜材料层。由于形成的第一边框彩膜和第二边框彩膜的外环的角为圆角，且第一边框彩膜和第二边框彩膜形成了台阶结构，所以旋涂第三彩膜材料的过程中，旋涂在各个发光二极管显示面板区域的显示区的第三彩膜材料的厚度比较均匀，从而可以防止后续显示过程中出现显示不均匀的现象。
例如，如图2E和图2F所示，在涂覆第三彩膜材料层以后，对第三彩膜材料层进行图案化，例如曝光和显影，以在显示区101形成与第一像素彩膜210和第二像素彩膜310至少部分不交叠的第三像素彩膜410(即第三色阻层)，在第二边框彩膜320上形成围绕显示区101的第三边框彩膜420(即第三挡光结构)。
例如，本公开实施例形成的第三像素彩膜和第三边框彩膜具有图2E和图2F所示的第三像素彩膜和第三边框彩膜相同的特征和效果，在此不再赘述。当然，本公开实施例形成的第三像素彩膜和第三边框彩膜也可以具有图2G和图2H所示的第三像素彩膜和第三边框彩膜相同的特征和效果，在此不再赘述。
本公开实施例的另一示例提供一种发光二极管显示面板的制作方法，参考图3A-图3E，与上一示例提供的制作方法不同之处在于，在形成第一彩膜材料层之前包括：在发光元件上采用旋涂法涂覆第四彩膜材料层，以及对第四彩膜材料层进行图案化以仅在显示区101形成第四像素彩膜510。本示例中的第四彩膜材料层与上一示例中的第三彩膜材料层为同一颜色彩膜材料层，但本示例中的第四彩膜材料层形成在第一彩膜层之前，且在周边区仅包括第一边框彩膜和第二边框彩膜这两层彩膜层。当然本公开实施例不限于此， 第四彩膜材料层也可以为与上一示例中的第三彩膜材料层不同颜色的彩膜材料层。
例如，在硅基板的发光二极管显示面板区域以外的位置滴注第四彩膜材料，通过旋转硅基板以使第四彩膜材料均匀流布于多个发光二极管显示面板区域中的发光元件上以形成厚度均匀的第四彩膜材料层。然后，对第四彩膜材料层进行前烘、曝光、显影以及后烘后，仅在显示区形成第四像素彩膜。
例如，在形成第四像素彩膜以后，在第四像素彩膜上采用旋涂法涂覆第一彩膜材料层，即在硅基板的发光二极管显示面板区域以外的位置滴注第一彩膜材料，通过旋转硅基板以使第一彩膜材料均匀流布于多个发光二极管显示面板区域中的周边区以及显示区(包括第四像素彩膜)以形成厚度均匀的第一彩膜材料层。然后，对第一彩膜材料层进行图案化以在显示区形成与第四像素彩膜至少部分不交叠的第一像素彩膜，在周边区形成围绕显示区的第一边框彩膜。本示例中形成的第一像素彩膜以及第一边框彩膜与上一示例提供的制作方法形成第一像素彩膜和第一边框彩膜具有相同的特征和效果，在此不再赘述。
例如，本示例提供的制作方法在形成第一像素彩膜和第一边框彩膜以后，形成的第二像素彩膜与上一示例中形成的第二像素彩膜具有相同的特征和效果，在此不再赘述。
例如，本示例提供的制作方法形成的第二边框彩膜不仅需要与第一边框彩膜的形状相同，还需要形成的第二边框彩膜在透明底层上的正投影与第一边框彩膜上在透明底层上的正投影至少完全重合以与第一边框彩膜共同起到遮光作用。
例如，在形成彩膜结构以后，本公开实施例提供的制作方法还包括在彩膜结构远离发光元件的一侧形成一层薄膜封装层。分别位于彩膜结构两侧的两层薄膜封装层可以实现发光元件的有效封装，实现对水汽、氧气等的有效阻挡，达到保护发光元件以及延长发光元件的使用寿命的目的。
例如，两层薄膜封装层可以均采用密封特性较好的有机材料或无机材料中的一种或者多种结合制作而成，以达到较好的密封作用，保护硅基有机发光二极管的发光元件。
例如，在彩膜结构远离发光元件的一侧形成一层薄膜封装层后，制作方 法还包括在薄膜封装层远离彩膜结构的一侧形成盖板，以实现保护彩膜结构的功能。
例如，盖板可以采用透明材料，例如透明材料可以为玻璃等无机材料或者聚酰亚胺等有机材料，例如，在本公开的实施例中，可以采用具有高透过率的素玻璃，本公开的实施例对此不做限定。
采用本公开实施例提供的制作方法制作的发光二极管显示面板的技术效果可以参考本公开的实施例中提供的彩膜结构的技术效果，这里不再赘述。
有以下几点需要说明：
(1)本公开的实施例附图中，只涉及到与本公开实施例涉及到的结构，其他结构可参考通常设计。
(2)在不冲突的情况下，本公开的同一实施例及不同实施例中的特征可以相互组合。
以上所述仅是本公开的示范性实施方式，而非用于限制本公开的保护范围，本公开的保护范围由所附的权利要求确定。

Claims (24)

  1. 一种发光二极管显示面板，包括：
    衬底基板，包括显示区和围绕所述显示区的周边区；
    多个子像素，位于所述显示区且位于所述衬底基板的一侧，所述多个子像素中的至少一个包括：
    发光元件，包括依次层叠的第一电极、发光功能层和第二电极，所述第一电极比所述第二电极更靠近所述衬底基板；
    驱动电路，位于所述发光元件和所述衬底基板之间，所述驱动电路包括驱动晶体管和存储电容，所述驱动晶体管包括源极、漏极和栅极，所述源极和所述漏极之一与所述第一电极耦接，所述栅极与所述存储电容耦接，所述存储电容被配置为存储数据信号；
    色阻层，位于所述第二电极远离所述衬底基板的一侧，所述发光元件发出的光线通过所述色阻层射出；以及
    挡光结构，位于所述周边区，且为围绕所述多个子像素的环形结构；
    其中，所述挡光结构包括第一挡光结构和第二挡光结构，所述第二挡光结构位于所述第一挡光结构远离所述衬底基板的一侧，所述第二挡光结构在所述衬底基板的第二正投影位于所述第一挡光结构在所述衬底基板的第一正投影中，且所述第一正投影与所述第二正投影不完全重合。
  2. 根据权利要求1所述的发光二极管显示面板，其中，所述第一挡光结构的边缘的至少一部分没有被所述第二挡光结构覆盖。
  3. 根据权利要求2所述的发光二极管显示面板，其中，所述第一挡光结构的内边缘和外边缘均没有被所述第二挡光结构覆盖。
  4. 根据权利要求1-3任一项所述的发光二极管显示面板，其中，所述第一挡光结构的外轮廓包括沿第一方向延伸的第一边和沿第二方向延伸的第二边，所述第一方向与所述第二方向相交，且所述第一边和所述第二边通过弧形边连接，所述弧形边向远离所述显示区的方向弯曲。
  5. 根据权利要求4所述的发光二极管显示面板，其中，所述弧形边包括圆角，所述第一挡光结构的外轮廓为圆角矩形。
  6. 根据权利要求5所述的发光二极管显示面板，其中，包括所述弧形边 的圆形与所述第一边或所述第二边相切。
  7. 根据权利要求1-6任一项所述的发光二极管显示面板，其中，所述第一挡光结构的形状为闭合的环形。
  8. 根据权利要求1-7任一项所述的发光二极管显示面板，其中，所述第二挡光结构的形状为闭合的环形。
  9. 根据权利要求1-8任一项所述的发光二极管显示面板，其中，所述第二挡光结构的形状与所述第一挡光结构的形状相同，且所述第二正投影的面积小于所述第一正投影的面积。
  10. 根据权利要求1-9任一项所述的发光二极管显示面板，其中，所述色阻层包括与所述多个子像素一一对应的多个子色阻层，相邻的所述多个子色阻层至少部分不交叠，所述多个子色阻层包括多个第一子色阻层，且所述多个第一子色阻层与所述第一挡光结构同层设置且材料相同。
  11. 根据权利要求10所述的发光二极管显示面板，其中，所述多个子色阻层还包括多个第二子色阻层，所述多个第二子色阻层与所述第二挡光结构同层设置且材料相同。
  12. 根据权利要求10或11所述的发光二极管显示面板，其中，所述挡光结构还包括第三挡光结构，所述第三挡光结构位于所述第二挡光结构远离所述第一挡光结构的一侧。
  13. 根据权利要求12所述的发光二极管显示面板，其中，所述第三挡光结构在所述衬底基板上的正投影与所述第一正投影完全重合。
  14. 根据权利要求12所述的发光二极管显示面板，其中，所述第三挡光结构在所述衬底基板上的正投影位于所述第二正投影内。
  15. 根据权利要求12-14任一项所述的发光二极管显示面板，其中，所述多个子色阻层还包括多个第三子色阻层，所述多个第三子色阻层与所述第三挡光结构同层设置且材料相同。
  16. 根据权利要求15所述的发光二极管显示面板，其中，所述第一子色阻层、所述第二子色阻层以及所述第三子色阻层为不同颜色的彩膜层。
  17. 根据权利要求1-16任一项所述的发光二极管显示面板，其中，所述挡光结构覆盖部分所述第二电极。
  18. 根据权利要求1-17任一项所述的发光二极管显示面板，还包括：
    位于所述周边区的感测区，且所述感测区在所述衬底基板上的正投影位于所述第一正投影内。
  19. 根据权利要求1-18任一项所述的发光二极管显示面板，其中，所述衬底基板为硅基板。
  20. 根据权利要求19所述的发光二极管显示面板，其中，所述驱动晶体管的至少一部分位于所述硅基板中。
  21. 根据权利要求1-20任一项所述的发光二极管显示面板，其中，所述色阻层面向所述衬底基板的一侧设置有第一薄膜封装层，且所述色阻层远离所述衬底基板的一侧设置有第二薄膜封装层。
  22. 一种制作权利要求1-21任一项所述的发光二极管显示面板的制作方法，包括：
    提供所述衬底基板；
    在所述衬底基板上的所述显示区形成所述发光元件；
    在所述发光元件上涂覆第一色阻材料；
    对所述第一色阻材料进行图案化以在所述显示区形成第一色阻层，在所述周边区形成围绕所述显示区的第一挡光结构；
    在所述第一色阻层和所述第一挡光结构上涂覆第二色阻材料；以及
    对所述第二色阻材料进行图案化以在所述显示区形成与所述第一色阻层至少部分不交叠的第二色阻层，在所述周边区形成围绕所述显示区的所述第二挡光结构，
    其中，形成所述第二挡光结构包括：图案化所述第二色阻材料以使所述第二正投影位于所述第一正投影中，且所述第一正投影与所述第二正投影不完全重合。
  23. 根据权利要求22所述的制作方法，其中，形成所述第一挡光结构包括：
    图案化所述第一色阻材料以使所述第一挡光结构的外轮廓包括沿第一方向延伸的第一边和沿第二方向延伸的第二边，所述第一方向与所述第二方向相交，且所述第一边和所述第二边通过弧形边连接，所述弧形边向远离所述显示区的方向弯曲。
  24. 一种有机发光二极管显示装置，包括权利要求1-21任一项所述的发 光二极管显示面板。
PCT/CN2019/102288 2019-08-23 2019-08-23 发光二极管显示面板及其制作方法、显示装置 Ceased WO2021035401A1 (zh)

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US16/959,480 US11515511B2 (en) 2019-08-23 2019-08-23 Light-emitting diode display panel including plurality of annular light-shielding structures surrounding sub-pixels, and manufacturing method thereof
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