WO2021184172A1 - 一种绝缘栅双极型晶体管、电机控制器及汽车 - Google Patents

一种绝缘栅双极型晶体管、电机控制器及汽车 Download PDF

Info

Publication number
WO2021184172A1
WO2021184172A1 PCT/CN2020/079555 CN2020079555W WO2021184172A1 WO 2021184172 A1 WO2021184172 A1 WO 2021184172A1 CN 2020079555 W CN2020079555 W CN 2020079555W WO 2021184172 A1 WO2021184172 A1 WO 2021184172A1
Authority
WO
WIPO (PCT)
Prior art keywords
layer
bipolar transistor
electrode
insulated gate
gate bipolar
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2020/079555
Other languages
English (en)
French (fr)
Inventor
黄伯宁
张泉
杨文韬
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Huawei Technologies Co Ltd
Original Assignee
Huawei Technologies Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Huawei Technologies Co Ltd filed Critical Huawei Technologies Co Ltd
Priority to JP2022556190A priority Critical patent/JP7486599B2/ja
Priority to PCT/CN2020/079555 priority patent/WO2021184172A1/zh
Priority to EP20926062.9A priority patent/EP4109559A4/en
Priority to CN202080064553.7A priority patent/CN114402443A/zh
Publication of WO2021184172A1 publication Critical patent/WO2021184172A1/zh
Priority to US17/946,111 priority patent/US12513925B2/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/64Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66Vertical DMOS [VDMOS] FETs
    • H10D30/668Vertical DMOS [VDMOS] FETs having trench gate electrodes, e.g. UMOS transistors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/411Insulated-gate bipolar transistors [IGBT]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/411Insulated-gate bipolar transistors [IGBT]
    • H10D12/441Vertical IGBTs
    • H10D12/461Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions
    • H10D12/481Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions having gate structures on slanted surfaces, on vertical surfaces, or in grooves, e.g. trench gate IGBTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H10D62/109Reduced surface field [RESURF] PN junction structures
    • H10D62/111Multiple RESURF structures, e.g. double RESURF or 3D-RESURF structures
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/393Body regions of DMOS transistors or IGBTs 
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/20Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/23Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
    • H10D64/231Emitter or collector electrodes for bipolar transistors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/20Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/23Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
    • H10D64/232Emitter electrodes for IGBTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/20Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/281Base electrodes for bipolar transistors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/101Integrated devices comprising main components and built-in components, e.g. IGBT having built-in freewheel diode
    • H10D84/141VDMOS having built-in components
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02PCONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
    • H02P25/00Arrangements or methods for the control of AC motors characterised by the kind of AC motor or by structural details
    • H02P25/16Arrangements or methods for the control of AC motors characterised by the kind of AC motor or by structural details characterised by the circuit arrangement or by the kind of wiring
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/13Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
    • H10D62/141Anode or cathode regions of thyristors; Collector or emitter regions of gated bipolar-mode devices, e.g. of IGBTs
    • H10D62/142Anode regions of thyristors or collector regions of gated bipolar-mode devices

Definitions

  • This application relates to the field of electrical technology, in particular to an insulated gate bipolar transistor, a motor controller and an automobile.
  • An electric vehicle MCU Motor Control Unit, motor controller
  • IGBT Insulated Gate Bipolar Transistor, insulated gate bipolar transistor
  • DC direct current
  • AC alternating current
  • IGBT is a composite fully controlled voltage-driven power semiconductor device composed of MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) and BJT (bipolar transistor). It has the high performance of MOSFET.
  • MOSFET Metal-Oxide-Semiconductor Field-Effect Transistor
  • BJT bipolar transistor
  • RC-IGBT Reverse-Conduction Insulated Gate Bipolar Transistor, reverse-conducting IGBT
  • the MCU of electric vehicles works at light load most of the time.
  • the control chip cannot accurately control the working mode of the switching element according to the working state of the MCU, which affects the further improvement of the conversion efficiency of the MCU.
  • the present application provides an insulated gate bipolar transistor, a motor controller, and an automobile, which are used to improve the control effect of the insulated gate bipolar transistor.
  • an insulated gate bipolar transistor is provided, and the insulated gate bipolar transistor is used in a motor controller.
  • the laminated multilayer structure of insulated gate bipolar transistors includes: laminated IGBT device structure feature layer, SJ device structure feature layer and RC-IGBT device structure feature layer, the IGBT device structure feature layer and RC-IGBT device Structural feature layers are arranged on both sides of the SJ device structure feature layer; wherein, the RC-IGBT device structure feature layer includes a collector and a drain provided in the same layer; the insulated gate bipolar transistor also includes The first metal electrode is stacked and electrically connected to the collector, and the second metal electrode is stacked and electrically connected to the drain, and the first metal electrode is electrically isolated from the second metal electrode.
  • the first metal electrode and the second metal electrode can be connected to the collector and the drain respectively, and the collector and the drain can be powered separately, thereby increasing the power supply mode of the insulated gate bipolar transistor and improving the insulation. Control method of gate bipolar transistor.
  • the SJ device structure feature layer includes a drift layer, a super junction structure layer, and a buffer layer that are stacked; wherein the super junction structure layer is located between the drift layer and the buffer layer.
  • the drift layer is connected to the characteristic layer of the IGBT device structure; the buffer layer is connected to the collector and the drain.
  • the buffer layer is an N-type buffer layer.
  • the drift layer is an N-drift layer.
  • the super junction structure layer has multiple N-drift layers and multiple P-drift layers, and the multiple N-drift layers and the multiple P-drift layers are along the first The directions are arranged alternately; wherein, the first direction is perpendicular to the second direction;
  • the second direction is the direction in which the characteristic layer of the IGBT device structure and the characteristic layer of the SJ device structure are stacked.
  • the characteristic layer of the IGBT device structure includes:
  • the first metal electrode is separated from the second metal electrode by a predetermined distance.
  • the number of the collectors is more than one, and the number of the drains is more than one; and the plurality of collectors and the plurality of drains are alternately arranged.
  • the first metal electrode corresponds to the collector electrode one-to-one
  • the second metal electrode corresponds to the drain electrode one-to-one
  • any adjacent first metal electrode and second metal electrode are electrically isolated.
  • a motor controller in a second aspect, includes a power module and the insulated gate bipolar transistor of any one of the above connected to the power module.
  • the first metal electrode and the second metal electrode can be connected to the collector and the drain respectively, and the collector and the drain can be powered separately, thereby increasing the power supply mode of the insulated gate bipolar transistor and improving the insulation. Control method of gate bipolar transistor.
  • an automobile in a third aspect, includes a motor and any one of the above-mentioned motor controllers connected to the motor.
  • the first metal electrode and the second metal electrode can be connected to the collector and the drain respectively, and the collector and the drain can be powered separately, thereby increasing the power supply mode of the insulated gate bipolar transistor and improving the insulation. Control method of gate bipolar transistor.
  • FIG. 1 is a cross-sectional view of an insulated gate bipolar transistor provided by an embodiment of the application
  • FIG. 2 is a driving voltage corresponding to the working mode of an insulated gate bipolar transistor provided by an embodiment of the application;
  • Figure 3 is a partial enlarged view of A in Figure 2;
  • FIG. 4 is another top view of an insulated gate bipolar transistor provided by an embodiment of the application.
  • Fig. 5 is a structural block diagram of a motor controller provided by an embodiment of the application.
  • Fig. 6 is a structural block diagram of motor control in an automobile provided by an embodiment of the application.
  • the insulated gate bipolar transistors provided by the embodiments of the present application are used in motor controllers.
  • an MCU Motor Control Unit, motor controller
  • IGBT Insulated Gate Bipolar Transistor, insulated gate bipolar transistor
  • the switching element converts the direct current (DC) output by the battery into alternating current (AC) to drive the motor.
  • IGBT is a composite fully controlled voltage-driven power semiconductor device composed of MOSFET (Metal Oxide Semiconductor Field Effect Transistor) and BJT (Bipolar Transistor).
  • IGBT In an electric vehicle inverter, IGBT needs to be used in conjunction with FRD. In order to reduce the overall loss of switching elements and improve the conversion efficiency of MCU, device designers integrate IGBT and FRD chip, and propose RC-IGBT structure, so that the device has a faster turn-off speed and a better Vcesat-Eoff trade-off relationship. .
  • RC-IGBT and SJ-RC-IGBT are used as switching elements, and none of the control chips can accurately control the working mode of the switching elements according to the working state of the MCU. For this reason, the embodiment of the present application provides an insulated gate double Polar transistor. This will be described below in conjunction with specific drawings.
  • FIG. 1 shows a cross-sectional view of an insulated gate bipolar transistor provided by an embodiment of the present application.
  • the insulated bipolar transistor mainly includes three parts of the structure: an IGBT device structure feature layer 10, an SJ device structure feature layer 20, and an RC-IGBT device structure feature layer 30.
  • the IGBT device structure feature layer 10, the SJ device structure feature layer 20, and the RC-IGBT device structure feature layer 30 are stacked in the vertical direction in FIG. 1, and the IGBT device structure feature layer 10 and the RC-IGBT device structure feature layer 30 are divided into layers. They are listed on both sides of the feature layer 20 of the SJ device structure.
  • the second direction b is the direction in which the IGBT device structure feature layer 10 and the SJ device structure feature layer 20 are stacked, and the first direction a is perpendicular to the second direction b.
  • the SJ device structure feature layer 20 mainly includes a stacked drift layer 3, a super junction structure layer, and a buffer layer 11; the super junction structure layer is located between the drift layer 3 and the buffer layer 11, and the buffer layer 11 is N-type buffer layer.
  • a super junction structure and a drift layer 3 are formed on the first surface of the buffer layer 11.
  • the super junction structure includes a plurality of N-drift layers 1 and a plurality of P-drift layers 2, and the plurality of N-drift layers 1 and the plurality of P-drift layers 2 are alternately arranged along the first direction a.
  • the N-drift layer 1 and the P-drift layer 2 are formed by implantation, diffusion, and epitaxial growth processes, and the thickness of the N-drift layer 1 and the P-drift layer 2 are both set to L1.
  • the drift layer 3 on the super junction structure is an N-drift layer, and the drift layer 3 is formed on the side of the super junction structure away from the buffer layer 11.
  • the feature layer 10 of the IGBT device structure is connected to the drift layer 3.
  • the characteristic layer 10 of the IGBT device structure includes: a P base layer 4 stacked with the drift layer 3 along the first direction a, and a front emitter electrode 10 stacked with the P base layer 4; penetrating the P base layer 4 and inserted into The multiple gate electrodes 8 of the N-drift layer 3, the insulating gate film 7 that wraps each gate electrode 8, and the interlayer insulating film 9 that insulates each gate electrode 8 from the front emitter electrode 10; The N emitter layer 5 and the P+ contact layer 6 formed on the surface of the P base layer 4.
  • a P base layer 4 is formed on the drift layer 3, and an N emitter layer 5 and a P+ contact layer 6 are formed on the surface of the P base layer 4.
  • a trench is formed from the surface of the N emitter layer 5 through the P base layer 4 to approach the drift layer 3, and a gate electrode 8 is formed in the trench via an insulating gate film 7, wherein the insulating gate
  • the film 7 is a gate oxide layer, and the gate electrode 8 can be a polysilicon gate.
  • a front emitter electrode 10 is formed on the P+ contact layer 6, and the gate electrode 8 and the front emitter electrode 10 are insulated by an interlayer insulating film 9.
  • the characteristic layer 30 of the RC-IGBT device structure includes a collector electrode 12 and a drain electrode 13 arranged in the same layer.
  • a collector electrode 12 and a drain electrode 13 are formed on the second surface of the buffer layer 11 along the first direction a in FIG. 1.
  • a first metal electrode 15 and a second metal electrode 14 are formed on the back of the collector electrode 12 and the drain electrode 13, wherein the first metal electrode 15 is stacked and electrically connected to the collector electrode 12, and the second metal electrode 14 and the drain electrode 13 are stacked and It is electrically connected, and the first metal electrode 15 and the second metal electrode 14 are electrically isolated.
  • the ohmic contact between the first metal electrode 15 and the collector electrode 12 is used to ensure the electrical connection effect between the first metal electrode 15 and the collector electrode 12.
  • the first metal electrode 15 and the collector electrode 12 are in ohmic contact.
  • the electrical connection can be achieved by welding, or by directly forming the first metal electrode 15 on the collector 12.
  • the ohmic contact between the second metal electrode 14 and the drain electrode 13 is used to ensure the electrical connection effect between the second metal electrode 14 and the drain electrode 13.
  • the second metal electrode 14 and the drain electrode 13 can be welded.
  • the second metal electrode 14 is directly formed on the drain 13 to achieve electrical connection.
  • the set distance as shown in FIG. 1 refers to the horizontal distance L2 in the first direction a between the ends of the first metal electrode 15 and the second metal electrode 14 close to each other.
  • the value of L2 can be determined according to the actual design, and is not specifically limited in this application, as long as the isolation between the first metal electrode 15 and the second metal electrode 14 can be ensured.
  • the first metal electrode 15 can be used to cover the collector electrode 12 and have the same area as the collector electrode 12.
  • the second metal electrode 14 covers the drain 13 and has an area smaller than that of the drain 13, or the first metal electrode 15 covers the collector 12 and has an area smaller than the collector 12, and the second metal electrode 14 covers the drain 13 and has the same area as the drain;
  • the first metal electrode 15 may be used to cover the collector electrode 12 and the area is smaller than that of the collector electrode 12, and the second metal electrode 14 may cover the drain electrode 13 and the area is smaller than the drain electrode 13.
  • the operation of the insulated gate bipolar transistor will be described. If a positive voltage greater than or equal to the threshold value Vth is applied to the gate electrode 8, the area of the P base layer 4 between the N emitter layer 5 and the N-drift layer 3 is inverted to the N type, and electrons from the N emitter The layer 5 is injected into the drift layer 3, and the insulated gate bipolar transistor is turned on.
  • the collector 12 voltage that causes the PN junction of the collector 12 and the type buffer layer 11 to be forward biased or higher is applied to the first metal electrode 15 and the second metal electrode 14, holes
  • the first metal electrode 15 is injected into the drift layer 3 to generate conductivity modulation, and the resistance values of the N-drift layer 1 and the P-drift layer 2 of the super junction structure are drastically reduced, so they have sufficient current-carrying capacity.
  • the depletion layer (super junction structure) of the insulated gate bipolar transistor in this embodiment moves from the P base layer 4 on the surface to the drift layer 3 and the N-drift layer 1/P-drift layer 2 Extend, the super junction structure will be completely depleted, so that the withstand voltage can be maintained.
  • Insulated gate bipolar transistors mainly have three operating modes: FRD, MOSFET and IGBT.
  • FRD the three operating modes of insulated gate bipolar transistors will be explained.
  • Figure 2 shows the three operating modes corresponding to the insulated gate bipolar transistor in operation
  • Figure 3 shows the partial enlarged view at a in Figure 2; among them, 1 represents FRD mode, 2 represents MOSFET mode, and 3 represents IGBT mode.
  • 1 represents FRD mode
  • 2 represents MOSFET mode
  • IGBT mode IGBT mode.
  • the insulated gate bipolar transistor When the voltage reaches VSB, the insulated gate bipolar transistor quickly changes from the MOSFET mode to the IGBT mode, and stays in the MOSFET mode for a very short time.
  • the MCU works at light load most of the time, which makes the MCU hope that the switching element (insulated gate bipolar transistor) of the inverter will work in MOSFET mode more often, and the MCU also hopes that the insulated gate double Polar transistors can quickly switch to IGBT mode. Therefore, from the perspective of improving the efficiency of the MCU, the MCU hopes to more accurately control the operating mode of the switching element.
  • the insulated gate bipolar transistor provided by the embodiment of the present application also provides another power supply mode: only the first metal electrode 15 or only the second metal electrode 14 is powered. It can be seen from the above-mentioned structure of the insulated gate bipolar transistor that the first metal electrode 15 is only electrically connected to the collector 12, the second metal electrode 14 is only electrically connected to the drain 13, and the first metal electrode 15 is electrically connected to the In the structure of electrical isolation between the second metal electrodes 14, the backside of the insulated gate bipolar transistor is divided into two areas by the electrical isolation between the first metal electrode 15 and the second metal electrode 14: the IGBT area and the MOSFET area .
  • power can be supplied to the IGBT area and the MOSFET area respectively to control the insulated gate bipolar transistor.
  • the insulated gate bipolar transistor can realize the IGBT mode and the MOSFET mode;
  • the metal electrode 14 is powered, only the drain 13 is turned on, and the collector 12 is not.
  • the insulated gate bipolar transistor can realize the FRD mode and the MOSFET mode.
  • the MCU is lightly loaded, only the second metal electrode 14 can be powered.
  • the MCU can work in MOSFET mode for a long time; when the MCU is heavily loaded, it can supply power to the first metal electrode 15 and the second metal electrode 14 at the same time.
  • the MCU can switch between MOSFET mode and IGBT mode. It can be seen from the above description that the MCU can accurately control the working mode of the device through the two metal electrodes on the back and the gate electrode 8. According to the power output requirements of the MCU, it is determined that the insulated gate bipolar transistor works in MOSFET mode. It still works in IGBT mode. Thus, the motor can be controlled more accurately.
  • the holes from the collector electrode 12 can be easily injected.
  • a small fast recovery voltage and small on-resistance can be achieved.
  • the N buffer layer 11 As a condition for reducing the rapid recovery voltage, it is necessary to make the N buffer layer 11 produce a voltage drop in the horizontal direction of FIG.
  • the potential difference is greater than or equal to 0.5V, preferably greater than or equal to 0.7V.
  • the repetitive pitch of the collector electrode 12 and the drain electrode 13 is greater than or equal to 5 times the repetitive pitch of the N-drift layer 1 and the P-drift layer 2 and less than 20000 times the repetitive pitch of the N-drift layer 1 and the P-drift layer 2 .
  • the insulated gate bipolar transistor provided by the embodiments of the present application can not only adopt the above-mentioned trench gate structure, but also a planar gate structure, as long as it can realize the device characteristics of an IGBT.
  • Figure 4 shows another insulated gate bipolar transistor, the number of collectors is multiple, the number of drains is multiple; and multiple collectors and multiple drains alternate arrangement.
  • the first metal electrode 15 corresponds to the collector electrode 12 one-to-one
  • the second metal electrode 15 corresponds to the drain one-to-one, and any adjacent first metal electrode 15 and second metal electrode 15 are electrically isolated.
  • the first metal electrodes 15 and the second metal electrodes 15 are alternately arranged along the first direction a.
  • the embodiment of the present application shown in FIG. 5 also provides a motor controller.
  • the motor controller includes a power module 200 and the insulated gate bipolar transistor 100 of any one of the above connected to the power module 200.
  • the motor controller can be used to control the work of the motor.
  • the MCU works at light load most of the time. This makes the MCU hope that the switching element (insulated gate bipolar transistor 100) of the inverter will work in MOSFET mode more often. When the MCU is fully loaded, it is hoped that the insulated gate bipolar transistor 100 can quickly switch to the IGBT mode. Therefore, the backside of the insulated gate bipolar transistor 100 is divided into two regions by the electrical isolation between the first metal electrode and the second metal electrode: the IGBT region and the MOSFET region.
  • the insulated gate bipolar transistor 100 When in use, power can be supplied to the IGBT area and the MOSFET area respectively to control the insulated gate bipolar transistor 100.
  • the insulated gate bipolar transistor 100 can implement the IGBT mode and the MOSFET mode; when only the second metal electrode is supplied When power is supplied, only the drain is turned on and the collector is not.
  • the insulated gate bipolar transistor 100 can implement the FRD mode and the MOSFET mode.
  • the MCU is under light load, it can only supply power to the second metal electrode.
  • the MCU can work in MOSFET mode for a long time; when the MCU is under heavy load, it can supply power to the first metal electrode and the second metal electrode at the same time. Can switch between MOSFET mode and IGBT mode. It can be seen from the above description that the MCU can accurately control the working mode of the device through the two metal electrodes on the back and the gate electrode. According to the power output requirements of the MCU, it is determined that the insulated gate bipolar transistor 100 works in MOSFET mode. It still works in IGBT mode. Thus, the motor can be controlled more accurately.
  • an embodiment of the present application provides a car, and the same reference numerals in FIG. 6 can refer to the description in FIG. 5.
  • the automobile includes a motor 400 and any one of the above-mentioned motor controllers 300 connected to the motor 400.
  • the motor controller 300 can be used to control the operation of the motor 400.
  • the MCU works at light load most of the time. This makes the MCU hope that the inverter's switching element (insulated gate bipolar transistor 100) will work in MOSFET mode more often , And the MCU hopes that the insulated gate bipolar transistor 100 can quickly switch to the IGBT mode when it is fully loaded.
  • the backside of the insulated gate bipolar transistor 100 is divided into two regions by the electrical isolation between the first metal electrode and the second metal electrode: the IGBT region and the MOSFET region.
  • power can be supplied to the IGBT area and the MOSFET area respectively to control the insulated gate bipolar transistor 100.
  • the insulated gate bipolar transistor 100 can implement the IGBT mode and the MOSFET mode; when only the second metal electrode is supplied When power is supplied, only the drain is turned on and the collector is not.
  • the insulated gate bipolar transistor 100 can implement the FRD mode and the MOSFET mode.
  • the MCU When the MCU is under light load, it can only supply power to the second metal electrode. At this time, the MCU can work in MOSFET mode for a long time; when the MCU is under heavy load, it can supply power to the first metal electrode and the second metal electrode at the same time. Can switch between MOSFET mode and IGBT mode. It can be seen from the above description that the MCU can accurately control the working mode of the device through the two metal electrodes on the back and the gate electrode. According to the power output requirements of the MCU, it is determined that the insulated gate bipolar transistor 100 works in MOSFET mode. It still works in IGBT mode. Thus, the motor 400 can be controlled more accurately.

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Inverter Devices (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

一种绝缘栅双极晶体管、电机控制器及汽车,绝缘栅双极晶体管包括:层叠设置三个器件结构特征层,其中,IGBT器件结构特征层(10)及RC-IGBT器件结构特征层(30)分列在SJ器件结构特征层(20)的两侧;其中,RC-IGBT器件结构特征层(30)包括同层设置的集电极(12)及漏极(13);绝缘栅双极晶体管还包括与集电极(12)层叠且电连接的第一金属电极(15)、与漏极(13)层叠且电连接的第二金属电极(14),且第一金属电极(15)与第二金属电极(14)之间电隔离。在上述方案中,第一金属电极(15)及第二金属电极(14)可分别与集电极(12)和漏极(13)连接,集电极(12)和漏极(13)可以分别供电,从而增加了绝缘栅双极晶体管的供电方式,进而改善了绝缘栅双极晶体管的控制方式。

Description

一种绝缘栅双极型晶体管、电机控制器及汽车 技术领域
本申请涉及电气技术领域,尤其涉及一种绝缘栅双极型晶体管、电机控制器及汽车。
背景技术
电动汽车MCU(Motor Control Unit,电机控制器)通常使用IGBT(Insulated Gate Bipolar Transistor,绝缘栅双极型晶体管)作为开关元件,将电池输出的直流电(DC)转化为交流电(AC)驱动电机。如何提升逆变器的转换效率,延长电池的使用时间,一直都是逆变器和功率半导体元件开发厂商努力的方向。
IGBT是由MOSFET(Metal-Oxide-Semiconductor Field-Effect Transistor,金属氧化物半导体场效应晶体管)和BJT(双极型晶体管)组成的复合全控型电压驱动式功率半导体器件,它兼有MOSFET的高输入阻抗和BJT的低导通压降两方面的优点,是一种适合于中、大功率应用的功率半导体器件。在电动汽车逆变器中,IGBT需要与FRD配套使用。为降低开关元件的总体损耗,提升MCU的转换效率,器件设计人员将IGBT与FRD进行芯片集成,提出RC-IGBT(Reverse-Conduction Insulated Gate Bipolar Transistor,逆导IGBT)结构,使器件拥有更快的关断速度,更好的Vcesat-Eoff折中关系。但是电动汽车MCU绝大部分时间工作在轻载状态。采用RC-IGBT和SJ-RC-IGBT作为开关元件,控制芯片均无法根据MCU的工作状态,精确控制开关元件的工作模式,从而影响了MCU转化效率进一步的提升。
发明内容
本申请提供一种绝缘栅双极型晶体管、电机控制器及汽车,用以改善绝缘栅双晶体管的控制效果。
第一方面,提供了一种绝缘栅双极型晶体管,绝缘栅双晶体管应用于电机控制器中。绝缘栅双极型晶体管层叠的多层结构,如包括:层叠设置的IGBT器件结构特征层、SJ器件结构特征层及RC-IGBT器件结构特征层,所述IGBT器件结构特征层及RC-IGBT器件结构特征层分列在所述SJ器件结构特征层的两侧;其中,所述RC-IGBT器件结构特征层包括同层设置的集电极及漏极;所述绝缘栅双极型晶体管还包括与所述集电极叠且电连接的第一金属电极、与所述漏极层叠且电连接的第二金属电极,且所述第一金属电极与所述第二金属电极之间电隔离。在上述方案中,第一金属电极及第二金属电极可分别与集电极和漏极连接,集电极和漏极可以分别供电,从而增加了绝缘栅双极型晶体管的供电方式,进而改善了绝缘栅双极型晶体管的控制方式。
在一个具体的可实施方案中,所述SJ器件结构特征层包括层叠设置的漂移层、超结结构层及缓冲层;其中,所述超结结构层位于所述漂移层与所述缓冲层之间;所述漂移层与所述IGBT器件结构特征层连接;所述缓冲层与所述集电极及所述漏极连接。
在一个具体的可实施方案中,所述缓冲层为N型缓冲层。
在一个具体的可实施方案中,所述漂移层为N-漂移层。
在一个具体的可实施方案中,所述超结结构层多个N-漂移层及多个P-漂移层,且所述多个N-漂移层及所述多个P-漂移层沿第一方向交替排列;其中,所述第一方向垂于与第二方向;
所述第二方向为所述IGBT器件结构特征层与所述SJ器件结构特征层层叠的方向。
在一个具体的可实施方案中,所述IGBT器件结构特征层包括:
栅极电极、栅氧化层、N+源极、P基极层、层间绝缘膜、P+接触层、正面发射极电极与所述漂移层层叠设置的P基极层;与所述P基极层层叠设置的正面发射极电极;
贯穿所述P基极层并插入到所述漂移层的多个栅极电极;包裹每个栅极电极的绝缘栅膜;将每个栅极电极与所述正面发射极电极绝缘的层间绝缘膜;设置在所述P基极层表面形成的N发射极层以及P+接触层。
在一个具体的可实施方案中,所述第一金属电极与所述集电极之间欧姆接触;和/或
所述第二金属电极与所述漏极之间欧姆接触。
在一个具体的可实施方案中,所述第一金属电极与所述第二金属电极间隔设定距离。
在一个具体的可实施方案中,所述集电极的个数为多个,所述漏极的个数为多个;且所述多个集电极和所述多个漏极交替排列。
在一个具体的可实施方案中,所述第一金属电极与所述集电极一一对应,所述第二金属电极与所述漏极一一对应,且任意相邻的第一金属电极及第二金属电极之间电隔离。
第二方面,提供了一种电机控制器,电机控制器包括电源模块以及与所述电源模块连接的上述任意一项所述的绝缘栅双极型晶体管。在上述方案中,第一金属电极及第二金属电极可分别与集电极和漏极连接,集电极和漏极可以分别供电,从而增加了绝缘栅双极型晶体管的供电方式,进而改善了绝缘栅双极型晶体管的控制方式。
第三方面,提供了一种汽车,该汽车包括电机,以及与电机连接的上述任一项的电机控制器。在上述方案中,第一金属电极及第二金属电极可分别与集电极和漏极连接,集电极和漏极可以分别供电,从而增加了绝缘栅双极型晶体管的供电方式,进而改善了绝缘栅双极型晶体管的控制方式。
附图说明
图1为本申请实施例提供的绝缘栅双极型晶体管的剖视图;
图2为本申请实施例提供的绝缘栅双极型晶体管的工作模式对应的驱动电压;
图3为图2中的A处局部放大图;
图4为本申请实施例提供的绝缘栅双极型晶体管的另一俯视图;
图5为本申请实施例提供的电机控制器的结构框图;
图6为本申请实施例提供的汽车中的电机控制的结构框图。
具体实施方式
为了使本申请的目的、技术方案和优点更加清楚,下面将结合附图对本申请作进一步地详细描述。
首先说明一下本申请实施例提供的绝缘栅双极型晶体管的应用场景。本申请实施例提供的绝缘栅双极型晶体管应用于电机控制器中,如电动汽车的MCU(Motor Control Unit, 电机控制器)通常使用IGBT(Insulated Gate Bipolar Transistor,绝缘栅双极型晶体管)作为开关元件,将电池输出的直流电(DC)转化为交流电(AC)驱动电机。IGBT是由MOSFET(金属氧化物半导体场效应晶体管)和BJT(双极型晶体管)组成的复合全控型电压驱动式功率半导体器件,它兼有MOSFET的高输入阻抗和BJT的低导通压降两方面的优点,是一种适合于中、大功率应用的功率半导体器件。在电动汽车逆变器中,IGBT需要与FRD配套使用。为降低开关元件的总体损耗,提升MCU的转换效率,器件设计人员将IGBT与FRD进行芯片集成,提出RC-IGBT结构,使器件拥有更快的关断速度,更好的Vcesat-Eoff折中关系。但是现有技术中采用RC-IGBT和SJ-RC-IGBT作为开关元件,控制芯片均无法根据MCU的工作状态,精确控制开关元件的工作模式,为此本申请实施例提供了一种绝缘栅双极型晶体管。下面结合具体的附图对其进行说明。
图1示出了本申请实施例提供的绝缘栅双极型晶体管的剖视图。
本申请实施例提供的绝缘涮双极型晶体管主要包含三部分结构:IGBT器件结构特征层10、SJ器件结构特征层20及RC-IGBT器件结构特征层30。IGBT器件结构特征层10、SJ器件结构特征层20及RC-IGBT器件结构特征层30沿图1中的竖直方向层叠设置,并且IGBT器件结构特征层10及RC-IGBT器件结构特征层30分列在SJ器件结构特征层20的两侧。
为方便描述,定义了第一方向a和第二方向b,第二方向b为IGBT器件结构特征层10与SJ器件结构特征层20层叠的方向,第一方向a垂直于第二方向b。
继续参考图1,SJ器件结构特征层20主要包括层叠设置的漂移层3、超结结构层及缓冲层11;超结结构层位于漂移层3与缓冲层11之间,其中的缓冲层11为N型缓冲层。在制备时,在缓冲层11的第一表面形成超结结构及漂移层3。超结结构包括多个N-漂移层1及多个P-漂移层2,多个N-漂移层1及多个P-漂移层2沿第一方向a交替排列。N-漂移层1及P-漂移层2是利用注入、扩散、外延生长工序而形成的,N-漂移层1和P-漂移层2的厚度均设为L1。超结结构上的漂移层3为N-漂移层,且漂移层3形成在超结结构背离缓冲层11的一面。
IGBT器件结构特征层10与漂移层3连接。IGBT器件结构特征层10包括:与漂移层3沿第一方向a层叠设置的P基极层4,与P基极层4层叠设置的正面发射极电极10;贯穿P基极层4并插入到N-漂移层3的多个栅极电极8,以及包裹每个栅极电极8的绝缘栅膜7、将每个栅极电极8与正面发射极电极10绝缘的层间绝缘膜9;设置在P基极层4表面形成的N发射极层5以及P+接触层6。在具体制备时,在漂移层3上形成P基极层4,在P基极层4的表面形成N发射极层5以及P+接触层6。此外,从N发射极层5的表面贯穿P基极层4而至接近漂移层3的中途为止形成沟槽,在该沟槽内隔着绝缘栅膜7而形成栅极电极8,其中绝缘栅膜7为栅极氧化层,栅极电极8可采用多晶硅栅极。在P+接触层6上形成正面发射极电极10,栅极电极8和正面发射极电极10利用层间绝缘膜9而绝缘。
继续参考图1,RC-IGBT器件结构特征层30包括同层设置的集电极12及漏极13。具体制备时,在缓冲层11的第二表面沿图1中的第一方向a形成集电极12及漏极13。在集电极12和漏极13的背面形成第一金属电极15和第二金属电极14,其中,第一金属电极15与集电极12叠且电连接,第二金属电极14与漏极13层叠且电连接,并且第一金属电极15与第二金属电极14之间电隔离。
在具体制备时,第一金属电极15与集电极12之间欧姆接触,以保证第一金属电极15与集电极12之间的电连接效果,具体的,第一金属电极15与集电极12之间具体可通过焊接,或者在集电极12上直接形成第一金属电极15的方式实现电连接。第二金属电极14与漏极13之间欧姆接触,以保证第二金属电极14与漏极13之间的电连接效果,具体的,第二金属电极14与漏极13之间具体可通过焊接,或者在漏极13上直接形成第二金属电极14的方式实现电连接。
为保证第一金属电极15与第二金属电极14之间的电隔离,第一金属电极15与第二金属电极14之间间隔有设定距离,以保证第一金属电极15与第二金属电极14之间的隔离度。如图1中所示设定距离指代的是,第一金属电极15与第二金属电极14相互靠近的端部之间在第一方向a的水平距离L2。L2的数值可以根据实际设计而定,在本申请不做具体限定,只需能够保证第一金属电极15与第二金属电极14之间的隔离度即可。
在具体实现第一金属电极15和第二金属电极14之间隔离时,可以采用不同的方式,示例性的,可以采用第一金属电极15覆盖集电极12并与集电极12的面积相等,第二金属电极14覆盖漏极13且面积小于漏极13;或者采用第一金属电极15覆盖集电极12且面积小于集电极12,第二金属电极14覆盖漏极13并与漏极的面积相等;或者还可采用第一金属电极15覆盖集电极12且面积小于集电极12,第二金属电极14覆盖漏极13且面积小于漏极13。
对绝缘栅双极型晶体管的动作进行说明。如果对栅极电极8施加大于或等于阈值Vth的正电压,则位于N发射极层5和N-漂移层3之间的P基极层4的区域反转为N型,电子从N发射极层5向漂移层3注入,绝缘栅双极型晶体管正向导通。在已导通的状态下,如果将使集电极12和型缓冲层11的PN结发生正向偏压以上的集电极12电压施加至第一金属电极15和第二金属电极14,则空穴从第一金属电极15注入至漂移层3而产生电导调制,超结结构的N-漂移层1和P-漂移层2的电阻值急剧降低,因此具有充分的通电能力。
此外,如果对栅极电极8施加负偏压,并在正面发射极电极10和金属电极(第一金属电极15和第二金属电极14)之间施加规定的电压(正面发射极电极10<背面集电极12),则本实施例中的绝缘栅双极型晶体管的耗尽层(超结结构)从表面的P基极层4朝向漂移层3以及N-漂移层1/P-漂移层2延伸,超结结构将完全耗尽,从而能够保持耐压。
绝缘栅双极型晶体管主要有FRD、MOSFET和IGBT三种工作模式,结合图2及图3来说明一下绝缘栅双极型晶体管的三种工作模式。图2示出了绝缘栅双极型晶体管在工作时对应的三种工作模式,图3示出了图2中a处的局部放大图;其中,①代表FRD模式、②代表MOSFET模式、③代表IGBT模式。由图2及图3可以看到,在第一金属电极15和第二金属电极14同时供电时,绝缘栅双极型晶体管在栅极沟道开通后,背面在开始阶段并没有空穴注入,因此绝缘栅双极型晶体管首先是工作在MOSFET模式,当电压达到VSB之后,绝缘栅双极型晶体管迅速由MOSFET模式进入到IGBT模式,在MOSFET模式停留非常短暂。而MCU绝大多数时间工作在轻载状态,这使得MCU希望逆变器的开关元件(绝缘栅双极型晶体管)更多的时候是工作在MOSFET模式,而MCU在满载时又希望绝缘栅双极型晶体管又能够迅速切换到IGBT模式。因此,从效率提升MCU效率的角度来说,MCU希望能够更为准确地控制开关元件的工作模式。
为此,本申请实施例提供的绝缘栅双极型晶体管还提供了另外的供电方式模式:仅给第一金属电极15或仅给第二金属电极14供电。由上述中绝缘栅双极型晶体管的结构可看 出,在采用第一金属电极15仅与集电极12电连接,第二金属电极14仅与漏极13电连接,并且第一金属电极15与第二金属电极14之间电隔离的结构时,通过第一金属电极15与第二金属电极14之间的电隔离将绝缘栅双极型晶体管的背面划分为两个区域:IGBT区和MOSFET区。在使用时可对IGBT区和MOSFET区分别供电来控制绝缘栅双极型晶体管。示例性的,在仅给第一金属电极15供电时,仅集电极12导通,漏极13不导通,此时绝缘栅双极型晶体管可实现IGBT模式和MOSFET模式;在仅给第二金属电极14供电时,则仅漏极13导通,集电极12不导通,此时绝缘栅双极型晶体管可实现FRD模式和MOSFET模式。在MCU轻载时,可仅给第二金属电极14供电,此时MCU可长时间工作在MOSFET模式;在MCU重载时,可同时跟第一金属电极15及第二金属电极14供电,此时,MCU可以在MOSFET模式和IGBT模式之间切换。由上述描述可以看出,MCU能够通过背面的这两个金属电极配合栅极电极8对器件的工作模式进行精确控制,根据MCU功率输出的需求,决定绝缘栅双极型晶体管是工作在MOSFET模式还是工作在IGBT模式。从而可以更精准的控制电机。
作为一个可选的实施方案,通过使集电极12的宽度大于漏极13的宽度,从而能够容易进行来自集电极12的空穴的注入。能够实现小的快速恢复电压和小的导通电阻。作为减小快速恢复电压的条件,需要在快速恢复峰值电压时的电流密度中,使N缓冲层11在图1的水平方向产生压降,使得集电极12的中间点和漏极13之间的电位差成为大于或等于0.5V,优选大于或等于0.7V。通过为了满足上述条件而将集电极12的宽度(图1的第一方向a)取得较大,从而来自第一金属电极15的空穴的注入变容易。因此,成为快速恢复电压较小,并且导通电阻较小的MOSFET的特性。此外,能够将MOSFET动作范围取得较大。
此外,集电极12和漏极13的重复间距越大,能够使快速恢复电压越小。优选集电极12和漏极13的重复间距大于或等于N-漂移层1和P-漂移层2的重复间距的5倍而小于N-漂移层1和P-漂移层2的重复间距的20000倍。
作为一个变形实施例,本申请实施例提供的绝缘栅双极型晶体管不仅可以采用上述的沟槽栅结构,也可以是平面栅结构,只需要能够实现IGBT的器件特征即可。
如图4所示,图4示出了另一种绝缘栅双极型晶体管,集电极的个数为多个,漏极的个数为多个;且多个集电极和多个漏极交替排列。对应的,第一金属电极15与集电极12一一对应,第二金属电极15与漏极一一对应,且任意相邻的第一金属电极15及第二金属电极15之间电隔离。如图4中所示第一金属电极15和第二金属电极15沿第一方向a交替排列。
图5所示的本申请实施例还提供了一种电机控制器,电机控制器包括电源模块200以及与电源模块200连接的上述任一项所述的绝缘栅双极型晶体管100。该电机控制器可用于控制电机工作,MCU绝大多数时间工作在轻载状态,这使得MCU希望逆变器的开关元件(绝缘栅双极型晶体管100)更多的时候是工作在MOSFET模式,而MCU在满载时又希望绝缘栅双极型晶体管100又能够迅速切换到IGBT模式。因此,通过第一金属电极与第二金属电极之间的电隔离将绝缘栅双极型晶体管100的背面划分为两个区域:IGBT区和MOSFET区。在使用时可对IGBT区和MOSFET区分别供电来控制绝缘栅双极型晶体管100。示例性的,在仅给第一金属电极供电时,仅集电极导通,漏极不导通,此时绝缘栅双极型晶体管100可实现IGBT模式和MOSFET模式;在仅给第二金属电极供电时,则 仅漏极导通,集电极不导通,此时绝缘栅双极型晶体管100可实现FRD模式和MOSFET模式。在MCU轻载时,可仅给第二金属电极供电,此时MCU可长时间工作在MOSFET模式;在MCU重载时,可同时跟第一金属电极及第二金属电极供电,此时,MCU可以在MOSFET模式和IGBT模式之间切换。由上述描述可以看出,MCU能够通过背面的这两个金属电极配合栅极电极对器件的工作模式进行精确控制,根据MCU功率输出的需求,决定绝缘栅双极型晶体管100是工作在MOSFET模式还是工作在IGBT模式。从而可以更精准的控制电机。
如图6所示,本申请实施例提供了汽车,图6中的相同标号可以参考图5中的描述。该汽车包括电机400,以及与电机400连接的上述任一项的电机控制器300。电机控制器300可用于控制电机400工作,MCU绝大多数时间工作在轻载状态,这使得MCU希望逆变器的开关元件(绝缘栅双极型晶体管100)更多的时候是工作在MOSFET模式,而MCU在满载时又希望绝缘栅双极型晶体管100又能够迅速切换到IGBT模式。因此,通过第一金属电极与第二金属电极之间的电隔离将绝缘栅双极型晶体管100的背面划分为两个区域:IGBT区和MOSFET区。在使用时可对IGBT区和MOSFET区分别供电来控制绝缘栅双极型晶体管100。示例性的,在仅给第一金属电极供电时,仅集电极导通,漏极不导通,此时绝缘栅双极型晶体管100可实现IGBT模式和MOSFET模式;在仅给第二金属电极供电时,则仅漏极导通,集电极不导通,此时绝缘栅双极型晶体管100可实现FRD模式和MOSFET模式。在MCU轻载时,可仅给第二金属电极供电,此时MCU可长时间工作在MOSFET模式;在MCU重载时,可同时跟第一金属电极及第二金属电极供电,此时,MCU可以在MOSFET模式和IGBT模式之间切换。由上述描述可以看出,MCU能够通过背面的这两个金属电极配合栅极电极对器件的工作模式进行精确控制,根据MCU功率输出的需求,决定绝缘栅双极型晶体管100是工作在MOSFET模式还是工作在IGBT模式。从而可以更精准的控制电机400。
显然,本领域的技术人员可以对本申请进行各种改动和变型而不脱离本申请的精神和范围。这样,倘若本申请的这些修改和变型属于本申请权利要求及其等同技术的范围之内,则本申请也意图包含这些改动和变型在内。

Claims (12)

  1. 一种绝缘栅双极型晶体管,其特征在于,包括:IGBT器件结构特征层、SJ器件结构特征层及RC-IGBT器件结构特征层;其中,
    所述IGBT器件结构特征层、所述SJ器件结构特征层及所述RC-IGBT器件结构特征层层叠设置,且所述IGBT器件结构特征层及RC-IGBT器件结构特征层分列在所述SJ器件结构特征层的两侧;
    所述RC-IGBT器件结构特征层包括同层设置的集电极及漏极;
    所述绝缘栅双极型晶体管还包括与所述集电极叠且电连接的第一金属电极、与所述漏极层叠且电连接的第二金属电极,且所述第一金属电极与所述第二金属电极之间电隔离。
  2. 如权利要求1所述的绝缘栅双极型晶体管,其特征在于,所述SJ器件结构特征层包括层叠设置的漂移层、超结结构层及缓冲层;其中,所述超结结构层位于所述漂移层与所述缓冲层之间;
    所述漂移层与所述IGBT器件结构特征层连接;
    所述缓冲层与所述集电极及所述漏极连接。
  3. 如权利要求2所述的绝缘栅双极型晶体管,其特征在于,所述缓冲层为N型缓冲层。
  4. 如权利要求2或3所述的绝缘栅双极型晶体管,其特征在于,所述漂移层为N-漂移层。
  5. 如权利要求2~4任一项所述的绝缘栅双极型晶体管,其特征在于,所述超结结构层多个N-漂移层及多个P-漂移层,且所述多个N-漂移层及所述多个P-漂移层沿第一方向交替排列;其中,所述第一方向垂于与第二方向;
    所述第二方向为所述IGBT器件结构特征层与所述SJ器件结构特征层层叠的方向。
  6. 如权利要求1-5任一项所述的绝缘栅双极型晶体管,其特征在于,所述IGBT器件结构特征层包括:
    与所述漂移层层叠设置的P基极层;与所述P基极层层叠设置的正面发射极电极;
    贯穿所述P基极层并插入到所述漂移层的多个栅极电极;包裹每个栅极电极的绝缘栅膜;将每个栅极电极与所述正面发射极电极绝缘的层间绝缘膜;设置在所述P基极层表面形成的N发射极层以及P+接触层。
  7. 如权利要求1-6任一项所述的绝缘栅双极型晶体管,其特征在于,所述第一金属电极与所述集电极之间欧姆接触;和/或
    所述第二金属电极与所述漏极之间欧姆接触。
  8. 如权利要求1-7任一项所述的绝缘栅双极型晶体管,其特征在于,所述第一金属电极与所述第二金属电极间隔设定距离。
  9. 如权利要求1-8任一项所述的绝缘栅双极型晶体管,其特征在于,所述集电极的个数为多个,所述漏极的个数为多个;且所述多个集电极和所述多个漏极交替排列。
  10. 如权利要求9所述的绝缘栅双极型晶体管,其特征在于,所述第一金属电极与所述集电极一一对应,所述第二金属电极与所述漏极一一对应,且任意相邻的第一金属电极及第二金属电极之间电隔离。
  11. 一种电机控制器,其特征在于,包括电源模块以及与所述电源模块连接的如权利 要求1-10任意一项所述的绝缘栅双极型晶体管。
  12. 一种汽车,其特征在于,包括电机,以及与所述电机连接的如权利要求10所述的电极控制器。
PCT/CN2020/079555 2020-03-17 2020-03-17 一种绝缘栅双极型晶体管、电机控制器及汽车 Ceased WO2021184172A1 (zh)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2022556190A JP7486599B2 (ja) 2020-03-17 2020-03-17 絶縁ゲートバイポーラトランジスタ、モータ制御ユニット、及び車両
PCT/CN2020/079555 WO2021184172A1 (zh) 2020-03-17 2020-03-17 一种绝缘栅双极型晶体管、电机控制器及汽车
EP20926062.9A EP4109559A4 (en) 2020-03-17 2020-03-17 BIPOLAR TRANSISTOR WITH INSULATED CONTROL ELECTRODE, ENGINE CONTROL UNIT FOR A MOTOR VEHICLE
CN202080064553.7A CN114402443A (zh) 2020-03-17 2020-03-17 一种绝缘栅双极型晶体管、电机控制器及汽车
US17/946,111 US12513925B2 (en) 2020-03-17 2022-09-16 Insulated gate bipolar transistor, motor control unit, and vehicle

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2020/079555 WO2021184172A1 (zh) 2020-03-17 2020-03-17 一种绝缘栅双极型晶体管、电机控制器及汽车

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US17/946,111 Continuation US12513925B2 (en) 2020-03-17 2022-09-16 Insulated gate bipolar transistor, motor control unit, and vehicle

Publications (1)

Publication Number Publication Date
WO2021184172A1 true WO2021184172A1 (zh) 2021-09-23

Family

ID=77768005

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2020/079555 Ceased WO2021184172A1 (zh) 2020-03-17 2020-03-17 一种绝缘栅双极型晶体管、电机控制器及汽车

Country Status (5)

Country Link
US (1) US12513925B2 (zh)
EP (1) EP4109559A4 (zh)
JP (1) JP7486599B2 (zh)
CN (1) CN114402443A (zh)
WO (1) WO2021184172A1 (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE202026101506U1 (de) 2025-03-28 2026-05-07 Honda Motor Co., Ltd. Fahrzeug vom Sattelfahr-Typ

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104350602A (zh) * 2012-05-29 2015-02-11 三菱电机株式会社 绝缘栅型双极晶体管
JP2016225583A (ja) * 2014-10-15 2016-12-28 富士電機株式会社 半導体装置
CN107039419A (zh) * 2016-01-12 2017-08-11 富士电机株式会社 半导体装置
CN107768429A (zh) * 2017-10-27 2018-03-06 电子科技大学 一种具有混合导电模式的超结igbt器件

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4815885B2 (ja) 2005-06-09 2011-11-16 トヨタ自動車株式会社 半導体装置の制御方法
JP4678547B2 (ja) 2007-11-06 2011-04-27 株式会社デンソー 半導体装置及びその製造方法
US7911023B2 (en) 2007-11-06 2011-03-22 Denso Corporation Semiconductor apparatus including a double-sided electrode element and method for manufacturing the same
JP4686580B2 (ja) * 2008-08-14 2011-05-25 株式会社東芝 電力用半導体装置
JP2010074051A (ja) 2008-09-22 2010-04-02 Tokyo Electric Power Co Inc:The パワー半導体素子
JP2012142537A (ja) 2010-12-16 2012-07-26 Mitsubishi Electric Corp 絶縁ゲート型バイポーラトランジスタとその製造方法
CN103219370A (zh) 2013-03-11 2013-07-24 电子科技大学 一种具有p浮空层电流栓的rc-igbt
JP2016149430A (ja) * 2015-02-12 2016-08-18 株式会社豊田中央研究所 逆導通igbtを備える電子装置
DE102016110035B4 (de) * 2016-05-31 2020-09-10 Infineon Technologies Ag Elektrische Baugruppe, die eine bipolare Schaltvorrichtung und einen selbstleitenden Transistor mit breiter Bandlücke umfasst, und eine elektrische Baugruppe, die eine bipolare Schaltvorrichtung und einen selbstleitenden Junction-Feldeffekttransistor umfasst, der einen Halbleiterbereich aus Siliziumcarbid umfasst
CN107464842A (zh) * 2017-08-03 2017-12-12 电子科技大学 一种具有集电极槽的超结逆导型igbt
CN109888005B (zh) 2019-01-22 2021-11-09 上海华虹宏力半导体制造有限公司 逆导型超结igbt器件及其制造方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104350602A (zh) * 2012-05-29 2015-02-11 三菱电机株式会社 绝缘栅型双极晶体管
JP2016225583A (ja) * 2014-10-15 2016-12-28 富士電機株式会社 半導体装置
CN107039419A (zh) * 2016-01-12 2017-08-11 富士电机株式会社 半导体装置
CN107768429A (zh) * 2017-10-27 2018-03-06 电子科技大学 一种具有混合导电模式的超结igbt器件

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP4109559A4 *

Also Published As

Publication number Publication date
EP4109559A1 (en) 2022-12-28
JP2023518445A (ja) 2023-05-01
JP7486599B2 (ja) 2024-05-17
EP4109559A4 (en) 2023-04-05
US12513925B2 (en) 2025-12-30
US20230018508A1 (en) 2023-01-19
CN114402443A (zh) 2022-04-26

Similar Documents

Publication Publication Date Title
US10872959B2 (en) Semiconductor device and power converter
JP5875680B2 (ja) 絶縁ゲート型バイポーラトランジスタ
CN103022089A (zh) 一种无snapback效应的逆导型绝缘栅双极晶体管
CN103219370A (zh) 一种具有p浮空层电流栓的rc-igbt
JPWO2011080928A1 (ja) 半導体装置、及びそれを用いた電力変換装置
JP7527256B2 (ja) 半導体装置及び半導体装置の制御方法
TWI847529B (zh) 半導體裝置及電力轉換裝置
CN108122962B (zh) 一种绝缘栅双极型晶体管
TWI836801B (zh) 半導體裝置、半導體裝置之製造方法及電力變換裝置
CN115064584B (zh) 一种具有载流子存储层的沟槽栅igbt器件
JPH04261065A (ja) 半導体装置
CN109904221B (zh) 一种超结双向开关
JP3491049B2 (ja) 整流素子およびその駆動方法
US12513925B2 (en) Insulated gate bipolar transistor, motor control unit, and vehicle
CN103928507B (zh) 一种逆导型双栅绝缘栅双极型晶体管
US20250311396A1 (en) Power conversion device, method of controlling power conversion device, semiconductor device, and method of controlling semiconductor device
KR102909384B1 (ko) 반도체 소자 및 이를 포함하는 3상 인버터
Uchida et al. High Current SiC Transistors for Automotive Applications
JP2000049337A (ja) 半導体装置
WO2014054162A1 (ja) 半導体装置およびそれを用いた電力変換装置
CN107464839B (zh) 一种防止关断失效的栅控晶闸管器件
EP4030490A1 (en) Super-junction reverse-conducting insulated gate bipolar transistor and electric vehicle motor control unit
CN102184948A (zh) 一种改进的平面绝缘栅双极型晶体管
CN109192773B (zh) 一种基于结终端的rc-igbt器件
JP2025122257A (ja) 半導体装置、半導体装置の製造方法

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 20926062

Country of ref document: EP

Kind code of ref document: A1

ENP Entry into the national phase

Ref document number: 2022556190

Country of ref document: JP

Kind code of ref document: A

ENP Entry into the national phase

Ref document number: 2020926062

Country of ref document: EP

Effective date: 20220922

NENP Non-entry into the national phase

Ref country code: DE