WO2021189487A1 - 显示面板及显示装置 - Google Patents

显示面板及显示装置 Download PDF

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Publication number
WO2021189487A1
WO2021189487A1 PCT/CN2020/081860 CN2020081860W WO2021189487A1 WO 2021189487 A1 WO2021189487 A1 WO 2021189487A1 CN 2020081860 W CN2020081860 W CN 2020081860W WO 2021189487 A1 WO2021189487 A1 WO 2021189487A1
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WIPO (PCT)
Prior art keywords
layer
driving
backplane
display panel
area
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2020/081860
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English (en)
French (fr)
Inventor
魏俊波
杨盛际
黄冠达
卢鹏程
田元兰
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BOE Technology Group Co Ltd
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BOE Technology Group Co Ltd
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Filing date
Publication date
Application filed by BOE Technology Group Co Ltd filed Critical BOE Technology Group Co Ltd
Priority to EP20900695.6A priority Critical patent/EP4131393B1/en
Priority to PCT/CN2020/081860 priority patent/WO2021189487A1/zh
Priority to US17/259,373 priority patent/US11903298B2/en
Priority to CN202080000399.7A priority patent/CN113748514B/zh
Publication of WO2021189487A1 publication Critical patent/WO2021189487A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/88—Dummy elements, i.e. elements having non-functional features
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/88—Terminals, e.g. bond pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/87—Passivation; Containers; Encapsulations
    • H10K59/873—Encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/87—Passivation; Containers; Encapsulations
    • H10K59/873—Encapsulations
    • H10K59/8731—Encapsulations multilayered coatings having a repetitive structure, e.g. having multiple organic-inorganic bilayers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/70—Testing, e.g. accelerated lifetime tests
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K77/00—Constructional details of devices covered by this subclass and not covered by groups H10K10/80, H10K30/80, H10K50/80 or H10K59/80
    • H10K77/10—Substrates, e.g. flexible substrates
    • H10K77/111—Flexible substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
    • H10P74/27—Structural arrangements therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
    • H10P74/27—Structural arrangements therefor
    • H10P74/273—Interconnections for measuring or testing, e.g. probe pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K2102/00—Constructional details relating to the organic devices covered by this subclass
    • H10K2102/301—Details of OLEDs
    • H10K2102/351—Thickness
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/851—Division of substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/931—Shapes of bond pads
    • H10W72/934—Cross-sectional shape, i.e. in side view
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/941—Dispositions of bond pads
    • H10W72/942—Dispositions of bond pads relative to underlying supporting features, e.g. bond pads, RDLs or vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/791—Package configurations characterised by the relative positions of pads or connectors relative to package parts of direct-bonded pads
    • H10W90/794—Package configurations characterised by the relative positions of pads or connectors relative to package parts of direct-bonded pads between a chip and a stacked insulating package substrate, interposer or RDL

Definitions

  • the present disclosure relates to the field of display technology, and in particular, to a display panel and a display device.
  • Micro OLED (Micro OLED) displays involve the combination of organic light-emitting diode (OLED) technology and CMOS technology, and are related to the cross-integration of the optoelectronics industry and the microelectronics industry, which promotes the development of a new generation of micro display technology and also promotes organic electronics on silicon , And even the research and development of molecular electronics on silicon.
  • OLED organic light-emitting diode
  • Micro OLED (Micro OLED) displays have excellent display characteristics, such as high resolution, high brightness, rich colors, low driving voltage, fast response speed, and low power consumption, and have broad development prospects.
  • the purpose of the present disclosure is to provide a display panel and a display device.
  • a display panel including:
  • the driving backplane has a pixel driving area and a peripheral area surrounding the pixel driving area.
  • the peripheral area has a bonding pad; the edge of the driving backplane is surrounded by a first section and a second section, and the bonding The fixed pad is located between the first segment and the pixel driving area;
  • a plurality of detection pads are arranged in the second section and distributed along the second section;
  • the light-emitting function layer is arranged on the driving backplane and located in the pixel driving area;
  • a flexible circuit board that extends between the first segment and the pixel driving area, and is bound to the bonding pad;
  • the first encapsulation layer is arranged on a side of the light-emitting function layer away from the driving backplane, and the orthographic projection of the first encapsulation layer on the driving backplane covers the pixel driving area and the detection pad.
  • the drive backplane has a binding hole exposing the binding pad, and the flexible circuit board communicates with the conductive material filled in the binding hole. Binding pad binding.
  • the driving backplane includes:
  • the driving transistor is arranged on one side of the substrate and located in the pixel driving area;
  • a multi-layer wiring layer is sequentially spaced and distributed on the side of the driving transistor away from the substrate along the direction away from the substrate; at least one of the wiring layers is connected to the light-emitting function layer, and the driving transistor Each of the gate, the first pole, and the second pole of is connected to at least one of the wiring layers.
  • the wiring layer includes a first wiring layer and a second wiring layer;
  • the driving backplane further includes:
  • a first flat layer covering the driving transistor; the first wiring layer is provided on the surface of the first flat layer away from the substrate and connected to the driving transistor;
  • a second flat layer covering the first wiring layer; the second wiring layer is provided on a side of the first flat layer away from the substrate and connected to the first wiring layer;
  • a third flat layer covering the second wiring layer, and the light-emitting function layer is provided on a surface of the third flat layer away from the substrate and connected to the second wiring layer;
  • the bonding pad and the first wiring layer are provided in the same layer, and the bonding hole penetrates the third flat layer and the second flat layer.
  • the driving transistor includes:
  • the active layer is arranged in the substrate, and the first electrode and the second electrode are arranged in the active layer at intervals;
  • a gate insulating layer is provided on the active layer and exposes the first electrode and the second electrode;
  • the gate is arranged on a surface of the gate insulating layer away from the active layer; the first electrode, the second electrode and the gate are connected to the first wiring layer.
  • the light-emitting function layer includes:
  • the first electrode is arranged on the drive backplane; the detection pad and the first electrode are arranged in the same layer;
  • the luminescent material layer is arranged on the side of the first electrode away from the driving backplane;
  • the second electrode is arranged on a side of the luminescent material layer away from the driving backplane.
  • the flexible circuit board has a plurality of conductive contact pieces arranged side by side and spaced apart; the number of the binding pads and the binding holes are the same and both are multiple, each The binding holes expose each of the binding pads in a one-to-one correspondence, and each of the conductive contact sheets covers each of the binding holes in a one-to-one correspondence, and is connected to the binding pads through a conductive material.
  • the area of the area where the conductive contact piece is connected to the bonding pad is not less than 80% of the area of the conductive contact piece.
  • the driving backplane is rectangular, the first section is one side of the rectangle, and the second section includes the other sides of the rectangle.
  • the edges of the drive backplane include opposite first and second short sides and opposite first and second long sides, and the first section is The first short side and the second section include a second short side, a first long side and a second long side; the second short side, the first long side and the second long side are all set There are the same number of detection pads.
  • the aperture of the binding hole gradually decreases toward the binding pad.
  • the slope of the sidewall of the binding hole relative to the binding pad is not less than 40° and not more than 70°.
  • the display panel further includes:
  • the color filter layer is arranged on the side of the first packaging layer away from the driving backplane and corresponding to the pixel driving area;
  • the second encapsulation layer is arranged on the side of the color filter layer away from the driving backplane, and the orthographic projection of the second encapsulation layer on the driving backplane covers the pixel driving area, the peripheral area, and The detection pad;
  • the transparent cover plate covers at least the second encapsulation layer and corresponds to the pixel driving area.
  • the first packaging layer and the second packaging layer are sequentially laminated on the surface of the detection pad facing away from the driving backplane in an area corresponding to the detection pad.
  • the projection of the color filter layer on the drive backplane is located in the pixel drive area, and the color filter layer and the detection pad are parallel to the The distance in the direction of driving the backplane is 150 ⁇ m-200 ⁇ m.
  • a display device including the display panel described in any one of the above.
  • FIG. 1 is a schematic diagram of a display panel in the related art.
  • FIG. 2 is a top view of an embodiment of the display panel of the present disclosure.
  • FIG. 3 is a top view of an unbound flexible circuit board in an embodiment of the display panel of the present disclosure.
  • FIG. 4 is a cross-sectional view of A-A in an embodiment of the display panel in FIG. 2.
  • FIG. 5 is a B-B cross-sectional view of an embodiment of the display panel in FIG. 2.
  • FIG. 6 is a cross-sectional view of C-C in an embodiment of the display panel in FIG. 3.
  • FIG. 7 is a top view of the substrate of the disclosure when it is not cut into a display panel.
  • the display panel may include a driving backplane, a light-emitting device provided on the driving backplane, and an encapsulation layer and a color film layer for packaging the light-emitting device; wherein, as shown in FIG. 1, the driving backplane 1a may be connected to
  • the flexible circuit board 2a is bound, that is, the conductive contacts of the flexible circuit board 2a are bound with the binding pads of the driving backplane 1a, so as to drive the light emitting device to emit light through the driving backplane 1a.
  • the uniformity of the thickness of each film directly affects the performance of the display panel, in order to facilitate the detection of the uniformity of the film thickness, there are often multiple conductive detection pads on the edge of the drive backplane.
  • the thickness of the film layer on each detection pad is detected by a film thickness tester, and the uniformity of the film layer can be determined through comparison.
  • the detection pads are distributed on the edge of the drive backplane, when the flexible circuit board is bound, the conductive contacts of the flexible circuit board not only contact the bonding pad, but may also contact the detection pad, which may easily cause a short circuit and cause display abnormalities. .
  • the embodiments of the present disclosure provide a display panel, which may be an OLED display panel, as shown in FIGS. 2-6.
  • the display panel of the embodiments of the present disclosure includes a driving backplane 1, a detection pad 2, and a light-emitting function layer 3.
  • the driving backplane 1 has a pixel driving area S1 and a peripheral area S2 surrounding the pixel driving area S1.
  • the peripheral area S2 has a bonding pad 6; the edge of the driving backplane 1 is surrounded by a first section 11 and a second section 12, which are bound
  • the fixed pad 6 is located between the first segment 11 and the pixel driving area S1;
  • a plurality of detection pads 2 are arranged in the second section 12 and distributed along the second section 12;
  • the light-emitting function layer 3 is arranged on the driving backplane 1 and located in the pixel driving area S1;
  • the flexible circuit board 4 extends between the first section 11 and the pixel driving area S1, and is bound to the bonding pad 6;
  • the first encapsulation layer 5 is disposed on the side of the light-emitting function layer 3 away from the driving backplane 1, and the orthographic projection of the first encapsulation layer 5 on the driving backplane 1 covers the pixel driving area S1 and the detection pad 2.
  • the flexible circuit board 4 is attached to the driving backplane 1 in the area between the first section 11 and the pixel driving area S1, and covers the binding hole 100, so that the flexible circuit board 4 can be bound to Pad 6 is bound. Since the detection pad 2 is provided in the second section 12 of the edge of the driving backplane 1 instead of the first section 11, and the bonding pad 6 is located between the first section 11 and the pixel driving area S1, the flexible circuit board can be avoided 4 Contact with the detection pad 2 to prevent short circuit and ensure normal display.
  • the pixel driving area S1 of the driving backplane 1 has a pixel driving circuit for driving the light-emitting function layer 3 to emit light.
  • the pixel driving circuit may include a conventional 2T1C (that is, two transistors and a capacitor). Pixel circuit, 4T2C, 5T1C, 7T1C and other pixel drive circuits.
  • the specific circuit structure and driving mode are not specifically limited here.
  • the peripheral area S2 may have peripheral circuits such as a data driving circuit, a gate driving circuit, and a light-emitting control circuit for outputting signals to the pixel driving circuit.
  • the specific circuit structure and driving mode are not specifically limited here.
  • the driving backplane 1 may include a substrate 101, a driving transistor 102, and a multilayer wiring layer.
  • the driving transistor 102 may be located in the pixel driving area S1, which may be in the pixel driving circuit and the light emitting layer.
  • the transistor connected to the functional layer 3, the driving transistor 102 may include a gate, a first electrode (source), and a second electrode (drain).
  • Each wiring layer may be provided on one side of the substrate 101 and distributed in a sequence away from the substrate 101, and two adjacent wiring layers may be separated by a flat layer of insulating material. At least one of the wiring layers is connected to the light-emitting functional layer 3, and at least one of the wiring layers is connected (electrically connected) to the driving transistor 102.
  • the gate, first electrode, and second electrode of the driving transistor 102 are all connected to the same Layer wiring layer connection.
  • the light-emitting function layer 3 and the driving transistor 102 can be connected to different wiring layers.
  • the area of the wiring layer located in the pixel driving area S1 can be used to realize layered wiring, and can form a pixel driving circuit through cross-layer connection.
  • the driving backplane 1 is a silicon-based driving backplane
  • at least one of the wiring layers is made of reflective material to ensure that the light emitted by the light-emitting function layer 3 exits in a direction away from the driving backplane 1.
  • the driving backplane 1 may be a silicon-based driving backplane.
  • the substrate 101 may be a silicon base, and its material may be a single crystal. Silicon etc.
  • the driving transistor 102 may include an active layer 1021, a gate insulating layer 1022, and a gate electrode 1023.
  • the active layer 1021 may be formed in the substrate 101 through a doping process, and includes a first electrode 10211 and a second electrode 10212 spaced apart.
  • the gate insulating layer 1022 is disposed on the active layer 1021 and exposes the first electrode 10211 and the second electrode 10212.
  • the gate 1023 is provided on the surface of the gate insulating layer 1022 away from the active layer 1021.
  • the wiring layer may include a first wiring layer 103 and a second wiring layer 104, wherein the first wiring layer 103 is connected to the first electrode 10211, the second electrode 10212, and the gate 1023 through a via hole, which is Tungsten holes or other metallized holes.
  • the second wiring layer 104 is disposed on the side of the first wiring layer 103 away from the substrate 101 and is connected (electrically connected) to the light-emitting function layer 3, and the second wiring layer 104 is made of light-reflecting material.
  • At least one of the gate electrode 1023 and each wiring layer has an area located in the peripheral region S2, so as to form a peripheral driver Circuits, such as light-emitting control circuits, gate drive circuits, etc.
  • the driving backplane 1 further includes a first flat layer 105, a second flat layer 106, and a third flat layer 107, wherein:
  • the first flat layer 105 covers the driving transistor 102, that is, the substrate 101 is located outside the gate 1023.
  • the first wiring layer 103 is provided on the surface of the first flat layer 105 away from the substrate 101, and passes through the driving transistor 102 through the first flat layer 105. A via connection of the planar layer 105.
  • the second flat layer 106 covers the first wiring layer 103 and covers the area of the first flat layer 105 outside the first wiring layer 103; the second wiring layer 104 is provided on a side of the second flat layer 106 away from the substrate 101 It is connected to the first wiring layer 103 through a via hole.
  • the third flat layer 107 covers the second wiring layer 104 and covers the area where the second flat layer 106 is located outside the second wiring layer 104.
  • the light-emitting function layer 3 may be disposed on the surface of the third flat layer 107 away from the substrate 101 and connected to the second wiring layer 104 through via holes.
  • the bonding pad 6 and the first wiring layer 103 are provided in the same layer, and the bonding hole 100 penetrates the third flat layer 107 and the second flat layer 106.
  • the peripheral area S2 has a bonding pad 6 that can be bonded to the flexible circuit board 4 and connected to the circuit of the peripheral area S2, so that a signal can be input through the flexible circuit board 4.
  • the number of bonding pads 6 is multiple, which can be arranged side by side in the bonding area of the peripheral area S2 at intervals.
  • the materials of the first flat layer 105, the second flat layer 106, and the third flat layer 107 may include silicon nitride, silicon oxide, or other insulating materials, which are not specifically limited herein.
  • the edge of the driving backplane 1 can be enclosed by the first section 11 and the second section 12.
  • the shape of the first section 11 and the second section 12 is not particularly limited here, as long as it can be enclosed in a closed figure. That's it.
  • the driving backplane 1 is rectangular
  • the first section 11 is one side of the rectangle
  • the second section 12 includes the other sides of the rectangle.
  • the edges of the driving backplane 1 include opposite first short sides and second short sides.
  • the first section 11 can be any one of the first short side, the second short side, the first long side and the second long side, and the second section 12 is composed of other The sides are connected: for example, the first section 11 is a first short side, and the second section 12 includes a second short side, a first long side, and a second long side.
  • the bonding pad 6 is located between the first segment 11 and the pixel driving area S1.
  • the bonding pad 6 is located between the first short side and the pixel driving area S1.
  • the bonding pad 6 may be located inside the driving backplane 1, and the driving backplane 1 is provided with a bonding hole 100 exposing the bonding pad 6 ,
  • the flexible circuit board 4 can cover the binding hole 100 and be connected to the binding pad 6 through the conductive material 200.
  • the bonding pad 6 is provided in the same layer as one of the above-mentioned wiring layers.
  • the bonding pad 6 may be provided in the same layer as the first wiring layer 103, so that it can be formed at the same time through the same patterning process.
  • the aperture of the binding hole 100 gradually decreases toward the binding pad 6 so that the cross section of the binding hole 100 along the direction perpendicular to the driving backplane 1 is an inverted trapezoid.
  • the slope of the sidewall of the binding hole 100 relative to the binding pad 6, that is, the angle between the cross section of the binding hole 100 in the direction perpendicular to the driving backplane 1 and the surface of the binding pad 6, is not less than 40. °, and not more than 70°, such as 40°, 50°, 60° or 70°.
  • the bonding pad 6 may also be located on the surface of the driving backplane 1.
  • the third flat layer 107 is facing away from the surface of the substrate 101, and the flexible circuit board 4 may be directly connected to the bonding pad. Fixed pad 6 and bound with bonding pad 6.
  • the detection pad 2 may be made of conductive material, and the material may include copper, copper alloy, etc. with good conductivity.
  • the number of detection pads 2 is multiple, such as 24, and they are arranged in the second section 12 of the edge of the driving backplane 1, that is, at the edge of the peripheral area S2, and each detection pad 2 follows the extension track of the second section 12 distributed.
  • the first section 11 of the edge of the driving backplane 1 is not provided with a detection pad 2 to prevent the flexible circuit board 4 from contacting the detection pad 2 and cause a short circuit.
  • the second short side, the first long side, and the second long side of the driving backplane 1 are all provided with the same number of detection pads 2 evenly distributed, and the first short side is not provided with detection pads. 2.
  • the detection pad 2 can be provided on the surface of the driving backplane 1 for providing the light-emitting function layer 3, and can also be embedded in the surface, for example, the surface of the third flat layer 107 away from the substrate 101.
  • Other film layers can be laminated on the detection pad 2 so that a film thickness tester can be used to detect the thickness of the film layer on the detection pad 2.
  • the shape of the detection pad 2 can be polygons such as rectangles, pentagons, hexagons, etc., and can also be circular or other shapes. Of course, the detection pad 2 can also be cut when a substrate is cut into multiple display panels. The irregular shape formed is not specifically limited here. In addition, the shape and size of different detection pads 2 may be different.
  • the light-emitting function layer 3 is disposed on the driving backplane 1 and located in the pixel driving area S1, that is, the projection of the light-emitting function layer 3 on the driving backplane 1 is located within the pixel driving area S1.
  • the light-emitting functional layer 3 includes a plurality of light-emitting devices, and each light-emitting device can be connected to a driving transistor 102 and can emit light independently.
  • the light-emitting functional layer 3 includes a first electrode 31, a pixel defining layer 32, a light-emitting material layer 33, and a second electrode 34, wherein:
  • the first electrode 31 serves as the anode of the light-emitting device, and the number of the first electrode 31 is multiple, and the array is distributed on the driving back plate 1, for example, distributed on the surface of the third flat layer 107 away from the substrate 101.
  • the material of the first electrode 31 includes ITO (Indium Tin Oxide) or other transparent conductive materials.
  • the detection pad 2 and the first electrode 31 may be arranged in the same layer, so as to be formed by the same patterning process. For example, before cutting the substrate to form a plurality of display panels, at least part of the detection pads 2 of two adjacent display panels are butted to form an integrated conductive sheet.
  • the conductive sheet and the first electrode 31 may be arranged in the same layer to facilitate the passage The same patterning process is formed. Further, the shape and size of the conductive sheet may be the same as that of the first electrode 31, for example, the shape of the conductive sheet and the first electrode 31 are both rectangular, hexagonal, etc., so as to improve the uniformity of the film layer.
  • each conductive sheet When cutting the substrate to form a display panel, each conductive sheet can be cut into two symmetrical detection pads 2 from the middle position.
  • the cutting position is not necessarily located in the middle position of the conductive sheet, so that the two detection pads 2 after cutting The shape and size can be different.
  • the pixel defining layer 32 and the first electrodes 31 are disposed on the same surface of the driving backplane 1 and have pixel openings exposing the first electrodes 31.
  • the luminescent material layer 33 can cover the pixel definition layer 32 and cover the first electrode 31 in each pixel opening.
  • the light-emitting material layer 33 includes at least one light-emitting unit layer, and each light-emitting unit layer includes at least a hole transport layer, a light-emitting layer, and an electron transport layer that are sequentially stacked in a direction away from the driving backplane 1. If the number of light-emitting unit layers is multiple, two adjacent light-emitting unit layers are connected by a charge generation layer.
  • the luminescent material layer 33 is only located in the pixel driving region S1, and the luminescent material layer 33 is not provided in the peripheral region S2.
  • the light-emitting material layer 33 can be vapor-deposited in the pixel driving region S1 through an open mask process.
  • the material layer 33, and the peripheral area S2 is not vapor-deposited, that is, the detection pad 2 is not covered by the luminescent material layer 33.
  • the first electrode closest to the peripheral area S2, the luminescent material layer 33 at the boundary between the pixel driving area S1 and the peripheral area S2, can extend toward the driving backplane 1, thereby being the closest to the peripheral area S2.
  • the first electrode 31 is wrapped near the edge of the peripheral area S2, that is, all the first electrodes 31 are located within the projection of the luminescent material layer 33 on the driving backplane, and the edge of the luminescent material layer 33 extends to the driving backplane 1.
  • the light-emitting material layer 33 may not extend to the detection pad 2, that is, there may be an area between the detection pad 2 and the pixel driving area S1 that is not covered by the light-emitting material layer 33.
  • the second electrode 34 is provided on the surface of the light-emitting material layer 33 away from the driving backplane 1.
  • the first electrode 31, the light-emitting material layer 33, and the second electrode 34 corresponding to each pixel opening can constitute a light-emitting device.
  • the driving transistor 102 may be connected to the first electrode 31 in a one-to-one correspondence, so as to drive each light-emitting device to emit light independently.
  • the material of the second electrode 34 may include Mg/Ag alloy material or other materials.
  • the second electrode 34 is only located in the pixel driving region S1, and the second electrode 34 is not provided in the peripheral region S2.
  • the second electrode 34 can be formed in the pixel driving region S1 through an open mask process. There is no second electrode 34 in the peripheral area S2, that is, the detection pad 2 is not covered by the second electrode 34.
  • the second electrode 34 may extend to the peripheral area S2, and cover the surface of the light-emitting material layer 33 extending toward the driving backplane 1, so as to extend to the driving backplane 1, and the light-emitting material layer 33 The edges are covered.
  • the display panel may further include a first encapsulation layer 5.
  • the first encapsulation layer 5 may be provided on the side of the light-emitting function layer 3 away from the driving backplane 1, and the first encapsulation layer 5 may be positioned on the driving backplane.
  • the orthographic projection on the board 1 covers the pixel driving area S1 and the detection pad 2, so that the uniformity of the film thickness of the first packaging layer 5 can be judged by detecting the film thickness of the first packaging layer 5 on each detection pad 2.
  • the portion of the first encapsulation layer 5 in the peripheral area S2 may be laminated on the surface of the detection pad 2 facing away from the driving backplane 1, so as to detect the uniformity of the first encapsulation layer 5.
  • the first encapsulation layer 5 can be a single-layer or multi-layer structure. If the first encapsulation layer 5 has a multi-layer structure and includes multiple sub-encapsulation layers, the film thickness can be detected after each sub-encapsulation layer is formed. In order to judge the uniformity of each sub-encapsulation layer. The first encapsulation layer 5 can effectively block water vapor and oxygen, and achieve the purpose of protecting the light-emitting device.
  • the film thickness of the sub-encapsulation layer on each detection pad 2 can be detected by a film thickness tester, because the detection pads 2 are distributed in multiple The position can reflect the film thickness of different regions of the sub-encapsulation layer, and the uniformity of the film thickness of the sub-encapsulation layer can be determined according to the difference of the film thickness of the sub-encapsulation layer on different detection pads 2.
  • the display panel of this embodiment may further include a color film layer 7, which may be provided on the side of the first encapsulation layer 5 away from the driving backplane 1 and corresponding to the pixel driving area S1, that is, the color film layer 7.
  • the projection on the driving backplane 1 is located in the pixel driving area S1.
  • the color filter layer 7 has filter areas of multiple colors.
  • the color filter layer 7 includes a red R filter area, a green G filter area, and a blue B filter area. Each filter area is arranged in a one-to-one correspondence with each light-emitting device of the light-emitting functional layer 3, so as to emit light of different colors.
  • the first encapsulation layer 5 also covers the area of the drive backplane 1 between the detection pad 2 and the pixel drive area S1, that is, extends along the surface of the second electrode 34 to The backplane 1 is driven to wrap the edge of the second electrode 34 so that the first encapsulation layer 5 is a continuous film layer extending from the pixel driving area S1 to the detection pad 2 to improve the encapsulation effect.
  • the projection of the color filter layer 7 on the driving backplane 1 is located in the pixel driving area S1, and the color filter layer 7 and the detection pad 2 are parallel to the driving backplane 1.
  • the distance L in the direction of is 150 ⁇ m-200 ⁇ m, for example, 150 ⁇ m, 170 ⁇ m, 200 ⁇ m, etc.
  • the light-emitting material layer 33 may include a plurality of independent light-emitting units, and each light-emitting unit is filled in each pixel opening in a one-to-one correspondence, and the second electrode 34 covers the light-emitting material layer 33 and the pixel definition layer 32
  • the first electrode 31, the light-emitting unit, and the second electrode 34 corresponding to each pixel opening constitute an independent light-emitting device.
  • there are multiple color types of light-emitting units that is, different light-emitting units can emit light in different colors. In this case, there is no need to provide the above-mentioned color film layer 7 again.
  • the flexible circuit board 4 can extend between the first section 11 and the pixel driving area S1, and at least part of the orthographic projection of the flexible circuit board 4 on the plane where the display panel is located is located in the first section 11. Between the pixel driving area S1, and the flexible circuit board 4 is bound to the bonding pad 6, so that a driving signal can be input to the driving backplane 1 to make the display panel emit light.
  • the flexible circuit board 4 has a binding end 401, and the binding end 401 is provided with a plurality of conductive contact pieces 41, the number of which can be equal to that of the binding pads.
  • the number of 6 is the same; the material of the conductive contact piece 41 may include copper, copper alloy and other metals.
  • Each conductive contact piece 41 can be arranged side by side and spaced apart.
  • the binding end 401 of the flexible circuit board 4 is located between the first section 11 and the pixel driving area S1, and is attached to the surface of the driving backplane 1, and each conductive contact piece 41 covers each binding hole 100 in a one-to-one correspondence.
  • the conductive material 200 is connected to the corresponding bonding pad 6.
  • the area of the area where the conductive contact 41 and the bonding pad 6 are connected can be made not less than 80% of the area of the conductive contact 41, that is to say The area of the overlapping area of the binding hole 100 and the conductive contact piece 41 is greater than or equal to 80% of the area of the conductive contact piece 41, and the area of the conductive contact piece 41 is the area of the orthographic projection on the flexible circuit board 4.
  • the flexible circuit board 4 further has a driving end 402 and a connecting portion 403.
  • the driving end 402 may include a driving chip
  • the connecting portion 403 may be a flexible structure and connected between the driving end 402 and the binding end 401.
  • the display panel may further include a second encapsulation layer 8 and a transparent cover plate 9, wherein:
  • the second packaging layer 8 can be provided on the side of the color filter layer 7 away from the driving backplane 1, and the orthographic projection of the second packaging layer 8 on the driving backplane 1 covers the pixel driving area S1 and the detection pad 2, that is, the first
  • the two encapsulation layers 8 and the first encapsulation layer 5 can be stacked on the detection pad 2.
  • the second encapsulation layer 8 may be a single-layer or multi-layer structure, and its material is not limited to the same as the first encapsulation layer 5.
  • the film thickness of each second encapsulation layer 8 located on each detection pad 2 can be detected by a film thickness tester to determine the uniformity of the second encapsulation layer 8.
  • the specific method can be The method is the same as that of detecting the first encapsulation layer 5, which will not be described in detail here.
  • the second encapsulation layer 8 can effectively block water vapor and oxygen, and achieve the purpose of protecting the light-emitting device.
  • the portion of the second encapsulation layer 8 in the peripheral area S2 may be laminated on the surface of the first encapsulation layer 5 covering the detection pad 2 away from the drive backplane 1, so as to make the second encapsulation layer 8 uniform. Sexual testing.
  • the second encapsulation layer 8 also covers the area of the first encapsulation layer 8 between the detection pad 2 and the pixel driving area S1, and also covers the edge of the color film layer 7, so that the second encapsulation layer 8 is
  • the continuous film layer extending from the pixel driving area S1 to the detection pad 2 improves the packaging effect.
  • only one of the first packaging layer 5 and the second packaging layer 8 covers the area of the driving backplane 1 between the detection pad 2 and the pixel driving area S1.
  • the transparent cover 9 can be glass or other transparent materials, and it can be provided on the surface of the second encapsulation layer 8 facing away from the driving backplane 1, covering at least the second encapsulation layer 8, and corresponding to the pixel driving area S1, that is, the transparent cover 9
  • the projection on the driving backplane 1 covers the pixel driving area S1. Further, the transparent cover 9 is slightly smaller than the pixel driving area S1.
  • the embodiments of the present disclosure also provide a method for manufacturing a display panel.
  • the manufacturing method may include step S110 to step S130, wherein:
  • Step S110 forming a substrate, the substrate including a plurality of display panels of any of the foregoing embodiments; at least one detection pad of two adjacent display panels is connected to each other and has an integrated structure;
  • Step S120 cutting the substrate, and cutting off the detection pad to obtain a plurality of display panels
  • Step S130 binding the flexible circuit board to the bonding pad of the cut display module.
  • step S110 the substrate can be cut along the X line in the row direction and the Y line in the column direction, thereby cutting the substrate into multiple display panels. Both the X line and the Y line pass through the multiple detection panels. After cutting, each inspection pad can be divided into inspection pads 2 belonging to two display panels.
  • the cutting method can be laser cutting or other methods, which is not specifically limited here.
  • the embodiments of the present disclosure also provide a display device, which may include the display panel of any of the above embodiments, and its specific structure is not described in detail here.
  • the display device may be a mobile phone, a tablet computer, a TV, etc., which will not be listed here.

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Abstract

本公开关于一种显示面板及显示装置，涉及显示技术领域。该显示面板包括驱动背板、多个检测垫、发光功能层和柔性电路板，驱动背板具有像素驱动区和围绕像素驱动区的外围区，外围区具有绑定焊盘；驱动背板的边沿由第一段和第二段围成，绑定焊盘位于第一段和像素驱动区之间；多个检测垫设于第二段，且沿第二段分布；发光功能层设于驱动背板上，且位于像素驱动区；柔性电路板延伸至第一段与像素驱动区之间，且与绑定焊盘绑定；第一封装层设于发光功能层背离驱动背板的一侧，第一封装层在驱动背板上的正投影覆盖像素驱动区、外围区和检测垫。

Description

显示面板及显示装置 技术领域
本公开涉及显示技术领域，具体而言，涉及一种显示面板及显示装置。
背景技术
微型OLED(Micro OLED)显示器涉及有机发光二极管(OLED)技术和CMOS技术的结合，与光电子产业和微电子产业的交叉集成相关，促进了新一代微型显示技术的发展，也推进了硅上有机电子、甚至是硅上分子电子的研究和发展。
微型OLED(Micro OLED)显示器具有优秀的显示特性，例如分辨率高、亮度高、色彩丰富、驱动电压低、响应速度快、功耗低等，具有广阔的发展前景。
需要说明的是，在上述背景技术部分公开的信息仅用于加强对本公开的背景的理解，因此可以包括不构成对本领域普通技术人员已知的现有技术的信息。
发明内容
本公开的目的在于提供一种显示面板及显示装置。
根据本公开的一个方面，提供一种显示面板，包括：
驱动背板，具有像素驱动区和围绕所述像素驱动区的外围区，所述外围区具有绑定焊盘；所述驱动背板的边沿由第一段和第二段围成，所述绑定焊盘位于所述第一段和所述像素驱动区之间；
多个检测垫，设于所述第二段，且沿所述第二段分布；
发光功能层，设于所述驱动背板上，且位于所述像素驱动区；
柔性电路板，延伸至所述第一段与所述像素驱动区之间，且与所述绑定焊盘绑定；
第一封装层，设于所述发光功能层背离所述驱动背板的一侧，所述第一封装层在所述驱动背板上的正投影覆盖所述像素驱动区和所述检测垫。
在本公开的一种示例性实施例中，所述驱动背板具有露出所述绑定焊盘的绑定孔，所述柔性电路板通过填充于所述绑定孔内的导电材料与所述绑定焊盘绑定。
在本公开的一种示例性实施例中，所述驱动背板包括：
衬底；
驱动晶体管，设于所述衬底一侧，且位于所述像素驱动区；
多层走线层，沿背离所述衬底的方向依次间隔分布于所述驱动晶体管背离所述衬底的一侧；至少一个所述走线层与所述发光功能层连接，所述驱动晶体管的栅极、第一极 和第二极中的每一个至少与一个所述走线层连接。
在本公开的一种示例性实施例中，所述走线层包括第一走线层和第二走线层；所述驱动背板还包括：
第一平坦层，覆盖所述驱动晶体管；所述第一走线层设于所述第一平坦层背离所述衬底的表面，并与所述驱动晶体管连接；
第二平坦层，覆盖所述第一走线层；所述第二走线层设于所述第一平坦层背离所述衬底的一侧，并与所述第一走线层连接；
第三平坦层，覆盖所述第二走线层，所述发光功能层设于所述第三平坦层背离所述衬底的表面，且与所述第二走线层连接；
所述绑定焊盘与所述第一走线层同层设置，所述绑定孔贯穿所述第三平坦层和所述第二平坦层。
在本公开的一种示例性实施例中，所述驱动晶体管包括：
有源层，设于所述衬底内，所述第一极和所述第二极间隔设于所述有源层；
栅绝缘层，设于所述有源层上，且露出所述第一极和所述第二极；
所述栅极设于所述栅绝缘层背离所述有源层的表面；所述第一极、所述第二极和所述栅极与所述第一走线层连接。
在本公开的一种示例性实施例中，所述发光功能层包括：
第一电极，设于所述驱动背板上；所述检测垫与所述第一电极同层设置；
发光材料层，设于所述第一电极背离所述驱动背板的一侧；
第二电极，设于所述发光材料层背离所述驱动背板的一侧。
在本公开的一种示例性实施例中，所述柔性电路板具有多个并排间隔设置的导电触片；所述绑定焊盘和所述绑定孔的数量相同且均为多个，各所述绑定孔一一对应的露出各所述绑定焊盘，各所述导电触片一一对应的覆盖各所述绑定孔，并通过导电材料与所述绑定焊盘连接。
在本公开的一种示例性实施例中，所述导电触片用于与所述绑定焊盘连接的区域的面积不小于所述导电触片面积的80％。
在本公开的一种示例性实施例中，所述驱动背板呈矩形，所述第一段为所述矩形的一边，所述第二段包括所述矩形的其他边。
在本公开的一种示例性实施例中，所述驱动背板的边沿包括相对的第一短边和第二短边以及相对的第一长边和第二长边，所述第一段为所述第一短边，所述第二段包括第二短边、第一长边和第二长边；所述第二短边、所述第一长边和所述第二长边均设有数量相同的所述检测垫。
在本公开的一种示例性实施例中，所述绑定孔的孔径向靠近所述绑定焊盘逐渐减小。
在本公开的一种示例性实施例中，所述绑定孔的侧壁相对于所述绑定焊盘的坡度不小于40°，且不大于70°。
在本公开的一种示例性实施例中，所述显示面板还包括：
彩膜层，设于所述第一封装层背离所述驱动背板的一侧，且与所述像素驱动区对应；
第二封装层，设于所述彩膜层背离所述驱动背板的一侧，所述第二封装层在所述驱动背板上的正投影覆盖所述像素驱动区、所述外围区和所述检测垫；
透明盖板，至少覆盖所述第二封装层，对应于所述像素驱动区。
在本公开的一种示例性实施例中，所述第一封装层和所述第二封装层在对应于所述检测垫的区域依次层叠于所述检测垫背离所述驱动背板的表面。
在本公开的一种示例性实施例中，所述彩膜层在所述驱动背板上的投影位于所述像素驱动区内，且所述彩膜层与所述检测垫在平行于所述驱动背板的方向上的距离为150μm-200μm。
根据本公开的一个方面，提供一种显示装置，包括上述任意一项所述的显示面板。
应当理解的是，以上的一般描述和后文的细节描述仅是示例性和解释性的，并不能限制本公开。
附图说明
此处的附图被并入说明书中并构成本说明书的一部分，示出了符合本公开的实施例，并与说明书一起用于解释本公开的原理。显而易见地，下面描述中的附图仅仅是本公开的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为相关技术中显示面板的示意图。
图2为本公开显示面板一实施方式的俯视图。
图3为本公开显示面板一实施方式中未绑定柔性电路板的俯视图。
图4为图2中显示面板一实施方式中A-A截面图。
图5为图2中显示面板一实施方式中B-B截面图。
图6为图3中显示面板一实施方式中C-C截面图。
图7为本公开基板的未切割成显示面板时的俯视图。
具体实施方式
现在将参考附图更全面地描述示例实施方式。然而，示例实施方式能够以多种形式 实施，且不应被理解为限于在此阐述的实施方式；相反，提供这些实施方式使得本公开将全面和完整，并将示例实施方式的构思全面地传达给本领域的技术人员。图中相同的附图标记表示相同或类似的结构，因而将省略它们的详细描述。此外，附图仅为本公开的示意性图解，并非一定是按比例绘制。
虽然本说明书中使用相对性的用语，例如“上”“下”来描述图标的一个组件对于另一组件的相对关系，但是这些术语用于本说明书中仅出于方便，例如根据附图中所述的示例的方向。能理解的是，如果将图标的装置翻转使其上下颠倒，则所叙述在“上”的组件将会成为在“下”的组件。当某结构在其它结构“上”时，有可能是指某结构一体形成于其它结构上，或指某结构“直接”设置在其它结构上，或指某结构通过另一结构“间接”设置在其它结构上。
用语“一个”、“一”、“该”、“所述”用以表示存在一个或多个要素/组成部分/等；用语“包括”和“具有”用以表示开放式的包括在内的意思并且是指除了列出的要素/组成部分/等之外还可存在另外的要素/组成部分/等；用语“第一”、“第二”和“第三”仅作为标记使用，不是对其对象的数量限制。
相关技术中，显示面板可包括驱动背板、设于驱动背板上的发光器件以及对发光器件进行封装的封装层、彩膜层等；其中，如图1所示，驱动背板1a可与柔性电路板2a绑定，也就是将柔性电路板2a的导电触片与驱动背板1a的绑定焊盘绑定，以便通过驱动背板1a驱动发光器件发光。
由于各膜层厚度的均一性直接影响着显示面板的性能，为了便于检测膜层厚度的均一性，驱动背板的边缘经常设有多个导电的检测垫，对于需要检测膜厚均一性的膜层，例如封装层或其它膜层，通过膜厚测试仪对各个检测垫上的该膜层的厚度进行检测，通过比对，可确定该膜层的均一性。但是，由于检测垫分布于驱动背板的边缘，在绑定柔性电路板时，柔性电路板的导电触片不仅与绑定焊盘接触，还可能与检测垫接触，容易造成短路，导致显示异常。
本公开实施方式提供了一种显示面板，该显示面板可以是OLED显示面板，如图2-图6所示，本公开实施方式的显示面板包括驱动背板1、检测垫2、发光功能层3、柔性电路板4、第一封装层5，其中：
驱动背板1具有像素驱动区S1和围绕像素驱动区S1的外围区S2，外围区S2具有绑定焊盘6；驱动背板1的边沿由第一段11和第二段12围成，绑定焊盘6位于第一段11和像素驱动区S1之间；
多个检测垫2设于第二段12，且沿第二段12分布；
发光功能层3设于驱动背板1上，且位于像素驱动区S1；
柔性电路板4延伸至第一段11与像素驱动区S1之间，并与绑定焊盘6绑定；
第一封装层5设于发光功能层3背离驱动背板1的一侧，第一封装层5在驱动背板1上的正投影覆盖像素驱动区S1和检测垫2。
本公开实施方式的显示面板，柔性电路板4贴合于驱动背板1位于第一段11和像素驱动区S1之间的区域，并覆盖绑定孔100，可将柔性电路板4与绑定焊盘6绑定。由于检测垫2设于驱动背板1的边沿的第二段12，而不在第一段11设置，而绑定焊盘6位于第一段11和像素驱动区S1之间，可避免柔性电路板4与检测垫2接触，从而防止短路，保证正常显示。
下面对本公开实施方式显示面板的各部分进行详细说明：
如图2和图3所示，驱动背板1的像素驱动区S1具有像素驱动电路，用于驱动发光功能层3发光，该像素驱动电路可以包括常规的2T1C(即两个晶体管和一个电容)像素电路，4T2C、5T1C、7T1C等像素驱动电路。具体电路结构和驱动方式在此不做特殊限定。外围区S2可具有数据驱动电路，栅极驱动电路、发光控制电路等外围电路，用于向像素驱动电路输出信号，具体电路结构和驱动方式在此不做特殊限定。
如图4-图6所示，驱动背板1可包括衬底101、驱动晶体管102和多层走线层，其中，驱动晶体管102可位于像素驱动区S1，其可以是像素驱动电路中与发光功能层3连接的晶体管，驱动晶体管102可包括栅极、第一极(源极)和第二极(漏极)。
各走线层可设于衬底101的一侧，且沿背离衬底101的方向依次间隔分布，相邻两走线层可通过绝缘材料的平坦层分隔。各走线层中至少一个与发光功能层3连接，各走线层中至少一个与驱动晶体管102连接(电连接)，例如，驱动晶体管102的栅极、第一极和第二极均与同一层走线层连接。但发光功能层3与驱动晶体管102可连接至不同的走线层。走线层位于像素驱动区S1内的区域可用于实现分层布线，并可通过跨层连接构成像素驱动电路。
对于驱动背板1为硅基驱动背板的实施方式，各走线层中的至少一层为反光材质，以保证发光功能层3发出的光线向背离驱动背板1的方向出射。
在本公开的一些实施方式中，如图4-图6所示所示，驱动背板1可以是硅基驱动背板，具体而言，衬底101可为硅基底，其材料可以是单晶硅等。
驱动晶体管102可包括有源层1021、栅绝缘层1022和栅极1023，其中，有源层1021可通过掺杂工艺形成于衬底101内，且包括间隔的第一极10211和第二极10212。栅绝缘层1022设于有源层1021上，且露出第一极10211和第二极10212。栅极1023设于栅绝缘层1022背离有源层1021的表面。
走线层可包括第一走线层103和第二走线层104，其中，第一走线层103与第一极 10211、第二极10212和栅极1023通过过孔连接，该过孔为钨孔或其它金属化孔。第二走线层104设于第一走线层103背离衬底101的一侧，且与发光功能层3连接(电连接)，且第二走线层104为反光材质。
在本公开的一些实施方式中，栅极1023和各走线层(第一走线层103和第二走线层104)中的至少一层具有位于外围区S2内的区域，以便形成外围驱动电路，例如发光控制电路、栅极驱动电路等。
进一步的，驱动背板1还包括第一平坦层105、第二平坦层106和第三平坦层107，其中：
第一平坦层105覆盖驱动晶体管102，即衬底101位于栅极1023以外的区域，第一走线层103设于第一平坦层105背离衬底101的表面，并与驱动晶体管102通过贯穿第一平坦层105的过孔连接。
第二平坦层106覆盖第一走线层103，且覆盖第一平坦层105位于第一走线层103以外的区域；第二走线层104设于第二平坦层106背离衬底101的一侧，并与第一走线层103通过过孔连接。
第三平坦层107覆盖第二走线层104，且覆盖第二平坦层106位于第二走线层104设以外的区域。发光功能层3可设于第三平坦层107背离衬底101的表面，且与第二走线层104通过过孔连接。
绑定焊盘6与第一走线层103同层设置，绑定孔100贯穿第三平坦层107和第二平坦层106。
外围区S2具有绑定焊盘6，该绑定焊盘6可与柔性电路板4绑定，并与外围区S2的电路连接，从而可通过柔性电路板4输入信号。绑定焊盘6的数量为多个，可并排间隔设置于外围区S2的绑定区。
上述的第一平坦层105、第二平坦层106和第三平坦层107的材料可以包括氮化硅、氧化硅或其它绝缘材料，在此不做特殊限定。
如图3所示，驱动背板1的边沿可由第一段11和第二段12围成，第一段11和第二段12的形状在此不做特殊限定，只要能围成封闭的图形即可。举例而言，驱动背板1呈矩形，第一段11为矩形的一边，第二段12包括矩形的其他边，进一步的，驱动背板1的边沿包括相对的第一短边和第二短边以及相对的第一长边和第二长边，第一段11可以是第一短边、第二短边、第一长边和第二长边中的任一个，第二段12由其他边连接而成：例如，第一段11为第一短边，第二段12包括第二短边、第一长边和第二长边。
绑定焊盘6位于第一段11和像素驱动区S1之间。例如：绑定焊盘6位于第一短边和像素驱动区S1之间。
在本公开的一些实施方式中，如图4和图6所示，绑定焊盘6可以位于驱动背板1的内部，且驱动背板1设有露出绑定焊盘6的绑定孔100，柔性电路板4可覆盖绑定孔100，并通过导电材料200与绑定焊盘6连接。进一步的，绑定焊盘6与上述的各走线层之一同层设置，例如绑定焊盘6可与第一走线层103同层设置，从而可通过同一次构图工艺同时形成。
进一步的，绑定孔100的孔径向靠近绑定焊盘6逐渐减小，使得绑定孔100沿垂直于驱动背板1的方向的截面为倒梯形。
此外，绑定孔100的侧壁相对于绑定焊盘6的坡度，即绑定孔100沿垂直于驱动背板1的方向的截面与绑定焊盘6的表面的夹角，不小于40°，且不大于70°，例如40°、50°、60°或70°。
当然，在本公开的其它实施方式中，绑定焊盘6也可位于驱动背板1的表面，例如，第三平坦层107背离衬底101的表面，柔性电路板4可直接搭接于绑定焊盘6，并与绑定焊盘6绑定。
如图2和图5所示，检测垫2可为导电材质，其材料可包括导电性良好的铜、铜合金等。同时，检测垫2的数量为多个，例如24个，并设于驱动背板1的边沿的第二段12，即位于外围区S2的边沿，各个检测垫2沿第二段12的延伸轨迹分布。同时，驱动背板1的边沿的第一段11不设置检测垫2，以防止柔性电路板4与检测垫2接触，而导致电路短路。在本公开的一些实施方式中，驱动背板1的第二短边、第一长边和第二长边均设有数量相同且均匀分布的检测垫2，而第一短边不设置检测垫2。
检测垫2可设于驱动背板1用于设置发光功能层3的表面，并可与也可嵌入该表面，例如，第三平坦层107背离衬底101的表面。检测垫2上可层叠其它膜层，从而可采用膜厚测试仪对检测垫2上的膜层的厚度进行检测。
检测垫2的形状可以是矩形、五边形、六边形等多边形，还可以是圆形或其它形状，当然，检测垫2也可以是在将一基板切割成多个显示面板时被切割而形成的不规则形状，在此不做特殊限定。此外，不同的检测垫2的形状和尺寸可以不同。
如图4和图5所示，发光功能层3设于驱动背板1上，且位于像素驱动区S1，即发光功能层3在驱动背板1的投影位于像素驱动区S1以内。发光功能层3包含多个发光器件，每个发光器件可与一驱动晶体管102连接，并可独立发光。
在本公开的一些实施方式中，如图4和图5所示，发光功能层3包括第一电极31、像素定义层32、发光材料层33和第二电极34，其中：
第一电极31作为发光器件的阳极，其数量为多个，且阵列分布于驱动背板1上，例如，分布于第三平坦层107背离衬底101的表面。第一电极31的材料包括ITO(氧化铟 锡)或其它透明导电材料。在本公开的一些实施方式中，检测垫2可与第一电极31同层设置，以便通过同一次构图工艺形成。例如，在对基板进行切割而形成多个显示面板前，相邻两个显示面板的至少部分检测垫2对接且形成一体结构的导电片，导电片可与第一电极31同层设置，以便通过同一次构图工艺形成。进一步的，导电片的形状和尺寸可与第一电极31相同，例如，导电片和第一电极31的形状均为矩形、六边形等，以便提高膜层的均匀性。
在切割基板形成显示面板时，每个导电片可从中间位置被切割成两个对称的检测垫2，当然，切割位置不一定位于导电片的中间位置，使得切割后的两个检测垫2的形状和尺寸可以不同。
像素定义层32与所述第一电极31设于驱动背板1的同一表面，且具有露出各第一电极31的像素开口。
发光材料层33可覆盖像素定义层32并覆盖各个像素开口内的第一电极31。发光材料层33至少包括至少一层发光单元层，每个发光单元层至少包括向背离驱动背板1的方向依次层叠的空穴传输层、发光层和电子传输层。若发光单元层数量为多个，则相邻两层发光单元层之间通过电荷产生层连接。
在本公开的一些实施方式中，发光材料层33仅位于像素驱动区S1内，而外围区S2内则不设置发光材料层33，例如，可通过open mask工艺在像素驱动区S1内蒸镀发光材料层33，而外围区S2不被蒸镀，即检测垫2不被发光材料层33覆盖。
此外，如图5所示，距离外围区S2最近的第一电极，发光材料层33在像素驱动区S1和外围区S2的边界处，可向驱动背板1延伸，从而将距离外围区S2最近的第一电极31靠近外围区S2的边缘包覆，即所有第一电极31均位于发光材料层33在驱动背板的投影以内，且发光材料层33的边缘延伸至驱动背板1。但发光材料层33可以不延伸至检测垫2，也就是说，检测垫2和像素驱动区S1之间可以存在未被发光材料层33覆盖的区域。
第二电极34设于发光材料层33背离驱动背板1的表面，每个像素开口对应的第一电极31、发光材料层33和第二电极34可构成一发光器件，像素驱动区S1的各驱动晶体管102可与第一电极31一一对应的连接，以便驱动各发光器件独立发光。第二电极34的材料可包括Mg/Ag合金材料或者其他材料。
在本公开的一些实施方式中，第二电极34仅位于像素驱动区S1内，而外围区S2内则不设置第二电极34，例如，可通过open mask工艺在像素驱动区S1内形成第二电极34，而外围区S2没有第二电极34，即检测垫2不被第二电极34覆盖。
在本公开的另一些实施方式中，第二电极34可延伸至外围区S2，并覆盖发光材料 层33向驱动背板1延伸的表面，从而延伸至驱动背板1，对发光材料层33的边缘进行包覆。
如图4和图5所示，显示面板还可包括第一封装层5，第一封装层5可设于发光功能层3背离驱动背板1的一侧，且第一封装层5在驱动背板1上的正投影覆盖像素驱动区S1和检测垫2，从而可通过检测各个检测垫2上的第一封装层5的膜厚，对第一封装层5的膜厚的均一性进行判断。在本公开的一些实施方式中，第一封装层5在外围区S2的部分可层叠于检测垫2背离驱动背板1的表面，以便对第一封装层5的均一性进行检测。
第一封装层5可以是单层或多层结构，若第一封装层5为多层结构，包括多个子封装层，则可在每形成一层子封装层后，就对膜厚进行检测，以便判断每层子封装层的均一性。通过第一封装层5可实现对水汽、氧气的有效阻挡，达到保护发光器件的目的。
具体而言，在形成第一封装层5的每一子封装层后，可通过膜厚测试仪对每个检测垫2上的子封装层的膜厚进行检测，由于检测垫2分布在多个位置，从而可反映子封装层的不同区域的膜厚，根据不同检测垫2上的子封装层的膜厚的差异可确定子封装层的膜厚的均一性。
进一步的，由于上述的发光材料层33为连续的膜层，其发光颜色为单一的颜色，即各个发光器件的发光颜色相同，例如白光或其它颜色的光线。为了实现彩色显示，本实施方式的显示面板还可包括彩膜层7，其可设于第一封装层5背离驱动背板1的一侧，且与像素驱动区S1对应，即彩膜层7在驱动背板1的投影位于像素驱动区S1内。彩膜层7具有多种颜色的滤光区，例如，彩膜层7包括红色的R滤光区、绿色的G滤光区和蓝色的B滤光区。各滤光区与发光功能层3的各发光器件一一对应设置，以便发出不同颜色的光线。
如图5所示，在本公开的一些实施方式中，第一封装层5还覆盖驱动背板1位于检测垫2和像素驱动区S1之间的区域，即沿第二电极34的表面延伸至驱动背板1上，从而对第二电极34的边缘进行包覆，使得第一封装层5为由像素驱动区S1延伸至检测垫2上的连续膜层，提高封装效果。
如图5所示，在本公开的一些实施方式中，彩膜层7在驱动背板1上的投影位于像素驱动区S1内，且彩膜层7与检测垫2在平行于驱动背板1的方向上的距离L为150μm-200μm，例如150μm、170μm、200μm等。
在本公开的其它实施方式中，发光材料层33可包括多个独立的发光单元，各发光单元一一对应的填充于各像素开口内，第二电极34覆盖发光材料层33和像素定义层32，每个像素开口对应的第一电极31、发光单元和第二电极34构成一个独立发光的发光器 件。同时，发光单元的颜色种类有多个，也就是说，不同的发光单元发光的颜色可以不同，此时，则不需要再设置上述的彩膜层7。
如图2和图4所示，柔性电路板4可延伸至第一段11与像素驱动区S1之间，柔性电路板4在显示面板所在平面上的正投影的至少部分区域位于第一段11与像素驱动区S1之间，且柔性电路板4与绑定焊盘6绑定，从而可向驱动背板1输入驱动信号，以使显示面板发光。
在本公开的一些实施方式中，如图2和图4所示，柔性电路板4具有绑定端401，该绑定端401设有多个导电触片41，其数量可与绑定焊盘6的数量相同；导电触片41的材料可包括铜、铜合金和其它金属。各个导电触片41可并排间隔分布。
柔性电路板4的绑定端401位于第一段11和像素驱动区S1之间，并与驱动背板1的表面贴合，且各导电触片41一一对应的覆盖各绑定孔100，并通过导电材料200与对应的绑定焊盘6连接。
为了保证柔性电路板4与绑定焊盘6电连接的稳定性，可使导电触片41与绑定焊盘6连接的区域的面积不小于导电触片41的面积的80％，也就是说，在绑定孔100与导电触片41重叠区域的面积大于或等于导电触片41的面积的80％，导电触片41的面积为其在柔性电路板4上的正投影的面积。
此外，柔性电路板4还具有驱动端402和连接部403，其中，驱动端402可包括驱动芯片，连接部403可为柔性结构，并连接于驱动端402和绑定端401之间。
在本公开的一些实施方式中，如图4和图5所示，显示面板还可包括第二封装层8和透明盖板9，其中：
第二封装层8可设于彩膜层7背离驱动背板1的一侧，第二封装层8在驱动背板1上的正投影覆盖像素驱动区S1和检测垫2，也就是说，第二封装层8和第一封装层5可层叠设置于检测垫2上。第二封装层8可以是单层或多层结构，其材料并不限于与第一封装层5相同。在形成第二封装层8时，可通过膜厚测试仪对各个第二封装层8位于各检测垫2上的区域的膜厚进行检测，以便判断第二封装层8的均一性，具体方式可与检测第一封装层5的方式相同，在此不再详述。通过第二封装层8可实现对水汽、氧气的有效阻挡，达到保护发光器件的目的。
在本公开的一些实施方式中，第二封装层8在外围区S2的部分可层叠于覆盖检测垫2的第一封装层5背离驱动背板1的表面，以便对第二封装层8的均一性进行检测。
此外，如图5所示，第二封装层8还覆盖第一封装层8位于检测垫2和像素驱动区S1之间的区域，也覆盖彩膜层7的边缘，使得第二封装层8为由像素驱动区S1延伸至检测垫2上的连续膜层，提高封装效果。
当然，在本公开的一些实施方式中，第一封装层5和第二封装层8中只有一个覆盖驱动背板1位于检测垫2和像素驱动区S1之间的区域。
透明盖板9可为玻璃或其他透明材质，其可设于第二封装层8背离驱动背板1的表面，至少覆盖第二封装层8，并与像素驱动区S1对应，即透明盖板9在驱动背板1上的投影覆盖像素驱动区S1。进一步的，透明盖板9略小于像素驱动区S1。
本公开实施方式还提供一种显示面板的制造方法，该显示面板的结构可参考上文中显示面板的结构，在此不再赘述，该制造方法可包括步骤S110-步骤S130，其中：
步骤S110、形成一基板，该基板包括多个上述任意实施方式的显示面板；相邻两个显示面板的至少一个检测垫对接且呈一体结构；
步骤S120、对所述基板进行切割，将上述检测垫截断，得到多个显示面板；
步骤S130、将柔性电路板与切割后的显示模组的绑定焊盘绑定。
本公开实施方式制造方法的有益效果可参考上文中显示面板的实施方式，在此不再详述。
在步骤S110中，如图7所示，可沿行方向的X线以及列方向的Y线对基板进行切割，从而将基板切割成多个显示面板，X线和Y线均穿过多个检测垫，在切割后，可将每个检测垫分为属于两个显示面板的检测垫2。其中，切割的方式可以是激光切割或其它方式，在此不做特殊限定。
本公开实施方式还提供一种显示装置，该显示装置可包括上述任意实施方式的显示面板，其具体结构在此不再详述。该显示装置可以是手机、平板电脑、电视等，在此不再一一列举。
本领域技术人员在考虑说明书及实践这里公开的发明后，将容易想到本公开的其它实施方案。本申请旨在涵盖本公开的任何变型、用途或者适应性变化，这些变型、用途或者适应性变化遵循本公开的一般性原理并包括本公开未公开的本技术领域中的公知常识或惯用技术手段。说明书和实施例仅被视为示例性的，本公开的真正范围和精神由所附的权利要求指出。

Claims (16)

  1. 一种显示面板，其中，包括：
    驱动背板，具有像素驱动区和围绕所述像素驱动区的外围区，所述外围区具有绑定焊盘；所述驱动背板的边沿由第一段和第二段围成，所述绑定焊盘位于所述第一段和所述像素驱动区之间；
    多个检测垫，设于所述第二段，且沿所述第二段分布；
    发光功能层，设于所述驱动背板上，且位于所述像素驱动区；
    柔性电路板，延伸至所述第一段与所述像素驱动区之间，且与所述绑定焊盘绑定；
    第一封装层，设于所述发光功能层背离所述驱动背板的一侧，所述第一封装层在所述驱动背板上的正投影覆盖所述像素驱动区和所述检测垫。
  2. 根据权利要求1所述的显示面板，其中，所述驱动背板具有露出所述绑定焊盘的绑定孔，所述柔性电路板通过填充于所述绑定孔内的导电材料与所述绑定焊盘绑定。
  3. 根据权利要求2所述的显示面板，其中，所述驱动背板包括：
    衬底；
    驱动晶体管，设于所述衬底一侧，且位于所述像素驱动区；
    多层走线层，沿背离所述衬底的方向依次间隔分布于所述驱动晶体管背离所述衬底的一侧；至少一个所述走线层与所述发光功能层连接，所述驱动晶体管的栅极、第一极和第二极中的每一个至少与一个所述走线层连接。
  4. 根据权利要求3所述的显示面板，其中，所述走线层包括第一走线层和第二走线层；所述驱动背板还包括：
    第一平坦层，覆盖所述驱动晶体管；所述第一走线层设于所述第一平坦层背离所述衬底的表面，并与所述驱动晶体管连接；
    第二平坦层，覆盖所述第一走线层；所述第二走线层设于所述第一平坦层背离所述衬底的一侧，并与所述第一走线层连接；
    第三平坦层，覆盖所述第二走线层，所述发光功能层设于所述第三平坦层背离所述衬底的表面，且与所述第二走线层连接；
    所述绑定焊盘与所述第一走线层同层设置，所述绑定孔贯穿所述第三平坦层和所述第二平坦层。
  5. 根据权利要求4所述的显示面板，其中，所述驱动晶体管包括：
    有源层，设于所述衬底内，所述第一极和所述第二极间隔设于所述有源层；
    栅绝缘层，设于所述有源层上，且露出所述第一极和所述第二极；
    所述栅极设于所述栅绝缘层背离所述有源层的表面；所述第一极、所述第二极和所述栅极与所述第一走线层连接。
  6. 根据权利要求1所述的显示面板，其中，所述发光功能层包括：
    第一电极，设于所述驱动背板上；所述检测垫与所述第一电极同层设置；
    发光材料层，设于所述第一电极背离所述驱动背板的一侧；
    第二电极，设于所述发光材料层背离所述驱动背板的一侧。
  7. 根据权利要求2所述的显示面板，其中，所述柔性电路板具有多个并排间隔设置的导电触片；所述绑定焊盘和所述绑定孔的数量相同且均为多个，各所述绑定孔一一对应的露出各所述绑定焊盘，各所述导电触片一一对应的覆盖各所述绑定孔，并通过导电材料与所述绑定焊盘连接。
  8. 根据权利要求7所述的显示面板，其中，所述导电触片用于与所述绑定焊盘连接的区域的面积不小于所述导电触片面积的80％。
  9. 根据权利要求1所述的显示面板，其中，所述驱动背板呈矩形，所述第一段为所述矩形的一边，所述第二段包括所述矩形的其他边。
  10. 根据权利要求9所述的显示面板，其中，所述驱动背板的边沿包括相对的第一短边和第二短边以及相对的第一长边和第二长边，所述第一段为所述第一短边，所述第二段包括第二短边、第一长边和第二长边；所述第二短边、所述第一长边和所述第二长边均设有数量相同的所述检测垫。
  11. 根据权利要求1所述的显示面板，其中，所述绑定孔的孔径向靠近所述绑定焊盘逐渐减小。
  12. 根据权利要求11所述的显示面板，其中，所述绑定孔的侧壁相对于所述绑定焊盘的坡度不小于40°，且不大于70°。
  13. 根据权利要求1所述的显示面板，其中，所述显示面板还包括：
    彩膜层，设于所述第一封装层背离所述驱动背板的一侧，且与所述像素驱动区对应；
    第二封装层，设于所述彩膜层背离所述驱动背板的一侧，所述第二封装层在所述驱动背板上的正投影覆盖所述像素驱动区、所述外围区和所述检测垫；
    透明盖板，至少覆盖所述第二封装层，对应于所述像素驱动区。
  14. 根据权利要求13所述的显示面板，其中，所述第一封装层和所述第二封装层在对应于所述检测垫的区域依次层叠于所述检测垫背离所述驱动背板的表面。
  15. 根据权利要求13所述的显示面板，其中，所述彩膜层在所述驱动背板上的投影位于所述像素驱动区内，且所述彩膜层与所述检测垫在平行于所述驱动背板的方向上的距离为150μm-200μm。
  16. 一种显示装置，其中，包括权利要求1-15任一项所述的显示面板。
PCT/CN2020/081860 2020-03-27 2020-03-27 显示面板及显示装置 Ceased WO2021189487A1 (zh)

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