WO2021237867A1 - 显示基板及其制造方法和显示装置 - Google Patents

显示基板及其制造方法和显示装置 Download PDF

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Publication number
WO2021237867A1
WO2021237867A1 PCT/CN2020/099169 CN2020099169W WO2021237867A1 WO 2021237867 A1 WO2021237867 A1 WO 2021237867A1 CN 2020099169 W CN2020099169 W CN 2020099169W WO 2021237867 A1 WO2021237867 A1 WO 2021237867A1
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WIPO (PCT)
Prior art keywords
layer
base substrate
orthographic projection
barrier
dam
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2020/099169
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English (en)
French (fr)
Inventor
张鑫
和玉鹏
周洋
王威
姜晓峰
王予
杨路路
张祎杨
杨光辉
卢嘉铭
郝瑞
马群
刘普
朱留东
黄强
何滨
段棣南
白海勇
李昕
魏瑞启
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
Original Assignee
BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by BOE Technology Group Co Ltd, Chengdu BOE Optoelectronics Technology Co Ltd filed Critical BOE Technology Group Co Ltd
Priority to CN202080001128.3A priority Critical patent/CN114008787B/zh
Priority to US17/271,490 priority patent/US12004367B2/en
Priority to CN202610098268.6A priority patent/CN121888823A/zh
Priority to EP20904254.8A priority patent/EP4160690A4/en
Publication of WO2021237867A1 publication Critical patent/WO2021237867A1/zh
Anticipated expiration legal-status Critical
Priority to US18/645,891 priority patent/US12446449B2/en
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/88—Dummy elements, i.e. elements having non-functional features
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/84—Passivation; Containers; Encapsulations
    • H10K50/844—Encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/124—Insulating layers formed between TFT elements and OLED elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/87—Passivation; Containers; Encapsulations
    • H10K59/873—Encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/60—OLEDs integrated with inorganic light-sensitive elements, e.g. with inorganic solar cells or inorganic photodiodes
    • H10K59/65—OLEDs integrated with inorganic image sensors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K77/00—Constructional details of devices covered by this subclass and not covered by groups H10K10/80, H10K30/80, H10K50/80 or H10K59/80
    • H10K77/10—Substrates, e.g. flexible substrates
    • H10K77/111—Flexible substrates

Definitions

  • the present disclosure relates to the field of display technology, and in particular to a method of manufacturing a display substrate, a display substrate, and a display device.
  • a flexible display device is a display device formed based on a flexible substrate material. Because the flexible display device has the characteristics of being rollable, wide viewing angle, and easy to carry, it has been more and more widely used in various display products. Moreover, with the rapid development of full-screen mobile phones, various mobile phone and panel manufacturers are actively researching and developing screen opening technology, hoping to place the necessary cameras, speakers, sensors, etc. of smartphones under the screen to achieve a true full-screen display. . In this way, the manufacturing process of forming the openings in the flexible display device has become one of the important topics that the researchers in the field of display technology pay attention to.
  • a display substrate including:
  • a base substrate, the base substrate includes at least a pixel area and an opening area
  • An opening the opening being located in the opening area
  • a first blocking dam, the first blocking dam is disposed between the sub-pixel and the opening, and at least partially surrounds the opening;
  • a second blocking dam, the second blocking dam is arranged on a side of the first blocking dam away from the opening;
  • An organic material layer the orthographic projection of the organic material layer on the base substrate falls into the pixel area, and the organic material layer includes at least one film layer;
  • a filling structure at least a part of the filling structure is arranged between the opening and the first blocking dam
  • the filling structure and the at least one film layer of the organic material layer are located in the same layer, and the filling structure and the at least one film layer of the organic material layer include the same material;
  • the width of the orthographic projection of the first barrier dam on the base substrate is smaller than the width of the orthographic projection of the second barrier dam on the base substrate.
  • the filling structure includes a single filling film layer, the organic material layer includes a planarization layer; and the filling film layer and the planarization layer are located in the same layer, and the filling film The layer and the planarization layer include the same material.
  • the filling structure includes a first filling film layer and a second filling film layer, and the organic material layer includes a planarization layer and a pixel defining layer; the first filling film layer and the planarization layer
  • the first filling film layer and the planarization layer include the same material; and the second filling film layer and the pixel defining layer are located in the same layer, and the second filling film layer and the pixel defining layer are located in the same layer.
  • the filling film layer and the pixel defining layer include the same material.
  • the display substrate includes a plurality of the first barrier dams, and a first barrier dam of the plurality of first barrier dams closest to the opening is positioned on the base substrate.
  • the projection and the orthographic projection of the filling structure on the base substrate do not overlap.
  • the display substrate includes a plurality of the first barrier dams, and a first barrier dam of the plurality of first barrier dams closest to the opening is positioned on the base substrate.
  • the projection partially overlaps with the orthographic projection of the filling structure on the base substrate.
  • the display substrate includes a plurality of the first barrier dams, and the orthographic projection of the filling structure on the base substrate covers the opening closest to the plurality of first barrier dams An orthographic projection of a first barrier dam on the base substrate.
  • the display substrate further includes a functional film layer disposed on a side of the organic material layer close to the base substrate, and the functional film layer includes:
  • a first conductive layer provided on the base substrate
  • a gate insulating layer disposed on a side of the first conductive layer away from the base substrate;
  • a second conductive layer disposed on the side of the gate insulating layer away from the base substrate;
  • An interlayer dielectric layer disposed on the side of the second conductive layer away from the base substrate;
  • a third conductive layer disposed on the side of the interlayer dielectric layer away from the base substrate.
  • a passivation layer arranged on the side of the third conductive layer away from the base substrate.
  • the first barrier dam includes the first conductive layer, the gate insulating layer, the second conductive layer, the interlayer dielectric layer, and the third conductive layer. And a laminated structure formed by a portion of each of the passivation layers; and the passivation layer includes a first portion located on the first barrier dam, and the third conductive layer includes a portion located on the first barrier dam.
  • the orthographic projection of the first part of the passivation layer on the base substrate falls within the orthographic projection of the first part of the third conductive layer on the base substrate.
  • the orthographic projection of the filling structure on the base substrate covers the orthographic projection of the first part of the passivation layer on the base substrate.
  • the orthographic projection of the filling structure on the base substrate partially overlaps the orthographic projection of the first barrier dam on the base substrate, and the area of the overlapping portion is the second One-half of the area of the orthographic projection of a blocking dam on the base substrate.
  • the filling structure includes a first filling part and a second filling part, the second filling part being closer to the first barrier dam than the first filling part; the first filling Part includes a first surface away from the base substrate, the second filling part includes a second surface away from the base substrate; and the vertical distance between the first surface and the base substrate is greater than the The vertical distance between the second surface and the base substrate.
  • the first barrier dam includes a top surface away from the base substrate and a side surface facing the opening, and the passivation layer partially covers the top surface of the first barrier dam , The passivation layer covers the side surface of the first barrier dam.
  • the area of the orthographic projection of the portion of the passivation layer covering the top surface of the first barrier dam on the base substrate is such that the area of the first portion of the third conductive layer is 3/10 to 7/10 of the area of the orthographic projection on the base substrate.
  • the orthographic projection of the first barrier dam on the base substrate and the filling structure on the base substrate except the first barrier dam closest to the opening The orthographic projection interval setting.
  • the display substrate further includes a third blocking dam, the third blocking dam is disposed on a side of the second blocking dam away from the opening, and the third blocking dam is located on the side of the opening.
  • the width of the orthographic projection on the base substrate is greater than the width of the orthographic projection of the second barrier dam on the base substrate.
  • the display substrate further includes a fourth blocking dam, the fourth blocking dam is disposed on a side of the third blocking dam away from the opening, and the fourth blocking dam is located on the side of the opening.
  • the width of the orthographic projection on the base substrate is substantially equal to the width of the orthographic projection of the first barrier dam on the base substrate.
  • the display substrate further includes a functional film layer disposed on a side of the organic material layer close to the base substrate, and the functional film layer includes:
  • a barrier layer provided on the base substrate
  • a buffer layer arranged on the side of the barrier layer away from the base substrate;
  • a first gate insulating layer disposed on the side of the buffer layer away from the base substrate;
  • a first conductive layer disposed on a side of the first gate insulating layer away from the base substrate;
  • a second gate insulating layer disposed on the side of the first conductive layer away from the base substrate;
  • a second conductive layer disposed on the side of the second gate insulating layer away from the base substrate;
  • An interlayer dielectric layer disposed on the side of the second conductive layer away from the base substrate;
  • a third conductive layer arranged on the side of the interlayer dielectric layer away from the base substrate.
  • the filling structure further includes a portion located in at least one of the barrier layer and the buffer layer.
  • the first barrier dam at least includes a laminated structure formed by a portion of each of the barrier layer, the buffer layer, and the third conductive layer; and/or, the The second barrier dam includes at least a laminated structure formed by a part of each of the planarization layer and the pixel defining layer; and/or, the third barrier dam includes at least a laminate structure located on the planarization layer and the A laminated structure formed by a part of each of the pixel defining layers; and/or, the fourth barrier dam includes at least a part formed by each of the barrier layer, the buffer layer, and the third conductive layer Laminated structure.
  • the cross section of each of the first barrier dam and the second barrier dam is trapezoidal, and the cross section is perpendicular to the base substrate provided with the first The surface of the barrier dam and the second barrier dam, and the cross section extends in a first direction, the first direction is from the opening area to the pixel area; the width of the first barrier dam is the smallest The size is 1/4 ⁇ 3/8 of the minimum dimension of the width of the second barrier dam, and the maximum dimension of the width of the first barrier dam is 3/10 ⁇ 3/8 of the maximum dimension of the width of the second barrier dam. 2/5.
  • the cross section of each of the first barrier dam and the third barrier dam is trapezoidal, and the cross section is perpendicular to the base substrate provided with the first The surface of the barrier dam and the third barrier dam, and the cross section extends in a first direction, the first direction is from the opening area to the pixel area; the width of the first barrier dam is the smallest The size is 1/16 ⁇ 3/16 of the minimum dimension of the width of the third barrier dam, and the maximum dimension of the width of the first barrier dam is 3/20 ⁇ 3/16 of the maximum dimension of the width of the third barrier dam. 1/5.
  • the material of the organic material layer includes at least one selected from polymethyl methacrylate, polycarbonate, polystyrene, epoxy resin, polyimide, and polyethylene.
  • the base substrate is a flexible base substrate
  • the display substrate further includes a back film disposed on a surface of the base substrate away from the organic material layer.
  • a display device including the display substrate as described above.
  • a method for manufacturing a display substrate which includes the following steps:
  • the base substrate including at least a pixel area and a cutting area
  • a functional film layer is formed on the base substrate, the functional film layer includes at least an inorganic material layer, the orthographic projection of a part of the inorganic material layer on the base substrate falls into the pixel area, and the inorganic material layer The orthographic projection of another part of the material layer on the base substrate covers the cutting area;
  • the cutting line is located in the cutting area
  • the step of forming an organic material layer on the base substrate includes:
  • An organic material layer is formed on the side of the functional film layer away from the base substrate, so that the orthographic projection of a part of the organic material layer on the base substrate falls into the pixel area, and the organic material layer The orthographic projection of the other part on the base substrate covers the cutting area, so that the other part of the organic material layer forms a filling structure for filling the groove.
  • the organic material layer includes a planarization layer.
  • the organic material layer includes a planarization layer and a pixel defining layer.
  • the manufacturing method further includes: forming a first barrier dam on the base substrate, wherein the first barrier dam surrounds the cutting area.
  • the orthographic projection of the filling structure on the base substrate and the orthographic projection of the first barrier dam on the base substrate do not overlap.
  • the orthographic projection of the filling structure on the base substrate partially overlaps the orthographic projection of the first barrier dam on the base substrate.
  • the orthographic projection of the filling structure on the base substrate covers the orthographic projection of the first barrier dam on the base substrate.
  • pressure is applied to attach the base substrate and the backing film so that The portion of the base substrate located in the cutting area and the portion of the base substrate located in the pixel area are both attached to the back film.
  • the step of forming a functional film layer on the base substrate includes: sequentially forming a barrier layer, a buffer layer, a first conductive layer, a gate insulating layer, and a second conductive layer on the base substrate.
  • the surface of the planarization layer away from the base substrate includes a first planarization layer
  • the surface portion and the surface portion of the second planarization layer, the orthographic projection of the surface portion of the first planarization layer on the base substrate and the orthographic projection of the cutting area on the base substrate at least partially overlap, so The orthographic projection of the surface portion of the second planarization layer on the base substrate and the orthographic projection of the first barrier dam on the base substrate at least partially overlap; the surface portion of the first planarization layer is in the first
  • the vertical distance d1 between the reference planes at a position is smaller than the vertical distance d2 between the reference planes at the second position of the surface portion of the first planarization layer, and the vertical distance d2 is smaller than the surface portion of the second planarization layer
  • the projection falls within the orthographic projection of the cutting area on the base substrate, and the orthographic projection of the second position on the base substrate falls into the adjacent portion of the cutting area and the first barrier dam In the orthographic projection on the base substrate, the orthographic projection of the third position on the base substrate falls within the orthographic projection of the first barrier dam on the base substrate.
  • the portion of the inorganic material layer located in the cutting area is removed by an etching process.
  • the step of performing a cutting process to form an opening includes: performing a laser cutting process so that the trace of the laser projected on the base substrate falls into the groove to form a penetrating hole through the back The film, the base substrate, the functional film layer and the openings of the filling structure.
  • the slope angle of the surface portion of the first planarization layer is in the range of 10-18 degrees.
  • the difference between the vertical distance d2 and the vertical distance d1 is in the range of 100-300 nanometers.
  • the difference between the vertical distance d3 and the vertical distance d2 is in the range of 150-500 nanometers.
  • FIG. 1 shows a plan view of a display substrate according to an exemplary embodiment of the present disclosure
  • FIG. 2 is a flowchart of a manufacturing method of a display substrate according to some exemplary embodiments of the present disclosure
  • 3A to 3F are respectively cross-sectional views of the display substrate after some steps of the manufacturing method of the display substrate of some exemplary embodiments of the present disclosure are executed, and these cross-sectional views are cross-sections taken along the line AA′ in FIG. 1 picture;
  • 4A and 4B respectively show schematic diagrams of the process of attaching the back film in the comparative embodiment
  • FIG. 5 is a flowchart of a manufacturing method of a display substrate according to some exemplary embodiments of the present disclosure
  • FIGS. 6A-6E, 7 and 9-10 are respectively cross-sectional views of the display substrate after some steps of the manufacturing method of the display substrate according to some exemplary embodiments of the present disclosure are executed. These cross-sectional views are taken along the The cross-sectional view taken on the line AA' in 1;
  • FIG. 8 is a partial enlarged view of part I in FIG. 7;
  • FIG. 11 is a plan view of a portion of a display substrate around an opening according to some exemplary embodiments of the present disclosure.
  • FIG. 12 is a cross-sectional view of a display substrate according to some exemplary embodiments of the present disclosure taken along line BB' in FIG. 11;
  • FIG. 13 is a cross-sectional view of a display substrate according to other exemplary embodiments of the present disclosure, taken along line BB' in FIG. 11;
  • FIGS. 14A and 14B are respectively a cross-sectional view taken along line BB' in FIG. 11 of the display substrate according to other exemplary embodiments of the present disclosure. For clarity, FIGS. 14A and 14B only show one side of the opening. Structure;
  • 15A and 15B are respectively plan views of a plurality of first blocking dams and openings included in a display substrate according to some exemplary embodiments of the present disclosure
  • FIG. 16 is a partial plan view of a display substrate around an opening according to some exemplary embodiments of the present disclosure.
  • FIG. 17 is a cross-sectional view of a display substrate according to some exemplary embodiments of the present disclosure, taken along line CC' in FIG. 16;
  • FIG. 18 is a partial enlarged view of part I of FIG. 17;
  • FIG. 19 is a partial enlarged view of part II of FIG. 17;
  • FIG. 20 is a partial enlarged view of part III of FIG. 17;
  • FIG. 21 is a FIB (focused ion beam) diagram of a display substrate according to some exemplary embodiments of the present disclosure.
  • FIG. 22 is a FIB (focused ion beam) diagram of a display substrate according to some exemplary embodiments of the present disclosure.
  • FIG. 23 is a schematic structural diagram of a display device according to some exemplary embodiments of the present disclosure.
  • the X axis, the Y axis, and the Z axis are not limited to the three axes of the Cartesian coordinate system, and can be interpreted in a broader meaning.
  • the X axis, Y axis, and Z axis may be perpendicular to each other, or may represent different directions that are not perpendicular to each other.
  • X, Y, and Z and "at least one selected from the group consisting of X, Y, and Z” may be interpreted as only X, only Y, only Z, or Any combination of two or more of X, Y, and Z such as XYZ, XYY, YZ, and ZZ.
  • the term “and/or” includes any and all combinations of one or more of the listed related items.
  • first the terms “first”, “second”, etc. may be used herein to describe various components, components, elements, regions, layers and/or parts, these components, components, elements, regions, and layers And/or part should not be limited by these terms. Rather, these terms are used to distinguish one component, member, element, region, layer, and/or section from another.
  • first component, the first member, the first element, the first region, the first layer, and/or the first portion discussed below may be referred to as the second component, the second member, the second element, the second region , The second layer and/or the second part without departing from the teachings of the present disclosure.
  • spatial relationship terms for example, “upper”, “lower”, “left”, “right”, etc. may be used herein to describe one element or feature and another element or feature as shown in the figure. relation. It should be understood that the spatial relationship terms are intended to cover different orientations of the device in use or operation in addition to the orientations described in the figures. For example, if the devices in the figures are turned upside down, elements described as “below” or “beneath” other elements or features would be oriented “above” or “above” the other elements or features.
  • the term “same layer” used means that two layers, parts, components, elements or parts can be formed by the same patterning process, and the two layers, parts, components, elements Or part is generally formed of the same material.
  • patterning process generally includes the steps of photoresist coating, exposure, development, etching, and photoresist stripping.
  • one-time patterning process means a process of forming patterned layers, parts, components, etc., using one mask.
  • Embodiments of the present disclosure provide a display substrate and a manufacturing method thereof.
  • the display substrate includes: a base substrate including at least a pixel area and an opening area; a plurality of sub-pixels arranged on the base substrate, the plurality of sub-pixels located in the pixel area; and an opening , The opening is located in the opening area; a first barrier dam, the first barrier dam is arranged between the sub-pixel and the opening and at least partially surrounds the opening; an organic material layer, The orthographic projection of the organic material layer on the base substrate falls into the pixel area, the organic material layer includes at least one film layer; and a filling structure, at least a part of the filling structure is disposed in the opening And the first barrier dam, wherein the filling structure and at least one film layer of the organic material layer are located in the same layer, and at least one film layer of the filling structure and the organic material layer includes The materials are the same.
  • the manufacturing method of the display substrate includes the following steps: providing a base substrate, the base substrate including at least a pixel area and a cutting area; forming a functional film layer on the base substrate, the functional film layer at least including an inorganic material Layer, the orthographic projection of a part of the inorganic material layer on the base substrate falls into the pixel area, and the orthographic projection of another part of the inorganic material layer on the base substrate covers the cutting area; At least remove the part of the inorganic material layer located in the cutting area to form a groove in the cutting area of the base substrate; form an organic material layer on the base substrate; A backing film is attached to the surface on one side of the functional film layer and the organic material layer; and a cutting process is performed to form openings.
  • the cutting line is located in the cutting area, wherein the The step of forming an organic material layer on the base substrate includes: forming an organic material layer on the side of the functional film layer away from the base substrate, so that a part of the organic material layer is on the base substrate.
  • the projection falls into the pixel area, and the orthographic projection of the other part of the organic material layer on the base substrate covers the cutting area, so that the other part of the organic material layer forms a filling for filling the groove structure.
  • the above display substrate and the manufacturing method thereof by filling the organic material layer in the groove, it can be ensured that no bubbles are generated during the process of attaching the back film. Therefore, during the cutting process, the film in the pixel area is avoided.
  • the layer produces cutting cracks and/or the phenomenon that the film layers in the pixel area are separated from each other, so that the product yield can be improved.
  • FIG. 1 shows a plan view of a display substrate according to an exemplary embodiment of the present disclosure.
  • the display substrate may be an electroluminescence display substrate, such as an OLED display substrate.
  • the display substrate may be a flexible display substrate.
  • the display substrate includes a display area AA and at least one opening 10 located in the display area AA.
  • two openings 10 are provided as an example for illustration. It should be understood that the embodiment of the present disclosure is not limited thereto. In other embodiments, fewer (for example, one) or more openings 10 may be provided.
  • the opening refers to the area on the display substrate used to install the hardware structure.
  • this article will call it an opening, but the opening includes but is not limited to the following forms: Through holes, grooves, openings, etc.
  • the hardware structure may include one or more of the following structures: a front camera, a HOME key, an earpiece, or a speaker.
  • the specific installation method of the hardware structure is not particularly limited in the embodiment of the present disclosure.
  • the shape of the opening can be determined according to the shape of the hardware structure to be installed.
  • the cross section of the opening in the direction parallel to the base substrate of the display substrate can have one or more of the following shapes: Species: round, oval, rectangle, rounded rectangle, square, diamond, trapezoid, etc.
  • the opening through the display substrate may be formed by a cutting process such as laser cutting.
  • the laser needs to be projected onto the display substrate.
  • the laser needs to move relative to the display substrate, and the trajectory of the laser projected onto the display substrate forms a cutting line or a cutting track.
  • the cutting line or cutting track may extend along the outer periphery 10S of the opening 10 (as shown in FIG. 1 ).
  • the area where the opening 10 is located may be referred to as the opening area, and the other area of the display area AA except the opening 10 is referred to as the pixel area.
  • the area in which it is located is called the cutting area.
  • a plurality of sub-pixels SP may be provided in the pixel area.
  • the sub-pixels SP may include red sub-pixels, green sub-pixels, and blue sub-pixels.
  • FIG. 2 is a flowchart of a method of manufacturing a display substrate according to some exemplary embodiments of the present disclosure
  • FIGS. 3A to 3F are respectively after some steps of the method of manufacturing a display substrate of some exemplary embodiments of the present disclosure are executed.
  • the cross-sectional views of the display substrate are described. These cross-sectional views are cross-sectional views taken along the line AA′ in FIG. 1.
  • the manufacturing method may include step S101 to step S105.
  • step S101 a functional film layer is formed on the base substrate 1.
  • the manufacturing method may include a step of providing a base substrate 1.
  • the base substrate 1 may be a flexible base substrate, and the material constituting the flexible base substrate includes, but is not limited to, polyimide (PI), polyethylene terephthalate (PET), Polycarbonate, polyethylene, polyacrylate, polyetherimide or polyethersulfone, etc.
  • PI polyimide
  • PET polyethylene terephthalate
  • Polycarbonate polyethylene
  • polyacrylate polyacrylate
  • polyetherimide polyethersulfone
  • the base substrate 1 may include a display area AA, and the display area AA may include a pixel area A1 and an opening area H1 where an opening is to be formed.
  • a cutting area C1 is formed on the outer periphery of the opening area H1, and a cutting line or a cutting path is located in the cutting area C1. It should be understood that the orthographic projection of the cutting area C1 on the base substrate 1 is a closed figure, for example, a circle (or called a circular ring).
  • the functional film layer may include at least an inorganic material layer 2.
  • the inorganic material layer 2 covers the display area AA, that is, covers the pixel area A1, the opening area H1, and the cutting area C1. That is, the orthographic projection of a part of the inorganic material layer 2 on the base substrate 1 falls into the pixel area A1, and the orthographic projection of another part of the inorganic material layer 2 on the base substrate 1 covers the cutting area C1.
  • the inorganic material layer 2 may include a single inorganic material layer composed of an inorganic insulating material, but the embodiments of the present disclosure are not limited thereto, and the inorganic material layer 2 may also include a plurality of inorganic material layers composed of inorganic insulating materials. A stack of layers of inorganic materials.
  • step S102 at least a portion of the inorganic material layer 2 located in the cutting area C1 is removed. In this way, a groove 80 is formed at the cutting area C1 of the base substrate 1.
  • the orthographic projection of the groove 80 on the base substrate 1 is a closed pattern.
  • the orthographic projection of the groove 80 on the base substrate 1 is a circle, a rectangle, or the like.
  • the area surrounded by the groove 80 is an opening to be formed.
  • the portion of the inorganic material layer 2 located in the cutting area C1 may be removed by an etching process.
  • inorganic materials especially inorganic insulating materials
  • inorganic insulating materials generally have poor flexibility, and during the cutting process, cutting cracks are prone to occur in the inorganic materials.
  • the part of the inorganic material layer located in the cutting area is removed. In this way, during the subsequent cutting to form holes, the risk of cutting cracks in the inorganic material layer can be reduced, and the cutting cracks can be prevented.
  • the inorganic material layer extends toward the pixel area. Therefore, the risk of cracks in the film layer in the pixel area can be reduced or avoided, thereby improving the product yield.
  • step S103 an organic material layer 3 is formed on the base substrate 1, and at least a part of the organic material layer 3 fills the groove 80.
  • the organic material layer 3 covers the display area AA, that is, covers the pixel area A1 and the opening area H1, for example, the organic material layer 3 covers the pixel area A1 and the cutting area C1. That is, the orthographic projection of a part of the organic material layer 3 on the base substrate 1 falls into the pixel area A1, and the orthographic projection of another part of the organic material layer 3 on the base substrate 1 covers the cutting area C1.
  • FIG. 3C schematically shows that the organic material layer 3 extends continuously in the pixel area A1 and the aperture area H1.
  • this should not be understood as a limitation to the embodiment of the present disclosure. It should be understood that the organic material layer 3 The portion in the pixel area A1 and the portion of the organic material layer 3 in the hole area H1 may be disconnected.
  • the organic material layer 3 is filled in the groove 80, so that the surface of the organic material layer 3 away from the base substrate 1 includes the first surface portion 31 located in the cutting area C1 and located in the pixel area The second surface portion 32 of A1.
  • the first surface portion 31 and the second surface portion 32 may be substantially flush, that is, the vertical distance between the first surface portion 31 and the base substrate 1 is substantially equal to the vertical distance between the second surface portion 32 and the base substrate 1. It should be understood that the second surface portion 32 here should be understood as a part of the upper surface of the film layer located on top of the pixel area A1.
  • the thickness difference of the film layer between the cutting area and the pixel area caused by the groove 80 can be filled, thereby facilitating the subsequent processing process.
  • step S104 a backing film 4 is attached to the surface of the base substrate 1 away from the organic material layer 3.
  • the back film 4 may include, but is not limited to, polyimide (PI) material to enhance the strength of the base substrate 1 so as to provide better supporting force for each film layer on the base substrate 1.
  • PI polyimide
  • FIGS. 4A and 4B respectively show schematic diagrams of the process of attaching the backing film in the comparative example.
  • the organic material layer is not filled in the groove 80', that is, the above step S103 is not performed.
  • the base substrate 1'with groove 80' and the back film 4 are attached.
  • the groove 80' makes the thickness of the film layer (such as the inorganic material layer 2) in the cutting area C1 of the base substrate 1'smaller than that of the film layer (such as the inorganic material layer 2) in the pixel area A1 of the base substrate 1'
  • the thickness of layer 2) that is, the film layer in the cutting area C1 of the base substrate 1'is relatively thin.
  • the groove 80 is filled with the organic material layer 3, and the thickness of each film layer in the cutting area C1 of the base substrate 1 is relatively large. In this way, in the process of attaching the base substrate 1 and the back film 4 , Avoiding the bubble generation at the cutting area C1. Since the bubbles will not be generated during the process of attaching the backing film, cutting cracks in the film layer in the pixel area and/or separation of the film layers in the pixel area from each other are avoided, so that the product yield can be improved.
  • step S105 the opening 10 is formed by a cutting process.
  • the opening 10 may be formed by a laser cutting process.
  • the laser light L is projected to the cutting area C1.
  • the cutting area C1 may be circular, and the laser L may move relative to the base substrate 1 to form a circular trace, which corresponds to Cutting area C1.
  • an opening 10 penetrating through the back film 4, the base substrate 1, and the film layer thereon can be formed, as shown in FIG. 3F.
  • the film layer in the pixel area is prevented from producing cutting cracks and/or the film layer in the pixel area is separated from each other, thereby improving Product yield.
  • an organic light emitting diode (abbreviated as OLED) flexible display substrate is taken as an example to describe the embodiments of the present disclosure in detail. It should be understood that the electroluminescent device in the embodiments of the present disclosure is not limited to OLED devices, and it may include other types of electroluminescent devices, such as QLED devices.
  • FIG. 5 is a flowchart of a manufacturing method of a display substrate according to some exemplary embodiments of the present disclosure.
  • FIGS. 6A-6E, 7 and 9-10 are respectively cross-sectional views of the display substrate after some steps of the manufacturing method of the display substrate according to some exemplary embodiments of the present disclosure are executed. These cross-sectional views are taken along the A cross-sectional view taken at line AA' in 1.
  • FIG. 8 is a partial enlarged view of part I in FIG. 7.
  • the manufacturing method may include step S201 to step S205.
  • step S201 a functional film layer is formed on the base substrate 1.
  • the functional film layer may include a barrier layer 21 and a buffer layer 22.
  • Each of the barrier layer 21 and the buffer layer 22 may include an inorganic insulating material, such as silicon oxide, silicon nitride, silicon oxynitride, etc., silicon oxide, silicon nitride, or silicon oxynitride, or aluminum oxide, nitrogen oxide, etc. Titanium and other insulating materials including metal elements.
  • the barrier layer 21 and the buffer layer 22 may be formed by a process such as chemical vapor deposition process.
  • the functional film layer may further include a driving circuit layer, and the driving circuit layer includes a thin film transistor for driving the light emitting device to emit light.
  • the driving circuit layer may include: an active layer ACT disposed on the base substrate 1, a gate insulating layer 23 disposed on the side of the active layer ACT away from the base substrate 1, and disposed on the gate insulating layer 23
  • the gate G on the side away from the base substrate 1 is arranged on the side of the gate G away from the base substrate 1 and covers the interlayer dielectric layer 24 of the gate G, and the interlayer dielectric layer 24 is arranged away from the base substrate 1
  • the first conductive layer on one side.
  • the first conductive layer may include the source S and the drain D of the thin film transistor and the conductive plugs SH and DH formed in the via holes of the interlayer dielectric layer 24, and the source S and the drain D of the thin film transistor are respectively
  • the active layer ACT is electrically connected through respective conductive plugs SH and DH.
  • Each of the gate insulating layer 23 and the interlayer dielectric layer 24 may include an inorganic insulating material, such as silicon oxide, silicon nitride, silicon oxynitride, etc., silicon oxide, silicon nitride, or silicon oxynitride, or Insulating materials including metal elements such as aluminum oxide and titanium nitride.
  • an inorganic insulating material such as silicon oxide, silicon nitride, silicon oxynitride, etc., silicon oxide, silicon nitride, or silicon oxynitride, or Insulating materials including metal elements such as aluminum oxide and titanium nitride.
  • the inorganic material layer 2 of the functional film layer may include at least one of a barrier layer 21, a buffer layer 22, a gate insulating layer 23, and an interlayer dielectric layer 24.
  • the inorganic material layer 2 may include the barrier layer 21, the buffer layer 22, the gate insulating layer 23, and the interlayer dielectric layer 24, or the inorganic material layer 2 may include the gate insulating layer 23 and the interlayer dielectric layer 24.
  • the functional film layer includes: a first conductive layer 61 disposed on the base substrate 1; a gate insulating layer 23 disposed on the side of the first conductive layer away from the base substrate; The second conductive layer 62 on the side of the gate insulating layer away from the base substrate; the interlayer dielectric layer 24 provided on the side of the second conductive layer away from the base substrate; and the interlayer The dielectric layer is away from the third conductive layer 63 on the side of the base substrate.
  • the gate G of the thin film transistor may be located in the first conductive layer 61, that is, the first conductive layer 61 and the gate G may be formed of the same material and through the same patterning process.
  • the source S and the drain D of the thin film transistor may be located in the third conductive layer 63, that is, the third conductive layer 63 and the source S and the drain D may be formed of the same material and through the same patterning process. It should be understood that the second conductive layer 62 may be formed of a gate conductive material.
  • a first barrier dam 40 may be formed on the base substrate 1.
  • the first blocking dam 40 surrounds the cutting area C1 or the opening area H1.
  • the first blocking dam 40 may be arranged along a circumference of the cutting area C1 or the opening area H1, that is, it completely surrounds the cutting area C1 or the opening area H1.
  • the embodiment of the present disclosure is not limited to this, and the first blocking dam 40 may partially surround the cutting area C1 or the opening area H1. That is, in the embodiment of the present disclosure, the first blocking dam 40 may at least partially surround the cutting area C1 or the opening area H1.
  • the first barrier dam 40 includes the first conductive layer 61, the gate insulating layer 23, the second conductive layer 62, the interlayer dielectric layer 24, and the third conductive layer 63. Each part of the laminated structure.
  • step S202 at least a portion of the inorganic material layer 2 located in the cutting area C1 is removed. In this way, a groove 80 is formed at the cutting area C1 of the base substrate 1.
  • the portion of the inorganic material layer 2 located in the cutting area C1 may be removed by an etching process.
  • the portion of each of the gate insulating layer 23 and the interlayer dielectric layer 24 located in the cutting area C1 may be removed by an etching process to form the groove 80.
  • the embodiment of the present disclosure is not limited thereto, for example, the portion of each of the barrier layer 21, the buffer layer 22, the gate insulating layer 23, and the interlayer dielectric layer 24 located in the cutting area C1 may be removed by an etching process , To form a groove 80.
  • the first conductive layer including the source S and the drain D of the thin film transistor is formed in step S201, that is, before the groove 80 is formed.
  • the embodiment of the present disclosure is not limited to this, and the above-mentioned first conductive layer including the source electrode S and the drain electrode D of the thin film transistor may also be formed after step S202, that is, after the groove 80 is formed.
  • step S203 an organic material layer 3 is formed on the base substrate 1, and at least a part of the organic material layer 3 fills the groove 80.
  • the organic material layer 3 may include a planarization layer 33.
  • a planarization layer 33 is formed on the side of the first conductive layer away from the base substrate 1.
  • the planarization layer 33 covers the pixel area A1, the opening area H1, and the cutting area C1. That is, the orthographic projection of a part of the planarization layer 33 on the base substrate 1 falls into the pixel area A1, and the orthographic projection of another part of the planarization layer 33 on the base substrate 1 covers the cutting area C1.
  • the portion of the planarization layer 33 located in the pixel area A1 can planarize the film structure in the pixel area A1, and the portion of the planarization layer 33 located in the hole area H1 can form a filling structure 50'.
  • the organic material layer 3 may include a planarization layer 33 and a pixel defining layer 34.
  • the formed first barrier dam 40 may include the first conductive layer 61, the gate insulating layer 23, the second conductive layer 62, the interlayer dielectric layer 24, the The third conductive layer 63 and a part of each of the passivation layer 64 constitute a laminated structure.
  • a planarization layer 33 and a pixel defining layer 34 are formed on the side of the first conductive layer away from the base substrate 1.
  • the planarization layer 33 and the pixel defining layer 34 cover the pixel area A1, the opening area H1, and the cutting area C1. That is, the orthographic projection of a part of each of the planarization layer 33 and the pixel defining layer 34 on the base substrate 1 falls into the pixel area A1, and the other part of each of the planarizing layer 33 and the pixel defining layer 34 is A part of the orthographic projection on the base substrate 1 covers the cutting area C1.
  • the portion of the planarization layer 33 and the pixel defining layer 34 located in the pixel area A1 can flatten the film structure in the pixel area A1, and the portion of the planarizing layer 33 and the pixel defining layer 34 located in the hole area H1 can form a filling Structure 50'.
  • FIG. 8 is a partial enlarged view of part I in FIG. 7. 7 and 8 in combination, the inventor found through research that in step S203, after the planarization layer 33 is formed on the side of the first conductive layer away from the base substrate 1, a portion of the planarization layer 33 fills the groove 80,
  • the surface of the planarization layer 33 away from the base substrate 1 may be a downwardly inclined inclined surface or a downwardly concave curved surface.
  • the vertical distance d1 between the first surface portion 331 at the first position and the reference plane is about 1256 nanometers, and the first surface portion 331 is at the second position.
  • the vertical distance d2 between the position and the reference plane is about 1415 nanometers
  • the vertical distance d3 between the second surface portion 332 and the reference plane is about 1598 nanometers.
  • the reference plane may be the upper surface of the interlayer dielectric layer 24 or the passivation layer 64.
  • the reference plane may be the upper surface of the interlayer dielectric layer 24 (that is, the surface away from the base substrate 1)
  • the first surface portion 331 and the second surface portion 332 are planarization layers, respectively. 33, where the first surface portion 331 is the portion of the upper surface of the flat layer 33 close to the cutting area C1
  • the second surface portion 332 is the upper surface of the flat layer 33 close to the first barrier dam 40 part.
  • the orthographic projection of the first surface portion 331 on the base substrate 1 and the orthographic projection of the cutting area C1 on the base substrate 1 at least partially overlap
  • the orthographic projection of the second surface portion 332 on the base substrate 1 is at least partially overlapped with the orthographic projection of the second surface portion 332 on the base substrate 1.
  • the orthographic projections of the barrier dam 40 on the base substrate 1 at least partially overlap.
  • the orthographic projection of the first surface portion 331 on the base substrate 1 falls into the orthographic projection of the cutting area C1 on the base substrate 1, and the orthographic projection of the second surface portion 332 on the base substrate 1 falls into the first barrier.
  • the first position may be located in the cutting area C1
  • the second position may be located in the adjacent part of the cutting area C1 and the first blocking dam 40
  • the third position may be located in the area where the first blocking dam 40 is located, that is, The orthographic projection of the first position on the base substrate 1 falls within the orthographic projection of the cutting area C1 on the base substrate 1, and the orthographic projection of the second position on the base substrate 1 falls into the cutting area C1 and the first
  • the orthographic projection of the adjacent part of the barrier dam 40 on the base substrate 1, and the orthographic projection of the third position on the base substrate 1 falls into the orthographic projection of the first barrier dam 40 on the base substrate 1.
  • the first surface portion 331 is formed as a downwardly inclined inclined surface or a downwardly concave arc-shaped surface.
  • the slope angle of the first surface portion 331 may be in the range of 10 to 18 degrees.
  • the vertical distance d1 is smaller than the vertical distance d2.
  • the difference between the vertical distance d2 and the vertical distance d1 may be in the range of 100-300 nanometers.
  • the vertical distance d2 is smaller than the vertical distance d3.
  • the difference between the vertical distance d3 and the vertical distance d2 may be in the range of 150-500 nanometers. In this way, the flatness of the upper surface of the planarization layer 33 located in the cutting area C1 needs to be further improved.
  • a pixel defining layer 34 is further formed on the planarization layer 33, so that the orthographic projection of a part of the pixel defining layer 34 on the base substrate 1 falls into the pixel area A1, and the pixel The orthographic projection of another part of the defining layer 34 on the base substrate 1 covers the cutting area C1.
  • the flatness of the upper surface of the filling structure 50' can be further improved, which can further ensure that the risk of bubbles in the cutting area during the subsequent process of attaching the backing film can be avoided. That is to say, by arranging a laminated structure of multiple organic material layers in the cutting area, it can be further ensured that the bubbles are avoided, so that the product yield can be improved.
  • the materials of the planarization layer 33 and the pixel defining layer 34 are both organic materials, such as polymethylmethacrylate, polycarbonate, polystyrene, epoxy resin, polyimide At least one of amine and polyethylene.
  • the manufacturing method may further include the steps of forming various film layers and packaging structures of the OLED device.
  • each film layer of the OLED device may include an anode layer, a light-emitting material layer, and a cathode.
  • the encapsulation structure may include a laminated structure formed by an inorganic encapsulation layer, an organic encapsulation layer, and an inorganic encapsulation layer.
  • the anode layer may be formed on the planarization layer before forming the pixel defining layer, and the light-emitting material layer, the cathode layer, and the encapsulation structure may be formed after forming the pixel defining layer.
  • the embodiments of the present disclosure are not limited thereto, and known processes for forming various film layers and packaging structures of the OLED device can be used in the embodiments of the present disclosure.
  • step S204 a backing film 4 is attached to the surface of the base substrate 1 away from the organic material layer 3.
  • the back film 4 may include, but is not limited to, polyimide (PI) material to enhance the strength of the base substrate 1 so as to provide better supporting force for each film layer on the base substrate 1.
  • PI polyimide
  • the groove 80 is filled up by the organic material layer 3 including the planarization layer 33 or both the planarization layer 33 and the pixel defining layer 34, so that each film layer in the cutting area C1 of the base substrate 1 In this way, during the process of attaching the base substrate 1 and the back film 4, the air bubbles are avoided at the cutting area C1. Since the bubbles will not be generated during the process of attaching the backing film, cutting cracks in the film layer in the pixel area and/or separation of the film layers in the pixel area from each other are avoided, so that the product yield can be improved.
  • step S205 an opening is formed through a cutting process.
  • the opening 10 may be formed by a laser cutting process. 6E and 10, the laser light L is projected to the cutting area C1.
  • the cutting area C1 may be circular, and the laser L may move relative to the base substrate 1 to form a circular trace (the dotted line corresponding to the laser L in FIG. 6E indicates Sex represents a part of the cutting trace), and the circular trace corresponds to the cutting area C1.
  • the dotted line corresponding to the laser L in FIG. 6E indicates Sex represents a part of the cutting trace
  • the circular trace corresponds to the cutting area C1.
  • an opening 10 penetrating through the back film 4, the base substrate 1, and the film layer thereon can be formed. It should be understood that a part of the filling structure 50' located outside the cutting trace is retained, forming a structure surrounding the opening 10.
  • the “outside” of the cutting trace may indicate the side of the cutting trace close to the pixel area A1.
  • the film layer in the pixel area is prevented from producing cutting cracks and/or the film layer in the pixel area is separated from each other, thereby improving Product yield.
  • Some exemplary embodiments of the present disclosure also provide a display substrate.
  • the display substrate is made according to the manufacturing method of any one of the above embodiments.
  • the display substrate may be an OLED display substrate.
  • FIG. 11 is a plan view of a portion of the display substrate around the opening according to some exemplary embodiments of the present disclosure
  • FIG. 12 is a cross-section of the display substrate according to some exemplary embodiments of the present disclosure taken along line BB′ in FIG. 11 picture
  • FIG. 13 is a cross-sectional view of a display substrate according to other exemplary embodiments of the present disclosure, taken along the line BB' in FIG. 11.
  • the display substrate 100 may include: a base substrate 1, which includes at least a pixel area A1 and an opening area H1; and a plurality of sub-substrates arranged on the base substrate 1 Pixel SP, the plurality of sub-pixels SP are located in the pixel area A1; an opening 10, the opening 10 is located in the opening area H1; a first barrier dam 40, the first barrier dam 40 is provided in the Between the sub-pixel SP and the opening 10 and surrounding the opening 10; an organic material layer 3, the orthographic projection of the organic material layer 3 on the base substrate 1 falls into the pixel area A1; And a filling structure 50, at least a part of the filling structure 50 is disposed between the opening 10 and the first blocking dam 40.
  • the filling structure 50 and the organic material layer 3 can be formed through the same patterning process. In this way, as shown in FIG. 12, the filling structure 50 and the organic material layer 3 are located in the same layer, and the filling structure 50 and the organic material layer 3 include the same material.
  • the display substrate 100 may include a plurality of first barrier dams 40 between the sub-pixel SP and the opening 10. 15A and 15B, which schematically show some exemplary embodiments of the opening 10 and a plurality of first blocking dams 40.
  • the orthographic projection of the opening 10 on the base substrate may have various shapes, including but not limited to a circle, an ellipse, a rectangle, a rounded rectangle, a square, a diamond, a trapezoid, and the like.
  • the orthographic projection of the opening 10 on the base substrate is a rectangle, and a plurality of (for example, three) first blocking dams 40 are provided.
  • a plurality of first blocking dams 40 may completely surround the opening 10.
  • two openings 10 are provided.
  • the orthographic projection of one opening on the base substrate is rectangular, and the orthographic projection of the other opening on the base substrate is circular, and the combination of the two openings
  • the orthographic projection on the base substrate is a racetrack-like shape.
  • a plurality of (for example, two) first blocking dams 40 are provided.
  • a plurality of first blocking dams 40 may surround the combined two openings.
  • the other first barrier dams are not covered with organic material, that is, the other first barrier dams are not covered by the organic material layer 3 and the filling structure 50. Any one of the coverage. In this way, the organic material layer 3 and the filling structure 50 are broken along the radial direction of the opening 10.
  • the expression “radial” or “radial direction” can mean a direction along the center of the opening to point to the sub-pixel SP.
  • the center of the opening can be Center of circle; when the opening is rectangular, the center of the opening can be the intersection of two diagonal lines.
  • the filling structure 50 includes a single filling film layer, and the organic material layer 3 includes a planarization layer 33.
  • the filling film layer 50 and the planarization layer 33 are located in the same layer, and the filling film layer 50 and the planarization layer 33 include the same material. That is, the filling film layer 50 and the planarization layer 33 are formed by the same patterning process.
  • the filling structure 50 includes a first filling film layer 501 and a second filling film layer 502, and the organic material layer includes a planarization layer 33 and a pixel defining layer 34.
  • the first filling film layer 501 and the planarization layer 33 are located in the same layer, and the first filling film layer 501 and the planarization layer 33 include the same material. That is, the first filling film layer 501 and the planarization layer 33 are formed by the same patterning process.
  • the second filling film layer 502 and the pixel defining layer 34 are located in the same layer, and the second filling film layer 502 and the pixel defining layer 34 include the same material. That is, the second filling film layer 502 and the pixel defining layer 34 are formed by the same patterning process.
  • the display substrate 100 further includes a functional film layer 6 arranged on the side of the organic material layer 3 close to the base substrate 1.
  • the functional film layer 6 may include: a first conductive layer 61 disposed on the base substrate 1; a gate insulating layer 23 disposed on the side of the first conductive layer 61 away from the base substrate 1.
  • the second conductive layer 62 disposed on the side of the gate insulating layer 23 away from the base substrate 1; the interlayer dielectric layer 24 disposed on the side of the second conductive layer 62 away from the base substrate 1
  • the third conductive layer 63 disposed on the side of the interlayer dielectric layer 24 away from the base substrate 1; and the passivation layer disposed on the side of the third conductive layer 63 away from the base substrate 1 64.
  • the gate G of the thin film transistor may be located on the first conductive layer 61, that is, the first conductive layer 61 may be formed of a conductive material forming the gate G.
  • the source S and the drain D of the thin film transistor may be located in the third conductive layer 63, that is, the third conductive layer 63 may be formed of a conductive material forming the source S and the drain D.
  • the second conductive layer 62 may also be formed of a gate conductive material.
  • the first barrier dam 40 includes the first conductive layer 61, the gate insulating layer 23, the second conductive layer 62, and the interlayer dielectric layer 24 and a part of each of the third conductive layers 63 constitute a laminated structure.
  • the first barrier dam 40 includes the first conductive layer 61, the gate insulating layer 23, the second conductive layer 62, the interlayer dielectric layer 24, The third conductive layer 63 and a part of each of the passivation layer 64 constitute a laminated structure.
  • the cross section of the first blocking dam 40 parallel to the radial direction of the opening has a trapezoidal shape.
  • the orthographic projection of the portion of the passivation layer 64 that constitutes the first barrier dam 40 on the base substrate 1 falls into the orthographic projection of the portion of the third conductive layer 63 that constitutes the first barrier dam 40 on the base substrate 1
  • the orthographic projection of the portion of the third conductive layer 63 that constitutes the first barrier dam 40 on the base substrate 1 falls into the orthographic projection of the portion of the interlayer dielectric layer 24 that constitutes the first barrier dam 40 on the base substrate 1.
  • the orthographic projection of the portion of the interlayer dielectric layer 24 that constitutes the first barrier dam 40 on the base substrate 1 falls into the portion of the second conductive layer 62 that constitutes the first barrier dam 40 on the base substrate 1.
  • the orthographic projection of the portion of the second conductive layer 62 that constitutes the first barrier dam 40 on the base substrate 1 falls into the orthographic projection of the portion of the gate insulating layer 23 that constitutes the first barrier dam 40 on the base substrate 1.
  • the orthographic projection of the portion of the gate insulating layer 23 that constitutes the first barrier dam 40 on the base substrate 1 falls into the orthographic projection of the portion of the first conductive layer 61 that constitutes the first barrier dam 40 on the base substrate 1 Inside.
  • the orthographic projection of the filling structure 50 on the base substrate 1 and the orthographic projection of the first barrier dam 40 on the base substrate 1 do not overlap. That is, the filling structure 50 ends at the side of the first blocking dam 40 near the opening 10.
  • the passivation layer 64 includes a side portion 641 located on the first barrier dam 40, that is, the orthographic projection of the side portion 641 on the base substrate 1 falls into the first barrier dam 40.
  • the orthographic projection of the side portion 641 on the base substrate 1 is located approximately in the middle of the orthographic projection of the first barrier dam 40 on the base substrate 1.
  • the orthographic projection of the filling structure 50 on the base substrate 1 partially overlaps the orthographic projection of the first barrier dam 40 on the base substrate 1.
  • the filling structure 50 includes a side portion 531 close to the first barrier dam 40, and the orthographic projection of the side portion 531 on the base substrate 1 falls into the first barrier dam 40 on the liner.
  • the orthographic projection on the base substrate 1 and the orthographic projection of the side portion 531 on the base substrate 1 is located in the middle position of the orthographic projection of the first barrier dam 40 on the base substrate 1.
  • the filling structure 50 terminates at the middle position of the upper surface of the first blocking dam 40.
  • the orthographic projection of the filling structure 50 on the base substrate 1 covers the part of the passivation layer 64 that constitutes the first barrier dam 40 on the base substrate 1. Orthographic projection.
  • the orthographic projection of the filling structure 50 on the base substrate 1 may cover the orthographic projection of the first barrier dam 40 on the base substrate 1, such as Shown in Figure 14A.
  • the filling structure 50 may extend to the side of the first blocking dam 40 far away from the hole 10.
  • the filling structure 50 and the organic material layer 3 located in the pixel area A1 are disconnected in the radial direction along the opening 10, and the filling structure 50
  • the organic material layer 3 located in the pixel area A1 is formed of the same material and through the same patterning process.
  • the filling structure 50 may include a first filling part 51 and a second filling part 52, and the second filling part 52 is closer to the first barrier than the first filling part 51. Dam 40.
  • the first filling part 51 is a part of the filling structure 50 close to the opening 10
  • the second filling part 52 is a part of the filling structure 50 close to the first blocking dam 40.
  • the first filling part 50 is a part of the filling structure 50 close to the opening 10
  • the second filling part 52 is a part where the filling structure 50 and the first barrier dam 40 overlap.
  • the first filling part 51 includes a first surface away from the base substrate 1, and the second filling part 52 includes a second surface away from the base substrate 1.
  • the vertical distance between the first surface and the base substrate 1 is greater than the vertical distance between the second surface and the base substrate 1.
  • the first barrier dam 40 includes a top surface away from the base substrate and a side surface 401 facing the opening, and the passivation layer 64 partially covers the first The top surface of the barrier dam, and the passivation layer 64 covers the side surface of the first barrier dam.
  • the portion of the passivation layer 64 that covers the top surface of the first barrier dam (may be referred to as the first portion of the passivation layer 64, which is represented by the reference numeral 642 in FIG. 14B) is on the base substrate
  • the area of the orthographic projection on 1 is the first part of the third conductive layer 63 (that is, the part located in the first barrier dam 40, which is indicated by the reference numeral 632 in FIG. 14B) on the base substrate 1.
  • the area of the orthographic projection is 3/10 to 7/10, for example, 2/5 to 3/5. With this arrangement, the first barrier dam 40 can more effectively prevent the cracks from spreading.
  • the passivation layer 64 also includes a portion that does not cover the first barrier dam 40 (which may be referred to as the second portion of the passivation layer 64, which is denoted by the reference numeral 643 in FIG. 14B).
  • the orthographic projection of 643 on the base substrate 1 overlaps with the orthographic projection of the filling structure 50 on the base substrate 1, for example, this part is covered by the filling structure 50.
  • FIG. 16 is a partial plan view of the display substrate around the opening according to some exemplary embodiments of the present disclosure
  • FIG. 17 is a cross-sectional view of the display substrate according to some exemplary embodiments of the present disclosure taken along line CC' in FIG. 16
  • Fig. 18 is a partial enlarged view of part I of Fig. 17.
  • Fig. 19 is a partial enlarged view of part II of Fig. 17.
  • Fig. 20 is a partial enlarged view of part III of Fig. 17.
  • FIGS. 16 and 17 only show the structure on one side of the opening. It should also be noted that the following description focuses on the differences between FIGS. 16 to 20 relative to the above embodiments, and the similarities can be referred to the above description, which will not be repeated here.
  • the display substrate 100 may include a plurality of first barrier dams 40, a second barrier dam 60, a third barrier dam 70, and a plurality of fourth barrier dams 90 between the sub-pixel SP and the opening 10 .
  • the plurality of first barrier dams 40, the second barrier dams 60, the third barrier dams 70, and the plurality of fourth barrier dams 90 are sequentially arranged in a direction from the opening 10 to the sub-pixel SP.
  • the display substrate 100 may include 7 first barrier dams 40, 1 second barrier dam 60, 1 third barrier dam 70, and 4 fourth barrier dams 90. It should be understood that the aforementioned number of barrier dams should not be construed as a limitation to the embodiment of the present disclosure, and the display substrate may include other numbers of various barrier dams.
  • the display substrate 100 may include a functional film layer disposed on the base substrate 1.
  • the functional film layer may include: a barrier layer 21 provided on the base substrate 1; a buffer layer 22 provided on the side of the barrier layer 21 away from the base substrate 1; The first gate insulating layer 231 on the side of the substrate 1; the first conductive layer 61 disposed on the side of the first gate insulating layer 231 away from the base substrate 1; the first conductive layer 61 disposed on the first conductive layer 61 away from the substrate
  • the second gate insulating layer 232 on the side of the substrate 1; the second conductive layer 62 arranged on the side of the second gate insulating layer 232 away from the base substrate 1; the second conductive layer 62 arranged on the second conductive layer 62 away from the The interlayer dielectric layer 24 on the side of the base substrate 1; the third conductive layer 63 disposed on the side of the interlayer dielectric layer 24 away from the base substrate 1.
  • the gate G of the thin film transistor may be located on the first conductive layer 61, that is, the first conductive layer 61 may be formed of a conductive material forming the gate G.
  • the source S and the drain D of the thin film transistor may be located in the third conductive layer 63, that is, the third conductive layer 63 may be formed of a conductive material forming the source S and the drain D.
  • the second conductive layer 62 may also be formed of a gate conductive material.
  • the display substrate 100 may include an organic material layer 3 disposed on the side of the functional film layer away from the base substrate 1.
  • the organic material layer 3 may include at least one selected from the planarization layer 33 and the pixel defining layer 34.
  • the first barrier dam 40 at least includes a laminated structure formed by a portion of each of the barrier layer 21, the buffer layer 22 and the third conductive layer 62.
  • the first barrier dam 40 includes a barrier layer 21, a buffer layer 22, a first gate insulating layer 231, a first conductive layer 61, a second gate insulating layer 232, a second conductive layer 62, and an interlayer dielectric layer. 24 and a part of each of the third conductive layer 63 constitute a laminated structure.
  • the second barrier dam 60 includes at least a laminated structure formed by a portion of each of the planarization layer 33 and the pixel defining layer 34.
  • the second barrier dam 60 includes each of the barrier layer 21, the buffer layer 22, the first gate insulating layer 231, the second gate insulating layer 232, the interlayer dielectric layer 24, the planarization layer 33, and the pixel defining layer 34.
  • a laminated structure composed of one part.
  • the third barrier dam 70 at least includes a laminated structure formed by a portion of each of the planarization layer 33 and the pixel defining layer 34.
  • the third barrier dam 70 includes each of the barrier layer 21, the buffer layer 22, the first gate insulating layer 231, the second gate insulating layer 232, the interlayer dielectric layer 24, the planarization layer 33, and the pixel defining layer 34.
  • a laminated structure composed of one part.
  • the fourth barrier dam 90 at least includes a laminated structure formed by a portion of each of the barrier layer 21, the buffer layer 22 and the third conductive layer 62.
  • the fourth barrier dam 90 includes a portion of each of the barrier layer 21, the buffer layer 22, the first gate insulating layer 231, the second gate insulating layer 232, the interlayer dielectric layer 24, and the third conductive layer 63 Constitute the laminated structure.
  • the display substrate 100 may also include a filling structure 50.
  • the filling structure 50 includes a first filling film layer 501 and a second filling film layer 502, and the organic material layer includes a planarization layer 33 and a pixel defining layer 34.
  • the first filling film layer 501 and the planarization layer 33 are located in the same layer, and the first filling film layer 501 and the planarization layer 33 include the same material. That is, the first filling film layer 501 and the planarization layer 33 are formed by the same patterning process.
  • the second filling film layer 502 and the pixel defining layer 34 are located in the same layer, and the second filling film layer 502 and the pixel defining layer 34 include the same material. That is, the second filling film layer 502 and the pixel defining layer 34 are formed by the same patterning process.
  • the other first barrier dams 40 are not covered with organic material, that is, the other first barrier dams 40 are not filled with the organic material layer 3 and Any one of the structures 50 covers. That is, the orthographic projection of the other first barrier dams on the base substrate except the first barrier dam closest to the opening and the orthographic projection of the filling structure 50 on the base substrate are spaced apart . In this way, the organic material layer 3 and the filling structure 50 are broken along the radial direction of the opening 10.
  • the orthographic projection of the filling structure 50 on the base substrate 1 partially overlaps with the orthographic projection of the first barrier dam 40 closest to the opening 10 on the base substrate 1.
  • the filling structure 50 terminates at the middle position of the upper surface of the first blocking dam 40 closest to the opening 10.
  • the orthographic projection of the filling structure 50 on the base substrate 1 and the orthographic projection of the first barrier dam 40 on the base substrate 1 partially overlap, and the area of the overlapping portion is the first About one half of the area of the orthographic projection of a blocking dam 40 on the base substrate 1, for example, in the range of 2/5 to 3/5.
  • the flatness of the filling structure can be improved.
  • the size of the orthographic projection of the first barrier dam 40 on the base substrate 1 along the radial direction of the opening 10 is smaller than the size of the orthographic projection of each of the second barrier dam 60 and the third barrier dam 70 on the base substrate 1
  • the size of the orthographic projection of the first barrier dam 40 on the base substrate 1 along the radial direction of the opening 10 is substantially equal to the orthographic projection of the fourth barrier dam 90 on the base substrate 1
  • the width of the barrier dam represents the size of the orthographic projection of the barrier dam on the base substrate along the radial direction of the opening.
  • the dimension (ie width) of the orthographic projection of each of the first barrier dam 40 and the fourth barrier dam 90 on the base substrate 1 in the radial direction of the opening 10 is in the range of about 5-7 microns
  • the dimension (ie width) of the orthographic projection of the second barrier dam 60 on the base substrate 1 along the radial direction of the opening 10 is in the range of about 16-20 microns
  • the third barrier dam 70 on the base substrate 1 The dimension (ie, width) of the orthographic projection in the radial direction of the opening 10 is about 40 microns.
  • a plurality of first blocking dams 40 are arranged at equal intervals along the radial direction of the opening 10.
  • the width of the portion of the first barrier dam 40 located in the third conductive layer 63 is greater than the width of the portion of the first barrier dam 40 located in the second conductive layer 62, and the width of the portion of the first barrier dam 40 located in the second conductive layer 62
  • the width of the portion of the second conductive layer 62 is greater than the width of the portion of the first barrier dam 40 located in the first conductive layer 61.
  • the width of the portion of the first barrier dam 40 located in the third conductive layer 63 is about 5 microns, and the width of the portion of the first barrier dam 40 located in the second conductive layer 62 is about 6 microns.
  • the width of the portion of the first barrier dam 40 located in the first conductive layer 61 is about 7 microns.
  • the distance between the portions of the third conductive layer 63 of the two adjacent first barrier dams 40 is about 7 microns.
  • a plurality of fourth blocking dams 90 are arranged at equal intervals along the radial direction of the opening 10.
  • the separation distance between two adjacent fourth barrier dams 90 is smaller than the separation distance between two adjacent first barrier dams 40.
  • the width of the portion of the fourth barrier dam 90 located in the third conductive layer 63 is about 5 microns.
  • the separation distance between the portions of the third conductive layer 63 of two adjacent fourth barrier dams 90 is about 9 microns, and the first grid of two adjacent fourth barrier dams 90 The separation distance between the parts in the insulating layer 231 is about 5 micrometers.
  • the width of the portion of the second barrier dam 60 located in the pixel defining layer 34 is about 16 microns, and the width of the portion of the second barrier dam 60 located in the planarization layer 33 is about 20 microns.
  • the width of the portion of the third barrier dam 70 located in the pixel defining layer 34 is about 40 microns, and the width of the portion of the third barrier dam 70 located in the planarization layer 33 is about 40 microns.
  • the separation distance between the portion of the second barrier dam 60 located in the planarization layer 33 and the portion of the third barrier dam 70 located in the planarization layer 33 is about 20 microns.
  • the cross section of each of the first barrier dam 40 and the second barrier dam 60 is trapezoidal, and the cross section is perpendicular to the arrangement of the base substrate.
  • There are surfaces of the first barrier dam and the second barrier dam that is, the upper surface shown in FIG. 6A), and the cross section extends in a first direction (that is, the above-mentioned radial direction);
  • the smallest dimension of the width of a barrier dam 40 is 1/4 to 3/8 of the smallest dimension of the width of the second barrier dam 60, and the largest dimension of the width of the first barrier dam 40 is that of the second barrier dam 3/10 to 2/5 of the maximum size of the width of 60.
  • each of the first barrier dam and the third barrier dam is trapezoidal, and the cross section is perpendicular to the base substrate provided with the first barrier dam and the third barrier.
  • the surface of the dam, and the cross-section extends along the first direction; the smallest dimension of the width of the first barrier dam 40 is 1/16 to 3/16 of the smallest dimension of the width of the third barrier dam 70, The maximum dimension of the width of the first barrier dam 40 is 3/20 to 1/5 of the maximum dimension of the width of the third barrier dam 70.
  • FIG. 21 is a FIB (focused ion beam) diagram of a display substrate according to some exemplary embodiments of the present disclosure.
  • the filling structure 50 includes two film layers 501 and 502, as described above, two film layers 501 and 502 correspond to the planarization layer and the pixel defining layer, respectively.
  • FIG. 22 is a FIB (focused ion beam) diagram of a display substrate according to some exemplary embodiments of the present disclosure.
  • the filling structure 50 includes a film layer, as described above, the film layer and the planarization layer correspond.
  • the organic material layer and the material of the filling structure 50 include at least one selected from polymethyl methacrylate, polycarbonate, polystyrene, epoxy resin, polyamide, and polyethylene.
  • the display substrate 100 further includes a back film 4 disposed on the surface of the base substrate 1 away from the organic material layer 3.
  • the back film 4 may include, but is not limited to, polyimide (PI) material to enhance the strength of the base substrate 1 so as to provide better supporting force for each film layer on the base substrate 1.
  • PI polyimide
  • FIG. 23 is a schematic structural diagram of a display device provided according to some exemplary embodiments of the present disclosure. As shown in FIG. 23, the display device includes the display substrate provided according to the above-mentioned embodiment.
  • the display substrate and the display device also have technical effects corresponding to the beneficial effects of the foregoing manufacturing method.
  • the display substrate and the display device also have technical effects corresponding to the beneficial effects of the foregoing manufacturing method.
  • the display device can be any product or component with a display function.
  • the display device may be a smart phone, a portable phone, a navigation device, a television (TV), a car stereo, a laptop computer, a tablet computer, a portable multimedia player (PMP), a personal digital assistant (PDA), etc. Wait.
  • the display device may be a pocket-sized portable communication terminal configured to have a wireless communication function.
  • the display device may be a flexible device or a flexible display device.

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Abstract

提供一种显示基板及其制造方法和显示装置。所述显示基板包括：衬底基板，所述衬底基板至少包括像素区域和开孔区域；设置在所述衬底基板上的多个子像素，所述多个子像素位于所述像素区域；开孔，所述开孔位于所述开孔区域；第一阻挡坝，所述第一阻挡坝设置在所述子像素与所述开孔之间，并且至少部分包围所述开孔；有机材料层，所述有机材料层在所述衬底基板上的正投影落入所述像素区域，所述有机材料层包括至少一个膜层；和填充结构，所述填充结构的至少一部分设置在所述开孔与所述第一阻挡坝之间，其中，所述填充结构和所述有机材料层的至少一个膜层位于相同的层，并且所述填充结构和所述有机材料层的至少一个膜层包括的材料相同。

Description

显示基板及其制造方法和显示装置
相关申请的交叉引用
本申请要求于2020年5月27日递交中国专利局的、申请号为202010463370.4的中国专利申请的权益，该申请的全部公开内容以引用方式并入本文。
技术领域
本公开涉及显示技术领域，并且具体地涉及一种显示基板的制造方法、一种显示基板以及一种显示装置。
背景技术
柔性显示装置是一种基于柔性衬底材料形成的显示装置。由于柔性显示装置具有可卷曲、宽视角、便于携带等特点，因此，它在各种显示产品中得到了越来越广泛的应用。而且，随着全面屏手机的迅速发展，各家手机及面板厂商都在积极研发屏幕开孔技术，以期将智能手机必备的相机、喇叭、传感器等置于屏下，以实现真正的全屏显示。这样，在柔性显示装置中形成开孔的制造工艺，成为显示技术领域的研发人员关注的重要课题之一。
在本部分中公开的以上信息仅用于对本公开的发明构思的背景的理解，因此，以上信息可包含不构成现有技术的信息。
发明内容
在一个方面，提供一种显示基板，包括：
衬底基板，所述衬底基板至少包括像素区域和开孔区域；
设置在所述衬底基板上的多个子像素，所述多个子像素位于所述像素区域；
开孔，所述开孔位于所述开孔区域；
第一阻挡坝，所述第一阻挡坝设置在所述子像素与所述开孔之间，并且至少部分包围所述开孔；
第二阻挡坝，所述第二阻挡坝设置在所述第一阻挡坝远离所述开孔的一侧；
有机材料层，所述有机材料层在所述衬底基板上的正投影落入所述像素区域，所述有机材料层包括至少一个膜层；和
填充结构，所述填充结构的至少一部分设置在所述开孔与所述第一阻挡坝之间，
其中，所述填充结构和所述有机材料层的至少一个膜层位于相同的层，并且所述填充结构和所述有机材料层的至少一个膜层包括的材料相同；
所述第一阻挡坝在所述衬底基板上的正投影的宽度小于所述第二阻挡坝在所述衬底基板上的正投影的宽度。
根据一些示例性的实施例，所述填充结构包括单个填充膜层，所述有机材料层包括平坦化层；以及所述填充膜层和所述平坦化层位于相同的层，并且所述填充膜层和所述平坦化层包括的材料相同。
根据一些示例性的实施例，所述填充结构包括第一填充膜层和第二填充膜层，所述有机材料层包括平坦化层和像素界定层；所述第一填充膜层和所述平坦化层位于相同的层，并且所述第一填充膜层和所述平坦化层包括的材料相同；以及所述第二填充膜层和所述像素界定层位于相同的层，并且所述第二填充膜层和所述像素界定层包括的材料相同。
根据一些示例性的实施例，所述显示基板包括多个所述第一阻挡坝，多个第一阻挡坝中最靠近所述开孔的一个第一阻挡坝在所述衬底基板上的正投影与所述填充结构在所述衬底基板上的正投影不重叠。
根据一些示例性的实施例，所述显示基板包括多个所述第一阻挡坝，多个第一阻挡坝中最靠近所述开孔的一个第一阻挡坝在所述衬底基板上的正投影与所述填充结构在所述衬底基板上的正投影部分重叠。
根据一些示例性的实施例，所述显示基板包括多个所述第一阻挡坝，所述填充结构在所述衬底基板上的正投影覆盖多个第一阻挡坝中最靠近所述开孔的一个第一阻挡坝在所述衬底基板上的正投影。
根据一些示例性的实施例，所述显示基板还包括设置在所述有机材料层靠近所述衬底基板一侧的功能膜层，所述功能膜层包括：
设置在所述衬底基板上的第一导电层；
设置在所述第一导电层远离所述衬底基板一侧的栅绝缘层；
设置在所述栅绝缘层远离所述衬底基板一侧的第二导电层；
设置在所述第二导电层远离所述衬底基板一侧的层间介电层；
设置在所述层间介电层远离所述衬底基板一侧的第三导电层；和
设置在所述第三导电层远离所述衬底基板一侧的钝化层。
根据一些示例性的实施例，所述第一阻挡坝包括位于所述第一导电层、所述栅绝缘层、所述第二导电层、所述层间介电层、所述第三导电层和所述钝化层中每一个的一部分构成的叠层结构；以及所述钝化层包括位于所述第一阻挡坝的第一部分，所述第三导电层包括位于所述第一阻挡坝的第一部分，所述钝化层的第一部分在所述衬底基板上的正投影落入所述第三导电层的第一部分在所述衬底基板上的正投影内。
根据一些示例性的实施例，所述填充结构在所述衬底基板上的正投影覆盖所述钝化层的第一部分在所述衬底基板上的正投影。
根据一些示例性的实施例，所述填充结构在所述衬底基板上的正投影与所述第一阻挡坝在所述衬底基板上的正投影部分重叠，重叠部分的面积为所述第一阻挡坝在所述衬底基板上的正投影的面积的二分之一。
根据一些示例性的实施例，所述填充结构包括第一填充部分和第二填充部分，所述第二填充部分比所述第一填充部分更靠近所述第一阻挡坝；所述第一填充部分包括远离所述衬底基板的第一表面，所述第二填充部分包括远离所述衬底基板的第二表面；以及所述第一表面与所述衬底基板之间的垂直距离大于所述第二表面与所述衬底基板之间的垂直距离。
根据一些示例性的实施例，所述第一阻挡坝包括远离所述衬底基板的顶表面和面向所述开孔的侧表面，所述钝化层部分覆盖所述第一阻挡坝的顶表面，所述钝化层覆盖所述第一阻挡坝的侧表面。
根据一些示例性的实施例，所述钝化层的覆盖所述第一阻挡坝的顶表面的部分在所述衬底基板上的正投影的面积为所述第三导电层的第一部分在所述衬底基板上的正投影的面积的3/10～7/10。
根据一些示例性的实施例，除最靠近所述开孔的第一阻挡坝之外的其他第一阻挡坝在所述衬底基板上的正投影与所述填充结构在所述衬底基板上的正投影间隔设置。
根据一些示例性的实施例，所述显示基板还包括第三阻挡坝，所述第三阻挡坝设置在所述第二阻挡坝远离所述开孔的一侧，所述第三阻挡坝在所述衬底基板上的正投影的宽度大于所述第二阻挡坝在所述衬底基板上的正投影的宽度。
根据一些示例性的实施例，所述显示基板还包括第四阻挡坝，所述第四阻挡坝设置在所述第三阻挡坝远离所述开孔的一侧，所述第四阻挡坝在所述衬底基板上的正投影的宽度基本等于所述第一阻挡坝在所述衬底基板上的正投影的宽度。
根据一些示例性的实施例，所述显示基板包括还包括设置在所述有机材料层靠近所述衬底基板一侧的功能膜层，所述功能膜层包括：
设置在所述衬底基板上的阻挡层；
设置在所述阻挡层远离所述衬底基板一侧的缓冲层；
设置在所述缓冲层远离所述衬底基板一侧的第一栅绝缘层；
设置在所述第一栅绝缘层远离所述衬底基板一侧的第一导电层；
设置在所述第一导电层远离所述衬底基板一侧的第二栅绝缘层；
设置在所述第二栅绝缘层远离所述衬底基板一侧的第二导电层；
设置在所述第二导电层远离所述衬底基板一侧的层间介电层；和
设置在所述层间介电层远离所述衬底基板一侧的第三导电层。
根据一些示例性的实施例，所述填充结构还包括位于所述阻挡层和所述缓冲层中的至少一层中的部分。
根据一些示例性的实施例，所述第一阻挡坝至少包括位于所述阻挡层、所述缓冲层和所述第三导电层中每一个的一部分构成的叠层结构；和/或，所述第二阻挡坝至少包括位于所述平坦化层和所述像素界定层中每一个的一部分构成的叠层结构；和/或，所述第三阻挡坝至少包括位于所述平坦化层和所述像素界定层中每一个的一部分构成的叠层结构；和/或，所述第四阻挡坝至少包括位于所述阻挡层、所述缓冲层和所述第三导电层中每一个的一部分构成的叠层结构。
根据一些示例性的实施例，所述第一阻挡坝和所述第二阻挡坝中的每一个的横截面均呈梯形，所述横截面垂直于所述衬底基板的设置有所述第一阻挡坝和所述第二阻挡坝的表面，并且所述横截面沿第一方向延伸，所述第一方向从所述开孔区域指向所述像素区域；所述第一阻挡坝的宽度的最小尺寸是所述第二阻挡坝的宽度的最小尺寸的1/4～3/8，所述第一阻挡坝的宽度的最大尺寸是所述第二阻挡坝的宽度的最大尺寸的3/10～2/5。
根据一些示例性的实施例，所述第一阻挡坝和所述第三阻挡坝中的每一个的横截面均呈梯形，所述横截面垂直于所述衬底基板的设置有所述第一阻挡坝和所述第三阻 挡坝的表面，并且所述横截面沿第一方向延伸，所述第一方向从所述开孔区域指向所述像素区域；所述第一阻挡坝的宽度的最小尺寸是所述第三阻挡坝的宽度的最小尺寸的1/16～3/16，所述第一阻挡坝的宽度的最大尺寸是所述第三阻挡坝的宽度的最大尺寸的3/20～1/5。
根据一些示例性的实施例，所述有机材料层的材料包括从聚甲基丙烯酸甲酯、聚碳酸酯、聚苯乙烯、环氧树脂、聚酰亚胺、聚乙烯中选择的至少一种。
根据一些示例性的实施例，所述衬底基板为柔性衬底基板，以及所述显示基板还包括设置在所述衬底基板远离所述有机材料层的表面上的背膜。
在另一方面，提供一种显示装置，包括如上所述的显示基板。
在又一方面，提供一种显示基板的制造方法，包括以下步骤：
提供衬底基板，所述衬底基板至少包括像素区域和切割区域；
在所述衬底基板上形成功能膜层，所述功能膜层至少包括无机材料层，所述无机材料层的一部分在所述衬底基板上的正投影落入所述像素区域，所述无机材料层的另一部分在所述衬底基板上的正投影覆盖所述切割区域；
至少去除所述无机材料层位于所述切割区域中的部分，以在所述衬底基板的切割区域中形成凹槽；
在所述衬底基板上形成有机材料层；
在所述衬底基板远离所述功能膜层和有机材料层一侧的表面上贴附背膜；以及
执行切割工艺以形成开孔，在所述切割工艺中，切割线位于所述切割区域中，
其中，所述在所述衬底基板上形成有机材料层的步骤包括：
在所述功能膜层远离所述衬底基板的一侧形成有机材料层，使得所述有机材料层的一部分在所述衬底基板上的正投影落入所述像素区域，所述有机材料层的另一部分在所述衬底基板上的正投影覆盖所述切割区域，从而使得所述有机材料层的另一部分形成填充所述凹槽的填充结构。
根据一些示例性的实施例，所述有机材料层包括平坦化层。
根据一些示例性的实施例，所述有机材料层包括平坦化层和像素界定层。
根据一些示例性的实施例，所述制造方法还包括：在所述衬底基板上形成第一阻挡坝，其中，所述第一阻挡坝包围所述切割区域。
根据一些示例性的实施例，所述填充结构在所述衬底基板上的正投影与所述第一 阻挡坝在所述衬底基板上的正投影不重叠。
根据一些示例性的实施例，所述填充结构在所述衬底基板上的正投影与所述第一阻挡坝在所述衬底基板上的正投影部分重叠。
根据一些示例性的实施例，所述填充结构在所述衬底基板上的正投影覆盖所述第一阻挡坝在所述衬底基板上的正投影。
根据一些示例性的实施例，在所述衬底基板远离所述有机材料层一侧的表面上贴附背膜的步骤中，施加压力以贴附所述衬底基板与所述背膜，使得所述衬底基板的位于所述切割区域的部分和所述衬底基板的位于所述像素区域的部分均与所述背膜贴合。
根据一些示例性的实施例，在所述衬底基板上形成功能膜层的步骤包括：在所述衬底基板上依次形成阻挡层、缓冲层、第一导电层、栅绝缘层、第二导电层、层间介电层、第三导电层和钝化层；以及所述无机材料层包括阻挡层、缓冲层、栅绝缘层和层间介电层中的至少一个。
根据一些示例性的实施例，在所述功能膜层远离所述衬底基板的一侧形成有机材料层的步骤中，所述平坦化层远离所述衬底基板的表面包括第一平坦化层表面部分和第二平坦化层表面部分，所述第一平坦化层表面部分在所述衬底基板上的正投影与所述切割区域在所述衬底基板上的正投影至少部分重叠，所述第二平坦化层表面部分在所述衬底基板上的正投影与所述第一阻挡坝在所述衬底基板上的正投影至少部分重叠；所述第一平坦化层表面部分在第一位置处于基准平面之间的垂直距离d1小于所述第一平坦化层表面部分在第二位置处于基准平面之间的垂直距离d2，所述垂直距离d2小于所述第二平坦化层表面部分与所述基准平面之间的垂直距离d3，其中，所述基准平面为所述层间介电层的远离所述衬底基板的表面，所述第一位置在所述衬底基板上的正投影落入所述切割区域在所述衬底基板上的正投影内，所述第二位置在所述衬底基板上的正投影落入所述切割区域与所述第一阻挡坝的毗邻部在所述衬底基板上的正投影内，所述第三位置在所述衬底基板上的正投影落入所述第一阻挡坝在所述衬底基板上的正投影内。
根据一些示例性的实施例，在至少去除所述无机材料层位于所述切割区域中的部分的步骤中，通过刻蚀工艺去除所述无机材料层位于所述切割区域中的部分。
根据一些示例性的实施例，执行切割工艺以形成开孔的步骤包括：执行激光切割 工艺，使得激光投射在所述衬底基板上的轨迹落入所述凹槽中，以形成贯穿所述背膜、所述衬底基板、所述功能膜层和所述填充结构的开孔。
根据一些示例性的实施例，所述第一平坦化层表面部分的坡度角在10～18度的范围内。
根据一些示例性的实施例，所述垂直距离d2与所述垂直距离d1之间的差值在100～300纳米的范围内。
根据一些示例性的实施例，所述垂直距离d3与所述垂直距离d2之间的差值在150～500纳米的范围内。
附图说明
通过参照附图详细描述本公开的示例性实施例，本公开的特征及优点将变得更加明显。
图1示出了根据本公开的示例性实施例的显示基板的平面图；
图2是根据本公开的一些示例性实施例的显示基板的制造方法的流程图；
图3A-图3F分别是本公开的一些示例性实施例的显示基板的制造方法的一些步骤被执行后所述显示基板的截面图，这些截面图是沿图1中的线AA’截取的截面图；
图4A和图4B分别示出了比较实施例中贴附背膜的过程的示意图；
图5是根据本公开的一些示例性实施例的显示基板的制造方法的流程图；
图6A-图6E、图7和图9-图10分别是本公开的一些示例性实施例的显示基板的制造方法的一些步骤被执行后所述显示基板的截面图，这些截面图是沿图1中的线AA’截取的截面图；
图8是图7中的部分I的局部放大图；
图11是根据本公开的一些示例性实施例的显示基板在开孔周围的部分的平面图；
图12是根据本公开的一些示例性实施例的显示基板沿图11中的线BB’截取的截面图；
图13是根据本公开的另一些示例性实施例的显示基板沿图11中的线BB’截取的截面图；
图14A和图14B分别是根据本公开的另一些示例性所述的显示基板沿图11中的线BB’截取的截面图，为了清楚，图14A和图14B仅示出了位于开孔一侧的结构；
图15A和图15B分别是根据本公开的一些示例性实施例的显示基板包括的开孔和多个第一阻挡坝的平面图；
图16是根据本公开的一些示例性实施例的显示基板在开孔周围的局部平面图；
图17是根据本公开的一些示例性实施例的显示基板沿图16中的线CC’截取的截面图；
图18是图17的部分I的局部放大图；
图19是图17的部分II的局部放大图；
图20是图17的部分III的局部放大图；
图21是根据本公开的一些示例性实施例的显示基板的FIB(聚焦离子束)图；
图22是根据本公开的一些示例性实施例的显示基板的FIB(聚焦离子束)图；以及
图23是根据本公开的一些示例性实施例的一种显示装置的结构示意图。
具体实施方式
为使本公开实施例的目的、技术方案和优点更加清楚，下面将结合附图，对本公开实施例的技术方案进行清楚、完整地描述。显然，所描述的实施例是本公开的一部分实施例，而不是全部的实施例。基于所描述的本公开的实施例，本领域普通技术人员在无需创造性劳动的前提下所获得的所有其他实施例，都属于本公开的保护范围。
需要说明的是，在附图中，为了清楚和/或描述的目的，可以放大元件的尺寸和相对尺寸。如此，各个元件的尺寸和相对尺寸不必限于图中所示的尺寸和相对尺寸。在说明书和附图中，相同或相似的附图标号指示相同或相似的部件。
当元件被描述为“在”另一元件“上”、“连接到”另一元件或“结合到”另一元件时，所述元件可以直接在所述另一元件上、直接连接到所述另一元件或直接结合到所述另一元件，或者可以存在中间元件。然而，当元件被描述为“直接在”另一元件“上”、“直接连接到”另一元件或“直接结合到”另一元件时，不存在中间元件。用于描述元件之间的关系的其他术语和/或表述应当以类似的方式解释，例如，“在……之间”对“直接在……之间”、“相邻”对“直接相邻”或“在……上”对“直接在……上”等。此外，术语“连接”可指的是物理连接、电连接、通信连接和/或流体连接。此外，X轴、Y轴和Z轴不限于直角坐标系的三个轴，并且可以以更广泛的含义解释。 例如，X轴、Y轴和Z轴可彼此垂直，或者可代表彼此不垂直的不同方向。出于本公开的目的，“X、Y和Z中的至少一个”和“从由X、Y和Z构成的组中选择的至少一个”可以被解释为仅X、仅Y、仅Z、或者诸如XYZ、XYY、YZ和ZZ的X、Y和Z中的两个或更多个的任何组合。如文中所使用的，术语“和/或”包括所列相关项中的一个或多个的任何组合和所有组合。
需要说明的是，虽然术语“第一”、“第二”等可以在此用于描述各种部件、构件、元件、区域、层和/或部分，但是这些部件、构件、元件、区域、层和/或部分不应受到这些术语限制。而是，这些术语用于将一个部件、构件、元件、区域、层和/或部分与另一个相区分。因而，例如，下面讨论的第一部件、第一构件、第一元件、第一区域、第一层和/或第一部分可以被称为第二部件、第二构件、第二元件、第二区域、第二层和/或第二部分，而不背离本公开的教导。
为了便于描述，空间关系术语，例如，“上”、“下”、“左”、“右”等可以在此被使用，来描述一个元件或特征与另一元件或特征如图中所示的关系。应理解，空间关系术语意在涵盖除了图中描述的取向外，装置在使用或操作中的其它不同取向。例如，如果图中的装置被颠倒，则被描述为“在”其它元件或特征“之下”或“下面”的元件将取向为“在”其它元件或特征“之上”或“上面”。
在本文中，除非另有规定，术语“基本”、“基本上”、“约”、“大约”、“近似”和其它类似的术语用作近似的术语而不是用作程度的术语，并且它们意图解释将由本领域普通技术人员认识到的测量值或计算值的固有偏差。考虑到实际工艺误差、测量间题和与特定量的测量有关的误差(即，测量系统的局限性)，如本文中所使用的“基本”、“基本上”、“约”、“大约”、“近似”包括所陈述的值，并表示对于本领域普通技术人员所确定的特定值在可接受的偏差范围内。例如，“基本”、“基本上”、“约”、“大约”、“近似”可以表示在一个或更多个标准偏差内，或者在所陈述的值的±10％或±5％内。
在本文中，除非另有说明，所采用的术语“同一层”指的是两个层、部件、构件、元件或部分可以通过同一构图工艺形成，并且，这两个层、部件、构件、元件或部分一般由相同的材料形成。
在本文中，除非另有说明，表述“构图工艺”一般包括光刻胶的涂布、曝光、显影、刻蚀、光刻胶的剥离等步骤。表述“一次构图工艺”意指使用一块掩模板形成图案化的层、部件、构件等的工艺。
本公开的实施例提供一种显示基板及其制造方法。所述显示基板包括：衬底基板，所述衬底基板至少包括像素区域和开孔区域；设置在所述衬底基板上的多个子像素，所述多个子像素位于所述像素区域；开孔，所述开孔位于所述开孔区域；第一阻挡坝，所述第一阻挡坝设置在所述子像素与所述开孔之间，并且至少部分包围所述开孔；有机材料层，所述有机材料层在所述衬底基板上的正投影落入所述像素区域，所述有机材料层包括至少一个膜层；和填充结构，所述填充结构的至少一部分设置在所述开孔与所述第一阻挡坝之间，其中，所述填充结构和所述有机材料层的至少一个膜层位于相同的层，并且所述填充结构和所述有机材料层的至少一个膜层包括的材料相同。所述显示基板的制造方法包括以下步骤：提供衬底基板，所述衬底基板至少包括像素区域和切割区域；在所述衬底基板上形成功能膜层，所述功能膜层至少包括无机材料层，所述无机材料层的一部分在所述衬底基板上的正投影落入所述像素区域，所述无机材料层的另一部分在所述衬底基板上的正投影覆盖所述切割区域；至少去除所述无机材料层位于所述切割区域中的部分，以在所述衬底基板的切割区域中形成凹槽；在所述衬底基板上形成有机材料层；在所述衬底基板远离所述功能膜层和有机材料层一侧的表面上贴附背膜；以及执行切割工艺以形成开孔，在所述切割工艺中，切割线位于所述切割区域中，其中，所述在所述衬底基板上形成有机材料层的步骤包括：在所述功能膜层远离所述衬底基板的一侧形成有机材料层，使得所述有机材料层的一部分在所述衬底基板上的正投影落入所述像素区域，所述有机材料层的另一部分在所述衬底基板上的正投影覆盖所述切割区域，从而使得所述有机材料层的另一部分形成填充所述凹槽的填充结构。
在上述显示基板及其制造方法中，通过在凹槽中填充所述有机材料层，可以保证贴附背膜的过程中不会产生气泡，所以，在切割过程中，避免了像素区域中的膜层产生切割裂纹和/或像素区域中的膜层彼此分离的现象，从而能够提高产品良率。
图1示出了根据本公开的示例性实施例的显示基板的平面图。例如，所述显示基板可以为电致发光显示基板，例如OLED显示基板。再例如，所述显示基板可以为柔性显示基板。
如图1所示，所述显示基板包括显示区域AA，以及位于显示区域AA中的至少一个开孔10。图1中以设置两个开孔10为例进行示意，应该理解，本公开的实施例不局限于此，在其他实施例中，可以设置更少(例如一个)或更多个开孔10。
需要说明的是，本文中所述的“开孔”是显示基板上用来安装硬件结构的区域，为了方便说明，本文将其称为开孔，但所述开孔包括但不限于如下形式：通孔、凹槽、开口等。可选地，所述硬件结构可以包括下列结构中的一种或多种：前置摄像头、HOME键、听筒或扬声器。所述硬件结构的具体安装方式，本公开实施例不做特别限定。另外，可以根据需要安装的所述硬件结构的形状确定所述开孔的形状，例如，所述开孔在平行于显示基板的衬底基板的方向上的截面可以具有下列形状的一种或多种：圆形、椭圆形、矩形、圆角矩形、正方形、菱形、梯形等。
在本公开的实施例中，通过在显示区中设置开孔，将例如摄像头等的硬件结构安装于所述开孔中，可以实现屏下摄像等功能，从而可以提高屏占比，实现全面屏的效果。
例如，为了形成上述开孔10，可以通过例如激光切割的切割工艺形成贯穿所述显示基板的开孔。在进行激光切割时，激光需要投射到显示基板上，在一些实施例中，激光还需要相对于所述显示基板移动，激光投射至所述显示基板上的轨迹形成切割线或切割道。应该理解，切割线或切割道可以沿所述开孔10的外周缘10S(如图1所示)延伸。
需要说明的是，在本文中，为了描述方便，可以将开孔10所在的区域称为开孔区域，显示区域AA除开孔10之外的其他区域称为像素区域，所述切割线或切割道所在的区域称为切割区域。参照图1，所述像素区域中可以设置有多个子像素SP，例如，所述子像素SP可以包括红色子像素、绿色子像素和蓝色子像素。
图2是根据本公开的一些示例性实施例的显示基板的制造方法的流程图，图3A-图3F分别是本公开的一些示例性实施例的显示基板的制造方法的一些步骤被执行后所述显示基板的截面图，这些截面图是沿图1中的线AA’截取的截面图。结合参照图2以及图3A-图3F，所述制造方法可以包括步骤S101至步骤S105。
参照图3A，在步骤S101中，在衬底基板1上形成功能膜层。
在该步骤S101之前，所述制造方法可以包括提供衬底基板1的步骤。
例如，所述衬底基板1可以是柔性衬底基板，构成所述柔性衬底基板的材料包括但不限于聚酰亚胺(PI)、聚乙烯对苯二甲酸乙二醇酯(PET)、聚碳酸酯、聚乙烯、聚丙烯酸酯、聚醚酰亚胺或聚醚砜等。
结合参照图1和图3A，所述衬底基板1可以包括显示区域AA，所述显示区域AA 可以包括像素区域A1和待形成开孔的开孔区域H1。如上所述，所述开孔区域H1的外周形成有切割区域C1，切割线或切割道位于所述切割区域C1中。应该理解，切割区域C1在衬底基板1上的正投影为一封闭图形，例如，为圆形(或称为圆环形)。
在一些示例性的实施例中，如图3A所示，所述功能膜层可以至少包括无机材料层2。该无机材料层2覆盖显示区域AA，即覆盖像素区域A1、开孔区域H1和切割区域C1。也就是说，无机材料层2的一部分在衬底基板1上的正投影落入像素区域A1中，无机材料层2的另一部分在衬底基板1上的正投影覆盖切割区域C1。
需要说明的是，所述无机材料层2可以包括由无机绝缘材料构成的单个无机材料层，但是本公开的实施例不限于此，所述无机材料层2也可以包括由无机绝缘材料构成的多个无机材料层构成的叠层。
参照图3B，在步骤S102中，至少去除无机材料层2的位于切割区域C1中的部分。这样，在衬底基板1的切割区域C1处形成凹槽80。
应该理解，凹槽80在衬底基板1上的正投影为封闭的图形，例如，凹槽80在衬底基板1上的正投影为圆形、长方形等形状。凹槽80包围的区域为待形成的开孔。
例如，可以通过刻蚀工艺去除无机材料层2的位于切割区域C1中的部分。
发明人经研究发现，无机材料(特别是无机绝缘材料)的柔韧性通常较差，在切割过程中，无机材料中容易产生切割裂纹。在本公开的实施例中，去除无机材料层位于切割区域中的部分，这样，在后续的切割形成开孔的过程中，可以降低无机材料层中产生切割裂纹的风险，并且可以阻止切割裂纹沿着无机材料层向像素区域延伸。所以，可以降低或避免像素区域中的膜层产生裂纹的风险，从而提高产品良率。
参照图3C，在步骤S103中，在衬底基板1上形成有机材料层3，有机材料层3的至少一部分填充所述凹槽80。
例如，该有机材料层3覆盖显示区域AA，即覆盖像素区域A1和开孔区域H1，例如，该有机材料层3覆盖像素区域A1和切割区域C1。也就是说，有机材料层3的一部分在衬底基板1上的正投影落入像素区域A1中，有机材料层3的另一部分在衬底基板1上的正投影覆盖切割区域C1。
需要说明的是，图3C中示意性示出有机材料层3连续地延伸于像素区域A1和开孔区域H1，但是，这不应该理解为对本公开实施例的限制，应该理解，有机材料层3在像素区域A1中的部分与有机材料层3在开孔区域H1中的部分可以断开。
在本公开的实施例中，在凹槽80中填充所述有机材料层3，这样，有机材料层3的远离衬底基板1的表面包括位于切割区域C1的第一表面部分31和位于像素区域A1的第二表面部分32。第一表面部分31与第二表面部分32可以基本平齐，即第一表面部分31与衬底基板1之间的垂直距离基本等于第二表面部分32与衬底基板1之间的垂直距离。应该理解，此处的第二表面部分32应理解为位于像素区域A1的顶部的膜层的上表面的一部分。
这样，通过使所述有机材料层3填充于切割区域C1，可以填平凹槽80导致的膜层在切割区域与像素区域之间的厚度差，从而有利于后续的加工工艺。
参照图3D，在步骤S104中，在衬底基板1远离所述有机材料层3的表面上贴附背膜4。
例如，所述背膜4可以包括但不限于聚酰亚胺(PI)材料，以增强衬底基板1的强度，从而能够给衬底基板1上的各个膜层提供更好的支撑力。
图4A和图4B分别示出了比较实施例中贴附背膜的过程的示意图。在图4A和图4B示出的实施例中，在形成凹槽80’之后，没有在凹槽80’中填充有机材料层，即没有执行上述步骤S103。
参照图4A，贴附带有凹槽80’的衬底基板1’与背膜4。应该理解，凹槽80’使得在衬底基板1’的切割区域C1中的膜层(例如无机材料层2)的厚度小于在衬底基板1’的像素区域A1中的膜层(例如无机材料层2)的厚度，即，在衬底基板1’的切割区域C1中的膜层较薄。
参照图4B，在贴附过程中，需要施加一定的贴附压力，以使得衬底基板1’与背膜4较好地贴合在一起。在该贴附压力作用下，较薄处(即切割区域C1中)的膜层会沿远离背膜4的方向移动，从而在切割区域C1中产生气泡P4。
在后续的激光切割过程中，当激光作用于切割区域C1时，切割区域C1处的温度会急剧升高，气泡P4中的空气也会急剧膨胀，导致像素区域中的膜层产生切割裂纹，和/或导致像素区域中的膜层彼此分离，从而严重影响产品良率。
返回参照图3D，凹槽80中填充有有机材料层3，衬底基板1的切割区域C1中的各个膜层的厚度较大，这样，在贴附衬底基板1与背膜4的过程中，避免了在切割区域C1处产生所述气泡。由于贴附背膜的过程中不会产生所述气泡，所以，避免了像素区域中的膜层产生切割裂纹和/或像素区域中的膜层彼此分离的现象，从而能够提高 产品良率。
结合参照图3E和图3F，在步骤S105中，通过切割工艺形成开孔10。
例如，可以通过激光切割工艺形成开孔10。参照图3E，激光L投射至切割区域C1。为了形成圆形的开孔10，结合参照图1和图3E，切割区域C1可以是圆形，激光L可以相对衬底基板1移动，以形成圆形的迹线，该圆形的迹线对应切割区域C1。这样，可以形成贯通背膜4、衬底基板1以及其上的膜层的开孔10，如图3F所示。
由于贴附背膜的过程中不会产生所述气泡，所以，在切割过程中，避免了像素区域中的膜层产生切割裂纹和/或像素区域中的膜层彼此分离的现象，从而能够提高产品良率。
下面，以有机发光二极管(缩写为OLED)柔性显示基板为例，对本公开的实施例进行详细的说明。应该理解，本公开的实施例中的电致发光器件不局限于OLED器件，它可以包括其他类型的电致发光器件，例如QLED器件等。
图5是根据本公开的一些示例性实施例的显示基板的制造方法的流程图。图6A-图6E、图7和图9-图10分别是本公开的一些示例性实施例的显示基板的制造方法的一些步骤被执行后所述显示基板的截面图，这些截面图是沿图1中的线AA’截取的截面图。图8是图7中的部分I的局部放大图。结合参照图5以及图6A-图6E、图7和图9-图10，所述制造方法可以包括步骤S201至步骤S205。
参照图6A，在步骤S201中，在衬底基板1上形成功能膜层。
例如，所述功能膜层可以包括阻挡层21和缓冲层22。阻挡层21和缓冲层22中的每一个可以包括无机绝缘材料，例如氧化硅、氮化硅、氮氧化硅等硅的氧化物、硅的氮化物或硅的氮氧化物，或者氧化铝、氮化钛等包括金属元素的绝缘材料。例如，阻挡层21和缓冲层22可以采用化学气相淀积工艺等工艺形成。
例如，所述功能膜层还可以包括驱动电路层，所述驱动电路层包括用于驱动发光器件发光的薄膜晶体管。
此处，以所述薄膜晶体管为顶栅型TFT为例，对本公开的实施例进行进一步详细说明。参照图6A，所述驱动电路层可以包括：设置在衬底基板1上的有源层ACT，设置在有源层ACT远离衬底基板1一侧的栅绝缘层23，设置在栅绝缘层23远离衬底基板1一侧的栅极G，设置在栅极G远离衬底基板1一侧且覆盖栅极G的层间介电层24，设置在层间介电层24远离衬底基板1一侧的第一导电层。所述第一导电层可以包 括薄膜晶体管的源极S和漏极D以及形成在层间介电层24的过孔中的导电插塞SH和DH，薄膜晶体管的源极S和漏极D分别通过各自的导电插塞SH和DH与有源层ACT电连接。
栅绝缘层23和层间介电层24中的每一个可以包括无机绝缘材料，例如氧化硅、氮化硅、氮氧化硅等硅的氧化物、硅的氮化物或硅的氮氧化物，或者氧化铝、氮化钛等包括金属元素的绝缘材料。
这样，在一些示例性的实施例中，所述功能膜层的无机材料层2可以包括阻挡层21、缓冲层22、栅绝缘层23和层间介电层24中的至少一个。例如，无机材料层2可以包括阻挡层21、缓冲层22、栅绝缘层23和层间介电层24四者，或者，无机材料层2可以包括栅绝缘层23和层间介电层24两者。也就是说，阻挡层21、缓冲层22、栅绝缘层23和层间介电层24中的每一个的一部分在衬底基板1上的正投影落入像素区域A1中，另一部分在衬底基板1上的正投影覆盖切割区域C1。
例如，所述功能膜层包括：设置在所述衬底基板1上的第一导电层61；设置在所述第一导电层远离所述衬底基板一侧的栅绝缘层23；设置在所述栅绝缘层远离所述衬底基板一侧的第二导电层62；设置在所述第二导电层远离所述衬底基板一侧的层间介电层24；和设置在所述层间介电层远离所述衬底基板一侧的第三导电层63。薄膜晶体管的栅极G可以位于第一导电层61中，即第一导电层61和栅极G可以由相同的材料并且通过同一构图工艺形成。薄膜晶体管的源极S和漏极D可以位于第三导电层63中，即第三导电层63和源极S以及漏极D可以由相同的材料并且通过同一构图工艺形成。应该理解，第二导电层62可以由栅极导电材料形成。
在该步骤S201中，在形成所述功能膜层的同时，可以在所述衬底基板1上形成第一阻挡坝40。例如，所述第一阻挡坝40包围所述切割区域C1或开孔区域H1。例如，所述第一阻挡坝40可以沿所述切割区域C1或开孔区域H1的一周设置，即它完全包围所述切割区域C1或开孔区域H1。但是，本公开的实施例也不局限于此，所述第一阻挡坝40可以部分包围所述切割区域C1或开孔区域H1。也就是说，在本公开的实施例中，所述第一阻挡坝40可以至少部分包围所述切割区域C1或开孔区域H1。
例如，所述第一阻挡坝40包括所述第一导电层61、所述栅绝缘层23、所述第二导电层62、所述层间介电层24和所述第三导电层63中每一个的一部分构成的叠层结构。
参照图6B，在步骤S202中，至少去除无机材料层2的位于切割区域C1中的部分。这样，在衬底基板1的切割区域C1处形成凹槽80。
例如，可以通过刻蚀工艺去除无机材料层2的位于切割区域C1中的部分。
在图6B示出的实施例中，可以通过刻蚀工艺去除栅绝缘层23和层间介电层24中的每一个的位于切割区域C1中的部分，以形成凹槽80。但是，本公开的实施例不限于此，例如，可以通过刻蚀工艺去除阻挡层21、缓冲层22、栅绝缘层23和层间介电层24中的每一个的位于切割区域C1中的部分，以形成凹槽80。
需要说明的是，在上述实施例中，包括薄膜晶体管的源极S和漏极D的第一导电层在步骤S201中形成，即在形成凹槽80之前形成。但是，本公开的实施例不局限于此，包括薄膜晶体管的源极S和漏极D的上述第一导电层也可以在步骤S202之后形成，即在形成凹槽80之后形成。
参照图6C，在步骤S203中，在衬底基板1上形成有机材料层3，有机材料层3的至少一部分填充所述凹槽80。
在本公开的一些示例性实施例中，有机材料层3可以包括平坦化层33。具体地，在步骤S203中，在第一导电层远离衬底基板1的一侧形成平坦化层33。平坦化层33覆盖像素区域A1、开孔区域H1和切割区域C1。也就是说，平坦化层33的一部分在衬底基板1上的正投影落入像素区域A1中，平坦化层33的另一部分在衬底基板1上的正投影覆盖切割区域C1。这样，平坦化层33位于像素区域A1中的部分可以平坦化像素区域A1中的膜层结构，平坦化层33位于开孔区域H1中的部分可以形成填充结构50’。
在本公开的一些示例性实施例中，参照图7，有机材料层3可以包括平坦化层33和像素界定层34。
具体地，在步骤S201中，形成的第一阻挡坝40可以包括所述第一导电层61、所述栅绝缘层23、所述第二导电层62、所述层间介电层24、所述第三导电层63和所述钝化层64中每一个的一部分构成的叠层结构。
在步骤S203中，在第一导电层远离衬底基板1的一侧形成平坦化层33和像素界定层34。平坦化层33和像素界定层34覆盖像素区域A1、开孔区域H1和切割区域C1。也就是说，平坦化层33和像素界定层34中的每一个的一部分在衬底基板1上的正投影落入像素区域A1中，平坦化层33和像素界定层34中的每一个的另一部分在 衬底基板1上的正投影覆盖切割区域C1。这样，平坦化层33和像素界定层34位于像素区域A1中的部分可以平坦化像素区域A1中的膜层结构，平坦化层33和像素界定层34位于开孔区域H1中的部分可以形成填充结构50’。
图8为图7中的部分I的局部放大图。结合参照图7和图8，发明人经研究发现，在步骤S203中，在第一导电层远离衬底基板1的一侧形成平坦化层33之后，平坦化层33的一部分填充凹槽80，平坦化层33远离衬底基板1的表面(图8中的上表面)可能为向下倾斜的倾斜表面或向下凹入的弧形表面。例如，参照图8，对于实际工艺中加工出的某型号的产品，第一表面部分331在第一位置处与基准平面之间的垂直距离d1为约1256纳米，第一表面部分331在第二位置处与该基准平面之间的垂直距离d2为约1415纳米，第二表面部分332与该基准平面之间的垂直距离d3为约1598纳米。例如，所述基准平面可以为层间介电层24或钝化层64的上表面。在示例性的实施例中，所述基准平面可以为层间介电层24的上表面(即远离衬底基板1的表面)，第一表面部分331和第二表面部分332分别为平坦化层33的上表面的一部分，其中，第一表面部分331为平坦层层33的上表面靠近切割区域C1中的部分，第二表面部分332为平坦层层33的上表面靠近第一阻挡坝40的部分。例如，第一表面部分331在衬底基板1上的正投影与切割区域C1在衬底基板1上的正投影至少部分重叠，第二表面部分332在衬底基板1上的正投影与第一阻挡坝40在衬底基板1上的正投影至少部分重叠。例如，第一表面部分331在衬底基板1上的正投影落入切割区域C1在衬底基板1上的正投影，第二表面部分332在衬底基板1上的正投影落入第一阻挡坝40在衬底基板1上的正投影。参照图8，上述第一位置可以位于切割区域C1，上述第二位置可以位于切割区域C1与第一阻挡坝40的毗邻部，上述第三位置可以位于第一阻挡坝40所在的区域，即，上述第一位置在衬底基板1上的正投影落入切割区域C1在衬底基板1上的正投影内，上述第二位置在衬底基板1上的正投影落入切割区域C1与第一阻挡坝40的毗邻部在衬底基板1上的正投影，上述第三位置在衬底基板1上的正投影落入第一阻挡坝40在衬底基板1上的正投影。如图8所示，第一表面部分331形成为向下倾斜的倾斜表面或向下凹入的弧形表面，例如，第一表面部分331的坡度角可以在10～18度的范围内。可选地，上述垂直距离d1小于上述垂直距离d2，例如，上述垂直距离d2与上述垂直距离d1之间的差值可以在100～300纳米的范围内。可选地，上述垂直距离d2小于上述垂直距离d3，例如，述垂直距离d3与上述垂直距离d2 之间的差值可以在150～500纳米的范围内。这样，位于切割区域C1中的平坦化层33的上表面平坦性有待进一步提高。
在本公开的实施例中，在步骤S203中，进一步在平坦化层33上形成像素界定层34，使得像素界定层34的一部分在衬底基板1上的正投影落入像素区域A1中，像素界定层34的另一部分在衬底基板1上的正投影覆盖切割区域C1。通过这样的设置方式，可以进一步提高填充结构50’的上表面的平坦性，从而可以进一步确保避免在后续的贴附背膜的过程在切割区域中产生气泡的风险。也就是说，通过在切割区域中设置多个有机材料层的叠层结构，可以进一步保证避免产生所述气泡，从而能够提高产品良率。
在本公开的示例性实施例中，平坦化层33和像素界定层34的材料均为有机材料，例如为聚甲基丙烯酸甲酯、聚碳酸酯、聚苯乙烯、环氧树脂、聚酰亚胺、聚乙烯中的至少一种。
可选地，在本公开的实施例中，所述制造方法还可以包括形成OLED器件的各个膜层以及封装结构的步骤，例如，OLED器件的各个膜层可以包括阳极层、发光材料层和阴极层，所述封装结构可以包括无机封装层、有机封装层和无机封装层形成的叠层结构。所述阳极层可以在形成所述像素界定层之前形成在所述平坦化层上，所述发光材料层、所述阴极层和所述封装结构可以在形成所述像素界定层之后形成。本公开的实施例不局限于此，已知的用于形成OLED器件的各个膜层以及封装结构的工艺都可以用于本公开的实施例中。
参照图6D和图9，在步骤S204中，在衬底基板1远离所述有机材料层3的表面上贴附背膜4。
例如，所述背膜4可以包括但不限于聚酰亚胺(PI)材料，以增强衬底基板1的强度，从而能够给衬底基板1上的各个膜层提供更好的支撑力。
参照图6D和图9，凹槽80被包括平坦化层33或者平坦化层33和像素界定层34两者的有机材料层3填平，使得衬底基板1的切割区域C1中的各个膜层的厚度较大，这样，在贴附衬底基板1与背膜4的过程中，避免了在切割区域C1处产生所述气泡。由于贴附背膜的过程中不会产生所述气泡，所以，避免了像素区域中的膜层产生切割裂纹和/或像素区域中的膜层彼此分离的现象，从而能够提高产品良率。
参照图6E和图10，在步骤S205中，通过切割工艺形成开孔。
例如，结合参照图1，可以通过激光切割工艺形成开孔10。参照图6E和图10，激光L投射至切割区域C1。为了形成圆形的开孔10，结合参照图1，切割区域C1可以是圆形，激光L可以相对衬底基板1移动，以形成圆形的迹线(图6E中与激光L对应的虚线示意性表示一部分切割迹线)，该圆形的迹线对应切割区域C1。这样，可以形成贯通背膜4、衬底基板1以及其上的膜层的开孔10。应该理解，填充结构50’位于切割迹线外侧的一部分得以保留，形成包围开孔10的结构。
需要说明的是，在本公开的实施例中，切割迹线的“外侧”可以表示切割迹线靠近像素区域A1的一侧。
由于贴附背膜的过程中不会产生所述气泡，所以，在切割过程中，避免了像素区域中的膜层产生切割裂纹和/或像素区域中的膜层彼此分离的现象，从而能够提高产品良率。
需要说明的是，上述方法中的一些步骤可以单独执行或组合执行，以及可以并行执行或顺序执行，并不局限于图中所示的具体操作顺序。
本公开的一些示例性实施例还提供一种显示基板，返回参照图1，其示意性示出了所述显示基板的平面图，该显示基板为根据上述任一个实施例所述的制造方法制得。例如，所述显示基板可以是OLED显示基板。
图11是根据本公开的一些示例性实施例的显示基板在开孔周围的部分的平面图，图12是根据本公开的一些示例性实施例的显示基板沿图11中的线BB’截取的截面图。图13是根据本公开的另一些示例性实施例的显示基板沿图11中的线BB’截取的截面图。
结合参照图1、图10至图13，显示基板100可以包括：衬底基板1，所述衬底基板至少包括像素区域A1和开孔区域H1；设置在所述衬底基板1上的多个子像素SP，所述多个子像素SP位于所述像素区域A1；开孔10，所述开孔10位于所述开孔区域H1；第一阻挡坝40，所述第一阻挡坝40设置在所述子像素SP与所述开孔10之间，并且包围所述开孔10；有机材料层3，所述有机材料层3在所述衬底基板1上的正投影落入所述像素区域A1；和填充结构50，所述填充结构50的至少一部分设置在所述开孔10与所述第一阻挡坝40之间。
如上所述，填充结构50和有机材料层3可以通过同一构图工艺形成。这样，如图12所示，填充结构50和有机材料层3位于相同的层，并且所述填充结构50和所述有 机材料层3包括的材料相同。
需要说明的是，所述显示基板100可以包括位于子像素SP与开孔10之间的多个第一阻挡坝40。参照图15A和图15B，其示意性示出了开孔10与多个第一阻挡坝40的一些示例性实施方式。如上所述，开孔10在衬底基板上的正投影可以具有多种形状，所述形状包括但不限于圆形、椭圆形、矩形、圆角矩形、正方形、菱形、梯形等。例如，在图15A中，开孔10在衬底基板上的正投影为矩形，设置有多个(例如3个)第一阻挡坝40。可选地，多个第一阻挡坝40可以完全包围所述开孔10。在图15B中，设置有2个开孔10，一个开孔在衬底基板上的正投影为矩形，另一个开孔在衬底基板上的正投影为圆形，并且两个开孔的组合在衬底基板上的正投影为类跑道形。设置有多个(例如2个)第一阻挡坝40。可选地，多个第一阻挡坝40可以包围组合的两个开孔。
可选地，除了最靠近开孔10的一个第一阻挡坝之外，其他的第一阻挡坝上不覆盖有机材料，即，其他的第一阻挡坝不被有机材料层3和填充结构50中的任一个覆盖。这样，有机材料层3和填充结构50沿开孔10的径向方向断开。
需要说明的是，在本文中，表述“径向”或“径向方向”可以表示沿开孔的中心指向子像素SP的方向，例如，当开孔为圆形时，开孔的中心可以为圆心；当开孔为矩形时，开孔的中心可以为两条对角线的交点。
可选地，参照图12，所述填充结构50包括单个填充膜层，所述有机材料层3包括平坦化层33。所述填充膜层50和所述平坦化层33位于相同的层，并且所述填充膜层50和所述平坦化层33包括的材料相同。即，所述填充膜层50和所述平坦化层33通过同一构图工艺形成。
可选地，参照图13，所述填充结构50包括第一填充膜层501和第二填充膜层502，所述有机材料层包括平坦化层33和像素界定层34。所述第一填充膜层501和所述平坦化层33位于相同的层，并且所述第一填充膜层501和所述平坦化层33包括的材料相同。即，所述第一填充膜层501和所述平坦化层33通过同一构图工艺形成。所述第二填充膜层502和所述像素界定层34位于相同的层，并且所述第二填充膜层502和所述像素界定层34包括的材料相同。即，所述第二填充膜层502和所述像素界定层34通过同一构图工艺形成。
例如，所述显示基板100还包括设置在所述有机材料层3靠近所述衬底基板1一 侧的功能膜层6。例如，所述功能膜层6可以包括：设置在所述衬底基板1上的第一导电层61；设置在所述第一导电层61远离所述衬底基板1一侧的栅绝缘层23；设置在所述栅绝缘层23远离所述衬底基板1一侧的第二导电层62；设置在所述第二导电层62远离所述衬底基板1一侧的层间介电层24；设置在所述层间介电层24远离所述衬底基板1一侧的第三导电层63；和设置在所述第三导电层63远离所述衬底基板1一侧的钝化层64。
结合参照图10、图12和图13，所述薄膜晶体管的栅极G可以位于第一导电层61，即，第一导电层61可以由形成栅极G的导电材料形成。所述薄膜晶体管的源极S和漏极D可以位于第三导电层63，即第三导电层63可以由形成源极S和漏极D的导电材料形成。需要说明的是，第二导电层62也可以由栅极导电材料形成。
例如，在图12所示的实施例中，所述第一阻挡坝40包括所述第一导电层61、所述栅绝缘层23、所述第二导电层62、所述层间介电层24和所述第三导电层63中每一个的一部分构成的叠层结构。在图13所示的实施例中，所述第一阻挡坝40包括所述第一导电层61、所述栅绝缘层23、所述第二导电层62、所述层间介电层24、所述第三导电层63和所述钝化层64中每一个的一部分构成的叠层结构。通过设置所述第一阻挡坝，可以避免切割形成开孔的过程中产生的裂纹延伸到像素区域的部件上，从而可以避免影响像素区域中的部件。
可选地，所述第一阻挡坝40平行于开孔的径向方向的截面呈梯形形状。具体地，钝化层64的构成第一阻挡坝40的部分在衬底基板1上的正投影落入第三导电层63的构成第一阻挡坝40的部分在衬底基板1上的正投影内，第三导电层63的构成第一阻挡坝40的部分在衬底基板1上的正投影落入层间介电层24的构成第一阻挡坝40的部分在衬底基板1上的正投影内，层间介电层24的构成第一阻挡坝40的部分在衬底基板1上的正投影落入第二导电层62的构成第一阻挡坝40的部分在衬底基板1上的正投影内，第二导电层62的构成第一阻挡坝40的部分在衬底基板1上的正投影落入栅绝缘层23的构成第一阻挡坝40的部分在衬底基板1上的正投影内，栅绝缘层23的构成第一阻挡坝40的部分在衬底基板1上的正投影落入第一导电层61的构成第一阻挡坝40的部分在衬底基板1上的正投影内。
可选地，如图12所示，所述填充结构50在所述衬底基板1上的正投影与所述第一阻挡坝40在所述衬底基板1上的正投影不重叠。也就是说，填充结构50终止于第 一阻挡坝40靠近开孔10的侧部。
可选地，如图13所示，钝化层64包括位于第一阻挡坝40上的侧部641，即，所述侧部641在衬底基板1上的正投影落入第一阻挡坝40在衬底基板1上的正投影内。可选地，所述侧部641在衬底基板1上的正投影位于第一阻挡坝40在衬底基板1上的正投影的大约中间位置。
所述填充结构50在所述衬底基板1上的正投影与所述第一阻挡坝40在所述衬底基板1上的正投影部分重叠。例如，所述填充结构50包括靠近所述第一阻挡坝40的侧部531，所述侧部531在所述衬底基板1上的正投影落入所述第一阻挡坝40在所述衬底基板1上的正投影内，并且所述侧部531在所述衬底基板1上的正投影位于所述第一阻挡坝40在所述衬底基板1上的正投影的中间位置。也就是说，填充结构50终止于第一阻挡坝40的上表面的中间位置。
在图示的实施例中，所述填充结构50在所述衬底基板1上的正投影覆盖所述钝化层64的构成所述第一阻挡坝40的部分在所述衬底基板1上的正投影。
可选地，受限于实际的加工工艺，所述填充结构50在所述衬底基板1上的正投影可以覆盖所述第一阻挡坝40在所述衬底基板1上的正投影，如图14A所示。也就是说，填充结构50可以延伸到第一阻挡坝40远离开孔10的一侧。
需要说明的是，在图12至图14B所示的实施例中，填充结构50与位于像素区域A1中的有机材料层3在沿开孔10的径向方向上断开，并且，填充结构50与位于像素区域A1中的有机材料层3由相同的材料并且通过同一构图工艺形成。
如图12至图14B所示，所述填充结构50可以包括第一填充部分51和第二填充部分52，所述第二填充部分52比所述第一填充部分51更靠近所述第一阻挡坝40。例如，在图12所示的实施例中，第一填充部分51为填充结构50靠近开孔10的部分，第二填充部分52为填充结构50靠近第一阻挡坝40的部分。在图13和图14A所示的实施例中，第一填充部分50为填充结构50靠近开孔10的部分，第二填充部分52为填充结构50与第一阻挡坝40重叠的部分。
第一填充部分51包括远离所述衬底基板1的第一表面，第二填充部分52包括远离所述衬底基板1的第二表面。所述第一表面与所述衬底基板1之间的垂直距离大于所述第二表面与所述衬底基板1之间的垂直距离。
可选地，如图14B所示，所述第一阻挡坝40包括远离所述衬底基板的顶表面和 面向所述开孔的侧表面401，所述钝化层64部分覆盖所述第一阻挡坝的顶表面，所述钝化层64覆盖所述第一阻挡坝的侧表面。例如，所述钝化层64的覆盖所述第一阻挡坝的顶表面的部分(可以称为钝化层64的第一部分，在图14B中用附图标记642表示)在所述衬底基板1上的正投影的面积为所述第三导电层63的第一部分(即位于所述第一阻挡坝40的部分，在图14B中用附图标记632表示)在所述衬底基板1上的正投影的面积的3/10～7/10，例如为2/5～3/5。通过这样的设置方式，可以使得第一阻挡坝40能够更有效地防止裂纹扩散。
如图14B所示，钝化层64还包括未覆盖所述第一阻挡坝40的部分(可以称为钝化层64的第二部分，在图14B中用附图标记643表示)，该部分643在衬底基板1上的正投影与填充结构50在衬底基板1上的正投影重叠，例如，该部分被填充结构50覆盖。
图16是根据本公开的一些示例性实施例的显示基板在开孔周围的局部平面图，图17是根据本公开的一些示例性实施例的显示基板沿图16中的线CC’截取的截面图。图18是图17的部分I的局部放大图。图19是图17的部分II的局部放大图。图20是图17的部分III的局部放大图。
需要说明的是，图16和图17仅示出了位于开孔一侧的结构。还需要的说明的是，下面重点描述图16至图20相对于上面的各个实施例的不同之处，其相同之处可以参照上文的描述，在此不再赘述。
参照图16至图20，显示基板100可以包括位于子像素SP与开孔10之间的多个第一阻挡坝40、第二阻挡坝60、第三阻挡坝70和多个第四阻挡坝90。多个第一阻挡坝40、第二阻挡坝60、第三阻挡坝70和多个第四阻挡坝90沿从开孔10指向子像素SP的方向依次排列。
例如，显示基板100可以包括7个第一阻挡坝40、1个第二阻挡坝60、1个第三阻挡坝70和4个第四阻挡坝90。应该理解，上述阻挡坝的数量不应理解为对本公开实施例的限制，所述显示基板可以包括其他数量的各种阻挡坝。
继续参照图16至图20，显示基板100可以包括设置在衬底基板1上的功能膜层。例如，所述功能膜层可以包括：设置在所述衬底基板1上的阻挡层21；设置在阻挡层21远离衬底基板1一侧的缓冲层22；设置在所述缓冲层远离衬底基板1一侧的第一栅绝缘层231；设置在所述第一栅绝缘层231远离衬底基板1一侧的第一导电层61；设 置在所述第一导电层61远离所述衬底基板1一侧的第二栅绝缘层232；设置在所述第二栅绝缘层232远离所述衬底基板1一侧的第二导电层62；设置在所述第二导电层62远离所述衬底基板1一侧的层间介电层24；设置在所述层间介电层24远离所述衬底基板1一侧的第三导电层63。
结合参照图10、图12和图13，所述薄膜晶体管的栅极G可以位于第一导电层61，即，第一导电层61可以由形成栅极G的导电材料形成。所述薄膜晶体管的源极S和漏极D可以位于第三导电层63，即第三导电层63可以由形成源极S和漏极D的导电材料形成。需要说明的是，第二导电层62也可以由栅极导电材料形成。
继续参照图16至图20，显示基板100可以包括设置在所述功能膜层远离衬底基板1一侧的有机材料层3。例如，所述有机材料层3可以包括平坦化层33和像素界定层34中选择的至少一层。
在图16至图20所示的实施例中，所述第一阻挡坝40至少包括位于所述阻挡层21、缓冲层22和第三导电层62中每一个的一部分构成的叠层结构。例如，所述第一阻挡坝40包括位于阻挡层21、缓冲层22、第一栅绝缘层231、第一导电层61、第二栅绝缘层232、第二导电层62、层间介电层24和第三导电层63中每一个的一部分构成的叠层结构。
所述第二阻挡坝60至少包括位于所述平坦化层33和像素界定层34中每一个的一部分构成的叠层结构。例如，所述第二阻挡坝60包括位于阻挡层21、缓冲层22、第一栅绝缘层231第二栅绝缘层232、层间介电层24、平坦化层33和像素界定层34中每一个的一部分构成的叠层结构。
所述第三阻挡坝70至少包括位于所述平坦化层33和像素界定层34中每一个的一部分构成的叠层结构。例如，所述第三阻挡坝70包括位于阻挡层21、缓冲层22、第一栅绝缘层231第二栅绝缘层232、层间介电层24、平坦化层33和像素界定层34中每一个的一部分构成的叠层结构。
所述第四阻挡坝90至少包括位于所述阻挡层21、缓冲层22和第三导电层62中每一个的一部分构成的叠层结构。例如，所述第四阻挡坝90包括位于阻挡层21、缓冲层22、第一栅绝缘层231、第二栅绝缘层232、层间介电层24和第三导电层63中每一个的一部分构成的叠层结构。
进一步地，显示基板100也可以包括填充结构50。例如，所述填充结构50包括 第一填充膜层501和第二填充膜层502，所述有机材料层包括平坦化层33和像素界定层34。所述第一填充膜层501和所述平坦化层33位于相同的层，并且所述第一填充膜层501和所述平坦化层33包括的材料相同。即，所述第一填充膜层501和所述平坦化层33通过同一构图工艺形成。所述第二填充膜层502和所述像素界定层34位于相同的层，并且所述第二填充膜层502和所述像素界定层34包括的材料相同。即，所述第二填充膜层502和所述像素界定层34通过同一构图工艺形成。
参照图17，除了最靠近开孔10的一个第一阻挡坝40之外，其他的第一阻挡坝40上不覆盖有机材料，即，其他的第一阻挡坝40不被有机材料层3和填充结构50中的任一个覆盖。即，除最靠近所述开孔的第一阻挡坝之外的其他第一阻挡坝在所述衬底基板上的正投影与所述填充结构50在所述衬底基板上的正投影间隔设置。这样，有机材料层3和填充结构50沿开孔10的径向方向断开。
所述填充结构50在所述衬底基板1上的正投影与最靠近开孔10的一个第一阻挡坝40在所述衬底基板1上的正投影部分重叠。例如，填充结构50终止于最靠近开孔10的第一阻挡坝40的上表面的中间位置。
可选地，所述填充结构50在所述衬底基板1上的正投影与所述第一阻挡坝40在所述衬底基板1上的正投影部分重叠，重叠部分的面积为所述第一阻挡坝40在所述衬底基板1上的正投影的面积的大约二分之一，例如，在2/5～3/5的范围内。通过这样的设置，可以提高填充结构的平坦性。
第一阻挡坝40在衬底基板1上的正投影沿开孔10的径向方向的尺寸小于第二阻挡坝60和第三阻挡坝70中的每一个在衬底基板1上的正投影沿开孔10的径向方向的尺寸，第一阻挡坝40在衬底基板1上的正投影沿开孔10的径向方向的尺寸基本等于第四阻挡坝90在衬底基板1上的正投影沿开孔10的径向方向的尺寸。参照图17至图20，第一阻挡坝40的宽度小于第二阻挡坝60和第三阻挡坝70中的每一个的宽度，第一阻挡坝40的宽度基本等于第四阻挡坝90的宽度。
需要说明的是，在本文中，除非另有说明，阻挡坝的宽度表示该阻挡坝在衬底基板上的正投影沿开孔的径向方向的尺寸。
例如，第一阻挡坝40和第四阻挡坝90中的每一个在衬底基板1上的正投影沿开孔10的径向方向的尺寸(即宽度)在大约5～7微米的范围内，第二阻挡坝60在衬底基板1上的正投影沿开孔10的径向方向的尺寸(即宽度)在大约16～20微米的范围内， 第三阻挡坝70在衬底基板1上的正投影沿开孔10的径向方向的尺寸(即宽度)在40微米左右。
可选地，多个第一阻挡坝40沿所述开孔10的径向方向等间距地布置。所述第一阻挡坝40的位于第三导电层63中的部分的宽度大于所述第一阻挡坝40的位于第二导电层62中的部分的宽度，所述第一阻挡坝40的位于第二导电层62中的部分的宽度大于所述第一阻挡坝40的位于第一导电层61中的部分的宽度。
例如，所述第一阻挡坝40的位于第三导电层63中的部分的宽度在5微米左右，所述第一阻挡坝40的位于第二导电层62中的部分的宽度在6微米左右，所述第一阻挡坝40的位于第一导电层61中的部分的宽度在7微米左右。
再例如，两个相邻的所述第一阻挡坝40的第三导电层63中的部分之间的间隔距离在7微米左右。
可选地，多个第四阻挡坝90沿所述开孔10的径向方向等间距地布置。两个相邻的第四阻挡坝90之间的间隔距离小于两个相邻的第一阻挡坝40之间的间隔距离。
例如，所述第四阻挡坝90的位于第三导电层63中的部分的宽度在5微米左右。
再例如，两个相邻的所述第四阻挡坝90的第三导电层63中的部分之间的间隔距离在9微米左右，两个相邻的所述第四阻挡坝90的第一栅绝缘层231中的部分之间的间隔距离在5微米左右。
例如，所述第二阻挡坝60的位于像素界定层34中的部分的宽度在16微米左右，所述第二阻挡坝60的位于平坦化层33中的部分的宽度在20微米左右。
例如，所述第三阻挡坝70的位于像素界定层34中的部分的宽度在40微米左右，所述第三阻挡坝70的位于平坦化层33中的部分的宽度在40微米左右。
再例如，所述第二阻挡坝60的位于平坦化层33中的部分与所述第三阻挡坝70的位于平坦化层33中的部分之间的间隔距离在20微米左右。
在本公开的一些示例性实施例中，所述第一阻挡坝40和所述第二阻挡坝60中的每一个的横截面均呈梯形，所述横截面垂直于所述衬底基板的设置有所述第一阻挡坝和所述第二阻挡坝的表面(即图6A中所示的上表面)，并且所述横截面沿第一方向(即上述的径向方向)延伸；所述第一阻挡坝40的宽度的最小尺寸是所述第二阻挡坝60的宽度的最小尺寸的1/4～3/8，所述第一阻挡坝40的宽度的最大尺寸是所述第二阻挡 坝60的宽度的最大尺寸的3/10～2/5。通过这样的设置，可以使得第一阻挡坝和第二阻挡坝能够相互配合，更有效地防止裂纹扩散。
所述第一阻挡坝和所述第三阻挡坝中的每一个的横截面均呈梯形，所述横截面垂直于所述衬底基板的设置有所述第一阻挡坝和所述第三阻挡坝的表面，并且所述横截面沿所述第一方向延伸；所述第一阻挡坝40的宽度的最小尺寸是所述第三阻挡坝70的宽度最小尺寸的1/16～3/16，所述第一阻挡坝40的宽度的最大尺寸是所述第三阻挡坝70的宽度的最大尺寸的3/20～1/5。通过这样的设置，可以使得第一阻挡坝和第三阻挡坝能够相互配合，更有效地防止裂纹扩散。
图21是根据本公开的一些示例性实施例的显示基板的FIB(聚焦离子束)图，如图21所示，填充结构50包括两个膜层501、502，如上所述，两个膜层501和502分别与平坦化层和像素界定层对应。图22是根据本公开的一些示例性实施例的显示基板的FIB(聚焦离子束)图，如图22所示，填充结构50包括一个膜层，如上所述，该一个膜层与平坦化层对应。
例如，所述有机材料层和所述填充结构50的材料包括从聚甲基丙烯酸甲酯、聚碳酸酯、聚苯乙烯、环氧树脂、聚酰业胺、聚乙烯中选择的至少一种。
可选地，所述显示基板100还包括设置在衬底基板1远离有机材料层3的表面上的背膜4。例如，所述背膜4可以包括但不限于聚酰亚胺(PI)材料，以增强衬底基板1的强度，从而能够给衬底基板1上的各个膜层提供更好的支撑力。
本公开的一些示例性实施例还提供一种显示装置200。图23为根据本公开的一些示例性实施例提供的一种显示装置的结构示意图。如图23所示，该显示装置包括根据上述实施例提供的显示基板。
应该理解，所述显示基板和所述显示装置同样具有与上述制造方法的有益效果对应的技术效果，具体可参见上述描述。
该显示装置可以为任何具有显示功能的产品或部件。例如，所述显示装置可以是智能电话、便携式电话、导航设备、电视机(TV)、车载音响本体、膝上型电脑、平板电脑、便携式多媒体播放器(PMP)、个人数字助理(PDA)等等。所述显示装置可以为被配置为具有无线通信功能的口袋大小的便携式通信终端。而且，所述显示装置可以是柔性设备或柔性显示设备。
虽然本公开的总体技术构思的一些实施例已被显示和说明，本领域普通技术人员 将理解，在不背离所述总体技术构思的原则和精神的情况下，可对这些实施例做出改变，本公开的范围以权利要求和它们的等同物限定。

Claims (39)

  1. 一种显示基板，包括：
    衬底基板，所述衬底基板至少包括像素区域和开孔区域；
    设置在所述衬底基板上的多个子像素，所述多个子像素位于所述像素区域；
    开孔，所述开孔位于所述开孔区域；
    第一阻挡坝，所述第一阻挡坝设置在所述子像素与所述开孔之间，并且至少部分包围所述开孔；
    第二阻挡坝，所述第二阻挡坝设置在所述第一阻挡坝远离所述开孔的一侧；
    有机材料层，所述有机材料层在所述衬底基板上的正投影落入所述像素区域，所述有机材料层包括至少一个膜层；和
    填充结构，所述填充结构的至少一部分设置在所述开孔与所述第一阻挡坝之间，其中，所述填充结构和所述有机材料层的至少一个膜层位于相同的层，并且所述填充结构和所述有机材料层的至少一个膜层包括的材料相同；
    所述第一阻挡坝在所述衬底基板上的正投影的宽度小于所述第二阻挡坝在所述衬底基板上的正投影的宽度。
  2. 根据权利要求1所述的显示基板，其中，所述填充结构包括单个填充膜层，所述有机材料层包括平坦化层；以及
    所述填充膜层和所述平坦化层位于相同的层，并且所述填充膜层和所述平坦化层包括的材料相同。
  3. 根据权利要求1所述的显示基板，其中，所述填充结构包括第一填充膜层和第二填充膜层，所述有机材料层包括平坦化层和像素界定层；
    所述第一填充膜层和所述平坦化层位于相同的层，并且所述第一填充膜层和所述平坦化层包括的材料相同；以及
    所述第二填充膜层和所述像素界定层位于相同的层，并且所述第二填充膜层和所述像素界定层包括的材料相同。
  4. 根据权利要求1至3中任一项所述的显示基板，其中，所述显示基板包括多个 所述第一阻挡坝，多个第一阻挡坝中最靠近所述开孔的一个第一阻挡坝在所述衬底基板上的正投影与所述填充结构在所述衬底基板上的正投影不重叠。
  5. 根据权利要求1至3中任一项所述的显示基板，其中，所述显示基板包括多个所述第一阻挡坝，多个第一阻挡坝中最靠近所述开孔的一个第一阻挡坝在所述衬底基板上的正投影与所述填充结构在所述衬底基板上的正投影部分重叠。
  6. 根据权利要求1至3中任一项所述的显示基板，其中，所述显示基板包括多个所述第一阻挡坝，所述填充结构在所述衬底基板上的正投影覆盖多个第一阻挡坝中最靠近所述开孔的一个第一阻挡坝在所述衬底基板上的正投影。
  7. 根据权利要求1至3中任一项所述的显示基板，其中，所述显示基板还包括设置在所述有机材料层靠近所述衬底基板一侧的功能膜层，所述功能膜层包括：
    设置在所述衬底基板上的第一导电层；
    设置在所述第一导电层远离所述衬底基板一侧的栅绝缘层；
    设置在所述栅绝缘层远离所述衬底基板一侧的第二导电层；
    设置在所述第二导电层远离所述衬底基板一侧的层间介电层；
    设置在所述层间介电层远离所述衬底基板一侧的第三导电层；和
    设置在所述第三导电层远离所述衬底基板一侧的钝化层。
  8. 根据权利要求7所述的显示基板，其中，所述第一阻挡坝包括位于所述第一导电层、所述栅绝缘层、所述第二导电层、所述层间介电层、所述第三导电层和所述钝化层中每一个的一部分构成的叠层结构；以及
    所述钝化层包括位于所述第一阻挡坝的第一部分，所述第三导电层包括位于所述第一阻挡坝的第一部分，所述钝化层的第一部分在所述衬底基板上的正投影落入所述第三导电层的第一部分在所述衬底基板上的正投影内。
  9. 根据权利要求8所述的显示基板，其中，所述填充结构在所述衬底基板上的正投影覆盖所述钝化层的第一部分在所述衬底基板上的正投影。
  10. 根据权利要求9所述的显示基板，其中，所述填充结构在所述衬底基板上的正投影与所述第一阻挡坝在所述衬底基板上的正投影部分重叠，重叠部分的面积为所述第一阻挡坝在所述衬底基板上的正投影的面积的2/5～3/5。
  11. 根据权利要求1至10中任一项所述的显示基板，其中，所述填充结构包括第一填充部分和第二填充部分，所述第二填充部分比所述第一填充部分更靠近所述第一阻挡坝；
    所述第一填充部分包括远离所述衬底基板的第一表面，所述第二填充部分包括远离所述衬底基板的第二表面；以及
    所述第一表面与所述衬底基板之间的垂直距离大于所述第二表面与所述衬底基板之间的垂直距离。
  12. 根据权利要求10所述的显示基板，其中，所述第一阻挡坝包括远离所述衬底基板的顶表面和面向所述开孔的侧表面，所述钝化层部分覆盖所述第一阻挡坝的顶表面，所述钝化层覆盖所述第一阻挡坝的侧表面。
  13. 根据权利要求12所述的显示基板，其中，所述钝化层的覆盖所述第一阻挡坝的顶表面的部分在所述衬底基板上的正投影的面积为所述第三导电层的第一部分在所述衬底基板上的正投影的面积的3/10～7/10。
  14. 根据权利要求4至6中任一项所述的显示基板，其中，除最靠近所述开孔的第一阻挡坝之外的其他第一阻挡坝在所述衬底基板上的正投影与所述填充结构在所述衬底基板上的正投影间隔设置。
  15. 根据权利要求1至10中任一项所述的显示基板，其中，所述显示基板还包括第三阻挡坝，所述第三阻挡坝设置在所述第二阻挡坝远离所述开孔的一侧，所述第三阻挡坝在所述衬底基板上的正投影的宽度大于所述第二阻挡坝在所述衬底基板上的正投影的宽度。
  16. 根据权利要求15所述的显示基板，其中，所述显示基板还包括第四阻挡坝， 所述第四阻挡坝设置在所述第三阻挡坝远离所述开孔的一侧，所述第四阻挡坝在所述衬底基板上的正投影的宽度基本等于所述第一阻挡坝在所述衬底基板上的正投影的宽度。
  17. 根据权利要求16所述的显示基板，其中，所述显示基板包括还包括设置在所述有机材料层靠近所述衬底基板一侧的功能膜层，所述功能膜层包括：
    设置在所述衬底基板上的阻挡层；
    设置在所述阻挡层远离所述衬底基板一侧的缓冲层；
    设置在所述缓冲层远离所述衬底基板一侧的第一栅绝缘层；
    设置在所述第一栅绝缘层远离所述衬底基板一侧的第一导电层；
    设置在所述第一导电层远离所述衬底基板一侧的第二栅绝缘层；
    设置在所述第二栅绝缘层远离所述衬底基板一侧的第二导电层；
    设置在所述第二导电层远离所述衬底基板一侧的层间介电层；和
    设置在所述层间介电层远离所述衬底基板一侧的第三导电层。
  18. 根据权利要求17所述的显示基板，其中，所述填充结构还包括位于所述阻挡层和所述缓冲层中的至少一层中的部分。
  19. 根据权利要求18所述的显示基板，其中，所述第一阻挡坝至少包括位于所述阻挡层、所述缓冲层和所述第三导电层中每一个的一部分构成的叠层结构；和/或，
    所述第二阻挡坝至少包括位于所述平坦化层和所述像素界定层中每一个的一部分构成的叠层结构；和/或，
    所述第三阻挡坝至少包括位于所述平坦化层和所述像素界定层中每一个的一部分构成的叠层结构；和/或，
    所述第四阻挡坝至少包括位于所述阻挡层、所述缓冲层和所述第三导电层中每一个的一部分构成的叠层结构。
  20. 根据权利要求1至3中任一项所述的显示基板，其中，所述第一阻挡坝和所述第二阻挡坝中的每一个的横截面均呈梯形，所述横截面垂直于所述衬底基板的设置 有所述第一阻挡坝和所述第二阻挡坝的表面，并且所述横截面沿第一方向延伸，所述第一方向从所述开孔区域指向所述像素区域；
    所述第一阻挡坝的宽度的最小尺寸是所述第二阻挡坝的宽度的最小尺寸的1/4～3/8，所述第一阻挡坝的宽度的最大尺寸是所述第二阻挡坝的宽度的最大尺寸的3/10～2/5。
  21. 根据权利要求15所述的显示基板，其中，所述第一阻挡坝和所述第三阻挡坝中的每一个的横截面均呈梯形，所述横截面垂直于所述衬底基板的设置有所述第一阻挡坝和所述第三阻挡坝的表面，并且所述横截面沿第一方向延伸，所述第一方向从所述开孔区域指向所述像素区域；
    所述第一阻挡坝的宽度的最小尺寸是所述第三阻挡坝的宽度的最小尺寸的1/16～3/16，所述第一阻挡坝的宽度的最大尺寸是所述第三阻挡坝的宽度的最大尺寸的3/20～1/5。
  22. 根据权利要求1至21中任一项所述的显示基板，其中，所述有机材料层的材料包括从聚甲基丙烯酸甲酯、聚碳酸酯、聚苯乙烯、环氧树脂、聚酰亚胺、聚乙烯中选择的至少一种。
  23. 根据权利要求1至21中任一项所述的显示基板，其中，所述衬底基板为柔性衬底基板，以及所述显示基板还包括设置在所述衬底基板远离所述有机材料层的表面上的背膜。
  24. 一种显示装置，包括根据权利要求1至23中任一项所述的显示基板。
  25. 一种显示基板的制造方法，包括以下步骤：
    提供衬底基板，所述衬底基板至少包括像素区域和切割区域；
    在所述衬底基板上形成功能膜层，所述功能膜层至少包括无机材料层，所述无机材料层的一部分在所述衬底基板上的正投影落入所述像素区域，所述无机材料层的另一部分在所述衬底基板上的正投影覆盖所述切割区域；
    至少去除所述无机材料层位于所述切割区域中的部分，以在所述衬底基板的切割 区域中形成凹槽；
    在所述衬底基板上形成有机材料层；
    在所述衬底基板远离所述功能膜层和有机材料层一侧的表面上贴附背膜；以及
    执行切割工艺以形成开孔，在所述切割工艺中，切割线位于所述切割区域中，
    其中，所述在所述衬底基板上形成有机材料层的步骤包括：
    在所述功能膜层远离所述衬底基板的一侧形成有机材料层，使得所述有机材料层的一部分在所述衬底基板上的正投影落入所述像素区域，所述有机材料层的另一部分在所述衬底基板上的正投影覆盖所述切割区域，从而使得所述有机材料层的另一部分形成填充所述凹槽的填充结构。
  26. 根据权利要求25所述的制造方法，其中，所述有机材料层包括平坦化层。
  27. 根据权利要求25所述的制造方法，其中，所述有机材料层包括平坦化层和像素界定层。
  28. 根据权利要求25至27中任一项所述的制造方法，还包括：在所述衬底基板上形成第一阻挡坝，
    其中，所述第一阻挡坝包围所述切割区域。
  29. 根据权利要求28所述的制造方法，其中，所述填充结构在所述衬底基板上的正投影与所述第一阻挡坝在所述衬底基板上的正投影不重叠。
  30. 根据权利要求28所述的制造方法，其中，所述填充结构在所述衬底基板上的正投影与所述第一阻挡坝在所述衬底基板上的正投影部分重叠。
  31. 根据权利要求28所述的制造方法，其中，所述填充结构在所述衬底基板上的正投影覆盖所述第一阻挡坝在所述衬底基板上的正投影。
  32. 根据权利要求25至31中任一项所述的制造方法，其中，在所述衬底基板远离所述有机材料层一侧的表面上贴附背膜的步骤中，施加压力以贴附所述衬底基板与 所述背膜，使得所述衬底基板的位于所述切割区域的部分和所述衬底基板的位于所述像素区域的部分均与所述背膜贴合。
  33. 根据权利要求27所述的制造方法，其中，在所述衬底基板上形成功能膜层的步骤包括：在所述衬底基板上依次形成阻挡层、缓冲层、第一导电层、栅绝缘层、第二导电层、层间介电层、第三导电层和钝化层；以及
    所述无机材料层包括阻挡层、缓冲层、栅绝缘层和层间介电层中的至少一个。
  34. 根据权利要求33所述的制造方法，其中，在所述功能膜层远离所述衬底基板的一侧形成有机材料层的步骤中，所述平坦化层远离所述衬底基板的表面包括第一平坦化层表面部分和第二平坦化层表面部分，所述第一平坦化层表面部分在所述衬底基板上的正投影与所述切割区域在所述衬底基板上的正投影至少部分重叠，所述第二平坦化层表面部分在所述衬底基板上的正投影与所述第一阻挡坝在所述衬底基板上的正投影至少部分重叠；
    所述第一平坦化层表面部分在第一位置处于基准平面之间的垂直距离d1小于所述第一平坦化层表面部分在第二位置处于基准平面之间的垂直距离d2，所述垂直距离d2小于所述第二平坦化层表面部分与所述基准平面之间的垂直距离d3，
    其中，所述基准平面为所述层间介电层的远离所述衬底基板的表面，所述第一位置在所述衬底基板上的正投影落入所述切割区域在所述衬底基板上的正投影内，所述第二位置在所述衬底基板上的正投影落入所述切割区域与所述第一阻挡坝的毗邻部在所述衬底基板上的正投影内，所述第三位置在所述衬底基板上的正投影落入所述第一阻挡坝在所述衬底基板上的正投影内。
  35. 根据权利要求34所述的制造方法，其中，在至少去除所述无机材料层位于所述切割区域中的部分的步骤中，通过刻蚀工艺去除所述无机材料层位于所述切割区域中的部分。
  36. 根据权利要求25至35中任一项所述的制造方法，其中，执行切割工艺以形成开孔的步骤包括：
    执行激光切割工艺，使得激光投射在所述衬底基板上的轨迹落入所述凹槽中，以 形成贯穿所述背膜、所述衬底基板、所述功能膜层和所述填充结构的开孔。
  37. 根据权利要求34所述的制造方法，其中，所述第一平坦化层表面部分的坡度角在10～18度的范围内。
  38. 根据权利要求34所述的制造方法，其中，所述垂直距离d2与所述垂直距离d1之间的差值在100～300纳米的范围内。
  39. 根据权利要求34所述的制造方法，其中，所述垂直距离d3与所述垂直距离d2之间的差值在150～500纳米的范围内。
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