WO2021238294A1 - 数据处理方法及数据处理装置 - Google Patents

数据处理方法及数据处理装置 Download PDF

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Publication number
WO2021238294A1
WO2021238294A1 PCT/CN2021/074696 CN2021074696W WO2021238294A1 WO 2021238294 A1 WO2021238294 A1 WO 2021238294A1 CN 2021074696 W CN2021074696 W CN 2021074696W WO 2021238294 A1 WO2021238294 A1 WO 2021238294A1
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Prior art keywords
component
trusted
request
virtual address
page table
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English (en)
French (fr)
Inventor
邓良
陈玮
陶喆
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Huawei Technologies Co Ltd
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Huawei Technologies Co Ltd
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Priority to EP21812565.6A priority Critical patent/EP4156010B1/en
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G06F21/74—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information operating in dual or compartmented mode, i.e. at least one secure mode
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/50—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems
    • G06F21/57—Certifying or maintaining trusted computer platforms, e.g. secure boots or power-downs, version controls, system software checks, secure updates or assessing vulnerabilities
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/50—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems
    • G06F21/57—Certifying or maintaining trusted computer platforms, e.g. secure boots or power-downs, version controls, system software checks, secure updates or assessing vulnerabilities
    • G06F21/575—Secure boot
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/50—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems
    • G06F21/57—Certifying or maintaining trusted computer platforms, e.g. secure boots or power-downs, version controls, system software checks, secure updates or assessing vulnerabilities
    • G06F21/577—Assessing vulnerabilities and evaluating computer system security
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L63/00—Network architectures or network communication protocols for network security
    • H04L63/02—Network architectures or network communication protocols for network security for separating internal from external traffic, e.g. firewalls

Definitions

  • This application relates to the field of communication technology, and in particular to a data processing method and data processing device.
  • network equipment includes a data plane and a control plane.
  • the data plane mainly completes the high-speed processing and forwarding of data.
  • the control plane is used to control and manage the operation of all network protocols, providing the data plane before data processing and forwarding. Necessary various network information and forwarding query table entries.
  • the data plane (data plane) operating system (OS) architecture shown in Figure 1 has been proposed.
  • the data plane OS includes the application and the data plane OS kernel of the management application.
  • the application and the data plane OS kernel run at the same level (for example, the EL1 layer of ARM-Av8), and use the same memory management unit (memory management unit).
  • MMU memory management unit
  • MMU page table that is, running in the same virtual address space
  • the data plane OS architecture shown in Figure 1 is not designed with a security isolation mechanism, and there will be serious security risks.
  • the data plane OS can receive untrusted data from external network devices. Therefore, the data plane OS will face a wide range of attacks. Attackers can input malicious data from the outside to trigger vulnerabilities and compromise the data plane OS.
  • An application or module Since the application and the data plane OS kernel run at the same level, once a single point is compromised (for example, application 2 in Figure 2), the attacker can compromise the entire data plane OS.
  • the data plane OS contains some key assets that do not want to be attacked, such as the key assets of application 1 in Figure 2 and the key assets of the data plane OS kernel.
  • the key assets include, for example, key data and/or key used to provide security services. Code. If the data plane OS is compromised, these key assets may be leaked or tampered with, causing extremely bad security impacts.
  • the embodiments of the present application provide a data processing method and a data processing device, which help protect the integrity and privacy of the key assets of the data plane OS.
  • an embodiment of the present application provides a data processing method that can be applied to a data plane operating system OS of a network device.
  • the data plane OS includes an untrusted component, an intermediate component, and a trusted component.
  • the trust component includes an application and a data plane OS kernel, the trusted component includes a trusted computing base and a key asset component, and the key asset component includes key data of the application and the data plane OS kernel for providing security services.
  • the intermediate component is used to securely isolate the trusted component from the non-trusted component, the intermediate component includes a first system instruction, and the first system instruction is used to A first virtual address is obtained from a first system register of the network device, where the first virtual address is used to point to the trusted component, and the method includes: the intermediate component receives a first request sent by the untrusted component , The first request is used to access the trusted component; the intermediate component executes the first system instruction to obtain the first virtual address, and sends the first request according to the first virtual address To the trusted component; the trusted component processes according to the first request.
  • the entry address to the trusted component is stored in the first system register, and the untrusted application and data plane OS kernel code does not include the first system that accesses the first system register through configuration. Instruction, and only the first system instruction is included in the intermediate component.
  • the application and/or data plane OS kernel needs to call key asset components or trusted computing base to provide related services during the running process, it can only call the intermediate component After obtaining the first virtual address, it enters the trusted component for safe execution according to the first virtual address, which helps to realize the address hiding of the trusted component.
  • the code helps to safely isolate trusted and non-trusted components, thereby ensuring the integrity and privacy of the key assets of the data plane OS.
  • the first system instruction is used to obtain the first virtual address from the first system register of the network device, including: the first system instruction is used to obtain the first virtual address from the first system
  • the first virtual address read from the register is stored in the general register of the network device; after the trusted component processes the first request according to the first request, the method further includes: the intermediate component receives the A second request sent by a trusted component, where the second request is used to feed back the processing result of the trusted component to the non-trusted component; the intermediate component deletes the first virtual device stored in the general register Address, and send the processing result to the untrusted component.
  • the first virtual address remaining in the general-purpose register is cleared to avoid the untrusted component or the attacker from accessing the general-purpose register to obtain the first virtual address when the control flow returns to the untrusted component.
  • the virtual address prevents the first virtual address from being leaked.
  • the first request for accessing the trusted component includes: the first request is for accessing the key asset component; the trusted component processes according to the first request , Including: processing the first request according to the key data and/or key code in the key asset component.
  • the application or data plane OS kernel requests to call key asset components to provide, for example, security services
  • the intermediate component after calling the intermediate component to obtain the first virtual address, the control flow is immediately entered into the trusted component for safe execution, so that the key
  • the critical data and/or critical code in the asset component are safely isolated from the untrusted components to prevent the critical data and/or critical code from being compromised.
  • the operation of untrusted components relies on private user identity data for identity verification.
  • this solution can remove the key to user identity data.
  • the data and the key code for identity authentication are set in the trusted component.
  • the trusted component can be called to provide the cipher text of user identity data to the trusted component. Key data or run the corresponding key code to decrypt the ciphertext and complete the identity authentication, and then return the authentication result to the untrusted component.
  • the first request includes a request to access and/or modify the page table of the memory management unit MMU of the data plane OS, and before the trusted component processes it according to the first request,
  • the method further includes: the trusted computing base determines that the request to access and/or modify the MMU page table meets a preset verification condition; wherein the verification condition includes: an access request to the MMU page table The first page table will not be accessed, and the first page table is used to map the trusted component; a modification request to the MMU page table will not change the access authority attribute of the MMU page table, where the MMU The access permission attribute of the page table satisfies: the access permission of the code area mapped to the MMU page table is not writable, and the access permission of the data area mapped to the MMU page table is not executable.
  • memory protection is achieved by configuring the access authority attributes of the MMU page table and configuring the MMU management mechanism. All requests for the MMU page table are verified to achieve page table control protection. If the verification conditions are met, the relevant request is considered legal. The related request can be processed. If the verification condition is not met, the related request is deemed illegal and the related request cannot be processed to ensure that the attacker cannot obtain the entry address of the trusted component by accessing the MMU page table of the trusted component. It is also impossible to reintroduce malicious attacks by rewriting the code area or executing the data area.
  • the second system register of the network device points to an interrupt vector table configured by the trusted computing base
  • the interrupt vector table is used to indicate the processing program corresponding to the interrupt
  • the method further includes : If the data plane OS is interrupted, the non-trusted component determines the component whose operation is interrupted according to the interrupt vector table; if the component whose operation is interrupted is the non-trusted component, the non-trusted component is based on According to the instruction of the interrupt vector table, the interrupt service program corresponding to the interrupt is executed; if the interrupted component is the trusted component and/or the intermediate component, the non-trusted component executes the interrupt corresponding to the interrupt Before the interrupt service routine, the non-trusted component sends an interrupt processing request according to the instruction of the interrupt vector table, wherein the first request includes the interrupt processing request, and the trusted component performs processing according to the first request
  • the processing includes: the trusted computing base saves an interrupt context according to the interrupt processing request.
  • the interrupt vector table (also known as the shadow vector table) configured by the trusted computing base can intercept interrupts in time and make the control flow enter the trusted computing base to safely save the interrupt context to prevent
  • the interrupt vector table also known as the shadow vector table
  • the processing result of the trusted component includes the processing result of the interrupt context by the trusted computing base; and/or the first request further includes an interrupt return request.
  • the first virtual address in the general register will also be deleted to avoid the untrusted component or the attacker from accessing the untrusted component when the control flow returns to the untrusted component.
  • the general-purpose register is used to obtain the first virtual address to prevent the first virtual address from being leaked. Even if you want to restore the interrupt context from the OS kernel on the data plane to the trusted computing base, you need to re-enter the trusted component by calling the intermediate component, so as to achieve the safe isolation of the trusted component and the untrusted component as fully as possible, and protect the Trust the privacy and integrity of the data and/or code in the component.
  • the data plane OS further includes a loader, and the loader is also used to load the executable file of the data plane OS into the memory of the network device when the device is initialized, so
  • the method further includes: when the device is started, the loader uses a virtual address randomly selected in the virtual address space of the data plane OS as the first virtual address, and loads the content of the trusted component to The first virtual address, and save the first virtual address in the first system register; the trusted computing base initializes the MMU page table, and maps the virtual address in the virtual address space to all The memory, and configure the access permission attribute of the MMU page table, where the access permission attribute of the MMU page table satisfies: the access permission of the code area mapped to the MMU page table is not writable, and the MMU page table The access authority of the mapped data area is not executable.
  • the randomization of the entry address of the trusted component in the virtual address space is realized. hide".
  • the memory is protected by configuring the access permission attributes of the MMU page table to ensure that attackers cannot reintroduce malicious attacks by rewriting the code area or executing the data area.
  • an embodiment of the present application provides a data processing device, including an untrusted component, an intermediate component, and a trusted component.
  • the untrusted component includes an application and a data plane operating system OS kernel.
  • the trusted component Including a trusted computing base and a key asset component, the key asset component including the application and the key data and/or key code of the data plane OS kernel for providing security services, and the intermediate component is used for the The trusted component is securely isolated from the non-trusted component.
  • the intermediate component includes a first system instruction. The first system instruction is used to obtain a first virtual address from a first system register of a network device.
  • a virtual address is used to point to the trusted component; wherein the non-trusted component is used to send a first request, and the first request is used to access the trusted component; the intermediate component is used to receive The first request executes the first system instruction to obtain a first virtual address, and sends the first request to the trusted component according to the first virtual address; the trusted component is used for Process according to the first request.
  • the first system instruction is used to obtain the first virtual address from the first system register of the network device, including: the first system instruction is used to obtain the first virtual address from the first system The first virtual address read in the register is stored in the general register of the network device; after the trusted component processes the first request according to the first request, the intermediate component is used to: receive the trusted component The second request sent, the second request is used to feed back the processing result of the trusted component to the non-trusted component; delete the first virtual address stored in the general register, and send it to the non-trusted component The trusted component sends the processing result.
  • the first request for accessing the trusted component includes: the first request is for accessing the key asset component; the trusted component processes according to the first request , Including: processing the first request according to the key data and/or key code in the key asset component.
  • the first request includes a request to access and/or modify the page table of the memory management unit MMU of the data plane OS, and before the trusted component processes it according to the first request,
  • the trusted computing base is used to determine that the request for access and/or modification of the MMU page table meets a preset verification condition; wherein, the verification condition includes: the request for access to the MMU page table will not be accessed
  • the first page table, the first page table is used to map the trusted component; a modification request to the MMU page table will not change the access authority attribute of the MMU page table, wherein the MMU page table
  • the access permission attribute satisfies: the access permission of the code area mapped to the MMU page table is not writable, and the access permission of the data area mapped to the MMU page table is not executable.
  • the second system register of the network device points to the interrupt vector table configured by the trusted computing base, and the interrupt vector table is used to indicate the processing program corresponding to the interrupt, and the non-trusted component Used to: if the data plane OS is interrupted, determine the interrupted component according to the interrupt vector table; if the interrupted component is the untrusted component, execute all components according to the interrupt vector table The interrupt service program corresponding to the interrupt; if the component being interrupted is the trusted component and/or the intermediate component, before the interrupt service program corresponding to the interrupt is executed, an interrupt is sent according to the instruction of the interrupt vector table Processing a request, where the first request includes the interrupt processing request, and the trusted component processing according to the first request includes: the trusted computing base saves an interrupt context according to the interrupt processing request.
  • the processing result of the trusted component includes the processing result of the interrupt context by the trusted computing base; and/or the first request further includes an interrupt return request.
  • the device further includes a loader for: loading the executable file of the data processing device into the memory of the network device when the device is initialized; and when the device is started , The loader uses a virtual address randomly selected in the virtual address space of the data processing device as the first virtual address, loads the content of the trusted component to the first virtual address, and The first virtual address is stored in the first system register; the trusted computing base is also used to: initialize the MMU page table, map the virtual address of the virtual address space to the memory, and configure The access permission attribute of the MMU page table, wherein the access permission attribute of the MMU page table satisfies: the access permission of the code area to which the MMU page table is mapped is not writable, and the data area to which the MMU page table is mapped The access permission of is not executable.
  • a loader for: loading the executable file of the data processing device into the memory of the network device when the device is initialized; and when the device is started , The loader uses a virtual address randomly selected in
  • an embodiment of the present application provides a communication device, including a processor and a memory.
  • One or more computer programs are stored in the memory.
  • the one or more computer programs include instructions.
  • the processor When the instruction is invoked, the communication device is caused to execute the data processing method of the first aspect described above.
  • an embodiment of the present application provides a chip that is coupled with a memory, and the chip reads a computer program stored in the memory to execute the method of the first aspect of the present application.
  • the embodiments of the present application also provide a computer-readable storage medium in which a computer program is stored.
  • the computer program runs on a computer, the computer executes the above-mentioned section of the present application.
  • One side approach One side approach.
  • the embodiments of the present application provide a computer program product, which when the computer program product runs on a computer, causes the computer to execute the method of the first aspect of the present application.
  • Figure 1 is a schematic diagram of the logical architecture of a high-performance data plane OS in the prior art
  • FIG. 2 is a schematic diagram of the security risks of the data plane OS of FIG. 1;
  • FIG. 3 is a schematic diagram of the principle of Trustzone isolation technology
  • Figure 4 is a schematic diagram of the principle of virtual isolation technology
  • FIG. 5 is a schematic diagram of the logical architecture of the data plane OS provided by an embodiment of the application.
  • FIG. 6 is a schematic diagram of the principle of an address hiding protection mechanism provided by an embodiment of the application.
  • FIG. 7 is a schematic diagram of the principle of an intermediate component protection mechanism provided by an embodiment of this application.
  • FIG. 8 is a schematic diagram of a self-protected closed loop provided by an embodiment of the application.
  • FIG. 9 is a schematic diagram of a data processing flow in a 5G base station scenario provided by an embodiment of the application.
  • FIG. 10 is a schematic diagram of a data processing device provided by an embodiment of the application.
  • FIG. 11 is a schematic diagram of a network device provided by an embodiment of the application.
  • the ARM architecture server includes four exception levels, referred to as EL0 to EL3.
  • the EL0 layer is unprivileged
  • the EL1 layer is the operating system kernel mode (OS kernel mode).
  • EL2 is a virtual machine monitor level (hypervisor mode)
  • EL3 layer is a monitor level (monitor mode), and the privilege level of ELn increases as n increases.
  • the privileged layer is the EL1 layer.
  • MMU page table a special data structure used by the memory management unit MMU to complete the conversion from virtual address space to physical address space. It is placed in the page table area of the system space to store the correspondence between logical pages and physical page frames. .
  • the user only generates logical addresses and considers the address space of the process to be 0 to max.
  • the physical address ranges from R+0 to R+max, R is the base address, address mapping: the process of transforming the logical address used in the program address space into the physical address in the memory.
  • Trusted components trusted components of the data plane OS.
  • the trusted component may include key assets on the data plane that need to be privately protected and a trusted computing base (trusted computing base, TCB, hereinafter referred to as the trusted base).
  • the key assets may include application-side key assets and data-plane OS kernel-side key assets or other key assets of the data-plane OS.
  • Key assets may include, but are not limited to, key data and/or key codes for operating these key data.
  • the trusted base is a collection of all security protection mechanisms that realize the OS security protection of the data plane.
  • the trusted base is configured to implement the page table management control function and interrupt processing control function of the data plane OS or other functions related to the security protection mechanism.
  • Untrusted components untrusted components of the data plane OS, including components other than the trusted components and intermediate components of the data plane OS, such as applications, the data plane OS kernel of the management application, etc.
  • Middle component middleware used to safely isolate trusted and untrusted components of the OS on the data plane.
  • the intermediate component includes a plurality of instruction sequences, and the multiple instruction sequences enable the intermediate component to be called and realize the safe interaction between the trusted component and the non-trusted component.
  • the intermediate component only includes a first system instruction for accessing a special first system register of the network device, and the first system register stores a first virtual address, and the first virtual address points to a trusted component.
  • Trusted execution environment In the embodiment of the application, the trusted execution environment is the operating environment of the trusted component, which is a safe environment.
  • the trusted execution environment implemented by the embodiments of the present application is different from the secure environment TEE implemented based on the hardware isolation mechanism in the Trustzone isolation technology and the virtualization isolation technology, and does not require hardware isolation.
  • A/B can mean A or B.
  • “And/or” is merely an association relationship describing the associated objects, which means that there can be three types of relationships.
  • a and/or B can mean: A alone exists, A and B exist at the same time, and B exists alone.
  • "a plurality of" means two or more than two.
  • at least one of a, b, or c can represent: a, b, c, a and b, a and c, b and c, or a, b, and c.
  • Trustzone isolation technology is a hardware isolation mechanism supported by ARM.
  • the Trustzone isolation technology divides the hardware and software resources on the system of chip (SoC) into two areas: a trusted execution environment (TEE) and a rich execution environment (REE) , Separate the key assets from the data plane and run them separately on the TEE OS in the TEE, so that security-sensitive operations can be performed on the TEE, and other operations can be performed on the REE.
  • the TEE and REE are converted through a monitor. REE cannot interfere with the execution of the safe environment TEE, cannot destroy the integrity and privacy of the hardware and software resources in the TEE, and can provide high security isolation. sex.
  • the application runs on the lowest-privileged EL0 layer
  • the OS kernel of the data plane of the management application runs on the slightly higher-privileged EL1 layer
  • the monitor runs on the higher-privileged EL3 layer
  • the application and/or REE run
  • the data plane OS kernel wants to access the key assets running on the TEE
  • this method needs to separate key assets from the data plane and run them in a secure environment separately, and requires major modifications to existing applications, which will seriously affect existing businesses.
  • Virtualization isolation technology is also an isolation mechanism supported by ARM.
  • Virtualization isolation technology is based on hardware-assisted virtualization and a virtual machine monitor (hypervisor) running at the virtualization layer, which isolates and abstracts hardware resources such as central processing unit (CPU), memory, and equipment, and is an upper-layer virtualization
  • the machine provides virtualized resource views and independent operating environments.
  • FIG 4 when using this method, based on CPU virtualization and memory virtualization technologies, it is necessary to run key assets and other parts of the data plane in different virtual machines, such as the application and data plane OS kernel running in virtual machine 1. The key The asset runs on virtual machine 2.
  • the application or data plane OS kernel running on virtual machine 1 wants to access the key assets running on virtual machine 2, it must first enter the hypervisor and then switch to virtual machine 2.
  • this application proposes a data processing solution for the data plane operating system OS that can be applied to network devices.
  • a lightweight trusted execution environment that is, the operating environment of trusted components
  • the integrity and privacy of the data and/or code in the trusted components cannot be destroyed.
  • this solution does not add additional level switching or MMU page table switching, and hardly affects the high performance of the data plane OS.
  • there is no need to separate key assets from the data plane and it can be compatible with existing applications without affecting existing businesses.
  • This solution can protect the integrity and privacy of key assets of the data plane OS while ensuring the high performance of the data plane OS.
  • Fig. 5 is a logical architecture diagram of a data plane operating system OS according to an embodiment of the present application.
  • the data plane OS can be applied to network equipment or other equipment, including but not limited to computers (personal computers and/or servers), base stations, switches, bridges, routers, vehicle-mounted equipment, etc. This application does not limit this .
  • the logical architecture is only a logical division of the components or functional modules of the device, and the logical architecture can also be applied to any other suitable devices or modules running in the same virtual address space, which is not limited in this application.
  • non-trusted components 501 As shown in FIG. 5, the various components of the data plane OS are divided into non-trusted components 501, intermediate components (gateway) 502, and trusted components 503 based on their functions.
  • the untrusted component is untrusted, and may include other components of the data plane other than the trusted component and intermediate components of the data plane OS, for example, it may include one or more applications and the data plane OS kernel.
  • the trusted component 503 may include a key asset component and a trusted computing base (hereinafter referred to as a trusted base).
  • the key asset components include, for example, the key assets of multiple applications of the data plane OS (for example, application 1 and application 2 in FIG. 5), and the key assets of the data plane OS kernel.
  • the key asset may specifically include, for example, key data and/or key code used for security services.
  • the key data can be data that needs to be privately protected on the data plane, or can be called sensitive data, for example, including user text messages, user Internet data, keys, etc. in the 5G base station scenario.
  • the key code can be the code of the data plane OS that does not expect to be attacked and needs to be privately protected.
  • the key code When the key code is run, it can realize some sensitive operations of the data plane OS.
  • the key code includes information about realizing grouping.
  • Data Convergence Protocol Packet Data Convergence Protocol, PDCP
  • PDCP Packet Data Convergence Protocol
  • IPSEC Internet Protocol Security
  • trusted components and/or untrusted components are only used to classify the functional modules of the operating system from the perspective of device security. If a certain module in the trusted component presents a security risk , It will cause harm to the security of the entire operating system, while untrusted components only involve lower related permissions granted by the system security policy, and problems with untrusted components will lower the security of the entire operating system.
  • trusted components and/or untrusted components may include, but are not limited to, the components and sub-modules shown in FIG. 5.
  • the embodiment of the present application only uses FIG. 5 as an example to describe the technical solutions of the present application in detail. This technical solution can also be applied to other scenarios, and this application does not limit it.
  • the intermediate component is set up to realize the safe isolation of the trusted component and the non-trusted component.
  • the intermediate component may include one or more preset system instructions. When the intermediate component is called, the one or more system instructions can be executed to realize the secure information interaction between the trusted component and the untrusted component , To ensure that untrusted components cannot enter trusted components to steal or tamper with data or code.
  • the intermediate component may be at the same protection level as the trusted component, that is, the intermediate component needs to be protected from being compromised, which will be described in detail below.
  • the same as the data plane OS architecture shown in Figure 2 is that the components of the data plane OS shown in Figure 5 run at the same level as a whole (for example, the EL1 layer), and each component of the data plane OS uses the same MMU page table, that is, running In the same virtual address space.
  • the calls between the various components are implemented by means of native function calls.
  • In the process of data plane OS running and high-speed data processing and forwarding when there are system calls, application switching, interrupt processing, etc., there will be no inefficient level switching (for example, EL0 layer, EL1 layer, EL2 layer/EL3
  • the overhead of switching between layers) and the inefficient address space switching can realize a lightweight operating environment and ensure the high performance of the data plane.
  • the content of the key assets of the data plane OS can be modified/compiled through the link script file.
  • the loading logic of the data plane OS is configured so that when the device starts, the content of the key assets is obtained from the secure section through the loader and loaded into a random selection in the virtual address space
  • the functions of the intermediate components and the trusted base are configured to achieve multiple protection mechanisms, so as to realize the safe isolation of trusted components and non-trusted components, and protect the key assets and/or trusted computing in the trusted components The privacy and integrity of the foundation.
  • embodiments of this application propose mechanisms such as address space hiding protection mechanisms, intermediate component protection mechanisms, privileged layer self-protection mechanisms, Multiple protection mechanisms such as the interrupt handling protection mechanism, through layered protection, realize the safe isolation of trusted components, avoid the trusted components of the data plane OS from being compromised as much as possible, and ensure the integrity of the data and/or code in the trusted components Sex and privacy.
  • the address space hiding protection mechanism is to specify the entry address of the trusted component, and randomize the entry address in the virtual address space of the data plane OS to "hide” it, so as to realize the security isolation mechanism of the trusted component.
  • the executable file of the data plane OS can be obtained by modifying and compiling the compiler in the static compilation stage in advance, so as to realize the configuration logic, loading logic, and running logic of each component of the data plane OS.
  • a virtual address randomly selected by the loader in the virtual address space of the data plane OS as the first virtual address and the loader loads the content of the trusted component to the address pointed to by the first virtual address .
  • the first virtual address may point to an address table, which includes addresses of key assets and trusted bases.
  • the first virtual address is stored in the special first system register of the network device (for example, CNTV_CVAL_EL0 (counter-timer virtual timer compare value register for EL0) in the ARM-Av8 platform), and is used to access the first system register of the first system register.
  • a system command is uniquely stored in the intermediate component.
  • the untrusted component if the untrusted component wants to access the trusted component, it can only obtain the first virtual address from the first system register by calling the intermediate component, so as to enter the trusted component for safe execution. Helps realize address hiding of trusted components. Since the application and data plane OS kernel cannot know the entry address of the trusted component by executing the first system command, even if the untrusted component is compromised by the attacker, the attacker cannot enter the trusted component to steal or tamper with the private key data or key. The code helps to safely isolate trusted and non-trusted components, thereby ensuring the integrity and privacy of the key assets of the data plane OS.
  • the address hiding of trusted components is realized based on this address space hiding protection mechanism, so that even if untrusted components are compromised, the attacker cannot obtain the entry address of the trusted component by executing the first system instruction, and thus cannot steal or Tamper with the data and code in the trusted component to ensure the integrity and privacy of the data and code in the trusted component.
  • trusted components need to be relied on to provide related services, such as plaintext processing, encryption, decryption, key management and other security services, as well as page table management, interrupt processing and other services.
  • an untrusted component wants to access the key assets and/or trusted base in the trusted component during the operation, it will enter the intermediate component through 1 function call, and the intermediate component will execute the first system instruction through 2 to get the network device’s
  • the first virtual address is read from the first system register, and the first virtual address is stored in a general register (for example, X0) of the network device.
  • the intermediate component jumps the related request to the address pointed to by the first virtual address in the general register through the function call 3, and then enters the trusted component for execution, so as to call the key asset and/or the trusted base to complete the corresponding Program execution, such as running critical code to provide security services, or performing page table management control, or performing interrupt processing control, etc.
  • the trusted component After completing the corresponding program execution in the trusted component, the trusted component returns to the intermediate component through function call 4, and the intermediate component deletes the first virtual address that may remain in the general register, and then through function call 5 to the untrusted component
  • the processing results of trusted components including but not limited to the processing results of non-trusted components requesting to call key assets to provide security services, non-trusted components requesting to call the results of page table management performed by the trusted base, and non-trusted components requesting to call
  • the trusted base executes the result of interrupt processing, etc.
  • the untrusted component continues to run according to the processing result of the trusted component to perform high-speed data forwarding and processing.
  • an untrusted component relies on key data and/or key code to verify user identity during the operation of the untrusted component, and at the same time, in order to protect data security, it is not expected to leak the plaintext of user identity data to the untrusted component.
  • key data and/or key codes can be stored in trusted components, including key data keys, codes for key operations such as decryption and authentication. If the user identity is to be verified during the operation of the untrusted component, the untrusted component calls the intermediate component to provide the ciphertext of the user identity data to the key asset component, and the key asset component decrypts the ciphertext and decrypts the ciphertext by executing the corresponding code. Complete identity authentication, and return the authentication result to the untrusted component. Correspondingly, the untrusted component executes further data processing and/or forwarding procedures according to whether the user identity verification is successful.
  • the entry address of the trusted component is hidden in the virtual address space. Since the untrusted component cannot directly access the trusted component, it is also impossible to know the entry of the trusted component by executing the first system instruction. Address, even if the untrusted component has security risks or the untrusted component is compromised, the attacker cannot use the untrusted component to enter the trusted component to steal or tamper with the key data and key code, so as to protect the data in the trusted component And the privacy and integrity of the code.
  • the embodiment of the present application proposes an intermediate component protection mechanism.
  • the intermediate component may include multiple instruction sequences, for example, instruction 1, instruction 2, instruction 3, and instruction 4.
  • Instruction 1 can be a transfer instruction from a general register to the first system register, for example, MSR X0, CNTV_CVAL_EL0, which means that instruction 1 executes the MSR system instruction to access the first system register of the network device (for example, CNTV_CVAL_EL0), reads the first virtual address, and reads the first virtual address.
  • a virtual address is written into the general register of the network device (such as X0).
  • Instruction 2 can be a jump instruction to the address specified by the Xm target register, for example, BLR X0, which means that instruction 2 executes the BLR instruction to jump to the address in the general register of the network device (for example, X0) (that is, the first virtual address) ), enter the trusted component for execution.
  • the Xm target register for example, BLR X0
  • instruction 2 executes the BLR instruction to jump to the address in the general register of the network device (for example, X0) (that is, the first virtual address) ), enter the trusted component for execution.
  • Instruction 3 can be a data transfer instruction, for example, MOV X0, #0, which means that instruction 3 executes the MOV instruction to clear the general register (for example, X0).
  • Instruction 4 can be a jump instruction to the address specified by the Xm target register, which is a subroutine return, such as RET, which means that instruction 4 executes the RET instruction and returns to the untrusted component to continue execution.
  • RET subroutine return
  • the instruction sequence in the intermediate component can ensure that after the first system instruction that accesses the first system register of the network device is executed, the control flow will immediately enter the trusted component for safe execution.
  • execute instruction 3 to clear the remaining first virtual address in the general-purpose register to prevent the control flow from returning to the untrusted component.
  • the attacker uses the untrusted component to access the general-purpose register to obtain the remaining first virtual address A virtual address to prevent the entry address of the trusted component from being leaked. In this way, even if an attacker compromises an untrusted component, since the first virtual address in the general register has been cleared, the untrusted component cannot use the intermediate component to obtain the entry address of the trusted component, thereby preventing the intermediate component from being maliciously used.
  • the general-purpose register may be any register of X0-X29, and the specific instructions of each instruction sequence may also be based on Application scenarios or business requirements are different, which is not limited in the embodiment of the present application.
  • the data plane OS since the data plane OS is running at the same level (for example, the EL1 layer) and uses the same MMU page table for memory management, if an attacker compromises the data plane OS, he may still maliciously construct system instructions or access/modify
  • the MMU page table avoids the address hiding protection mechanism and the intermediate component protection mechanism of this application.
  • the embodiment of the present application also proposes a hierarchical self-protection mechanism, including a self-protection closed loop composed of three aspects of system instruction elimination, page table control, and memory protection, so as to ensure that even if the data plane OS runs at the same level (for example, the same privilege level) ) It is also impossible to execute the eliminated system instructions or maliciously construct the system instructions, or access/modify the MMU page table to maliciously enter the trusted component to tamper with or steal the key data and/or key code, so as to realize the security of the trusted component Isolation protection.
  • a self-protection closed loop composed of three aspects of system instruction elimination, page table control, and memory protection
  • the elimination of system instructions may include the elimination of system instructions for accessing trusted components in untrusted components, including the system instructions for accessing trusted components in untrusted components in the static compilation stage. Elimination of instructions, and the elimination of system instructions for accessing trusted components in untrusted components during system operation. Specifically, in the static compilation stage, the code of the untrusted component is scanned and verified by the compiler to ensure that the code of the untrusted component does not contain the first system instruction for accessing the first system register of the network device.
  • the first system instruction triggered by the untrusted component cannot be executed, and the system instruction in the untrusted component code, such as modifying the page table base register (TTBR), is also replaced with the correct
  • the function call of the intermediate component is to ensure as comprehensively as possible that the untrusted component code does not contain the first system instruction.
  • the first system command will not be executed, and the attacker cannot access the trusted component by maliciously constructing the first system command to steal or tamper with the trusted component.
  • the data and code in the component so as to realize the security isolation protection of the trusted component.
  • MMU page table includes all virtual address-to-physical address mappings, if an attacker can read the MMU page table, he can get the entry address of the trusted component, that is, the first virtual address Therefore, it is impossible to truly realize the security isolation protection of trusted components. Therefore, it is also necessary to protect the MMU page table.
  • the page table control protection mechanism in the embodiment of the present application by randomly storing the MMU page table of the data plane OS in a randomly selected virtual address in the virtual address space of the data plane OS, and randomizing the MMU page table
  • the address information of is stored in the address table pointed to by the first virtual address. Therefore, the randomized address information of the MMU page table is also stored in the first system register of the network device, so that untrusted components cannot directly access and/or Modify the MMU page table, it is impossible to obtain the first virtual address from the MMU page table, and realize the random hiding of the MMU page table in the virtual address space of the data plane OS.
  • the trusted base is configured to fully implement the page table management function of the data plane OS and the verification function for the access and/or request of the MMU page table. If the non-trusted component needs to access and/or modify the MMU page table during the operation, it is also necessary to use the method shown in Figure 6 to obtain the first virtual address by calling the intermediate component, which will target the MMU page table access and/or The modification request is sent to the trusted component, thereby entering the trusted component, and the trusted base safely executes the related processing of the access to the MMU page table and/or the modification request.
  • the trusted base can first verify the access and/or modification request for the MMU page table of the data plane OS to determine whether the untrusted component's access and/or modification request to the MMU page table of the data plane OS meets the preset Verify the conditions. After the trusted base has successfully verified the access and/or modification request to the MMU page table, it can execute the access and/or modification to the MMU page table, and after the program to access and/or modify the MMU page table is completed , Call the intermediate component to return the page table access result and/or the page table modification result to the untrusted component.
  • the verification condition may include: the access request to the MMU page table does not access the first page table, the first page table is used to map the trusted component; and the request to modify the MMU page table does not Will change the access permission attribute of the MMU page table, where the access permission attribute of the MMU page table satisfies: the access permission of the code area mapped to the MMU page table is not writable, and the access permission of the MMU page table is mapped to The access authority of the data area is not executable.
  • the authenticity of the access and/or modification request for the MMU page table is verified through the trusted base, and the verification condition is considered legal, and the verification condition is not satisfied, so that the access request for the MMU page table will not Accessing the first page table mapped to the trusted component ensures that the attacker cannot obtain the entry address of the trusted component by accessing the MMU page table.
  • it can also ensure that the system instructions used to rewrite the code area or execute the data area will not be executed, so that an attacker cannot reintroduce the maliciously constructed first system instruction by rewriting the code area or executing the data area to introduce an attack.
  • an untrusted component requests to access and/or modify the MMU page table of the data plane OS during the operation process, it can only obtain the first virtual address by calling the intermediate component, and according to the first
  • the virtual address calls the trusted base for security processing, preventing an attacker from simply reading the MMU page table to obtain the randomized entry address of the trusted component, and realizing the security isolation protection of the MMU page table.
  • the code of the untrusted component has been eliminated and does not contain the system instruction to modify the page table base address register TTBR, the attacker cannot switch the current page table by modifying the page table base address register, making it impossible to use the data plane OS.
  • the page table is maliciously replaced with another page table that is not protected by randomization.
  • verifying the legitimacy of the management request for the MMU page table through the trusted base ensures that the attacker cannot obtain the entry address of the trusted component by accessing the MMU page table, and cannot tamper with the memory to maliciously construct system instructions.
  • Memory protection means that the access permission attributes are configured through the permission control bits in the MMU page table, so that the access permission attributes of the MMU page table meet: the access permission of the code area mapped to the MMU page table is not writable, and the access permission of the MMU page table is mapped to The access authority of the data area is non-executable, thereby ensuring that the memory mapping attributes of the entire virtual address space of the data plane OS satisfy that the data area is mapped as non-executable and the code area is mapped as non-writable. In this way, on the basis of the system instruction elimination protection mechanism, it is ensured that an attacker cannot maliciously construct system instructions by rewriting the code area or executing the data area to reintroduce malicious attacks and realize the security protection of the memory.
  • the system instruction elimination protection mechanism is set that the relevant system instructions of the untrusted component against the trusted component will not be executed, and the untrusted component cannot obtain the entry address of the trusted component, nor can it directly access the trusted component , To achieve the safe isolation of trusted components.
  • the page table control protection mechanism is set up that the MMU page table access request and/or the MMU page table modification request that does not meet the verification conditions are considered illegal and cannot be processed, ensuring that the page table used by the data plane OS cannot be processed. It is maliciously replaced with other page tables that are not protected by randomization to steal the entry address of trusted components, and the attack cannot be reintroduced by rewriting the code area or executing the data area.
  • the self-protection closed loop formed by the interlocking protection mechanisms of the three aspects can realize the level self-protection of the data plane OS, so that even if the various components of the data plane OS run at the privileged layer at the same time, they cannot execute system commands. Or access and/or modify the MMU page table to tamper with or steal the content in the trusted component, and ensure the security isolation of the trusted component as fully as possible, so as to ensure the integrity and privacy of the data and/or code in the trusted component.
  • the interrupt handling protection mechanism refers to the configuration of the second system register of the network device by the trusted base (for example, the interrupt vector base address register, including but not limited to the vector base address register (VBAR) in the ARM-Av8 platform) Etc.) the interrupt vector table pointed to, so that when an interrupt occurs on the data plane OS, the trusted base can intercept the interrupt, and safely save the context of the interrupted intermediate component and/or trusted component to prevent the trusted component and /Or when the data plane OS is interrupted during the operation of the intermediate component, the first virtual address is leaked or the data and/or code in the trusted component is tampered with.
  • the system instruction requesting to access the second system register will also be eliminated by the executed system instruction in the static compilation stage, so as to ensure that the attacker cannot maliciously modify the second system register.
  • the non-trusted component may configure a second interrupt vector table
  • the second interrupt vector table may be used to indicate interrupt service routines corresponding to different types of interrupts, for example, the data plane OS kernel performs packet forwarding services, etc.
  • the trusted base can configure the first interrupt vector table.
  • the first interrupt vector table can also be referred to as the shadow interrupt vector table of the second interrupt vector table.
  • the first interrupt vector table can be used to indicate the corresponding interrupt handler, including but not limited to Determine the program of the component that is interrupted, save the program for the safety of the interrupt context, determine the interrupt service program, etc.
  • the second system register can point to the first interrupt vector table.
  • Untrusted components can determine that the data plane OS is interrupted by reading the second system register. Then, the interrupted component can be determined according to the first interrupt vector table, and then the corresponding component can execute the corresponding according to the instructions of the first interrupt vector table. The interrupt processing flow.
  • the non-trusted component executes the interrupt service program corresponding to the interrupt according to the instruction of the first interrupt vector table, such as forwarding a data packet.
  • the intermediate component executes the interrupt service program corresponding to the interrupt.
  • the first request may include an interrupt processing request.
  • the secure storage program includes: an interrupt processing request, the intermediate component receives an interrupt processing request sent by an untrusted component, executes the first system instruction to obtain the first virtual address, and executes the first virtual address according to all The first virtual address sends the interrupt processing request to the trusted base, and the trusted base saves the interrupt context according to the interrupt processing request.
  • the intermediate component is called to feed back the corresponding processing result to the untrusted component.
  • the intermediate component deletes the first virtual address stored in the general register, returns the processing result to the untrusted component, and enters the untrusted component to execute the interrupt service program corresponding to the interrupt.
  • the intermediate component executes the interrupt service routine and requests the interrupt return, the intermediate component is called again, and the intermediate component executes the first system instruction to obtain the first virtual address, and sends the interrupt return request to the trusted component pointed to by the first virtual address,
  • the interrupt context is restored by the trusted base.
  • the trusted base can intercept interrupts in time, and when the interrupted component is a trusted component and/or an intermediate component, the trusted base can Safely save the interrupt context to avoid tampering or leakage of the context during the operation of the trusted component and/or intermediate component, thereby helping to protect the integrity and privacy of the data and/or code in the trusted component of the data plane OS.
  • FIG. 9 it is a schematic flowchart of a data processing method according to an embodiment of this application, which specifically includes the following steps.
  • S910 Compile the program code of the data plane OS of the 5G base station into an executable file through a compiler.
  • the executable file may be compiled before the 5G base station leaves the factory, and the executable file is pre-stored in the 5G base station. Alternatively, the executable file may also be obtained after modification and compilation of related files of an existing 5G base station and stored in the 5G base station.
  • the executable file is composed of multiple sections, including code section, data section, etc., which are used to store the content (including data and/or code) of each component of the data plane OS of the 5G base station. Among them, when compiling before leaving the factory or when modifying and compiling, you can compile or modify the compiled link script file, so that the compiler will compile the content of the key assets (including data and/or code) of the data plane OS of the 5G base station during the compilation process.
  • a separate secure section placed in the executable file when the 5G base station is initialized, when the loader can load each section of the executable file into the memory of the 5G base station, it can also obtain the data and codes of the key assets by searching for the secure section, so that the loader can easily store the key assets.
  • the data and code are loaded on the first virtual address randomly selected in the virtual address space of the data plane OS, which helps to realize the randomization and "hiding" of key assets in the virtual address space.
  • the compiler can also be used to eliminate the system instructions in the relevant code of the data plane OS to ensure that the code of the untrusted component does not contain the first system instruction for accessing the special first system register of the 5G base station.
  • System instructions that directly or indirectly access trusted components are replaced with function calls to intermediate components, so that in the subsequent data plane OS operation process, non-trusted components are used to access the critical asset components and/or trusted base.
  • the first system instruction of the non-trusted component or the first system instruction used to obtain the first virtual address of the non-trusted component is not executable. This ensures that the non-trusted component cannot directly access the trusted component, which is helpful to realize the integration of key assets.
  • the randomization in the virtual address space is "hidden" to protect the integrity and privacy of the data and code in the trusted component.
  • the 5G base station is started, and the base station data plane OS and MMU page table are initialized.
  • the loader loads the executable file of the entire data plane OS of the 5G base station into the memory of the 5G base station. Then, the loader enters the trusted component and the trusted base completes the initialization of the MMU page table or other related initialization processes. Among them, the loader uses a virtual address randomly selected in the virtual address space of the data plane OS as the first virtual address, loads the content of the trusted component to the address pointed to by the first virtual address, and saves the first virtual address in In the first system register of the 5G base station, to help realize the randomized "hidden" of the entry address of the trusted component in the virtual address space.
  • the trusted base initializes the MMU page table, realizes the mapping between the virtual address of the data plane OS in the virtual address space and the physical address in the memory, and configures the access authority attributes of the MMU page table.
  • the access authority attributes of the MMU page table meet: MMU
  • the access authority of the code area mapped to the page table is not writable, and the access authority of the data area mapped to the MMU page table is unexecutable, to map the entire virtual address space of the data plane OS to the data area unexecutable and the code area unwritable , To prevent attackers from introducing attacks by rewriting the code area or executing the data area.
  • the address information of the MMU page table is also stored in the address pointed to by the first virtual address, realizing the randomization "hiding" of the MMU page table in the virtual address space, so as to ensure that the attacker cannot obtain the first by reading the MMU page table.
  • Virtual address the trusted base also initializes the interrupt vector table pointed to by the second system register of the 5G base station (for example, the interrupt vector base address register VBAR), so that the trusted base can intercept the interrupt in time and save the interrupted safely in the subsequent system operation.
  • the context of the intermediate component and/or the trusted component to prevent the relevant information in the trusted component and/or the intermediate component from being leaked or tampered with. After the loader is loaded, the relevant code corresponding to the loader is cleared from the memory to prevent attackers from maliciously using the system instructions in the loader.
  • Trusted components include trusted computing bases, key asset components (including key assets of multiple base station applications and key assets of the data plane OS kernel of 5G base stations), and key assets include key data and/or key codes used to provide security services .
  • the untrusted component includes multiple base station applications and the data plane OS kernel, and the intermediate component includes multiple system instructions for the safe isolation of the trusted component and the untrusted component.
  • the 5G base station operates to provide services.
  • the various components of the data plane OS cooperate to complete high-speed data processing and forwarding.
  • the data plane OS implements the security isolation protection of the trusted component according to the data processing method described in the above embodiment, which helps to protect the data and/or code in the trusted component Integrity and privacy.
  • the untrusted component sends the first request to request the key asset component to be invoked. For example, calling key data and/or key code in key asset components to provide security services.
  • the intermediate component receives the first request and executes the first system instruction to obtain the first virtual address from the first system register of the 5G base station, and save the first virtual address in the general register (for example, X0) of the 5G base station.
  • the intermediate component calls the key asset according to the first virtual address, and jumps the first request to the address pointed to by the first virtual address to enter the trusted component to access the key asset, such as using key data and/or key in the key asset
  • the code completes the processing of the first request, such as user identity authentication, encryption, decryption, and plaintext processing.
  • the intermediate component deletes the first virtual address stored in the general register, and returns the processing result to the untrusted component.
  • the untrusted component continues to complete high-speed data processing and forwarding according to the processing result, so as to ensure the safe and efficient operation of the 5G base station side business and/or service.
  • the untrusted component sends a first request to request to access and/or modify the MMU page table.
  • the intermediate component receives the access and/or modification request to the MMU page table, and executes the first system instruction to obtain the first virtual address from the first system register of the 5G base station, and save the first virtual address in the 5G base station.
  • General-purpose registers (such as X0).
  • the intermediate component calls the trusted base according to the first virtual address, and jumps the access and/or modification request to the MMU page table to the address pointed to by the first virtual address, so as to enter the trusted component to access the trusted base.
  • the trusted base first verifies the MMU page table access request and/or the MMU page table modification request. If the preset verification conditions are met, the request is considered legal, and the processing of the access request and/or modification request to the MMU page table is completed. If not, the request is deemed illegal and the request is not processed.
  • the corresponding security processing program such as exception handling, is started to avoid malicious access or tampering of the MMU page table or base station memory.
  • the untrusted component of the 5G base station reads the second system register and determines that the data plane OS is interrupted.
  • S938 Perform interrupt processing according to the processing program indicated by the interrupt vector table pointed to by the second system register.
  • the interrupted component is an untrusted component, that is, the interrupt occurs during the operation of the untrusted component
  • the untrusted component executes the interrupt service program corresponding to the interrupt according to the instruction of the interrupt vector table, for example, by the data
  • the OS kernel executes interrupt service routines.
  • the non-trusted component performs an interrupt return to restore the interrupt context (that is, the context of the non-trusted component whose operation is resumed interrupted).
  • the non-trusted component Send an interrupt processing request to request to call the trusted base to save the interrupt context.
  • the intermediate component receives the interrupt processing request, executes the first system instruction to obtain the first virtual address from the first system register of the 5G base station, and saves the first virtual address in the general register (for example, X0) of the 5G base station.
  • the intermediate component calls the trusted base according to the first virtual address, and jumps the interrupt processing request to the address pointed to by the first virtual address, so as to enter the trusted component to access the trusted base.
  • S9312 The trusted computing base saves the interrupt context according to the interrupt processing request. Then, in S9313, the intermediate component executes the third system instruction to delete the first virtual address stored in the general register, and sends the processing result to the untrusted component, and the untrusted component executes the interrupt service program corresponding to the interrupt. S9314, the intermediate component is called when the untrusted component requests the interrupt return. The intermediate component executes the first system instruction to obtain the first virtual address and saves it in the general register, and then executes the second system instruction to jump the interrupt return request to the first virtual address The pointed address is used to enter the trusted component and restore the interrupt context from the trusted base to restore the interrupted intermediate component and/or the operation of the trusted component.
  • a protection mechanism through layer-by-layer protection, helps to ensure the integrity and privacy of the data and/or code that needs to be privately protected in the data plane OS.
  • the data processing device 1000 may include: an untrusted component 1001, an intermediate component 1002, and a trusted component 1003.
  • Trust component 1001 may include application and data plane operating system OS kernel
  • trusted component 1003 may include trusted computing base and key asset components
  • key asset components include application and data plane OS kernels for providing key data and/or key asset components.
  • the intermediate component is used to safely isolate the trusted component from the untrusted component, the intermediate component includes the first system instruction, and the first system instruction is used to obtain the first virtual address from the first system register of the network device, The first virtual address is used to point to the trusted component; among them, the untrusted component is used to send the first request, and the first request is used to access the trusted component; the intermediate component is used to receive the first request and execute the first system instruction Obtain the first virtual address, and send the first request to the trusted component according to the first virtual address; the trusted component is used to process the first request according to the first request.
  • the first system instruction is used to obtain the first virtual address from the first system register of the network device, including: the first system instruction is used to read the first virtual address from the first system register Stored in the general register of the network device; after the trusted component processes the first request, the intermediate component is used to: receive the second request sent by the trusted component, and the second request is used to feed back the trusted component's information to the untrusted component Processing result; delete the first virtual address stored in the general register, and send the processing result to the untrusted component.
  • the first request for accessing the trusted component includes: the first request is for accessing the key asset component; the trusted component processes according to the first request, including: according to the key data in the key asset component and/ Or the key code processes the first request.
  • the first request includes an access and/or modification request to the page table of the memory management unit MMU of the data plane OS.
  • the trusted computing base is used to: The access and/or modification request of the MMU page table meets the preset verification conditions; the verification conditions include: the access request to the MMU page table does not access the first page table, which is used to map trusted components; The request for modification of the MMU page table will not change the access permission attribute of the MMU page table.
  • the access permission attribute of the MMU page table satisfies: the access permission of the code area mapped to the MMU page table is not writable, and the data mapped to the MMU page table
  • the access authority of the zone is not executable.
  • the second system register of the network device points to the interrupt vector table configured by the trusted computing base
  • the interrupt vector table is used to indicate the processing program corresponding to the interrupt
  • the untrusted component is used to: if an interrupt occurs in the data plane OS , Determine the interrupted component according to the interrupt vector table; if the interrupted component is an untrusted component, execute the interrupt service program corresponding to the interrupt according to the instruction of the interrupt vector table; if the interrupted component is a trusted component and / Or the intermediate component, before executing the interrupt service program corresponding to the interrupt, sends an interrupt processing request according to the instruction of the interrupt vector table, the first request includes the interrupt processing request, and the trusted component processes according to the first request, including: the trusted computing base Save the interrupt context according to the interrupt processing request.
  • the processing result of the trusted component includes the processing result of the trusted computing base on the interrupt context; and/or the first request further includes an interrupt return request.
  • the device further includes a loader, and the loader is used to load the executable file of the data processing device into the memory of the network device when the device is initialized;
  • a virtual address randomly selected in the virtual address space is used as the first virtual address, the content of the trusted component is loaded into the first virtual address, and the first virtual address is stored in the first system register;
  • the trusted computing base is also used for : Initialize the MMU page table, map the virtual address of the virtual address space to the memory, and configure the access permission attribute of the MMU page table.
  • the access permission attribute of the MMU page table meets: the access permission of the code area mapped to the MMU page table is The access authority of the data area that is not writable and mapped to the MMU page table is not executable.
  • FIG. 11 it is a schematic diagram of a communication device according to an embodiment of the present application.
  • the structure of the communication device is shown in FIG. 11, and includes a processor 1101 and a memory 1102.
  • One or more computer programs are stored in the memory, and the one or more computer programs include instructions; when the processor calls the instructions, the communication device executes the above embodiments and the data provided by the embodiments
  • the function of each unit device of the communication device will be introduced below.
  • the processor 1101 and the memory 1102 are connected to each other through a bus 1103.
  • the bus 1103 may be a peripheral component interconnect standard (PCI) bus or an extended industry standard architecture (EISA) bus, etc.
  • PCI peripheral component interconnect standard
  • EISA extended industry standard architecture
  • the bus can be divided into an address bus, a data bus, a control bus, and so on. For ease of presentation, only one thick line is used to represent in FIG. 11, but it does not mean that there is only one bus or one type of bus.
  • the memory 1102 may include random access memory (RAM), and may also include non-volatile memory (non-volatile memory), such as at least one disk memory.
  • the processor 1101 executes the program instructions in the memory 1102, and uses the data stored in the memory 1102 to implement the foregoing functions, thereby implementing the data processing method provided in the foregoing embodiment.
  • the memory 1102 in FIG. 11 of the present application may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memory.
  • the non-volatile memory can be read-only memory (Read-Only Memory, ROM), programmable read-only memory (Programmable ROM, PROM), erasable programmable read-only memory (Erasable PROM, EPROM), and electrically available Erase programmable read-only memory (Electrically EPROM, EEPROM) or flash memory.
  • the volatile memory may be a random access memory (Random Access Memory, RAM), which is used as an external cache.
  • RAM random access memory
  • SRAM static random access memory
  • DRAM dynamic random access memory
  • DRAM synchronous dynamic random access memory
  • DDR SDRAM Double Data Rate Synchronous Dynamic Random Access Memory
  • Enhanced SDRAM, ESDRAM Enhanced Synchronous Dynamic Random Access Memory
  • Synchronous Link Dynamic Random Access Memory Synchronous Link Dynamic Random Access Memory
  • DR RAM Direct Rambus RAM
  • each function in each embodiment of the present application can be integrated into one processing unit, or it can exist alone physically, or two or more units can be integrated into one unit.
  • the above-mentioned integrated unit can be implemented in the form of hardware or software functional unit.
  • the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer readable storage medium.
  • the technical solution of the present application essentially or the part that contributes to the existing technology or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium , Including several instructions to enable a computer device (which may be a personal computer, a server, or a network device, etc.) or a processor to execute all or part of the steps of the methods described in the various embodiments of the present application.
  • the aforementioned storage media include: U disk, mobile hard disk, read-only memory (Read-Only Memory, ROM), random access memory (Random Access Memory, RAM), magnetic disk or optical disk and other media that can store program code .
  • the embodiments of the present application also provide a computer program, which when the computer program runs on a computer, causes the computer to execute the data processing method provided in the above embodiments.
  • the embodiments of the present application also provide a computer-readable storage medium in which a computer program is stored.
  • the computer program When the computer program is executed by a computer, the computer can execute the data provided in the above embodiment. Approach.
  • the storage medium may be any available medium that can be accessed by a computer. Take this as an example but not limited to: computer readable media can include RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage media or other magnetic storage devices, or can be used to carry or store instructions or data in the form of a structure The desired program code and any other medium that can be accessed by the computer.
  • the embodiments of the present application also provide a chip, which is coupled with a memory, and the chip is used to read a computer program stored in the memory to implement the data processing method provided in the above embodiment.
  • the computer may be implemented in whole or in part by software, hardware, firmware, or any combination thereof.
  • software it can be implemented in the form of a computer program product in whole or in part.
  • the computer program product includes one or more computer instructions.
  • the computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices.
  • the computer instructions may be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium.
  • the computer instructions may be transmitted from a website, computer, server, or data center.
  • the computer-readable storage medium may be any available medium that can be accessed by a computer or a data storage device such as a server or a data center integrated with one or more available media.
  • the usable medium may be a magnetic medium (for example, a floppy disk, a hard disk, and a magnetic tape), an optical medium (for example, a DVD), or a semiconductor medium (for example, a solid state disk (SSD)).
  • the various illustrative logic units and circuits described in the embodiments of this application can be implemented by general-purpose processors, digital signal processors, application-specific integrated circuits (ASIC), field programmable gate arrays (FPGA) or other programmable logic devices, Discrete gates or transistor logic, discrete hardware components, or any combination of the above are designed to implement or operate the described functions.
  • the general-purpose processor may be a microprocessor.
  • the general-purpose processor may also be any traditional processor, controller, microcontroller, or state machine.
  • the processor can also be implemented by a combination of computing devices, such as a digital signal processor and a microprocessor, multiple microprocessors, one or more microprocessors combined with a digital signal processor core, or any other similar configuration. accomplish.
  • the steps of the method or algorithm described in the embodiments of the present application can be directly embedded in hardware, a software unit executed by a processor, or a combination of the two.
  • the software unit can be stored in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, register, hard disk, removable disk, CD-ROM or any other storage medium in the art.
  • the storage medium may be connected to the processor, so that the processor can read information from the storage medium, and can store and write information to the storage medium.
  • the storage medium may also be integrated into the processor.
  • the processor and the storage medium can be arranged in an ASIC, and the ASIC can be arranged in a terminal device.
  • the processor and the storage medium may also be provided in different components in the terminal device.
  • These computer program instructions can also be loaded on a computer or other programmable data processing equipment, so that a series of operation steps are executed on the computer or other programmable equipment to produce computer-implemented processing, so as to execute on the computer or other programmable equipment.
  • the instructions provide steps for implementing functions specified in a flow or multiple flows in the flowchart and/or a block or multiple blocks in the block diagram.

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Abstract

一种数据处理方法及数据处理装置，涉及通信技术领域。方法应用于网络设备的数据面OS，数据面OS包括非可信组件、中间组件和可信组件，非可信组件包括应用和数据面OS内核，可信组件包括可信计算基和关键资产组件，关键资产组件包括应用和数据面OS内核的用于提供安全服务的关键数据和/或关键代码，中间组件用于可信组件与非可信组件的安全隔离，中间组件中包括第一系统指令，中间组件可以接收非可信组件发送的用于访问可信组件的第一请求，执行第一系统指令从第一系统寄存器中获取第一虚拟地址，根据第一虚拟地址将第一请求发送给可信组件，可信组件根据第一请求进行处理。有助于保护数据面OS的可信组件中的数据和/或代码的完整性和私密性。

Description

数据处理方法及数据处理装置
相关申请的交叉引用
本申请要求在2020年05月27日提交中国专利局、申请号为202010464282.6、申请名称为“数据处理方法及数据处理装置”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及通信技术领域，尤其涉及一种数据处理方法及数据处理装置。
背景技术
目前，网络设备包括数据面和控制面，数据面(data plane)主要完成数据的高速处理和转发，控制面(control plane)用于控制和管理所有网络协议的运行，提供数据面数据处理转发前所必须的各种网络信息和转发查询表项。
业内基于先进精简指令集微处理器(advanced risc machine，ARM)，提出了图1所示的数据面(data plane)操作系统(operating system，OS)架构。如图1所示，数据面OS包括应用和管理应用的数据面OS内核，应用和数据面OS内核运行在同一层级(例如ARM-Av8的EL1层)，并使用同一内存管理单元(memory management unit，MMU)页表(即运行在同一虚拟地址空间)进行管理。基于该数据面OS架构，在数据面OS运行过程中执行例如系统调用、或应用切换、或中断处理等时，应用之间、应用与数据面OS内核之间将不存在低效的层级切换或MMU页表切换，能够实现高性能的数据面OS。
然而，图1所示的数据面OS架构未设计安全隔离机制，会存在严重的安全隐患。如图2所示，首先，该数据面OS可从外部网络设备接收不可信数据，因此数据面OS会面临广泛的攻击，攻击者可从外部输入恶意的数据来触发漏洞，攻陷数据面OS的某个应用或者模块。由于应用和数据面OS内核运行在同一层级，一旦单点被攻破(例如图2中的应用2)，攻击者就可以攻陷整个数据面OS。而数据面OS中包含一些不希望被攻击的关键资产，例如图2中应用1的关键资产和数据面OS内核的关键资产，该关键资产例如包括用于提供安全服务的关键数据和/或关键代码。若数据面OS被攻陷，这些关键资产可能被泄露或篡改，造成极恶劣的安全影响。
因此，如何保护数据面OS的关键资产的完整性和私密性，仍为亟需解决的重要问题。
发明内容
本申请实施例提供一种数据处理方法及数据处理装置，有助于保护数据面OS的关键资产的完整性和私密性。
第一方面，本申请实施例提供了一种数据处理方法，可以应用于网络设备的数据面操作系统OS，所述数据面OS包括非可信组件、中间组件和可信组件，所述非可信组件包括应用和数据面OS内核，所述可信组件包括可信计算基和关键资产组件，所述关键资产组件包括所述应用和所述数据面OS内核的用于提供安全服务的关键数据和/或关键代码，所 述中间组件用于所述可信组件与所述非可信组件的安全隔离，所述中间组件中包括第一系统指令，所述第一系统指令用于从所述网络设备的第一系统寄存器中获取第一虚拟地址，所述第一虚拟地址用于指向所述可信组件，所述方法包括：所述中间组件接收所述非可信组件发送的第一请求，所述第一请求用于访问所述可信组件；所述中间组件执行所述第一系统指令获取所述第一虚拟地址，并根据所述第一虚拟地址，将所述第一请求发送给所述可信组件；所述可信组件根据所述第一请求进行处理。
基于该方案，通过将指向可信组件的入口地址保存在第一系统寄存器中，并通过配置使得非可信的应用和数据面OS内核的代码中不包括访问该第一系统寄存器的第一系统指令，而仅在中间组件中包括该第一系统指令，当应用和/或数据面OS内核运行过程中需要通过调用关键资产组件或可信计算基来提供相关服务时，只能通过调用中间组件来获得第一虚拟地址后根据该第一虚拟地址进入到可信组件中安全执行，有助于实现可信组件的地址隐藏。由于应用和数据面OS内核无法通过执行第一系统指令获知可信组件的入口地址，即使非可信组件被攻击者攻陷，攻击者也无法进入可信组件中窃取或者篡改私密的关键数据或关键代码，有助于可信组件与非可信组件的安全隔离，从而保障数据面OS的关键资产的完整性和私密性。
在一种可能的设计中，所述第一系统指令用于从所述网络设备的第一系统寄存器中获取第一虚拟地址，包括：所述第一系统指令用于将从所述第一系统寄存器中读取的所述第一虚拟地址存储到所述网络设备的通用寄存器中；所述可信组件根据所述第一请求进行处理之后，所述方法还包括：所述中间组件接收所述可信组件发送的第二请求，所述第二请求用于向所述非可信组件反馈所述可信组件的处理结果；所述中间组件删除所述通用寄存器中存储的所述第一虚拟地址，并向所述非可信组件发送所述处理结果。
基于该方案，在返回非可信组件之前，先清空通用寄存器中残留的第一虚拟地址，以避免控制流返回非可信组件中时非可信组件或攻击者通过访问通用寄存器来获取第一虚拟地址，避免第一虚拟地址被泄露。
在一种可能的设计中，所述第一请求用于访问所述可信组件包括：所述第一请求用于访问所述关键资产组件；所述可信组件根据所述第一请求进行处理，包括：根据所述关键资产组件中的所述关键数据和/或关键代码对所述第一请求进行处理。
基于该方案，在应用或数据面OS内核请求调用关键资产组件以提供例如安全服务时，在调用中间组件获取到第一虚拟地址后，使控制流立即进入可信组件中安全执行，以将关键资产组件中的关键数据和/或关键代码与非可信组件安全隔离，避免关键数据和/或关键代码被攻陷。例如，非可信组件运行过程中依赖私密的用户身份数据进行身份验证，同时为保护数据安全又不期望向非可信组件泄露用户身份数据的明文，通过该方案可将用户身份数据这一关键数据以及关于身份认证的关键代码设置在可信组件中，当非可信组件请求进行身份认证时，则可通过调用中间组件向可信组件提供用户身份数据的密文，通过可信组件中的关键数据或者运行相应的关键代码，来对密文进行解密并完成身份认证，之后将认证结果返回给非可信组件。
在一种可能的设计中，所述第一请求包括对所述数据面OS的内存管理单元MMU页表的访问和/或修改请求，所述可信组件根据所述第一请求进行处理之前，所述方法还包括：所述可信计算基确定对所述MMU页表的访问和/或修改请求符合预设的验证条件；其中，所述验证条件包括：对所述MMU页表的访问请求不会访问第一页表，所述第一页表用于 映射所述可信组件；对所述MMU页表的修改请求不会改变所述MMU页表的访问权限属性，其中，所述MMU页表的访问权限属性满足：所述MMU页表映射到的代码区的访问权限为不可写、所述MMU页表映射到的数据区的访问权限为不可执行。
基于该方案，通过配置MMU页表的访问权限属性以及配置MMU管理机制，实现内存保护，对所有针对MMU页表的请求进行验证实现页表控制保护，满足验证条件则认为相关请求是合法的则可以对相关请求进行处理，不满足验证条件则认为相关请求是不合法的则不可以处理该相关请求，以确保攻击者无法通过访问可信组件的MMU页表来获取可信组件的入口地址，也无法通过改写代码区或者执行数据区的方式重新引入恶意攻击。
在一种可能的设计中，所述网络设备的第二系统寄存器指向由所述可信计算基配置的中断向量表，所述中断向量表用于指示中断对应的处理程序，所述方法还包括：若所述数据面OS发生中断，所述非可信组件根据所述中断向量表确定被中断运行的组件；若被中断运行的组件为所述非可信组件，所述非可信组件根据所述中断向量表的指示，执行所述中断对应的中断服务程序；若被中断运行的组件为所述可信组件和/或所述中间组件，所述非可信组件执行所述中断对应的中断服务程序之前，所述非可信组件根据所述中断向量表的指示发送中断处理请求，其中，所述第一请求包括所述中断处理请求，所述可信组件根据所述第一请求进行处理，包括：所述可信计算基根据所述中断处理请求保存中断上下文。
基于该方案，通过可信计算基配置的中断向量表(也可称为影子中向量表)，能够及时截获中断，并使控制流进入可信计算基中安全保存中断上下文，以防止在可信组件和/或中间组件运行过程中发生数据面OS中断时造成第一虚拟地址泄露或是可信组件中数据和/或代码被篡改。
在一种可能的设计中，所述可信组件的处理结果包括所述可信计算基对所述中断上下文的处理结果；和/或所述第一请求还包括中断返回请求。
基于该方案，确保在返回数据面OS内核执行中断服务程序之前，也会先删除通用寄存器中的第一虚拟地址，以避免控制流返回非可信组件中时非可信组件或攻击者通过访问通用寄存器来获取第一虚拟地址，避免第一虚拟地址被泄露。即使要从数据面OS内核返回到可信计算基恢复中断上下文时，也需重新通过调用中间组件进入可信组件，从而尽可能全面地实现可信组件与非可信组件的安全隔离，保护可信组件中数据和/或代码的私密性与完整性。
在一种可能的设计中，所述数据面OS还包括加载器，所述加载器还用于在设备初始化时将所述数据面OS的可执行文件加载到所述网络设备的内存中，所述方法还包括：在设备启动时，所述加载器以在所述数据面OS的虚拟地址空间中随机选择的一个虚拟地址作为所述第一虚拟地址，将所述可信组件的内容加载到所述第一虚拟地址，并将所述第一虚拟地址保存到所述第一系统寄存器中；所述可信计算基初始化所述MMU页表，将所述虚拟地址空间的虚拟地址映射到所述内存，并配置所述MMU页表的访问权限属性，其中，所述MMU页表的访问权限属性满足：所述MMU页表映射到的代码区的访问权限为不可写、所述MMU页表映射到的数据区的访问权限为不可执行。
基于该方案，通过在每次的设备启动时，将可信组件的内容加载到在虚拟地址空间中随机选择的一个虚拟地址上，实现可信组件的入口地址在虚拟地址空间中的随机化“隐藏”。同时，通过配置MMU页表的访问权限属性来保护内存，确保攻击者无法通过改写代码区或者执行数据区的方式重新引入恶意攻击。
第二方面，本申请实施例提供了一种数据处理装置，包括非可信组件、中间组件和可信组件，所述非可信组件包括应用和数据面操作系统OS内核，所述可信组件包括可信计算基和关键资产组件，所述关键资产组件包括所述应用和所述数据面OS内核的用于提供安全服务的关键数据和/或关键代码，所述中间组件用于所述可信组件与所述非可信组件的安全隔离，所述中间组件中包括第一系统指令，所述第一系统指令用于从网络设备的第一系统寄存器中获取第一虚拟地址，所述第一虚拟地址用于指向所述可信组件；其中，所述非可信组件，用于发送第一请求，所述第一请求用于访问所述可信组件；所述中间组件，用于接收所述第一请求，执行所述第一系统指令获取第一虚拟地址，并根据所述第一虚拟地址，将所述第一请求发送给所述可信组件；所述可信组件，用于根据所述第一请求进行处理。
在一种可能的设计中，所述第一系统指令用于从所述网络设备的第一系统寄存器中获取第一虚拟地址，包括：所述第一系统指令用于将从所述第一系统寄存器中读取的所述第一虚拟地址存储到所述网络设备的通用寄存器中；所述可信组件根据所述第一请求进行处理之后，所述中间组件用于：接收所述可信组件发送的第二请求，所述第二请求用于向所述非可信组件反馈所述可信组件的处理结果；删除所述通用寄存器中存储的所述第一虚拟地址，并向所述非可信组件发送所述处理结果。
在一种可能的设计中，所述第一请求用于访问所述可信组件包括：所述第一请求用于访问所述关键资产组件；所述可信组件根据所述第一请求进行处理，包括：根据所述关键资产组件中的所述关键数据和/或关键代码对所述第一请求进行处理。
在一种可能的设计中，所述第一请求包括对所述数据面OS的内存管理单元MMU页表的访问和/或修改请求，所述可信组件根据所述第一请求进行处理之前，所述可信计算基用于：确定对所述MMU页表的访问和/或修改请求符合预设的验证条件；其中，所述验证条件包括：对所述MMU页表的访问请求不会访问第一页表，所述第一页表用于映射所述可信组件；对所述MMU页表的修改请求不会改变所述MMU页表的访问权限属性，其中，所述MMU页表的访问权限属性满足：所述MMU页表映射到的代码区的访问权限为不可写、所述MMU页表映射到的数据区的访问权限为不可执行。
在一种可能的设计中，所述网络设备的第二系统寄存器指向所述可信计算基配置的中断向量表，所述中断向量表用于指示中断对应的处理程序，所述非可信组件用于：若所述数据面OS发生中断，根据所述中断向量表确定被中断运行的组件；若被中断运行的组件为所述非可信组件，根据所述中断向量表的指示，执行所述中断对应的中断服务程序；若被中断运行的组件为所述可信组件和/或所述中间组件，在执行所述中断对应的中断服务程序之前，根据所述中断向量表的指示发送中断处理请求，所述第一请求包括所述中断处理请求，所述可信组件根据所述第一请求进行处理，包括：所述可信计算基根据所述中断处理请求保存中断上下文。
在一种可能的设计中，所述可信组件的处理结果包括所述可信计算基对所述中断上下文的处理结果；和/或所述第一请求还包括中断返回请求。
在一种可能的设计中，所述装置还包括加载器，所述加载器用于：在设备初始化时将所述数据处理装置的可执行文件加载到所述网络设备的内存中；在设备启动时，所述加载器以在所述数据处理装置的虚拟地址空间中随机选择的一个虚拟地址作为所述第一虚拟地址，将所述可信组件的内容加载到所述第一虚拟地址，并将所述第一虚拟地址保存到所 述第一系统寄存器中；所述可信计算基还用于：初始化所述MMU页表，将所述虚拟地址空间的虚拟地址映射到所述内存，并配置所述MMU页表的访问权限属性，其中，所述MMU页表的访问权限属性满足：所述MMU页表映射到的代码区的访问权限为不可写、所述MMU页表映射到的数据区的访问权限为不可执行。
第三方面，本申请实施例提供了一种通信装置，包括处理器和存储器，所述存储器中存储有一个或多个计算机程序，所述一个或多个计算机程序包括指令，当所述处理器调用所述指令时，使得所述通信装置执行上述第一方面的数据处理方法。
第四方面，本申请实施例提供了一种芯片，所述芯片与存储器耦合，所述芯片读取存储器中存储的计算机程序，执行本申请上述第一方面的方法。
第五方面，本申请实施例还提供了一种计算机可读存储介质，所述计算机可读存储介质中存储有计算机程序，当所述计算机程序在计算机上运行时，使得计算机执行本申请上述第一方面的方法。
第六方面，本申请实施例提供了一种计算机程序产品，当所述计算机程序产品在计算机上运行时，使得所述计算机执行本申请上述第一方面的方法。
本申请在上述各方面提供的实现的基础上，还可以进行进一步组合以提供更多实现。
附图说明
图1为现有技术中高性能数据面OS的逻辑架构示意图；
图2为图1的数据面OS的安全隐患示意图；
图3为Trustzone隔离技术的原理示意图；
图4为虚拟隔离技术的原理示意图；
图5为本申请实施例提供的数据面OS的逻辑架构的示意图；
图6为本申请实施例提供的地址隐藏保护机制的原理示意图；
图7为本申请实施例提供的中间组件保护机制的原理示意图；
图8为本申请实施例提供的自保护闭环的示意图；
图9为本申请实施例提供的在5G基站场景下的数据处理流程的示意图；
图10为本申请实施例提供的数据处理装置的示意图；
图11为本申请实施例提供的网络设备的示意图。
具体实施方式
以下，对本申请实施例涉及的部分用语进行解释，以便于本领域技术人员理解。
1)、特权层：ARM架构服务器包括四个异常层级(Exception level)，简称为EL0到EL3，其中，EL0层为无特权层级(unprivileged)，EL1层为操作系统内核模式(OS kernel mode)，EL2为虚拟机监控器层级(hypervisor mode)，EL3层为监控器层级(monitor mode)，ELn的特权层级随着n的增大而增大。本申请实施例中，特权层为EL1层。
2)、MMU页表：内存管理单元MMU完成虚拟地址空间到物理地址空间的转换所要使用的一种特殊的数据结构，放在系统空间的页表区，存放逻辑页与物理页帧的对应关系。用户只生成逻辑地址，且认为进程的地址空间为0到max。物理地址范围从R+0到R+max，R为基地址，地址映射：将程序地址空间中使用的逻辑地址变换成内存中的物理地址的过 程。
3)、可信组件：数据面OS的可信任的组件。
本申请实施例中，可信组件可以包括数据面的需要私密保护的关键资产和可信计算基(trusted computing base，TCB，以下简称为可信基)。关键资产可以包括应用侧关键资产和数据面OS内核侧关键资产或是数据面OS的其它关键资产，关键资产可以包括但不限于关键数据和/或操作这些关键数据的关键代码。可信基为实现数据面OS安全保护的所有安全保护机制的集合。本申请实施例中，可信基被配置为实现数据面OS的页表管理控制功能和中断处理控制功能或是其它与安全保护机制相关的功能。
4)、非可信组件：数据面OS的不可信任的组件，包括数据面OS的除可信组件和中间组件以外的组件，例如应用、管理应用的数据面OS内核等。
5)、中间组件(gateway)：用于数据面OS的可信组件与非可信组件的安全隔离的中间件。该中间组件中包括多个指令序列，这多个指令序列使得中间组件能够被调用，并实现可信组件与非可信组件之间的安全的交互。本申请实施例中，该中间组件中唯一包含访问网络设备的特殊的第一系统寄存器的第一系统指令，该第一系统寄存器中存储第一虚拟地址，该第一虚拟地址指向可信组件。
6)、可信执行环境：本申请实施例中，可信执行环境为可信组件的运行环境，为安全环境。本申请实施例实现的可信执行环境，不同于Trustzone隔离技术和虚拟化隔离技术中基于硬件隔离机制实现的安全环境TEE，不需要硬件隔离。
应理解，本申请中，除非另有说明，“/”表示或的意思。例如，A/B可以表示A或B。“和/或”仅仅是一种描述关联对象的关联关系，表示可以存在三种关系。例如，A和/或B，可以表示：单独存在A，同时存在A和B，单独存在B三种情况。另外，本申请中，“多个”是指两个或多于两个。例如，a、b或c中的至少一个，可以表示：a，b，c，a和b，a和c，b和c，或a、b和c七种情况。
在本申请中，“示例的”、“在一些实施例中”、“在另一些实施例中”等用于表示作例子、例证或说明。本申请中被描述为“示例”的任何实施例或设计方案不应被解释为比其它实施例或设计方案更优选或更具优势。确切而言，使用示例的一词旨在以具体方式呈现概念。
需要指出的是，本申请中涉及的“第一”、“第二”等词汇，仅用于区分描述的目的，而不能理解为指示或暗示相对重要性，也不能理解为指示或暗示顺序。
以下，在介绍本申请实施例之前，先介绍相关现有技术。
目前，针对设备安全性问题，业内的解决方案包括，采用例如Trustzone隔离技术、虚拟化隔离技术等方式，将关键资产与数据面其它部分相隔离开，单独运行在安全环境中。然而这些隔离方式并不适用于图1所示的高性能的数据面OS场景中。
具体来说，Trustzone隔离技术是ARM支持的一种硬件隔离机制。参阅图3，Trustzone隔离技术将片上系统(system of chip，SoC)上的硬件和软件资源划分为可信执行环境(trusted execution environment，TEE)和富执行环境(rich execution environment，REE)两个区域，将关键资产从数据面中剥离开来，单独运行在TEE中的TEE OS之上，使得在TEE执行安全敏感的操作，在REE执行其它操作。系统运行过程中，TEE和REE之间通过监控器(monitor)进行转换，REE无法干扰安全环境TEE的执行，无法破坏TEE中硬件和软件资源的完整性和私密性，能够提供较高的安全隔离性。但是，由于应用运行在最 低权限的EL0层，管理应用的数据面OS内核运行在稍高权限的EL1层，监控器(monitor)运行在更高权限的EL3层，运行在REE的应用和/或数据面OS内核要访问运行在TEE的关键资产时，存在应用到数据面OS内核、数据面OS内核到监控器、监控器到TEE OS、TEE OS到关键资产等的多次特权层切换，效率低且会造成极大的性能开销，并不适用于图1的高性能的数据面OS场景。并且，该方法需要将关键资产从数据面剥离后单独运行在安全环境中，需对现有应用进行较大的修改，会严重影响现有业务。
虚拟化隔离技术也是ARM支持的一种隔离机制。虚拟化隔离技术基于硬件辅助虚拟化和运行在虚拟化层的虚拟机监控器(hypervisor)，将中央处理器(central processing unit，CPU)、内存、设备等硬件资源进行隔离和抽象，为上层虚拟机提供虚拟化资源视图和相互独立的运行环境。参阅图4，使用该方法时，基于CPU虚拟化和内存虚拟化技术，需要将关键资产和数据面其它部分运行在不同的虚拟机中，如应用和数据面OS内核运行在虚拟机1，关键资产运行在虚拟机2。运行在虚拟机1的应用或数据面OS内核要访问运行在虚拟机2的关键资产时，必须首先进入虚拟机监控器(hypervisor)再切换到虚拟机2。不同虚拟机之间无法相互干扰或者破坏对方的完整性和私密性，也能够提供较好的隔离性。但是，也正是由于关键资产和数据面其它部分运行在不同的虚拟机中，数据面其它部分要访问关键资产时，存在应用到数据面OS内核、数据面OS内核到虚拟机监控器、虚拟机监控器到虚拟机2的操作系统OS、虚拟机2的OS到关键资产等的多次特权层切换，效率低且会造成极大的性能开销，也不适用于高性能的数据面场景。并且，该方法也需要将关键资产从数据面剥离而运行在另外的虚拟机上，需对现有应用进行较大的修改，会严重影响现有业务。
有鉴于此，本申请提出了一种可应用于网络设备的数据面操作系统OS的数据处理方案，通过该数据处理方案，能够构建轻量级可信执行环境(即可信组件的运行环境)，并将可信执行环境的入口地址隐藏，确保可信组件与非可信组件的安全隔离，可信组件无法被非可信组件窃取和篡改。并通过配置，通过多种保护机制，使得即使非可信组件被攻陷，也无法破坏可信组件中数据和/或代码的完整性和私密性。并且，相比于图1和图2所示的高性能的数据面OS架构，该方案也没有增加额外的层级切换或MMU页表切换，几乎不影响数据面OS的高性能。同时，也无需将关键资产从数据面剥离出来，也能够兼容现有应用，而不会影响现有业务。该方案能够在保障数据面OS高性能的同时，保护数据面OS的关键资产的完整性和私密性。
以下，将结合附图及具体实施例详细说明本申请的技术方案。
图5为根据本申请一个实施例的数据面操作系统OS的逻辑架构图。其中，该数据面OS可以适用于网络设备或是其它设备，包括但不限于计算机(个人电脑和/或服务器)、基站、交换机、网桥、路由器、车载设备等，本申请对此不做限制。应理解，该逻辑架构仅是对设备的组件或功能模块的逻辑划分，该逻辑架构也可适用于其它运行在同一虚拟地址空间的任何合适的设备或模块，本申请对此也不做限制。
如图5所示，将数据面OS的各个组件基于功能划分为非可信组件501、中间组件(gateway)502和可信组件503。
非可信组件是非可信任的，可以包括该数据面OS的除可信组件和中间组件以外的数据面其它组件，例如可以包括一个或多个应用以及数据面OS内核。
可信组件503可以包括关键资产组件和可信计算基(以下简称为可信基)。关键资产 组件例如包括数据面OS的多个应用(例如图5中的应用1、应用2)的关键资产、数据面OS内核的关键资产等。本申请实施例中，关键资产具体例如可以包括用于安全服务的关键数据和/或关键代码等。关键数据可以是数据面的需要私密保护的数据，也可称为敏感数据，例如包括5G基站场景中的用户短信、用户上网数据、密钥等。关键代码可以是数据面OS的不期望被攻击而需要私密保护的代码，当该关键代码被运行时，能够实现数据面OS的一些敏感操作，例如在5G基站场景中，关键代码包括关于实现分组数据汇聚协议(Packet Data Convergence Protocol，PDCP)解密操作、明文处理操作、互联网安全协议(Internet Protocol Security，IPSEC)加密操作和密钥管理等基站操作的代码。
应理解的是，本申请实施例中，“可信”与“非可信”仅是从设备安全性角度，来对操作系统的功能模块的划分，若可信组件中某个模块出现安全隐患，将会对整个操作系统的安全性造成危害，而非可信组件仅涉及系统安全策略赋予的较低的相关权限，非可信组件出现问题对整个操作系统的安全妨害较低。在具体实施时，可信组件和/或非可信组件可以包括但不限于图5所示的各个组件及其子模块，本申请实施例仅以图5为例对本申请的技术方案进行详细说明，该技术方案同样可适用于其它场景中，本申请对此不做限制。
中间组件是为实现可信组件与非可信组件的安全隔离而设置的。中间组件中可以包括预设的一个或多个系统指令，在中间组件被调用时，这一个或多个系统指令能够被执行，以实现可信组件与非可信组件之间的安全的信息交互，确保非可信组件无法进入到可信组件中窃取或篡改数据或代码。本申请实施例中，中间组件可以与可信组件处于相同的保护级别，也就是说，还需要保护中间组件不被攻陷，在下文中详述。
与图2所示的数据面OS架构相同的是，图5所示的数据面OS的各个组件整体运行在同一层级(例如EL1层)，数据面OS的各个组件使用同一MMU页表，即运行在同一虚拟地址空间。各个组件之间的调用采用原生函数调用的方式实现。在数据面OS运行并进行数据的高速处理和转发的过程中，存在诸如系统调用、应用切换、中断处理等时，将不存在低效的层级切换(例如EL0层、EL1层、EL2层/EL3层之间)开销和低效的地址空间切换的开销，能够实现轻量级的运行环境，保障数据面的高性能。同时，相比于图2所示的数据面OS架构，图5所示的数据面OS架构中，能够通过修改/编译链接脚本文件，将数据面OS的关键资产的内容(包括数据和代码等)放在单独的安全段(secure section)，并配置数据面OS的加载逻辑，使得在设备启动时，通过加载器从安全段中得到关键资产的内容并加载到虚拟地址空间中的一个随机选择的虚拟地址上，并通过配置中间组件和可信基的功能实现多种保护机制，从而实现可信组件与非可信组件的安全隔离，保护可信组件中的关键资产和/或可信计算基的私密性和完整性。
为在保障数据面OS的高性能的同时，保护数据面OS的关键资产的完整性和私密性，本申请实施例提出了诸如地址空间隐藏保护机制、中间组件保护机制、特权层自保护机制、中断处理保护机制等多个保护机制，通过层层保护，实现可信组件的安全隔离，尽可能地避免数据面OS的可信组件被攻陷，保障可信组件中的数据和/或代码的完整性和私密性。
如下将结合附图分别对各保护机制的原理进行说明。
一、地址空间隐藏保护机制
地址空间隐藏保护机制，是通过指定可信组件的入口地址，并将该入口地址在数据面OS的虚拟地址空间中随机化“隐藏”，以实现对可信组件的安全隔离的机制。
本申请实施例中，可以通过预先在静态编译阶段，通过编译器的修改编译得到数据面 OS的可执行文件，以实现数据面OS的各个组件的配置逻辑、加载逻辑以及运行逻辑。在设备启动时，可以通过加载器在数据面OS的虚拟地址空间中随机选择的一个虚拟地址，作为第一虚拟地址，通过加载器将可信组件的内容加载到该第一虚拟地址指向的地址。第一虚拟地址可以指向一张地址表，该地址表中包括关键资产和可信基的地址。该第一虚拟地址被保存在网络设备的特殊的第一系统寄存器(例如ARM-Av8平台中CNTV_CVAL_EL0(counter-timer virtual timer compare value register for EL0))中，用于访问该第一系统寄存器的第一系统指令被唯一保存在中间组件中。
在非可信组件的运行过程中，若非可信组件要访问可信组件，只能通过调用中间组件来从第一系统寄存器中获取第一虚拟地址，从而进入到可信组件中安全执行，有助于实现可信组件的地址隐藏。由于应用和数据面OS内核无法通过执行第一系统指令获知可信组件的入口地址，即使非可信组件被攻击者攻陷，攻击者也无法进入可信组件中窃取或者篡改私密的关键数据或关键代码，有助于可信组件与非可信组件的安全隔离，从而保障数据面OS的关键资产的完整性和私密性。
由此，基于该地址空间隐藏保护机制实现可信组件的地址隐藏，使得即使非可信组件被攻陷，攻击者也无法通过执行第一系统指令获取到可信组件的入口地址，从而无法窃取或者篡改可信组件中的数据和代码，保障可信组件中的数据和代码的完整性和私密性。
参见图6所示，非可信组件运行过程中，需要依赖于可信组件来提供相关服务，例如明文处理、加密、解密、密钥管理等安全服务、以及页表管理、中断处理等服务。非可信组件运行过程中若要访问可信组件中的关键资产和/或可信基时，则通过①函数调用进入到中间组件，中间组件通过②执行第一系统指令，以从网络设备的第一系统寄存器中读取第一虚拟地址，并将该第一虚拟地址保存在网络设备的一个通用寄存器(例如X0)中。然后，中间组件通过③函数调用将相关请求跳转到该通用寄存器中的第一虚拟地址指向的地址，从而进入到可信组件中执行，以调用关键资产和/或可信基中完成相应的程序执行，例如运行关键代码提供安全服务、或执行页表管理控制、或执行中断处理控制等。在可信组件中完成相应的程序执行后，可信组件通过④函数调用返回中间组件中，中间组件删除通用寄存器中可能残留的第一虚拟地址后，再通过⑤函数调用，向非可信组件返回可信组件的处理结果，包括但不限于非可信组件请求调用关键资产提供安全服务的处理结果、非可信组件请求调用可信基执行的页表管理的结果、非可信组件请求调用可信基执行中断处理的结果等。非可信组件根据可信组件的处理结果继续运行，以进行高速的数据转发和处理。
作为示例，非可信组件运行过程中依赖关键数据和/或关键代码对用户身份进行验证，同时为保护数据安全又不期望向非可信组件泄露用户身份数据的明文。通过上述地址空间隐藏保护机制，可以在可信组件中保存关键数据和/或关键代码，包括关键数据密钥、解密和认证等关键操作的代码等。若非可信组件运行过程中要对用户身份进行验证，则非可信组件调用中间组件向关键资产组件提供用户身份数据的密文，关键资产组件通过执行相应的代码，来对密文进行解密并完成身份认证，并将认证的结果返回给非可信组件。相应地，非可信组件根据是否用户身份验证成功，执行进一步的数据处理和/或转发流程。
由此，通过地址空间隐藏保护机制，将可信组件的入口地址在虚拟地址空间中隐藏，由于非可信组件无法直接访问可信组件，也无法通过执行第一系统指令获知可信组件的入口地址，即使非可信组件存在安全隐患或者非可信组件被攻陷，攻击者也无法利用非可信组件进入到可信组件中窃取或者篡改关键数据和关键代码，从而保障可信组件中的数据和 代码的私密性和完整性。
二、中间组件保护机制
由于中间组件中包含访问第一系统寄存器的第一系统指令，中间组件仍存在安全隐患，攻击者可能会恶意利用中间组件来窃取可信组件的入口地址，而避开上述地址空间隐藏保护机制。因此，为避免中间组件被恶意利用，本申请实施例提出了中间组件保护机制。
如图7所示，中间组件可以包括多个指令序列，例如，指令1、指令2、指令3、指令4。
指令1可以为通用寄存器到第一系统寄存器的传送指令，例如，MSR X0,CNTV_CVAL_EL0，表示指令1执行MSR系统指令访问网络设备的第一系统寄存器(例如CNTV_CVAL_EL0)读取第一虚拟地址，将第一虚拟地址写入网络设备的通用寄存器(例如X0)。
指令2可以为到由Xm目标寄存器指定的地址处的跳转指令，例如，BLR X0，表示指令2执行BLR指令跳转到网络设备的通用寄存器(例如X0)中的地址(即第一虚拟地址)，进入可信组件中执行。
指令3可以为数据传送指令，例如，MOV X0,#0，表示指令3执行MOV指令将通用寄存器(例如X0)清空。
指令4可以为到由Xm目标寄存器指定的地址处的跳转指令，为子程序返回，例如RET，表示指令4执行RET指令返回非可信组件继续执行。
中间组件中指令序列可以保证，当访问网络设备的第一系统寄存器的第一系统指令被执行后，控制流将立即进入到可信组件中安全执行。并且，在返回非可信组件之前，执行指令3清空通用寄存器中残留的第一虚拟地址，以防止控制流返回非可信组件后，攻击者利用非可信组件访问通用寄存器来获取残留的第一虚拟地址，避免可信组件的入口地址被泄露。这样，即使攻击者攻陷了非可信组件，由于通用寄存器中的第一虚拟地址已被清空，非可信组件也无法利用中间组件获取到可信组件的入口地址，避免中间组件被恶意利用。
应当理解的是，上述指令序列及其功能实现仅是示例性说明而非任何限定，在其它实施例中，通用寄存器可以是X0-X29中的任一寄存器，各个指令序列的具体指令也可以根据应用场景或业务需求不同而有所不同，本申请实施例对此不做限制。
三、层级自保护机制
本申请实施例中，由于数据面OS整体运行在同一层级(例如EL1层)且使用同一MMU页表进行内存管理，攻击者如果攻陷了数据面OS，仍可能会恶意构造系统指令或者访问/修改MMU页表，从而避开本申请的地址隐藏保护机制和中间组件保护机制。为此，本申请实施例还提出了层级自保护机制，包括系统指令消除、页表控制和内存保护三个方面构成的自保护闭环，从而确保即使数据面OS运行在同一层级(例如同一特权层)也无法通过执行被消除的系统指令或者恶意构造系统指令、或者通过访问/修改MMU页表来恶意地进入可信组件中篡改或窃取关键数据和/或关键代码，实现对可信组件的安全隔离保护。
下面将结合图8，对本申请的自保护闭环进行说明，应当理解的是，下文中将这三个方面分开描述只了为了便于理解，图中示出的箭头也只是对这三个方面的保护机制的逻辑示意，而非对三者的功能实现进行任何限定。
参见图8所示，首先介绍基于系统指令消除的保护机制。
本申请实施例中，系统指令消除可以包括，对非可信组件中用于访问可信组件的系统 指令进行消除，包括在静态编译阶段对非可信组件中的用于访问可信组件的系统指令的消除，以及在系统运行阶段对非可信组件中的用于访问可信组件的系统指令的消除。具体地，在静态编译阶段，通过编译器，对非可信组件的代码进行扫描验证，确保非可信组件的代码中不包含用于访问网络设备的第一系统寄存器的第一系统指令。同时，在系统运行阶段，非可信组件触发的第一系统指令不可被执行，非可信组件代码中的例如修改页表基地址寄存器(translation table base register，TTBR)的系统指令也替换为对中间组件的函数调用，以尽可能全面地确保非可信组件代码中不包含该第一系统指令。
基于系统指令消除的保护机制，尽量确保只有中间组件的代码中包含访问第一系统寄存器的第一系统指令且只有中间组件中的第一系统指令能够被执行。当非可信组件需要访问关键资产和/或可信基时，只能通过对中间组件的函数调用，将相关请求跳转到中间组件，通过中间组件执行第一系统指令，从第一系统寄存器中获取第一虚拟地址，进而将非可信组件的相关请求迁移到可信组件中安全执行。这样，即使非可信组件被攻陷且攻击者恶意构造第一系统指令，该第一系统指令也不会被执行，攻击者无法通过恶意构造第一系统指令访问可信组件来窃取或篡改可信组件中的数据和代码，从而实现对可信组件的安全隔离保护。
其次，介绍基于页表控制的保护机制。
由于内存管理单元(memory management unit，MMU)页表中包括所有虚拟地址到物理地址的映射，若攻击者能够读取到MMU页表，就能够得到可信组件的入口地址，即第一虚拟地址，因而无法真正地实现对可信组件的安全隔离保护，因此，也需要对MMU页表进行保护。
本申请实施例中的页表控制保护机制，通过将数据面OS的MMU页表也随机保存在数据面OS的虚拟地址空间中的一个随机选择的虚拟地址中，并将MMU页表的随机化的地址信息保存在第一虚拟地址指向的地址表中，由此，MMU页表的随机化的地址信息也保存在网络设备的第一系统寄存器中，使得非可信组件无法直接访问和/或修改MMU页表，无法从MMU页表中获得第一虚拟地址，实现MMU页表在数据面OS的虚拟地址空间中的随机隐藏。同时，还通过配置由可信基全面实现数据面OS的页表管理功能以及针对MMU页表的访问和/或请求的验证功能。若非可信组件运行过程中需要访问和/或修改MMU页表，则也需要通过图6所示的方式，通过调用中间组件来获取到第一虚拟地址后将针对MMU页表的访问和/或修改请求发送给可信组件，从而进入到可信组件中，由可信基安全执行针对MMU页表的访问和/或修改请求的相关处理。
可信基能够先对针对数据面OS的MMU页表的访问和/或修改请求进行验证，以确定非可信组件对数据面OS的MMU页表的访问和/或修改请求是否符合预设的验证条件。可信基在对MMU页表的访问和/或修改请求验证成功后，即可执行对MMU页表的访问和/或修改，并在对MMU页表的访问和/或修改的程序运行完毕后，调用中间组件向非可信组件返回页表访问结果和/或页表修改结果。其中，验证条件可以包括：对所述MMU页表的访问请求不会访问第一页表，所述第一页表用于映射所述可信组件；以及对所述MMU页表的修改请求不会改变所述MMU页表的访问权限属性，其中，所述MMU页表的访问权限属性满足：所述MMU页表映射到的代码区的访问权限为不可写、所述MMU页表映射到的数据区的访问权限为不可执行。由此，通过可信基验证针对MMU页表的访问和/或修改请求的合法性，满足验证条件即认为合法，不满足验证条件即认为不合法，以使得针对 MMU页表的访问请求不会访问映射到可信组件的第一页表，确保攻击者无法通过访问MMU页表来获得可信组件的入口地址。同时，还可以确保用于改写代码区或执行数据区的系统指令不会被执行，这样攻击者无法通过改写代码区或执行数据区的方式重新引入恶意构造的第一系统指令而引入攻击。
由此，通过页表控制保护机制，非可信组件运行过程中，若请求访问和/或修改数据面OS的MMU页表，则只能通过调用中间组件获取第一虚拟地址，并根据第一虚拟地址调用可信基进行安全处理，避免攻击者简单地通过读取MMU页表就能够得到可信组件的随机化的入口地址，实现MMU页表的安全隔离保护。同时，由于非可信组件的代码已被消除而不包含修改页表基地址寄存器TTBR的系统指令，攻击者也无法通过修改页表基地址寄存器切换当前页表，使得无法将数据面OS使用的页表恶意更换为未被随机化保护的其它页表。同时，通过可信基验证针对MMU页表的管理请求的合法性，确保攻击者无法通过访问MMU页表获取可信组件的入口地址，也无法篡改内存来恶意构造系统指令。
然后，介绍基于内存保护的保护机制。
内存保护是指，通过MMU页表中的权限控制位配置访问权限属性，使得MMU页表的访问权限属性满足：MMU页表映射到的代码区的访问权限为不可写、MMU页表映射到的数据区的访问权限为不可执行，由此确保数据面OS的整个虚拟地址空间的内存映射属性满足数据区被映射为不可执行、代码区被映射为不可写。这样，在基于系统指令消除保护机制的基础上，确保攻击者无法通过改写代码区或者执行数据区的方式恶意构造系统指令而重新引入恶意攻击，实现对内存的安全保护。
正是由于设置了系统指令消除保护机制，使得非可信组件针对可信组件的相关系统指令不会被执行，非可信组件无法获取到可信组件的入口地址，也无法直接访问可信组件，实现可信组件的安全隔离。正是由于设置了页表控制保护机制，不满足验证条件的MMU页表访问请求和/或MMU页表修改请求即被认为是不合法的而不能被处理，确保数据面OS使用的页表无法被恶意更换为未被随机化保护的其它页表来窃取可信组件的入口地址，也无法通过改写代码区或执行数据区的方式重新引入攻击。正是由于设置了内存保护，使得内存中相应的代码区无法被写、数据区无法被执行，保证非可信组件在运行过程中无法通过修改自身的代码区或者执行自身的数据区恶意引入被消除的系统指令，防止基于系统指令消除的保护机制被绕开。
由此，通过三个方面的保护机制环环相扣构成的自保护闭环，能够实现数据面OS的层级自保护，使得即使数据面OS的各个组件同时运行在特权层，也无法通过执行系统指令或者访问和/或修改MMU页表来篡改或窃取可信组件中的内容，尽可能全面地保障可信组件的安全隔离，从而保障可信组件中数据和/或代码的完整性和私密性。
四、中断处理保护机制
中断处理保护机制是指，由可信基配置网络设备的第二系统寄存器(例如中断向量基地址寄存器，包括但不限于ARM-Av8平台中的中断向量基地址寄存器(vector base address register，VBAR)等)指向的中断向量表，以使得在数据面OS发生中断时，可信基能够截获中断，并安全地保存被中断运行的中间组件和/或可信组件的上下文，防止在可信组件和/或中间组件运行过程中发生数据面OS中断时造成第一虚拟地址泄露或是可信组件中数据和/或代码被篡改。其中，请求访问第二系统寄存器的系统指令也会在静态编译阶段被执行系统指令消除，以确保攻击者无法恶意修改第二系统寄存器。
在一个实施例中，非可信组件可以配置第二中断向量表，该第二中断向量表可以用于指示不同类型的中断对应的中断服务程序，例如由数据面OS内核执行转发数据包服务等。可信基可以配置第一中断向量表，第一中断向量表又可称为第二中断向量表的影子中断向量表，第一中断向量表可以用于指示中断对应的处理程序，包括但不限于确定被中断运行的组件的程序、对中断上下文的安全保存程序、确定中断服务程序等。
第二系统寄存器可以指向第一中断向量表。非可信组件可以通过读取第二系统寄存器确定数据面OS发生中断，然后，可以根据第一中断向量表确定被中断运行的组件，然后由相应的组件根据第一中断向量表的指示执行相应的中断处理流程。
例如，若被中断运行的组件为所述非可信组件，非可信组件根据所述第一中断向量表的指示执行所述中断对应的中断服务程序，例如转发数据包等。
例如，若被中断运行的组件为所述可信组件和/或所述中间组件，根据所述第一中断向量表的指示，所述中间组件和所述可信组件执行安全保存程序后，返回非可信组件执行所述中断对应的中断服务程序。其中，第一请求可以包括中断处理请求。如图6所示，所述安全保存程序包括：中断处理请求，所述中间组件接收非可信组件发送的中断处理请求，执行所述第一系统指令获取所述第一虚拟地址，并根据所述第一虚拟地址，将中断处理请求发送给可信基，可信基根据中断处理请求保存中断上下文。在可信基对中断上下文进行安全保存后，调用中间组件向非可信组件反馈相应的处理结果。中间组件删除通用寄存器中存储的第一虚拟地址，并向非可信组件返回处理结果，进入到非可信组件中执行中断对应的中断服务程序。当非可信组件执行中断服务程序之后请求中断返回时，重新调用中间组件，中间组件执行第一系统指令获取第一虚拟地址，并将中断返回请求发送给第一虚拟地址指向的可信组件，从而进入到可信组件中，由可信基恢复中断上下文。
由此，通过可信基配置的中断向量表以及中断处理保护机制，使得可信基能够及时截获中断，并在被中断运行的组件为可信组件和/或中间组件时，在可信基中安全保存中断上下文，避免可信组件和/或中间组件运行过程中的上下文被篡改或者泄露，从而助于保护数据面OS的可信组件中数据和/或代码的完整性和私密性。
至此，已经结合附图5-8对本申请的数据面OS的逻辑架构及其功能实现进行了说明。通过该逻辑架构及其功能实现，有助于同时实现数据面OS的高性能及安全性。即使将上述数据处理方案应用到图1-2所示的数据面OS架构，也只需简单地通过修改链接脚本文件或者可执行文件实现，而无需对当前业务进行较大改动，不会影响图1所示的数据面操作系统的高性能也不会影响现有业务。
以下结合5G基站场景，对本申请的数据面OS及其实现的数据处理方法的流程进行说明。
示例的，如图9所示，为本申请实施例的一种数据处理方法流程示意图，具体包括以下步骤。
S910，通过编译器将5G基站的数据面OS的程序代码编译为可执行文件。
该可执行文件可以为在5G基站出厂之前编译得到的，可执行文件预先存储在5G基站中。或者，该可执行文件也可以是对已有5G基站的相关文件进行修改编译后重新得到并存储在5G基站中。该可执行文件由多个段(section)组成，包括代码section、数据section等，用于存放5G基站的数据面OS的各个组件的内容(包括数据和/或代码)。其中，在出 厂之前编译或者在进行修改编译时，可以通过编译或修改编译链接脚本文件，使得编译器在编译过程中将5G基站的数据面OS的关键资产的内容(包括数据和/或代码)置于可执行文件中的独立的安全段(secure section)。这样，在5G基站初始化时，加载器能够将可执行文件的各个section加载到5G基站的内存中时，还能够通过查找secure section来获取到关键资产的数据和代码，便于加载器将关键资产的数据和代码加载到在数据面OS的虚拟地址空间中随机选择的第一虚拟地址上，有助于实现将关键资产在虚拟地址空间的随机化“隐藏”。
并且，还可以通过编译器，对数据面OS的相关代码中的系统指令进行消除，确保非可信组件的代码中不包含访问5G基站的特殊的第一系统寄存器的第一系统指令，用于直接或间接地访问可信组件的系统指令替换为对中间组件的函数调用，以使在后续数据面OS运行过程中，非可信组件的用于访问所述关键资产组件和/或可信基的第一系统指令，或者非可信组件的用于获取第一虚拟地址的第一系统指令，均是不可执行的，确保非可信组件无法直接访问可信组件，有助于实现将关键资产在虚拟地址空间的随机化“隐藏”，以保护可信组件中的数据和代码的完整性和私密性。
S920，5G基站启动，初始化基站数据面OS和MMU页表。
具体地，当5G基站初始化时，加载器将5G基站的整个数据面OS的可执行文件加载到5G基站的内存中。然后，加载器进入可信组件中由可信基完成MMU页表的初始化或是其它相关初始化过程。其中，加载器以在数据面OS的虚拟地址空间中随机选择的一个虚拟地址作为第一虚拟地址，将可信组件的内容加载到第一虚拟地址指向的地址，并将第一虚拟地址保存在5G基站的第一系统寄存器中，以助于实现可信组件的入口地址在虚拟地址空间中的随机化“隐藏”。可信基初始化MMU页表，实现数据面OS在虚拟地址空间中虚拟地址和在内存中的物理地址的映射，并配置MMU页表的访问权限属性，该MMU页表的访问权限属性满足：MMU页表映射到的代码区的访问权限为不可写、MMU页表映射到的数据区的访问权限为不可执行，以将数据面OS的整个虚拟地址空间映射为数据区不可执行、代码区不可写，避免攻击者通过改写代码区或执行数据区来引入攻击。MMU页表的地址信息也保存在第一虚拟地址指向的地址中，实现对MMU页表在虚拟地址空间中的随机化“隐藏”，以确保攻击者无法通过读取MMU页表来获取第一虚拟地址。并且，可信基还初始化5G基站的第二系统寄存器(例如中断向量基地址寄存器VBAR)指向的中断向量表，以便在后续系统运行中使可信基能够及时地截获中断并安全保存被中断的中间组件和/或可信组件的上下文，以防止可信组件和/或中间组件中的相关信息被泄露或篡改。在加载器加载完成后，从内存中清除加载器对应的相关代码，以防止攻击者恶意利用加载器中的系统指令。
5G基站初始化完成后，5G基站的数据面OS的逻辑架构如图5所示，包括可信组件、中间组件和非可信组件。可信组件包括可信计算基、关键资产组件(包括多个基站应用的关键资产以及5G基站的数据面OS内核的关键资产)，关键资产包括用于提供安全服务的关键数据和/或关键代码。非可信组件包括多个基站应用以及数据面OS内核，中间组件包括用于可信组件和非可信组件的安全隔离的多个系统指令。
S930，5G基站运行以提供服务。
在5G基站运行过程中，数据面OS的各个组件协同，完成对数据的高速处理和转发。其中，在5G基站的运行过程中，其数据面OS根据上文实施例所述的数据处理方法，实 现对可信组件的安全隔离保护，有助于保障可信组件中的数据和/或代码的完整性和私密性。
例如，S931，5G基站运行过程中，非可信组件发出第一请求以请求调用关键资产组件。例如，调用关键资产组件中的关键数据和/或关键代码提供安全服务。
S932，中间组件接收第一请求，并执行第一系统指令从5G基站的第一系统寄存器中获取第一虚拟地址，并将该第一虚拟地址保存在5G基站的通用寄存器(例如X0)中。
S933，中间组件根据第一虚拟地址调用关键资产，将第一请求跳转到第一虚拟地址指向的地址，以进入到可信组件访问关键资产，例如利用关键资产中的关键数据和/或关键代码，完成对第一请求的处理，例如用户身份认证、加密、解密、明文处理等。对第一请求处理完毕后，中间组件删除通用寄存器中存储的第一虚拟地址后，向非可信组件返回处理结果。非可信组件根据该处理结果，继续完成数据的高速处理和转发等，以保障5G基站侧业务和/或服务的安全、高效的运行。
例如，S934，5G基站运行过程中，非可信组件发送第一请求以请求访问和/或修改MMU页表。
S935，中间组件接收对MMU页表的访问和/或修改请求，并执行第一系统指令从5G基站的第一系统寄存器中获取第一虚拟地址，并将该第一虚拟地址保存在5G基站的通用寄存器(例如X0)中。
S936，中间组件根据第一虚拟地址调用可信基，将对MMU页表的访问和/或修改请求跳转到第一虚拟地址指向的地址，以进入到可信组件访问可信基。可信基首先对MMU页表访问请求和/或MMU页表修改请求进行验证。若符合预设的验证条件则认为请求合法从而完成对MMU页表的访问请求和/或修改请求的处理。若不符合则认为请求不合法而不处理该请求，同时启动相应的安全处理程序，例如异常处理，以避免MMU页表或基站内存被恶意访问或篡改。
例如，S937，5G基站的非可信组件例如读取第二系统寄存器并确定数据面OS发生中断。
S938，根据第二系统寄存器指向的中断向量表指示的处理程序，执行中断处理。
若被中断运行的组件为非可信组件，即中断发生在非可信组件的运行过程中，S939，非可信组件根据中断向量表的指示，执行中断对应的中断服务程序，例如，由数据面OS内核执行中断服务程序。S9310，非可信组件执行中断返回，以恢复中断上下文(即被恢复中断运行的非可信组件的上下文)。
若被中断运行的组件为可信组件和/或中间组件，即中断发生在可信组件和/或所述中间组件的运行过程中，S9311，根据第一中断向量表的指示，非可信组件发送中断处理请求以请求调用可信基保存中断上下文。中间组件接收中断处理请求，执行第一系统指令从5G基站的第一系统寄存器中获取第一虚拟地址，并将该第一虚拟地址保存在5G基站的通用寄存器(例如X0)中。中间组件根据第一虚拟地址调用可信基，将中断处理请求跳转到第一虚拟地址指向的地址，以进入到可信组件访问可信基。S9312，可信计算基根据中断处理请求保存中断上下文。然后，S9313，中间组件执行第三系统指令删除通用寄存器中存储的第一虚拟地址，将处理结果发送给非可信组件，非可信组件执行中断对应的中断服务程序。S9314，非可信组件请求中断返回时调用中间组件，中间组件执行第一系统指令获取第一虚拟地址并保存在通用寄存器中，然后执行第二系统指令将中断返回请求跳转到第一虚拟地址指向的地址，以进入到可信组件中由可信基恢复中断上下文，以恢复被中断 的中间组件和/或可信组件的运行。
通过上述方法流程，通过配置5G基站的数据面OS的配置逻辑、加载逻辑以及各个组件的运行逻辑，通过诸如地址空间隐藏保护机制、中间组件保护机制、层级自保护机制、中断处理保护机制等多个保护机制，通过层层保护，有助于保障数据面OS中需要私密保护的数据和/或代码的完整性和私密性。并且，通过上述方案，无需对图2所示的已有数据面OS架构进行较大改动，不会对现有业务产生较大影响，同时仍能够保障数据面OS的高性能。
基于相同的技术构思，本申请实施例还提供了一种数据处理装置，如图10所示，该数据处理装置1000可以包括：非可信组件1001、中间组件1002和可信组件1003，非可信组件1001可以包括应用和数据面操作系统OS内核，可信组件1003可以包括可信计算基和关键资产组件，关键资产组件包括应用和数据面OS内核的用于提供安全服务的关键数据和/或关键代码，中间组件用于可信组件与非可信组件的安全隔离，中间组件中包括第一系统指令，第一系统指令用于从网络设备的第一系统寄存器中获取第一虚拟地址，第一虚拟地址用于指向可信组件；其中，非可信组件，用于发送第一请求，第一请求用于访问可信组件；中间组件，用于接收第一请求，执行第一系统指令获取第一虚拟地址，并根据第一虚拟地址，将第一请求发送给可信组件；可信组件，用于根据第一请求进行处理。
在一种实施方式中，第一系统指令用于从网络设备的第一系统寄存器中获取第一虚拟地址，包括：第一系统指令用于将从第一系统寄存器中读取的第一虚拟地址存储到网络设备的通用寄存器中；可信组件根据第一请求进行处理之后，中间组件用于：接收可信组件发送的第二请求，第二请求用于向非可信组件反馈可信组件的处理结果；删除通用寄存器中存储的第一虚拟地址，并向非可信组件发送处理结果。
在一种实施方式中，第一请求用于访问可信组件包括：第一请求用于访问关键资产组件；可信组件根据第一请求进行处理，包括：根据关键资产组件中的关键数据和/或关键代码对第一请求进行处理。
在一种实施方式中，第一请求包括对数据面OS的内存管理单元MMU页表的访问和/或修改请求，可信组件根据第一请求进行处理之前，可信计算基用于：确定对MMU页表的访问和/或修改请求符合预设的验证条件；其中，验证条件包括：对MMU页表的访问请求不会访问第一页表，第一页表用于映射可信组件；对MMU页表的修改请求不会改变MMU页表的访问权限属性，其中，MMU页表的访问权限属性满足：MMU页表映射到的代码区的访问权限为不可写、MMU页表映射到的数据区的访问权限为不可执行。
在一种实施方式中，网络设备的第二系统寄存器指向可信计算基配置的中断向量表，中断向量表用于指示中断对应的处理程序，非可信组件用于：若数据面OS发生中断，根据中断向量表确定被中断运行的组件；若被中断运行的组件为非可信组件，根据中断向量表的指示，执行中断对应的中断服务程序；若被中断运行的组件为可信组件和/或中间组件，在执行中断对应的中断服务程序之前，根据中断向量表的指示发送中断处理请求，第一请求包括中断处理请求，可信组件根据第一请求进行处理，包括：可信计算基根据中断处理请求保存中断上下文。
在一种实施方式中，可信组件的处理结果包括可信计算基对中断上下文的处理结果；和/或第一请求还包括中断返回请求。
在一种实施方式中，装置还包括加载器，加载器用于：在设备初始化时将数据处理装置的可执行文件加载到网络设备的内存中；在设备启动时，加载器以在数据处理装置的虚拟地址空间中随机选择的一个虚拟地址作为第一虚拟地址，将可信组件的内容加载到第一虚拟地址，并将第一虚拟地址保存到第一系统寄存器中；可信计算基还用于：初始化MMU页表，将虚拟地址空间的虚拟地址映射到内存，并配置MMU页表的访问权限属性，其中，MMU页表的访问权限属性满足：MMU页表映射到的代码区的访问权限为不可写、MMU页表映射到的数据区的访问权限为不可执行。
如图11所示，为根据本申请一个实施例的通信装置的示意图。该通信装置的结构如图11所示，包括处理器1101、存储器1102。所述存储器中存储有一个或多个计算机程序，所述一个或多个计算机程序包括指令；当所述处理器调用所述指令时，使得所述通信装置执行以上实施例以及实施例提供的数据处理方法，下面对该通信装置的各个单元器件的功能进行介绍。
所述处理器1101、所述存储器1102之间通过总线1103相互连接。所述总线1103可以是外设部件互连标准(peripheral component interconnect，PCI)总线或扩展工业标准结构(extended industry standard architecture，EISA)总线等。所述总线可以分为地址总线、数据总线、控制总线等。为便于表示，图11中仅用一条粗线表示，但并不表示仅有一根总线或一种类型的总线。
存储器1102中存储有一个或多个计算机程序，所述一个或多个计算机程序包括指令。存储器1102可能包含随机存取存储器(random access memory，RAM)，也可能还包括非易失性存储器(non-volatile memory)，例如至少一个磁盘存储器。处理器1101执行存储器1102中的程序指令，并使用所述存储器1102中存储的数据，实现上述功能，从而实现上述实施例提供的数据处理方法。
可以理解，本申请图11中的存储器1102可以是易失性存储器或非易失性存储器，或可包括易失性和非易失性存储器两者。其中，非易失性存储器可以是只读存储器(Read-Only Memory，ROM)、可编程只读存储器(Programmable ROM，PROM)、可擦除可编程只读存储器(Erasable PROM，EPROM)、电可擦除可编程只读存储器(Electrically EPROM，EEPROM)或闪存。易失性存储器可以是随机存取存储器(Random Access Memory，RAM)，其用作外部高速缓存。通过示例性但不是限制性说明，许多形式的RAM可用，例如静态随机存取存储器(Static RAM，SRAM)、动态随机存取存储器(Dynamic RAM，DRAM)、同步动态随机存取存储器(Synchronous DRAM，SDRAM)、双倍数据速率同步动态随机存取存储器(Double Data Rate SDRAM，DDR SDRAM)、增强型同步动态随机存取存储器(Enhanced SDRAM，ESDRAM)、同步连接动态随机存取存储器(Synchlink DRAM，SLDRAM)和直接内存总线随机存取存储器(Direct Rambus RAM，DR RAM)。应注意，本文描述的系统和方法的存储器旨在包括但不限于这些和任意其它适合类型的存储器。
需要说明的是，本申请以上实施例中对模块的划分是示意性的，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，另外，在本申请各个实施例中的各功能单元可以集成在一个处理单元中，也可以是单独物理存在，也可以两个或两个以上单元集成在一个单元中。上述集成的单元既可以采用硬件的形式实现，也可以采用软件功能单元的形式实现。
所述集成的单元如果以软件功能单元的形式实现并作为独立的产品销售或使用时，可以存储在一个计算机可读取存储介质中。基于这样的理解，本申请的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的全部或部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质中，包括若干指令用以使得一台计算机设备(可以是个人计算机，服务器，或者网络设备等)或处理器(processor)执行本申请各个实施例所述方法的全部或部分步骤。而前述的存储介质包括：U盘、移动硬盘、只读存储器(Read-Only Memory，ROM)、随机存取存储器(Random Access Memory，RAM)、磁碟或者光盘等各种可以存储程序代码的介质。
基于以上实施例，本申请实施例还提供了一种计算机程序，当所述计算机程序在计算机上运行时，使得所述计算机执行以上实施例提供的数据处理方法。
基于以上实施例，本申请实施例还提供了一种计算机可读存储介质，该计算机可读存储介质中存储有计算机程序，所述计算机程序被计算机执行时，使得计算机执行以上实施例提供的数据处理方法。
其中，存储介质可以是计算机能够存取的任何可用介质。以此为例但不限于：计算机可读介质可以包括RAM、ROM、EEPROM、CD-ROM或其他光盘存储、磁盘存储介质或者其他磁存储设备、或者能够用于携带或存储具有指令或数据结构形式的期望的程序代码并能够由计算机存取的任何其他介质。
基于以上实施例，本申请实施例还提供了一种芯片，所述芯片与存储器耦合，所述芯片用于读取存储器中存储的计算机程序，实现以上实施例提供的数据处理方法。
在上述实施例中，可以全部或部分地通过软件、硬件、固件或者其任意组合来实现。当使用软件实现时，可以全部或部分地以计算机程序产品的形式实现。所述计算机程序产品包括一个或多个计算机指令。在计算机上加载和执行所述计算机程序指令时，全部或部分地产生按照本发明实施例所述的流程或功能。所述计算机可以是通用计算机、专用计算机、计算机网络、或者其他可编程装置。所述计算机指令可以存储在计算机可读存储介质中，或者从一个计算机可读存储介质向另一个计算机可读存储介质传输，例如，所述计算机指令可以从一个网站站点、计算机、服务器或数据中心通过有线(例如同轴电缆、光纤、数字用户线(DSL))或无线(例如红外、无线、微波等)方式向另一个网站站点、计算机、服务器或数据中心进行传输。所述计算机可读存储介质可以是计算机能够存取的任何可用介质或者是包含一个或多个可用介质集成的服务器、数据中心等数据存储设备。所述可用介质可以是磁性介质，(例如，软盘、硬盘、磁带)、光介质(例如，DVD)、或者半导体介质(例如固态硬盘(Solid State Disk，SSD))等。
本申请实施例中所描述的各种说明性的逻辑单元和电路可以通过通用处理器，数字信号处理器，专用集成电路(ASIC)，现场可编程门阵列(FPGA)或其它可编程逻辑装置，离散门或晶体管逻辑，离散硬件部件，或上述任何组合的设计来实现或操作所描述的功能。通用处理器可以为微处理器，可选地，该通用处理器也可以为任何传统的处理器、控制器、微控制器或状态机。处理器也可以通过计算装置的组合来实现，例如数字信号处理器和微处理器，多个微处理器，一个或多个微处理器联合一个数字信号处理器核，或任何其它类似的配置来实现。
本申请实施例中所描述的方法或算法的步骤可以直接嵌入硬件、处理器执行的软件单元、或者这两者的结合。软件单元可以存储于RAM存储器、闪存、ROM存储器、EPROM存储器、EEPROM存储器、寄存器、硬盘、可移动磁盘、CD-ROM或本领域中其它任意形式的存储媒介中。示例性地，存储媒介可以与处理器连接，以使得处理器可以从存储媒介中读取信息，并可以向存储媒介存写信息。可选地，存储媒介还可以集成到处理器中。处理器和存储媒介可以设置于ASIC中，ASIC可以设置于终端设备中。可选地，处理器和存储媒介也可以设置于终端设备中的不同的部件中。
这些计算机程序指令也可装载到计算机或其他可编程数据处理设备上，使得在计算机或其他可编程设备上执行一系列操作步骤以产生计算机实现的处理，从而在计算机或其他可编程设备上执行的指令提供用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的步骤。
尽管结合具体特征及其实施例对本发明进行了描述，显而易见的，在不脱离本发明的精神和范围的情况下，可对其进行各种修改和组合。相应地，本说明书和附图仅仅是所附权利要求所界定的本发明的示例性说明，且视为已覆盖本发明范围内的任意和所有修改、变化、组合或等同物。显然，本领域的技术人员可以对本发明进行各种改动和变型而不脱离本发明的精神和范围。这样，倘若本发明的这些修改和变型属于本发明权利要求及其等同技术的范围之内，则本发明也意图包含这些改动和变型在内。

Claims (15)

  1. 一种数据处理方法，其特征在于，应用于网络设备的数据面操作系统OS，所述数据面OS包括非可信组件、中间组件和可信组件，所述非可信组件包括应用和数据面OS内核，所述可信组件包括可信计算基和关键资产组件，所述关键资产组件包括所述应用和所述数据面OS内核的用于提供安全服务的关键数据和/或关键代码，所述中间组件用于所述可信组件与所述非可信组件的安全隔离，所述中间组件中包括第一系统指令，所述第一系统指令用于从所述网络设备的第一系统寄存器中获取第一虚拟地址，所述第一虚拟地址用于指向所述可信组件，所述方法包括：
    所述中间组件接收所述非可信组件发送的第一请求，所述第一请求用于访问所述可信组件；
    所述中间组件执行所述第一系统指令获取所述第一虚拟地址，并根据所述第一虚拟地址，将所述第一请求发送给所述可信组件；
    所述可信组件根据所述第一请求进行处理。
  2. 根据权利要求1所述的方法，其特征在于，所述第一系统指令用于从所述网络设备的第一系统寄存器中获取第一虚拟地址，包括：
    所述第一系统指令用于将从所述第一系统寄存器中读取的所述第一虚拟地址存储到所述网络设备的通用寄存器中；
    所述可信组件根据所述第一请求进行处理之后，所述方法还包括：
    所述中间组件接收所述可信组件发送的第二请求，所述第二请求用于向所述非可信组件反馈所述可信组件的处理结果；
    所述中间组件删除所述通用寄存器中存储的所述第一虚拟地址，并向所述非可信组件发送所述处理结果。
  3. 根据权利要求1或2所述的方法，其特征在于，所述第一请求用于访问所述可信组件包括：所述第一请求用于访问所述关键资产组件；
    所述可信组件根据所述第一请求进行处理，包括：
    根据所述关键资产组件中的所述关键数据和/或关键代码对所述第一请求进行处理。
  4. 根据权利要求1或2所述的方法，其特征在于，所述第一请求包括对所述数据面OS的内存管理单元MMU页表的访问和/或修改请求，所述可信组件根据所述第一请求进行处理之前，所述方法还包括：
    所述可信计算基确定对所述MMU页表的访问和/或修改请求符合预设的验证条件；
    其中，所述验证条件包括：
    对所述MMU页表的访问请求不会访问第一页表，所述第一页表用于映射所述可信组件；
    对所述MMU页表的修改请求不会改变所述MMU页表的访问权限属性，其中，所述MMU页表的访问权限属性满足：所述MMU页表映射到的代码区的访问权限为不可写、所述MMU页表映射到的数据区的访问权限为不可执行。
  5. 根据权利要求1-4中任一项所述的方法，其特征在于，所述网络设备的第二系统寄存器指向由所述可信计算基配置的中断向量表，所述中断向量表用于指示中断对应的处理程序，所述方法还包括：
    若所述数据面OS发生中断，所述非可信组件根据所述中断向量表确定被中断运行的组件；
    若被中断运行的组件为所述非可信组件，所述非可信组件根据所述中断向量表的指示，执行所述中断对应的中断服务程序；
    若被中断运行的组件为所述可信组件和/或所述中间组件，所述非可信组件执行所述中断对应的中断服务程序之前，所述非可信组件根据所述中断向量表的指示发送中断处理请求，其中，所述第一请求包括所述中断处理请求，所述可信组件根据所述第一请求进行处理，包括：所述可信计算基根据所述中断处理请求保存中断上下文。
  6. 根据权利要求5所述的方法，其特征在于，
    所述可信组件的处理结果包括所述可信计算基对所述中断上下文的处理结果；和/或
    所述第一请求还包括中断返回请求。
  7. 根据权利要求1-6中任一项所述的方法，其特征在于，所述数据面OS还包括加载器，所述加载器还用于在设备初始化时将所述数据面OS的可执行文件加载到所述网络设备的内存中，所述方法还包括：
    在设备启动时，所述加载器以在所述数据面OS的虚拟地址空间中随机选择的一个虚拟地址作为所述第一虚拟地址，将所述可信组件的内容加载到所述第一虚拟地址，并将所述第一虚拟地址保存到所述第一系统寄存器中；
    所述可信计算基初始化所述MMU页表，将所述虚拟地址空间的虚拟地址映射到所述内存，并配置所述MMU页表的访问权限属性，其中，所述MMU页表的访问权限属性满足：所述MMU页表映射到的代码区的访问权限为不可写、所述MMU页表映射到的数据区的访问权限为不可执行。
  8. 一种数据处理装置，其特征在于，包括非可信组件、中间组件和可信组件，所述非可信组件包括应用和数据面操作系统OS内核，所述可信组件包括可信计算基和关键资产组件，所述关键资产组件包括所述应用和所述数据面OS内核的用于提供安全服务的关键数据和/或关键代码，所述中间组件用于所述可信组件与所述非可信组件的安全隔离，所述中间组件中包括第一系统指令，所述第一系统指令用于从网络设备的第一系统寄存器中获取第一虚拟地址，所述第一虚拟地址用于指向所述可信组件；
    其中，所述非可信组件，用于发送第一请求，所述第一请求用于访问所述可信组件；
    所述中间组件，用于接收所述第一请求，执行所述第一系统指令获取第一虚拟地址，并根据所述第一虚拟地址，将所述第一请求发送给所述可信组件；
    所述可信组件，用于根据所述第一请求进行处理。
  9. 根据权利要求8所述的装置，其特征在于，所述第一系统指令用于从所述网络设备的第一系统寄存器中获取第一虚拟地址，包括：
    所述第一系统指令用于将从所述第一系统寄存器中读取的所述第一虚拟地址存储到所述网络设备的通用寄存器中；
    所述可信组件根据所述第一请求进行处理之后，所述中间组件用于：
    接收所述可信组件发送的第二请求，所述第二请求用于向所述非可信组件反馈所述可信组件的处理结果；
    删除所述通用寄存器中存储的所述第一虚拟地址，并向所述非可信组件发送所述处理结果。
  10. 根据权利要求8或9所述的装置，其特征在于，所述第一请求用于访问所述可信组件包括：所述第一请求用于访问所述关键资产组件；
    所述可信组件根据所述第一请求进行处理，包括：
    根据所述关键资产组件中的所述关键数据和/或关键代码对所述第一请求进行处理。
  11. 根据权利要求8或9所述的装置，其特征在于，所述第一请求包括对所述数据面OS的内存管理单元MMU页表的访问和/或修改请求，所述可信组件根据所述第一请求进行处理之前，所述可信计算基用于：确定对所述MMU页表的访问和/或修改请求符合预设的验证条件；
    其中，所述验证条件包括：
    对所述MMU页表的访问请求不会访问第一页表，所述第一页表用于映射所述可信组件；
    对所述MMU页表的修改请求不会改变所述MMU页表的访问权限属性，其中，所述MMU页表的访问权限属性满足：所述MMU页表映射到的代码区的访问权限为不可写、所述MMU页表映射到的数据区的访问权限为不可执行。
  12. 根据权利要求8-11中任一项所述的装置，其特征在于，所述网络设备的第二系统寄存器指向所述可信计算基配置的中断向量表，所述中断向量表用于指示中断对应的处理程序，所述非可信组件用于：
    若所述数据面OS发生中断，根据所述中断向量表确定被中断运行的组件；
    若被中断运行的组件为所述非可信组件，根据所述中断向量表的指示，执行所述中断对应的中断服务程序；
    若被中断运行的组件为所述可信组件和/或所述中间组件，在执行所述中断对应的中断服务程序之前，根据所述中断向量表的指示发送中断处理请求，所述第一请求包括所述中断处理请求，所述可信组件根据所述第一请求进行处理，包括：所述可信计算基根据所述中断处理请求保存中断上下文。
  13. 根据权利要求12所述的装置，其特征在于，
    所述可信组件的处理结果包括所述可信计算基对所述中断上下文的处理结果；和/或
    所述第一请求还包括中断返回请求。
  14. 根据权利要求8-13中任一项所述的装置，其特征在于，所述装置还包括加载器，所述加载器用于：
    在设备初始化时将所述数据处理装置的可执行文件加载到所述网络设备的内存中；
    在设备启动时，所述加载器以在所述数据处理装置的虚拟地址空间中随机选择的一个虚拟地址作为所述第一虚拟地址，将所述可信组件的内容加载到所述第一虚拟地址，并将所述第一虚拟地址保存到所述第一系统寄存器中；
    所述可信计算基还用于：
    初始化所述MMU页表，将所述虚拟地址空间的虚拟地址映射到所述内存，并配置所述MMU页表的访问权限属性，其中，所述MMU页表的访问权限属性满足：所述MMU页表映射到的代码区的访问权限为不可写、所述MMU页表映射到的数据区的访问权限为不可执行。
  15. 一种计算机可读存储介质，其特征在于，所述计算机可读存储介质中存储有计算机程序，当所述计算机程序在计算机上运行时，使得计算机执行权利要求1-7任一项所述 的方法。
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