WO2021249497A1 - 显示面板、显示装置及显示面板的制备方法 - Google Patents

显示面板、显示装置及显示面板的制备方法 Download PDF

Info

Publication number
WO2021249497A1
WO2021249497A1 PCT/CN2021/099469 CN2021099469W WO2021249497A1 WO 2021249497 A1 WO2021249497 A1 WO 2021249497A1 CN 2021099469 W CN2021099469 W CN 2021099469W WO 2021249497 A1 WO2021249497 A1 WO 2021249497A1
Authority
WO
WIPO (PCT)
Prior art keywords
layer
sub
pixel
pixels
display panel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2021/099469
Other languages
English (en)
French (fr)
Inventor
曲爽
代郁峰
邵金宇
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Huawei Technologies Co Ltd
Original Assignee
Huawei Technologies Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Huawei Technologies Co Ltd filed Critical Huawei Technologies Co Ltd
Priority to JP2022575831A priority Critical patent/JP7532731B2/ja
Priority to EP21821083.9A priority patent/EP4152398A4/en
Publication of WO2021249497A1 publication Critical patent/WO2021249497A1/zh
Priority to US18/063,826 priority patent/US20230105156A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H29/00—Integrated devices, or assemblies of multiple devices, comprising at least one light-emitting semiconductor element covered by group H10H20/00
    • H10H29/10—Integrated devices comprising at least one light-emitting semiconductor component covered by group H10H20/00
    • H10H29/14—Integrated devices comprising at least one light-emitting semiconductor component covered by group H10H20/00 comprising multiple light-emitting semiconductor components
    • H10H29/142—Two-dimensional arrangements, e.g. asymmetric LED layout
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/81—Bodies
    • H10H20/811—Bodies having quantum effect structures or superlattices, e.g. tunnel junctions
    • H10H20/812—Bodies having quantum effect structures or superlattices, e.g. tunnel junctions within the light-emitting regions, e.g. having quantum confinement structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/81—Bodies
    • H10H20/814—Bodies having reflecting means, e.g. semiconductor Bragg reflectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/83—Electrodes
    • H10H20/831—Electrodes characterised by their shape
    • H10H20/8312—Electrodes characterised by their shape extending at least partially through the bodies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/83—Electrodes
    • H10H20/831—Electrodes characterised by their shape
    • H10H20/8314—Electrodes characterised by their shape extending at least partially onto an outer side surface of the bodies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/84—Coatings, e.g. passivation layers or antireflective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/85—Packages
    • H10H20/857—Interconnections, e.g. lead-frames, bond wires or solder balls
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01—Manufacture or treatment
    • H10H20/011—Manufacture or treatment of bodies, e.g. forming semiconductor layers
    • H10H20/018—Bonding of wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01—Manufacture or treatment
    • H10H20/032—Manufacture or treatment of electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01—Manufacture or treatment
    • H10H20/036—Manufacture or treatment of packages
    • H10H20/0364—Manufacture or treatment of packages of interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/85—Packages
    • H10H20/851—Wavelength conversion means

Definitions

  • This application relates to the technical field of display devices, and in particular to a display panel, a display device, and a manufacturing method of the display panel.
  • LCD liquid crystal display
  • OLED organic light emitting diode
  • the optical path of the LCD display module is relatively complicated, and it is difficult to achieve flexible bending, and the color film and the backlight module need to be used to achieve color display. Therefore, the color saturation of the LCD is difficult to reach a high level.
  • OLED display modules there are still problems in improving the resolution, efficiency, brightness, and lifespan of OLEDs.
  • Micro LED (miniature light-emitting diode) technology has certain advantages in terms of optical efficiency, brightness, response speed and reliability, and has attracted more and more attention from the industry, but there are also certain problems.
  • the present application provides a display panel, a display device, and a method for manufacturing a display panel.
  • the photolithography equipment for preparing LED wafers is used to prepare color functional layers, which can prepare high-density pixels on the wafer, and is beneficial to Reduce manufacturing costs.
  • this solution greatly reduces the number of pixel transfers, reduces the probability of product damage during the transfer process, and helps improve manufacturing efficiency and product yield.
  • the present application provides a display panel.
  • the display panel includes a plurality of pixel units, and each pixel unit includes sub-pixels of at least three colors.
  • the pixel unit includes a red sub-pixel, a green sub-pixel, and a blue sub-pixel. Pixels to achieve color display of the display panel; or, the pixel unit may also include red sub-pixels, green sub-pixels, blue sub-pixels, and white sub-pixels, which is beneficial to improve the brightness of the display panel.
  • Each sub-pixel of the above-mentioned pixel unit is encapsulated into a pixel unit by a passivation layer, so that when preparing the above-mentioned display panel, an LED wafer can be prepared first, and then a color functional layer of the sub-pixels can be prepared on the surface of the LED wafer. Therefore, this solution can use the photolithography equipment for preparing LED wafers to prepare the above-mentioned color functional layer, and can prepare high-density pixels on the wafer and reduce the manufacturing cost.
  • the passivation layer encapsulation and transfer are performed in the unit of pixel unit.
  • each sub-pixel in each pixel unit can share one electrode, that is, one end of each sub-pixel in the pixel unit is connected to a first electrode, and the other end shares a second electrode. Since the pixel is used as a unit for packaging and transfer in this solution, each sub-pixel in the pixel unit is designed as a common electrode structure, which can reduce the total number of electrodes in the display panel and simplify the transfer of the pixel unit to a substrate with a drive circuit. , The number of electrodes that need to be welded improves the process efficiency and can also increase the yield of the display panel. In addition, the cost of preparing electrodes can also be reduced.
  • the first electrode may be an N electrode and the second electrode may be a P electrode; or, the first electrode may be a P electrode, and the second electrode may be an N electrode, which is not specifically limited in this application.
  • the sub-pixels may have at least two sub-pixels, and the at least two sub-pixels are arranged in parallel, that is, all sub-pixels of each sub-pixel share the same set of N electrodes and P electrodes. Therefore, when one of the sub-pixels is disconnected, the remaining sub-pixels can still keep working, and the voltage is increased, so that the brightness of the sub-pixels does not change much.
  • a short-circuit occurs in one of the sub-pixels, it can be considered that the intervention cuts off the short-circuited sub-pixel to form a disconnection, so that the sub-pixel maintains normal operation.
  • This solution can increase the service life and yield of the sub-pixels, and can also increase the repair rate of the sub-pixels, thereby reducing the cost of the display panel and improving the user experience.
  • the sub-pixels of the above-mentioned pixel unit include at least red sub-pixels and green sub-pixels, and may also include blue sub-pixels and/or white sub-pixels. Since the red sub-pixels have lower luminous efficiency when the size is small, the number of red sub-pixels can be greater than the number of green sub-pixels. For example, the sub-pixels may include two red sub-pixels, one green sub-pixel, and one blue sub-pixel. Therefore, the luminous efficiency of each sub-pixel of the pixel unit can be more consistent, and the color saturation of the display panel can be improved.
  • a light-shielding wall can be arranged between the sub-pixels.
  • an aluminum light-shielding wall can be arranged on the peripheral side of the sub-pixels.
  • the aluminum light-shielding wall has a certain reflective effect, so that the brightness and luminous efficiency of each sub-pixel can be improved.
  • the aluminum light-shielding wall can also be connected to the first electrode or the second electrode of the sub-pixel.
  • the aluminum shading wall is used as the wire, which can reduce the design of the wire when preparing the pixel unit.
  • an aluminum light-shielding wall can also be used to replace the wiring through the thickness direction of the pixel unit to increase the ratio of the display panel of the LED station and improve the display The luminous efficiency and display effect of the panel.
  • the above-mentioned pixel unit includes an LED layer and a color functional layer, wherein the LED layer includes an N-type zone layer, a multiple quantum well layer and a P-type zone layer arranged in sequence.
  • the LED layer includes an N-type zone layer, a multiple quantum well layer and a P-type zone layer arranged in sequence.
  • the N-type region layer of the pixel unit is an overall N-type region layer.
  • the sub-pixels of the pixel unit can be Share N electricity namely. It is sufficient to connect the N electrode to the N-type region layer, which can simplify the connection structure between the N electrode and the LED.
  • the N electrode can be connected to the middle area of the N-type zone layer of the pixel unit, so that the electrons of the pixel unit will not easily flow to the edge of the sub-pixel, and the risk of leakage of the sub-pixel can be reduced.
  • a light-shielding wall is provided between the multiple quantum well layer and the N-type region layer, and the P-type region layer of the pixel unit is an overall P-type region layer.
  • the P electrode is used as the common electrode, which has similar technical effects to the above-mentioned technical solutions, and will not be repeated here.
  • the above-mentioned pixel unit includes an LED layer and a color function layer, and the side of the LED layer away from the color function layer includes a reflective layer.
  • the reflective layer can reflect the light emitted from the LED layer toward the reflective layer to the color functional layer, so as to improve the light utilization efficiency.
  • the above-mentioned reflective layer may specifically be a first distributed Rager mirror layer or a metal reflective layer, and the specific type may be designed according to requirements.
  • a second distributed Rager reflector layer can also be provided on the side of the LED layer facing the color functional layer.
  • the second distributed Rager reflector layer can transmit blue light and reflect red and green light to improve the pixel unit’s performance. Photoelectric conversion efficiency.
  • the present application also provides a display device, which includes a middle frame, a rear case, a printed circuit board, and the display panel in any of the above technical solutions.
  • the printed circuit board and the display panel are arranged on both sides of the middle frame.
  • the middle frame is used to carry the above-mentioned printed circuit board and the display panel.
  • the concrete can be fixedly connected with the middle frame.
  • Each sub-pixel of the pixel unit of the display panel of the display device is encapsulated by a passivation layer into a pixel unit.
  • This solution can use the photolithography equipment for preparing LED wafers to prepare the color functional layer of the pixel unit, and it can be on the wafer
  • the pixels with higher density are prepared and the manufacturing cost is reduced.
  • the passivation layer encapsulation and transfer are performed in the unit of pixel unit, which improves the transfer efficiency, reduces the probability of product damage during the transfer process, and can improve the yield and use experience of the display device.
  • All sub-pixels in each pixel unit can share one electrode, which can reduce the total number of electrodes in the display panel, simplify the number of electrodes that need to be soldered when transferring the pixel unit to a substrate with a drive circuit, improve process efficiency, and improve the display panel And the yield of the display device.
  • the present application also provides a method for manufacturing a display panel.
  • the manufacturing method includes the following steps:
  • the wafer including an LED layer
  • the pixel unit with the passivation layer is transferred to the substrate with the driving circuit to form a display panel.
  • the method for preparing the display panel in this solution can be transferred to a substrate with a driving circuit in units of pixel units, which can improve transfer efficiency, reduce damage caused by the transfer process of pixel units, and improve the yield of the display panel.
  • an LED layer can be formed on the substrate, and then the first electrode and the second electrode can be prepared, and then the above-mentioned LED layer can be cut to form an independent LED, and then a light-shielding wall can be prepared between the LEDs to prevent phases.
  • the adjacent LED has a problem of light mixing.
  • the color functional layer is prepared on the surface of the LED layer, and the equipment for preparing the wafer can be directly used to prepare the color functional layer, which is beneficial to increase the density of the prepared sub-pixels, reduce equipment investment, and reduce costs.
  • the above steps of preparing the wafer may also include:
  • An LED layer is prepared on the surface of the substrate, and the side of the LED layer away from the substrate is a reflective layer;
  • a first electrode and a second electrode are formed on the surface of the reflective layer facing away from the substrate.
  • the reflective layer is prepared on the LED layer, which can reflect the light emitted by the LED to the light-emitting side, and improve the utilization efficiency of the light.
  • the above-mentioned reflective layer can be a metal reflective layer or the first distributed Rager mirror layer.
  • the first distributed Rager mirror layer is selected as the reflective layer, there is no need to consider the problem of short circuits, and the product reliability is high. .
  • the above steps of preparing the wafer may also include:
  • a second distributed Rager mirror layer is prepared on the side of the LED layer facing the color functional layer.
  • the second distributed Rager mirror layer can transmit blue light and reflect red and green light, which can improve the color saturation of the pixel unit.
  • the above step of preparing the wafer may further include: preparing an insulating layer at each LED setting position using an ion implantation process, so that the LEDs form at least two sub-LEDs connected in parallel.
  • the sub-pixels can form at least two sub-pixels connected in parallel. Therefore, when one of the sub-pixels is open or short-circuited, the other sub-pixels in the sub-pixel can be kept in working state, so as to improve the reliability and service life of the sub-pixel.
  • the above step of preparing the wafer may further include:
  • the step of preparing the wafer includes: cutting the LED layer to form a plurality of LEDs, and preparing an aluminum light-shielding wall between the LEDs;
  • the step of preparing a color functional layer on the surface of the LED layer, and forming sub-pixels of multiple colors includes: preparing an aluminum light-shielding wall between the sub-pixels.
  • the surface of the aluminum shading wall has high light reflectivity. Therefore, the light emitted by the sub-pixel encounters the aluminum light-shielding wall, which can cause more light to be reflected inside the sub-pixel, thereby helping to improve the brightness and luminous efficiency of the sub-pixel.
  • the aluminum light-shielding wall may be electrically connected to the first electrode or the second electrode of the sub-pixel.
  • the aluminum light-shielding wall is used as the conductive trace, which can reduce the setting of the conductive trace when preparing the pixel unit, simplify the process, and reduce the cost.
  • one of the first electrode and the second electrode of the pixel unit are located on the same side of the sub-pixel, one of the first electrode and the second electrode needs to be connected to the LED layer by a wire passing through the thickness direction of the LED layer.
  • the above-mentioned aluminum light-shielding wall needs to be electrically connected to the electrodes of the above-mentioned traces passing through the thickness direction of the LED layer, so that there is no need to make additional conductive traces through the LED layer, which is beneficial to increase the ratio of LEDs to the display panel. It is beneficial to improve the luminous efficiency and display effect.
  • the foregoing preparation of the wafer may also include preparing an LED layer, the LED layer including an N-type region layer, a multiple quantum well layer, and a P-type region layer arranged in sequence; cutting the foregoing N-type region layer and the foregoing multiple quantum well layer; in this solution,
  • the P-type zone layer can be retained as a whole P-type zone layer.
  • the pixel unit can share the P-type electrode, and the P-type electrode can be connected to the P-type region layer, which is beneficial to the preparation of the P-electrode.
  • the P electrode can be electrically connected to the middle of the P-type zone layer, so that the electrons of the pixel unit will not easily flow to the edge of the sub-pixel, which can reduce the risk of leakage of the sub-pixel.
  • the above preparation of the wafer may also include preparation of an LED layer, the LED layer including an N-type region layer, a multiple quantum well layer, and a P-type region layer arranged in sequence; cutting the above-mentioned P-type region layer and the above-mentioned multiple quantum layer
  • the well layer retains the N-type region layer as a whole N-type region layer.
  • the sub-pixels of the above-mentioned pixel unit include at least red sub-pixels and green sub-pixels, and may also include blue sub-pixels and/or white sub-pixels. Since the red sub-pixels have lower luminous efficiency when the size is small, the number of red sub-pixels can be greater than the number of green sub-pixels. For example, the sub-pixels may include two red sub-pixels, one green sub-pixel, and one blue sub-pixel. Therefore, the luminous efficiency of each sub-pixel of the pixel unit can be more consistent, and the color saturation of the display panel can be improved.
  • each sub-pixel in each pixel unit can share one electrode, that is, one end of each sub-pixel in the pixel unit is connected to a first electrode, and the other end shares a second electrode. Since the pixel is used as a unit for packaging and transfer in this solution, each sub-pixel in the pixel unit is designed as a common electrode structure, which can reduce the total number of electrodes in the display panel and simplify the transfer of the pixel unit to a substrate with a drive circuit. , The number of electrodes that need to be welded improves the process efficiency and can also increase the yield of the display panel. In addition, the cost of preparing electrodes can also be reduced.
  • FIG. 1 is a schematic diagram of a structure of a display device in an embodiment of the application
  • FIG. 2 is a schematic diagram of a partial structure of a display panel in an embodiment of the application.
  • FIG. 3 is a schematic diagram of a structure of a sub-pixel in an embodiment of the application.
  • FIG. 5 is a schematic diagram of a structure of a pixel unit in an embodiment of the application.
  • FIG. 6 is a schematic diagram of a cross-sectional structure of a pixel unit in an embodiment of the application.
  • FIG. 7 is a schematic diagram of a cross-sectional structure of a light-emitting diode layer in an embodiment of the application.
  • FIG. 8 is a schematic diagram of another cross-sectional structure of a pixel unit in an embodiment of the application.
  • FIG. 9 is a schematic flowchart of a method for manufacturing a display panel in an embodiment of the application.
  • FIG. 10 is a schematic diagram of a process for preparing a wafer in an embodiment of the application.
  • FIG. 11a to 11h are structural schematic diagrams of the manufacturing process of the display panel in the embodiment of the application.
  • FIG. 12 is a schematic diagram of a cross-sectional structure of a light emitting diode in an embodiment of the application.
  • FIG. 13 is a schematic diagram of another cross-sectional structure of a light-emitting diode in an embodiment of the application.
  • FIG. 14 is a schematic diagram of a structure of a light emitting diode in an embodiment of the application.
  • FIG. 15 is a schematic diagram of a structure of a pixel unit in an embodiment of the application.
  • 19-LED layer 191-Light-emitting function layer;
  • the display panel provided by the embodiments of the present application can be applied to any display device with display function.
  • the above display device can be a common mobile terminal such as a mobile phone, a tablet computer, or an electronic paper book, or other electronic display devices, such as a notebook computer and a television. Or equipment display screen, etc.
  • Micro LED Minute Light Emitting Diode
  • Micro LED technology has shown great interest in Micro LED in terms of optical efficiency, brightness, response speed and reliability. The attention of technology is also getting higher and higher.
  • an LED board can be prepared first, and then a color conversion material layer can be prepared on the surface of the above-mentioned LED board to prepare a colorful display panel.
  • inkjet printing there are two main technical routes for covering the color conversion material layer on the LED: inkjet printing and photolithography.
  • the existing inkjet printing equipment can achieve a pixel density of about 200ppi, which is far from meeting the display requirements of current portable electronic products such as smart phones, smart watches, and tablet computers.
  • expensive photolithography equipment needs to be added, which requires a large investment and low efficiency.
  • the present application provides a display panel, a display device, and a manufacturing method of the display panel to increase the pixel density of the display panel, reduce manufacturing costs, and improve manufacturing efficiency and product yield.
  • FIG. 1 is a schematic structural diagram of the display device in the embodiment of the application.
  • the specific type of the display device is not limited. It can be a common mobile terminal such as a mobile phone, a tablet computer, or an electronic paper book, or other electronic display settings, such as a notebook. Computer, TV or equipment monitor, etc.
  • the display device 100 includes a display panel 200, a middle frame 300, a rear case 400 and a printed circuit board 500.
  • the above-mentioned display panel 200 is electrically connected to the printed circuit board 500, and the display panel 200 and the printed circuit board 500 are disposed on both sides of the middle frame 300, and the middle frame 300 is used to carry the printed circuit board and the display panel.
  • the aforementioned rear case 400 is located on the side of the printed circuit board 500 away from the middle frame 300 and can also be fixed to the middle frame 300.
  • the above-mentioned display panel 200 may be a Micro LED (miniature light emitting diode) display panel 200.
  • 2 is a schematic diagram of a partial structure of a display panel in an embodiment of the application. As shown in FIG.
  • the display panel 200 includes a plurality of pixel units 10, and each pixel unit 10 includes at least three color sub-pixels 11, specifically
  • the pixel unit 10 may include a red sub-pixel 112, a green sub-pixel 113, and a blue sub-pixel 114; or, the pixel unit 10 may also include a red sub-pixel 112, a green sub-pixel 113, a blue sub-pixel 114, and a white sub-pixel.
  • the above-mentioned sub-pixels 11 of at least three colors are encapsulated by the passivation layer 12 into a pixel unit 10.
  • an LED wafer When preparing the above-mentioned display panel 200, an LED wafer may be prepared first, and then a color functional layer of the sub-pixel 11 may be prepared on the surface of the LED wafer, for example, including a light conversion material layer, so as to realize the color display of the display panel 200. Therefore, this solution can use the lithography equipment for preparing LED wafers to prepare the above-mentioned color functional layer, and can prepare higher density pixels on the wafer, and there is no need to prepare additional equipment to make the color functional layer of the display panel, which is beneficial to Reduce manufacturing costs.
  • the passivation layer 12 is packaged and transferred with the pixel unit 10 as a unit. Compared with the transfer of a single sub-pixel 11, the number of transfers is greatly reduced, and the probability of product damage during the transfer process is reduced, which is beneficial to improve Manufacturing efficiency and product yield.
  • each display panel 200 the arrangement of the sub-pixels 11 of each pixel unit 10 may be the same, or may also be different, which is not specifically limited in this application. As shown in FIG. 2, the arrangement of the sub-pixels 11 of each pixel unit 10 is different.
  • the material of the light conversion material layer can also be selected according to requirements, for example, quantum dot materials, phosphors, or organic fluorescent dyes, etc., which are not specifically limited in this application.
  • FIG. 3 is a schematic diagram of a structure of a sub-pixel in an embodiment of the application.
  • the The sub-pixel 11 may include at least two sub-pixels 111, and the above-mentioned at least two sub-pixels 111 are arranged in parallel.
  • FIG. 4 is a circuit connection diagram of two sub-pixels 111 in an embodiment of the application.
  • the aforementioned sub-pixel 11 may include a first sub-pixel 1111 and a second sub-pixel 1112, and further include a first electrode 13 and a second electrode 14.
  • the first sub-pixel 1111 and the second sub-pixel 1112 are connected in parallel between the first electrode 13 and the second electrode 14. Therefore, this solution can reduce the probability that the sub-pixel 11 cannot be lit.
  • the second sub-pixel 1112 is still connected between the first electrode 13 and the second electrode 14, and can maintain the working state, and the power of the second sub-pixel 1112 can be doubled, and the brightness can be doubled. Therefore, the brightness of the sub-pixel 11 can also be ensured, so that the sub-pixel 11 can work normally. If a short circuit occurs in the first sub-pixel 1111, a laser can be used to cut off the circuit where the first sub-pixel 1111 is located, so that the first sub-pixel 1111 is disconnected. In this way, the second sub-pixel 1112 can still maintain the working state, and the power of the second sub-pixel 1112 can be doubled, and the brightness can be increased.
  • the brightness of the sub-pixel 11 can be guaranteed to make the sub-pixel 11 work normally. Therefore, in this solution, the service life and yield of the sub-pixel 11 are improved, and the repair rate is higher, thereby reducing the cost of the display panel 200. The service life and user experience of the display device 100 can also be improved.
  • FIG. 5 is a schematic structural diagram of a pixel unit in an embodiment of the application.
  • the pixel unit 10 includes a first electrode 13 and a second electrode 14.
  • the first electrode 13 and the second electrode 14 may be located in a sub-pixel. 11 on the same side.
  • Each sub-pixel 11 in each pixel unit 10 can also be designed with a common electrode, that is, one end of all sub-pixels 11 in the pixel unit 10 shares a second electrode 14, and the other end of each sub-pixel 11 is connected to a first electrode. 13.
  • the pixel unit 10 is used as the unit to perform the final cutting and transfer, it can be realized that all the sub-pixels 11 of the pixel unit 10 share a second electrode 14, and the total number of electrodes of the display panel 200 can be reduced, which is beneficial to reducing
  • the pixel unit 10 is transferred to a substrate with a driving circuit, the number of welding electrodes is required, which can improve process efficiency and reduce defects during welding.
  • the cost of preparing electrodes can also be reduced.
  • the first electrode 13 may be a P electrode and the second electrode 14 may be an N electrode; or the first electrode 13 may be an N electrode, and the first electrode 13 may be a P electrode, which is not specifically limited in this application.
  • the pixel unit 10 includes at least a red sub-pixel 112, a green sub-pixel 113 and a blue sub-pixel 114. Since the red sub-pixel 112 has a lower luminous efficiency when its size is small, the number of red sub-pixels 112 is greater than the number of green sub-pixels 113, and the number of green sub-pixels 113 may be equal to the number of blue sub-pixels 114. For example, in the embodiment shown in FIG. 5, the pixel unit 10 may include two red sub-pixels 112, one green sub-pixel 113, and one blue sub-pixel 114.
  • the number of the red sub-pixel 112 can be increased so that the The efficiency of the sub-pixels 11 is relatively consistent.
  • the sub-pixel 11 has a light-shielding barrier 18 on the peripheral side.
  • the sub-pixels 11 can prevent the problem of light mixing between adjacent sub-pixels 11, and on the other hand, the sub-pixels 11 can be insulated from each other. , So that the sub-pixels 11 remain independent.
  • the material of the aforementioned light-shielding wall 18 is not specifically limited. For example, it may be a polymer material, metal or metal compound, etc. The material of the light-shielding wall 18 only needs to have light-shielding properties.
  • FIG. 6 is a schematic diagram of a cross-sectional structure of a pixel unit in an embodiment of the application.
  • An aluminum light-shielding wall 181 is provided on the peripheral side of the sub-pixel 11, and the surface of the aluminum light-shielding wall 181 has a relatively high light reflectivity. Therefore, the light emitted by the sub-pixel 11 encounters the aluminum light-shielding wall 181, which can cause more light to be reflected inside the sub-pixel 11, thereby helping to improve the brightness and luminous efficiency of the sub-pixel 11.
  • the sub-pixel 11 may include an LED layer 19 and a color function layer 190.
  • the LED layer 19 mainly generates light with a certain brightness.
  • the color function layer 190 on the surface of the LED layer 19 can convert the light of the LED layer 19 into color. Light to realize the color display of the display panel 200.
  • the above-mentioned aluminum light-shielding wall 181 can increase the brightness of the LED layer 19 on the one hand, and on the other hand, it can also increase the conversion efficiency of the color functional layer 190 to light, thereby increasing the brightness and luminous efficiency of the sub-pixels 11, and improving the display panel 200 display effect.
  • the aluminum light-shielding wall 181 may be connected to the first electrode 13 or the second electrode 14 of the sub-pixel 11.
  • the aluminum light-shielding wall 181 is used as a conductive trace, which can reduce the number of pixel units 10.
  • the setting of conductive traces simplifies the process and reduces the cost.
  • the above-mentioned aluminum light-shielding wall 181 needs to be electrically connected to the electrodes of the above-mentioned wires passing through the thickness direction of the LED layer 19, so that there is no need to make additional conductive wires passing through the LED layer 19, which is beneficial to improve the LED
  • the ratio of the display panel 200 is beneficial to improve the luminous efficiency and display effect.
  • each sub-pixel 11 in each pixel unit 10 can also be designed with a common electrode, that is, one end of all sub-pixels 11 in the pixel unit 10 shares a second electrode 14, and each sub-pixel 11 The other ends are respectively connected to a first electrode 13.
  • an aluminum light-shielding wall 181 is arranged between adjacent sub-pixels 11, the above-mentioned aluminum light-shielding wall 181 can be connected to the second electrode 14, so that one end of each sub-pixel 11 of the pixel unit 10 shares a second electrode 14.
  • the above-mentioned aluminum light-shielding wall 181 can also be used as a wiring for connecting the common electrode to reduce additional conductive wiring.
  • the above-mentioned LED layer 19 may be a blue LED layer or an ultraviolet LED layer, which is not specifically limited in this application.
  • the color functional layer 190 corresponding to the red sub-pixel 112 is provided with a red light conversion material
  • the color functional layer 190 corresponding to the green sub-pixel 113 is provided with a green light conversion material.
  • the color functional layer 190 corresponding to the blue sub-pixel 114 does not need to be provided with a light conversion material, only a transparent film layer is required to make the color functional layer 190 have better overall flatness.
  • the transparent film layer described above may specifically be a silica gel layer.
  • FIG. 7 is a schematic diagram of a cross-sectional structure of a light emitting diode layer in an embodiment of the application.
  • the LED layer 19 of the aforementioned pixel unit 10 may include an N-type region layer 15, a multiple quantum well layer 16 and a P-type region layer 17 arranged in sequence, with light shielding walls between adjacent sub-pixels 11.
  • the light-shielding wall can extend in a direction substantially perpendicular to the LED layer 19, and pass through the P-type region layer 17 and the multiple quantum well layer 16, and connect the P-type region layer 17 of adjacent sub-pixels 11 It is insulated and light-shielded, and adjacent multiple quantum well layers 16 are insulated and light-shielded.
  • the N-type zone layer 15 of the pixel unit 10 is an integral structure, that is, the N-type zone layer 15 of each sub-pixel 11 of the pixel unit 10 is an integrally formed structure.
  • the light-shielding wall can be extended into the N-type region layer 15 to a set depth, so as to ensure that the light-shielding wall can be used to connect the multiple quantum well layer 16 Isolation improves the working reliability of the LED.
  • the N electrode can be a common electrode, and each sub-pixel 11 of the pixel unit 10 shares the same N electrode. Since the N-type region layer 15 of the pixel unit 10 has an integral structure, it is advantageous to prepare an N electrode. In addition, the N electrode can be electrically connected to the middle of the N-type zone layer 15, so that the electrons of the pixel unit 10 will not easily flow to the edge of the sub-pixel 11, and the risk of leakage of the sub-pixel 11 can be reduced.
  • the light-shielding wall can also extend in a direction substantially perpendicular to the LED layer 19, and pass through the N-type zone layer 15 and the multiple quantum well layer 16, so as to connect the N-type zone of the adjacent sub-pixel 11
  • the layers 15 are insulated and light-shielded, and adjacent multiple quantum well layers 16 are insulated and light-shielded.
  • the P-type zone layer 17 of the pixel unit 10 is an integral structure, that is, the N-type zone layer 15 of each sub-pixel 11 of the pixel unit 10 is an integrally formed structure.
  • the light-shielding wall can be extended into the P-type region layer 17 to a set depth, so as to ensure that the light-shielding wall can be used to connect the multiple quantum well layer 16 Isolation improves the working reliability of the LED.
  • This solution uses the P electrode as the common electrode, which has similar technical effects to the above-mentioned embodiment, and will not be repeated here.
  • FIG. 8 is a schematic diagram of another cross-sectional structure of a pixel unit in an embodiment of the present application.
  • the pixel unit 10 includes an LED layer 19 and a color functional layer 190.
  • the above-mentioned LED layer 19 includes a light-emitting functional layer 191 and a first distributed Rager mirror layer 192.
  • the first distributed Rager mirror layer 192 is located on the light-emitting functional layer 191.
  • the side facing away from the color function layer is the side facing away from the color function layer 190 of the LED layer 19.
  • the above-mentioned first distributed Rager mirror layer 192 can reflect blue light, thereby improving the luminous efficiency of the LED.
  • the above-mentioned first distributed Rager reflector layer 192 as a reflective layer is arranged on the side of the LED away from the color function layer. Since the first distributed Rager reflector layer 192 is made of insulating material, the risk of short circuit is low, which is beneficial to Improve the reliability of the display panel.
  • the above-mentioned reflective layer may also be a metal reflective layer, such as a reflective layer made of metal aluminum, etc., which is not specifically limited in this application.
  • the above-mentioned first distributed Rager reflector layer 192 adopts two materials with different refractive indexes (for example, silicon dioxide and titanium dioxide), which are sequentially superimposed in a mutually spaced manner.
  • the optical thickness of each layer of material is 1/4 of the central reflection wavelength. .
  • the first distributed Rager mirror layer 192 includes a multilayer structure, and the total thickness is controlled below 5um.
  • the LED layer 19 facing the color functional layer 190 includes a second distributed Rager mirror layer. That is, the second distributed mirror layer is located on the side of the light-emitting function layer 191 facing the color function layer 190.
  • the second distributed Rager mirror layer 193 in this solution can transmit blue light and reflect red light and green light, so as to improve the photoelectric conversion efficiency of the pixel unit 10.
  • the above-mentioned second distributed Rager mirror layer 193 also uses two materials with different refractive indexes (for example, silicon oxide and titanium oxide), which are sequentially superimposed in a mutually spaced manner, forming a multilayer structure.
  • FIG. 9 is a schematic flow chart of the method for manufacturing a display panel in an embodiment of the application; the method for manufacturing the display panel 200 described above specifically includes The following steps:
  • Step S101 prepare a wafer.
  • the above-mentioned wafer includes an LED layer.
  • FIG. 10 is a schematic diagram of a wafer preparation process in an embodiment of the application, which specifically includes:
  • Step S1011 preparing a light emitting diode (LED) layer 21 on the surface of the substrate 30, as shown in FIG. 11a;
  • the above-mentioned substrate 30 may be a sapphire substrate 30.
  • the cost of the sapphire substrate 30 is relatively low, and the crystal lattice of the material for preparing the LED layer 21 is more suitable, which is beneficial to the formation of the LED layer 21.
  • the aforementioned substrate 30 may also be a silicon substrate 30, a silicon carbide substrate 30 or a glass substrate 30, which is not limited in this application.
  • the specific process of preparing the LED layer 21 on the surface of the substrate 30 may include:
  • a buffer layer 211 (GaN Buffer, gallium nitride buffer layer) is fabricated on the surface of the substrate 30, and the thickness of the buffer layer 211 may be 15 nm;
  • LEDs 218 are sequentially grown on the surface of the buffer layer 211 away from the substrate 30, taking a blue LED as an example:
  • a GaN layer 212 (undoped GaN, undoped gallium nitride layer) is grown on the surface of the buffer layer 211 away from the substrate 30, and the thickness of the GaN layer 212 may specifically be 2 um.
  • the air pressure during the growth process can specifically be 500-700 mBar, V/III is 2000-5000, and the growth rate is 3-15 nm/min.
  • V/III refers to the molar ratio of the fifth main group element N to the third main group element Ga; the growth rate refers to the increase in the thickness of the generated material within a certain period of time;
  • an N-doped GaN layer 213 (N doped GaN, gallium nitride doped with N-type material) is grown on the surface of the GaN layer 212 away from the buffer layer 211.
  • the thickness can be 2um.
  • the air pressure during the growth process can be specifically 200-400mBar, V/III is 6000-10000, and the growth rate is 0.5-8um/h;
  • a multiple quantum well layer 214 (Muti Quantum Well) is grown on the surface of the N-type doped GaN layer 213 away from the GaN layer 212.
  • the multiple quantum well layer 214 is made of GaN (gallium nitride) and InGaN ( Indium gallium nitride) is formed after stacking.
  • the specific number of layers of the multiple quantum well layer 214 is not limited, but the uppermost layer and the lowermost layer are both GaN, and adjacent quantum wells can multiplex one GaN.
  • the thickness of the aforementioned InGaN may be 3 nm, and the thickness of GaN may be 7 nm.
  • the air pressure during the growth process is 200-400mBar, the V/III is 12000-30000, and the growth rate is 0.5-3um/h;
  • a P-type AlGaN layer 215 (P-AlGaN Electron block layer) is grown on the surface of the multiple quantum well layer 214 away from the N-type doped GaN layer 213.
  • the P-type AlGaN layer 215 is an electron blocking layer, which is used to avoid electron overcurrent and improve luminous efficiency.
  • the thickness of the P-type AlGaN layer 215 may be 80 nm.
  • the air pressure during the growth process can be 50 ⁇ 300mBar, the V/III can be 2000 ⁇ 5000, and the growth rate can be 0.5 ⁇ 2um/h;
  • a P-type doped GaN layer 216 (P doped GaN, gallium nitride doped with a P-type material) is grown on the surface of the P-type AlGaN layer 215 away from the multiple quantum well layer 214.
  • the thickness can be 150 nm.
  • the air pressure during the growth process is 200-400mBar, the V/III is 6000-10000, and the growth rate is 0.5-8um/h;
  • a transparent electrode 217 such as an indium tin oxide film, is vapor-deposited by an evaporation process, and the thickness may be, for example, 1 um.
  • Step S1012 preparing a plurality of first electrodes 22 and a plurality of second electrodes 23 electrically connected to the LED layer 21 on the side of the LED layer 21 away from the substrate 30, as shown in FIG. 11b;
  • the first electrode 22 and the second electrode 23 are arranged on the same side of the LED layer 21, that is, a flip-chip structure.
  • the number of wires required when the electrode 23 is connected to a substrate with a driving circuit is convenient for installation.
  • the material of the first electrode 22 and the second electrode 23 may be multiple alloy metals, such as SnAg alloy or NiPtAu alloy, which is not specifically limited in this application.
  • a mask with a predetermined structure can be provided on the side of the LED layer 21 away from the substrate 30, and the first electrode 22 and the second electrode 23 can be formed by evaporation.
  • Step S1013 fixing the electrode side of the wafer to the flat plate 40, and peeling off the substrate 30, as shown in FIG. 11c;
  • the above-mentioned wafer can be bonded to the flat disk 40 with glue 50, and the above-mentioned substrate 30 can be peeled off by a laser cutting process.
  • Step S1014 cutting the LED layer 21 to separate the multiple LEDs 218 to form multiple LEDs 218, as shown in FIG. 11d;
  • an ICP process can be used to etch the area between the above-mentioned multiple LEDs 218 to divide the LED 218 to form multiple LEDs 218 that can be driven independently.
  • step S1015 a first light-shielding wall 219 is prepared between the LEDs 218 to block the light between the adjacent LEDs 218, as shown in FIG. 11e;
  • the black photoresist resin When the LED layer 21 is cut, there is a gap between the LEDs 218, and the black photoresist resin can be filled in the gap by spin coating, and then the black photoresist resin in the gap area between the LEDs 218 can be cured by the mask. Then, the excess black photoresist resin is washed away, and the above-mentioned first light-shielding wall 219 can be formed to prevent the light between different LEDs 218 from diffusing each other.
  • the material for preparing the first light-shielding wall 219 is not limited. For example, it may be a polymer material, metal or metal compound, etc. The material of the first light-shielding wall 219 only needs to have light-shielding properties.
  • Step S102 preparing a color functional layer 2110 on the surface of the above-mentioned LED layer 21 to form sub-pixels of multiple colors, as shown in FIG. 11f;
  • a color functional layer 2110 can be prepared on the side of the LED 218 away from the first electrode 22 to form a red sub-pixel, a green sub-pixel, and a blue sub-pixel;
  • the color functional layer 2110 is directly prepared, and the lithography equipment for manufacturing the wafer can be used, so that on the basis of improving the preparation accuracy, it can also reduce the cost and reduce the equipment investment.
  • the above-mentioned color functional layer 2110 includes a light conversion material layer, and the material of the light conversion material layer is not limited, and may be quantum dot materials, phosphors, or organic fluorescent dyes. Specifically, a quantum dot material can be selected, and a color film is also provided on the side of the quantum dot material away from the LED218. Specifically, the thickness of the light conversion material layer prepared from the above quantum dot material can be 4um, and the thickness of the color film can be 2um.
  • the process of preparing the light conversion material layer takes the red sub-pixel as an example. It can be: first spin-coating the red quantum dot material photoresist on the surface of the whole wafer, and then use the photoresist to adjust the required position (red sub-pixel Corresponding above the LED218) is photo-cured, and finally the uncured red quantum dot material photoresist is washed off.
  • the color film can be prepared on the side of the light conversion material layer away from the LED layer 21 by using the same manufacturing process as the red sub-pixel.
  • a second light-shielding wall 2111 can be formed between adjacent sub-pixels to prevent the light between different sub-pixels from diffusing each other.
  • the material for preparing the second light-shielding wall 2111 is not limited. For example, it can be a polymer material, metal or metal compound. The material of the second light-shielding wall 2111 only needs to have light-shielding properties.
  • Step S103 cutting the barrier between the pixel units 24 to form a plurality of independent pixel units 24, the above-mentioned pixel units 24 include at least three color sub-pixels, as shown in FIG. 11g;
  • the aforementioned pixel unit 24 may specifically include red sub-pixels, green sub-pixels, and blue sub-pixels; it may also include red sub-pixels, green sub-pixels, blue sub-pixels, white sub-pixels, etc., which are not specifically limited in this application.
  • the pixel unit 24 is used as a unit for cutting to form an independent pixel unit 24.
  • the above-mentioned pixel unit 24 can be directly transferred to a substrate with a driving circuit without transferring each sub-pixel separately. Significantly reduce the number of transfers.
  • a mask combined with a dry etching process can be used to cut the pixel unit 24 described above.
  • step S104 a passivation layer 25 is prepared on the outer surface of the pixel unit 24, and the sub-pixels of the pixel unit 24 are packaged, as shown in FIG. 11h.
  • the passivation layer 25 may be vapor-deposited on the surface of the chip by means of PECVD (Plasma Enhanced Chemical Vapor Deposition), and the thickness of the passivation layer 25 may be several hundred nanometers thick.
  • the material can be inorganic passivation materials such as silicon dioxide or silicon nitride.
  • step S105 the pixel unit 24 is transferred to a substrate with a driving circuit.
  • the pixel unit 24 is used as a unit to transfer to a substrate with a driving circuit, the number of transfers can be greatly reduced, which is beneficial to improve transfer efficiency and product yield.
  • step S101 may also include a process of preparing a reflective layer.
  • a layer of transparent electrode 217 may be vapor-deposited on the surface of the P-type doped GaN layer 216 away from the AlGaN layer by an evaporation process.
  • the transparent electrode 217 is away from the surface of the P-type doped GaN layer 216 to prepare a first distributed Rager mirror layer 2112 as a reflective layer, as shown in FIG. 12, which is a cross-sectional structure of a light emitting diode in an embodiment of the application Schematic.
  • step S1012 is performed to form a plurality of first electrodes 22 and a plurality of second electrodes 23 on the surface of the first distributed Rager mirror layer 2112 away from the substrate 30.
  • the above-mentioned first distributed Rager mirror layer 2112 can reflect blue light, thereby improving the luminous efficiency of the LED218.
  • the specific process for preparing the above-mentioned first distributed Rager mirror layer 2112 may include: using two materials with different refractive indexes, such as silicon oxide and titanium oxide, which are sequentially superimposed in a mutually spaced form, and the optical thickness of each layer of material is equal to 1/4 of the wavelength of the reflected light.
  • the first distributed Rager mirror layer 2112 includes a multilayer structure, and the total thickness is controlled below 5um.
  • the above-mentioned reflective layer may also be a metal reflective layer, such as an aluminum reflective layer.
  • a metal reflective layer such as an aluminum reflective layer.
  • the second distributed Rager mirror layer 2113 can also be prepared on the side of the LED layer 21 facing the color functional layer 2110.
  • the above-mentioned second distributed Rager mirror layer 2113 may be prepared on the LED layer 21, as shown in FIG. 13, which is a schematic diagram of another cross-sectional structure of a light emitting diode in an embodiment of the application.
  • the second distributed Rager mirror layer 2113 in this solution can transmit blue light and reflect red and green light, which can improve the color saturation of the pixel unit 24.
  • the thickness of the second distributed Rager mirror layer 2113 may be about 2.5 um.
  • the preparation process of the second distributed Rager mirror layer 2113 is substantially the same as the preparation process of the first distributed Rager mirror layer 2112 described above, and will not be repeated in this application.
  • the light-emitting function layer of the LED layer 21 can be located between the first distributed Rager mirror layer 2112 and the second distributed Rager mirror layer 2113, as shown in FIG. 13, in this solution
  • the LED218 has higher luminous efficiency.
  • the sub-pixel includes at least two sub-pixels, and the above-mentioned at least two sub-pixels are arranged in parallel.
  • an ion implantation process can be used to prepare an insulating layer at the set position of each LED218, so that each LED218 forms at least two parallel sub-LED218; in this solution, the above ion implantation process can have insulating properties Ions are implanted into the LED218 to form an insulating layer. For example, helium ions or nitrogen ions can be implanted into the LED to form an insulating layer.
  • a mask When specifically preparing the above-mentioned insulating layer, a mask can be prepared to leak out the part that needs ion implantation, and then a certain dose of He ions can be injected to form an insulating layer with very high insulation and inactivity in the LED218, so that the two insulating layers
  • the LED218 on the side is a sub-LED218, and is connected in parallel.
  • cutting can also be performed at a set position of each LED 218, so that each LED forms at least two parallel LEDs 218. This cutting step can be performed simultaneously with step S1014.
  • the first electrode 22 and the second electrode 23 of the pixel unit 24 may be located on the same side of the sub-pixel.
  • Each sub-pixel in each pixel unit 24 can be designed with a common electrode, that is, one end of all sub-pixels in the pixel unit 24 shares a second electrode 23, and the other end of each sub-pixel is connected to a first electrode 22 respectively.
  • the pixel unit 24 is used as the unit for the final cutting and transfer, it can be realized that all sub-pixels of the pixel unit 24 share a second electrode 23, and the total number of electrodes of the display panel can be reduced, which is beneficial to reducing the number of pixel units. 24.
  • the number of welding electrodes required when transferring to a substrate with a drive circuit can improve process efficiency and reduce defects during welding.
  • the cost of preparing electrodes can also be reduced.
  • the first electrode 22 may be a P electrode and the second electrode 23 may be an N electrode; or the first electrode 22 may be an N electrode, and the first electrode 22 may be a P electrode, which is not specifically limited in this application.
  • the pixel unit 24 includes at least a red sub-pixel, a green sub-pixel, and a blue sub-pixel. Since the red sub-pixel has a lower luminous efficiency when its size is small, the number of red sub-pixels is greater than the number of green sub-pixels, and the number of green sub-pixels can be equal to the number of blue sub-pixels.
  • the pixel unit may include two red sub-pixels, one green sub-pixel, and one blue sub-pixel. Since the luminous efficiency of the red sub-pixel with a small size is lower than that of the green sub-pixel or the blue sub-pixel, in order to improve the color saturation, the number of red sub-pixels can be increased to make the efficiency of the sub-pixels of each color More consistent.
  • FIG. 14 is a schematic diagram of a structure of a light emitting diode in an embodiment of the application.
  • the above-mentioned LED layer 21 includes an N-type region layer 2114, a multiple quantum well layer 214, and a P-type region layer 2115 which are sequentially arranged. 214 and P-type zone layer 2115, leaving N-type zone layer 2114 as an overall N-type zone layer.
  • the N-type region layer 2114 can be cut to a set depth to ensure that the multiple quantum well layer 214 can be completely cut off, preventing interference between adjacent LEDs, and improving the operating reliability of the LEDs.
  • the N electrode can be a common electrode, and each sub-pixel of the pixel unit 24 shares the same N electrode. Since the N-type region layer 2114 of the pixel unit 24 has a monolithic structure, it is advantageous to prepare an N electrode. In addition, the N electrode can be electrically connected to the middle of the N-type region layer 2114, so that the electrons of the pixel unit 24 will not easily flow to the edge of the sub-pixel, which can reduce the risk of leakage of the sub-pixel.
  • the multiple quantum well layer 214 and the aforementioned N-type region layer 2114 can be cut, leaving the P-type region layer 2115 as an overall P-type region layer. I will not repeat them here.
  • FIG. 15 is a schematic diagram of a structure of a pixel unit in an embodiment of the application.
  • the barrier wall between the aforementioned sub-pixels may be an aluminum light-shielding barrier wall.
  • an ohmic contact layer 2117 can be prepared on the surface of the LED layer 21, and then the LED layer 21 can be cut to form a plurality of LEDs218, and then an insulating layer 2118 can be prepared on the outer surface of each LED218, and a through hole can be prepared on the surface of the insulating layer 2118;
  • An aluminum light-shielding wall 2116 is prepared on the outer surface, and the aluminum light-shielding wall 2116 is electrically connected to one end of the LED218 through the above-mentioned through hole and ohmic contact layer 2117, and the aluminum light-shielding wall 2116 is etched to form a conductive pattern.
  • a color functional layer 2110 is prepared outside the aluminum light-shielding wall 2116, and then the aluminum light-shielding wall is further completed to isolate the color functional layer 2110 of each sub-pixel, and then a passivation layer 25 is prepared on the outer surface of the pixel unit 24 to form the pixel Unit 24.
  • the surface of the aluminum shading wall has high light reflectivity. Therefore, the light emitted by the sub-pixel encounters the aluminum light-shielding wall, which can reflect more light to the inside of the sub-pixel, thereby helping to improve the brightness and luminous efficiency of the sub-pixel.
  • first electrode 22 and the second electrode 23 may be prepared on one side of the pixel unit 24, and the aluminum light-shielding wall is electrically connected to the first electrode 22 or the second electrode 23.
  • the aluminum light-shielding wall is used as the conductive trace, which can reduce the setting of the conductive trace when preparing the pixel unit 24, simplify the process, and reduce the cost.
  • the first electrode 22 and the second electrode 23 of the pixel unit 24 are located on the same side of the sub-pixel, one of the first electrode 22 and the second electrode 23 needs to use traces that pass through the thickness direction of the LED layer 21 and the LED layer 21. connect.
  • the above-mentioned aluminum light-shielding wall needs to be electrically connected to the electrodes of the above-mentioned wires passing through the thickness direction of the LED layer 21, so that there is no need to make additional conductive wires passing through the LED layer 21, which is beneficial to increase the ratio of LEDs to the display panel. , Is conducive to improving the luminous efficiency and display effect.
  • each sub-pixel in each pixel unit 24 can also be designed with a common electrode, that is, one end of all sub-pixels in the pixel unit 24 shares a second electrode 23, and the other end of each sub-pixel is connected to a first electrode 22, respectively.
  • the above-mentioned aluminum light-shielding wall can be connected to the second electrode 23 to realize that one end of each sub-pixel of the pixel unit 24 shares a second electrode 23, then the above The aluminum shading wall can also be used as a trace to connect the common electrode to reduce additional conductive traces.

Landscapes

  • Engineering & Computer Science (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Led Device Packages (AREA)
  • Led Devices (AREA)
  • Electroluminescent Light Sources (AREA)

Abstract

本申请提供了一种显示面板、显示装置及显示面板的制备方法，该显示面板包括多个像素单元，每个像素单元包括至少三个颜色的子像素，上述像素单元的各个子像素由钝化层封装成一个像素单元，以像素单元为单位进行钝化层封装和转移，与对单个子像素进行转移相比，大大的减少了转移次数，降低了转移过程中导致产品损坏的概率，则有利于提高制造效率和产品良率。此外，每个像素单元中的所有子像素可以共用一个电极，即像素单元中的各个子像素的一端分别连接一个第一电极，另一端共用一个第二电极。可以减少显示面板的电极总数，简化将像素单元转移至具有驱动电路的基板时，需要焊接的电极数量，提高工艺效率，还可以提高显示面板的良率。

Description

显示面板、显示装置及显示面板的制备方法
相关申请的交叉引用
本申请要求在2020年06月10日提交中国专利局、申请号为202010522792.4、申请名称为“显示面板、显示装置及显示面板的制备方法”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及显示装置技术领域，尤其涉及到一种显示面板、显示装置及显示面板的制备方法。
背景技术
随时显示技术的发展，越来越多的场景和设备配置有显示屏，以实现显示功能，且有利于人机交互。特别是移动终端中，显示屏几乎成为了必不可少的配置。因此，显示技术也在不断发展，特别是对于彩色显示技术，不断提高各方面的性能，也还具有较大的提升空间。
现有的显示技术中，比较成熟的技术包括LCD(液晶显示)技术和OLED(有机发光二极管)技术。其中，LCD的显示模组光路较为复杂，且难以实现柔性弯折，且需要利用彩膜片与背光模组配合实现彩色显示，因此，LCD的色彩饱和度难以达到较高的水平。对于OLED的显示模组，目前还存在OLED的解析度、效率、亮度和寿命方向提升困难的问题。而目前Micro LED(微缩型发光二极管)技术在光学效率、亮度、响应速度和可靠性方面，都具有一定的优势，越来越受到业界人士的关注，但是也存在一定的问题。
发明内容
本申请提供了一种显示面板、显示装置及显示面板的制备方法，以利用制备LED晶圆的光刻设备来制备彩色功能层，则可以在晶圆上制备密度较高的像素，且有利于降低制造成本。此外，该方案大大的减少了像素转移次数，降低了转移过程中导致产品损坏的概率，有利于提高制造效率和产品良率。
第一方面，本申请提供了一种显示面板，该显示面板包括多个像素单元，每个像素单元包括至少三个颜色的子像素，例如像素单元包括红色子像素、绿色子像素和蓝色子像素，以实现显示面板的彩色显示；或者，像素单元还可以包括红色子像素、绿色子像素、蓝色子像素和白色子像素，有利于提高显示面板的亮度。上述像素单元的各个子像素由钝化层封装成一个像素单元，从而可以在制备上述显示面板时，先制备LED晶圆，再在LED晶圆的表面制备子像素的彩色功能层。从而该方案可以利用制备LED晶圆的光刻设备来制备上述彩色功能层，则可以在晶圆上制备密度较高的像素，且降低制造成本。此外，以像素单元为单位进行钝化层封装和转移，与对单个子像素进行转移相比，大大的减少了转移次数，降低了转移过程中导致产品损坏的概率，则有利于提高制造效率和产品良率。此外，每个像素单元中的所有子像素可以共用一个电极，即像素单元中的各个子像素的一端分别 连接一个第一电极，另一端共用一个第二电极。由于该方案中以像素为单元进行封装和转移，因此，将像素单元中的各个子像素设计成共电极的结构，可以减少显示面板的电极总数，简化将像素单元转移至具有驱动电路的基板时，需要焊接的电极数量，提高工艺效率，还可以提高显示面板的良率。另外，也可以减少制备电极的成本。
具体的制备上述像素单元时，可以第一电极为N电极，第二电极为P电极；或者，第一电极为P电极，第二电极为N电极，本申请不做具体限制。
在具体制备上述子像素时，可以使子像素具有至少两个分像素，该至少两个分像素并联设置，即每个子像素的所有分像素共用同一组N电极和P电极。因此，当子像素中的一个分像素出现断路时，其余的分像素仍可保持工作，电压升高，使子像素的亮度变化不大。当子像素中的一个分像素出现短路时，可以认为干预将出现短路的分像素切断，形成断路，从而使子像素保持正常工作。该方案可以提高子像素的使用寿命和成品率，也可以提高子像素的修复率，从而降低显示面板的成本，提高用户的使用体验。
上述像素单元的子像素至少包括红色子像素和绿色子像素，还可以包括蓝色子像素和/或白色子像素。由于红色子像素在尺寸较小时，发光效率较低，因此，可以使红色子像素的数量多于绿色子像素的数量。例如可以使子像素包括两个红色子像素、一个绿色子像素和一个蓝色子像素。从而可以使像素单元的各个子像素的发光效率较为一致，提高显示面板的色彩饱和度。
为了防止各个子像素之间出现混光的情况，可以在各个子像素之间设置遮光挡墙。具体的，可以在子像素的周侧设置铝质遮光挡墙，铝质遮光挡墙除了可以遮挡光线以外，具有一定的反光效果，因此可以提高各个子像素的亮度和发光效率。
进一步的技术方案中，还可以使上述铝质遮光挡墙连接子像素的第一电极或者第二电极。铝质遮光挡墙作为导线，可以减少制备像素单元时，导线的设计。特别的，对于像素单元的第一电极和第二电极设置于同一侧的方案，还可以铝质遮光挡墙代替穿过像素单元厚度方向的走线，以提高LED站显示面板的比率，提高显示面板的发光效率和显示效果。
上述像素单元包括有LED层和彩色功能层，其中，LED层包括依次设置的N型区层、多量子阱层和P型区层。像素单元的相邻的子像素中，多量子阱层和P型区层之间具有遮光挡墙，像素单元的N型区层为整体N型区层，该方案中，像素单元的子像素可以共用N电即。将N电极与N型区层连接即可，可以简化N电极与LED的连接结构。此外，可以使N电极与像素单元的N型区层的中间区域连接，则像素单元的电子不易流至子像素的边缘，可以降低子像素漏电的风险。
或者，另一种技术方案中，可以使像素单元的相邻的子像素中，多量子阱层和N型区层之间具有遮光挡墙，像素单元的P型区层为整体P型区层。则该方案以P电极作为共电极，具有与上述技术方案相似的技术效果，此处不进行赘述。
上述像素单元包括LED层和彩色功能层，LED层背离彩色功能层的一侧包括反射层。该反射层可以将LED层发出的射向反射层的光线反射至彩色功能层，以提高光线利用效率。上述反射层具体可以为第一分布式拉格反射镜层，或者金属反射层，具体类型可以根据需求进行设计。
在LED层朝向彩色功能层的一侧还可以设置第二分布式拉格反射镜层，该第二分布式拉格反射镜层可以透过蓝光，反射红光和绿光，以提高像素单元的光电转换效率。
第二方面，本申请还提供了一种显示装置，该显示装置包括中框、后壳、印制电路板 以及上述任一技术方案中的显示面板。在具体安装上述显示装置时，印制电路板和显示面板设置与中框的两侧，该中框用于承载上述印制电路板和显示面板，后壳安装于印制电路板背离中框的一侧，具体可以与中框固定连接。该显示装置的显示面板的像素单元的各个子像素由钝化层封装成一个像素单元，该方案可以利用制备LED晶圆的光刻设备来制备像素单元的彩色功能层，则可以在晶圆上制备密度较高的像素，且降低制造成本。此外，以像素单元为单位进行钝化层封装和转移，提高了转移效率，降低了转移过程中导致产品损坏的概率，可以提高显示装置的良率和使用体验。每个像素单元中的所有子像素可以共用一个电极，可以减少显示面板的电极总数，简化将像素单元转移至具有驱动电路的基板时，需要焊接的电极数量，提高工艺效率，还可以提高显示面板和显示装置的良率。
第三方面，本申请还提供了一种显示面板的制备方法，该制备方法包括以下步骤：
制备晶圆，该晶圆包括LED层；
在LED层表面制备彩色功能层，形成多个颜色的子像素；
切割像素单元之间的挡墙，形成多个独立的像素单元，上述像素单元包括至少三个颜色的子像素；
在像素单元外表面制备钝化层，对像素单元的子像素进行封装；
将具有钝化层的像素单元转移至具有驱动电路的基板，则形成显示面板。
该方案中制备显示面板的方法可以以像素单元为单位转移至具有驱动电路的基板，可以提高转移效率，减少像素单元转移过程造成的损伤，提高显示面板的良率。
在具体制备晶圆时，可以在衬底上形成LED层，然后制备第一电极和第二电极，再切割上述LED层，形成独立的LED，然后在LED之间制备遮光挡墙，以防止相邻的LED出现混光的问题。
制备晶圆后，在LED层表面制备彩色功能层，则可以直接利用制备晶圆的设备，制备上述彩色功能层，有利于提高制备的子像素的密度，减少设备的投入，降低成本。
上述制备晶圆的步骤中还可以包括：
在衬底表面制备LED层，LED层背离所述衬底一侧的为反射层；
在反射层背离衬底的一侧表面形成第一电极与第二电极。
在LED层制备反射层，可以将LED发出的光线反射至出光侧，提高光线的利用效率。具体的上述反射层可以为金属反射层，也可以为第一分布式拉格反射镜层，当选择第一分布式拉格反射镜层作为反射层时，无需考虑短路问题，产品可靠性较高。
上述制备晶圆的步骤中还可以包括：
在上述LED层朝向彩色功能层的一侧制备第二分布式拉格反射镜层。
该方案中，第二分布式拉格反射镜层可以透过蓝光，反射红光和绿光，可以提高像素单元的色彩饱和度。
此外，为了提高子像素的使用寿命和可靠性，上述制备晶圆的步骤中还可以包括：在每个LED设定位置采用离子注入工艺制备绝缘层，使LED形成至少两个并联的分LED。该方案中，两个分LED并联，则完成子像素制备时，可以使子像素形成至少两个并联的分像素。从而当其中一个分像素出现断路或者短路时，都可以使子像素中其它的分像素能够保持工作状态，以提高子像素工作的可靠性和使用寿命。
或者，为了使子像素形成至少两个并联的分像素，上述制备晶圆的步骤中还可以包括：
在每个LED设定位置切割，使LED形成至少两个并联的分LED。
在制备显示面板时，还可以使相邻的子像素之间具有铝质遮光挡墙，具体制备时，可以使：
步骤制备晶圆包括：切割LED层形成多个LED，在LED之间制备铝质遮光挡墙；
步骤在所述LED层表面制备彩色功能层，形成多个颜色的子像素包括：在子像素之间制备铝质遮光挡墙。
该方案中，铝质遮光挡墙的表面具有较高的光反射率。从而子像素发出的光线遇到上述铝质遮光挡墙，可以使较多的光线反射至子像素内部，从而有利于提高子像素的亮度和发光效率。
上述铝质遮光挡墙可以与子像素的第一电极或者第二电极电连接。铝质遮光挡墙作为导电走线，则可以减少制备像素单元时，导电走线的设置，简化工艺，降低成本。特别对于像素单元的第一电极和第二电极位于子像素的同一侧时，第一电极与第二电极中的一个电极需要利用穿过LED层厚度方向的走线与LED层连接。具体可以使上述铝质遮光挡墙需要连接上述穿过LED层厚度方向的走线的电极电连接，从而无需额外制作穿过LED层的导电走线，有利于提高LED占显示面板的比率，有利于提高发光效率和显示效果。
上述制备晶圆还可以包括制备LED层，该LED层包括依次设置的N型区层、多量子阱层和P型区层；切割上述N型区层和上述多量子阱层；该方案中，可以保留P型区层作为整体的P型区层。该方案中，可以使像素单元公用P型电极，使P型电极与P型区层连接即可，则有利于制备P电极。此外，可以使P电极与P型区层的中部电连接，则像素单元的电子不易流至子像素的边缘，可以降低子像素漏电的风险。
或者，基于相同的构思，上述制备晶圆还可以包括制备LED层，该LED层包括依次设置的N型区层、多量子阱层和P型区层；切割上述P型区层和上述多量子阱层，保留N型区层作为整体的N型区层。
上述像素单元的子像素至少包括红色子像素和绿色子像素，还可以包括蓝色子像素和/或白色子像素。由于红色子像素在尺寸较小时，发光效率较低，因此，可以使红色子像素的数量多于绿色子像素的数量。例如可以使子像素包括两个红色子像素、一个绿色子像素和一个蓝色子像素。从而可以使像素单元的各个子像素的发光效率较为一致，提高显示面板的色彩饱和度。
每个像素单元中的所有子像素可以共用一个电极，即像素单元中的各个子像素的一端分别连接一个第一电极，另一端共用一个第二电极。由于该方案中以像素为单元进行封装和转移，因此，将像素单元中的各个子像素设计成共电极的结构，可以减少显示面板的电极总数，简化将像素单元转移至具有驱动电路的基板时，需要焊接的电极数量，提高工艺效率，还可以提高显示面板的良率。另外，也可以减少制备电极的成本。
附图说明
图1为本申请实施例中显示装置的一种结构示意图；
图2为本申请实施例中显示面板的一种局部结构示意图；
图3为本申请实施例中子像素的一种结构示意图；
图4为本申请实施例中一个子像素的两个分像素的电路连接图；
图5为本申请实施例中像素单元的一种结构示意图；
图6为本申请实施例中像素单元的一种剖面结构示意图；
图7为本申请实施例中发光二极管层的剖面结构示意图；
图8为本申请实施例中像素单元的另一种剖面结构示意图；
图9为本申请实施例中显示面板的制备方法的流程示意图；
图10为本申请实施例中制备晶圆的流程示意图；
图11a～11h为本申请实施例中显示面板制备过程的结构示意图；
图12为本申请实施例中发光二极管的一种剖面结构示意图；
图13为本申请实施例中发光二极管的另一种剖面结构示意图；
图14为本申请实施例中发光二极管的一种结构示意图；
图15为本申请实施例中像素单元的一种结构示意图。
附图标记：
100-显示装置；                         200-显示面板；
300-中框；                             400-后壳；
500-印制电路板；
10-像素单元；                          11-子像素；
111-分像素；                           1111-第一分像素；
1112-第二分像素；                      112-红色子像素；
113-绿色子像素；                       114-蓝色子像素；
12-钝化层；                            13-第一电极；
14-第二电极；                          15-N型区层；
16-多量子阱层；                        17-P型区层；
18-遮光挡墙；                          181-铝质遮光挡墙；
19-LED层；                             191-发光功能层；
192-第一分布式拉格反射镜层；           193-第二分布式拉格反射镜层；
190-彩色功能层；
21-发光二极管层；                       211-缓冲层；
212-GaN层；                             213-N型掺杂GaN层；
214-多量子阱层；                        215-P型AlGaN层；
216-P型掺杂GaN层；                      217-透明电极；
218-发光二极管；                        219-第一遮光挡墙；
2110-彩色功能层；                       2111-第二遮光挡墙；
2112-第一分布式拉格反射镜层；           2113-第二分布式拉格反射镜层；
2114-N型区层；                          2115-P型区层；
2116-铝质遮光挡墙；                     2117-欧姆接触层；
2118-绝缘层；                           22-第一电极；
23-第二电极；                           24-像素单元；
25-钝化层；                             30-衬底；
40-平盘；                               50-胶。
具体实施方式
为了使本申请的目的、技术方案和优点更加清楚，下面将结合附图对本申请作进一步 地详细描述。
为了方便理解本申请实施例提供的显示面板，下面首先介绍一下其应用场景。
本申请实施例提供的显示面板可以应用于任何具有显示功能的显示装置，上述显示装置可以为手机、平板电脑或者电纸书等常见的移动终端，或者其它电子显示设置，如笔记本电脑、电视机或者设备显示屏等。随着显示技术的发展，人们对显示面板的显示效果以及制备成本等都越来越关注，Micro LED(微缩型发光二极管)技术在光学效率、亮度、响应速度和可靠性方面，业界对Micro LED技术的关注度也越来越高。现有技术中，可以先制备LED板，再在上述LED板的表面制备颜色转换材料层，以制备彩色的显示面板。该方案中，将颜色转换材料层覆盖在LED上主要有喷墨打印与光刻两种技术路线。现有的喷墨打印设备精度能实现的像素密度为200ppi左右，远远不能满足目前智能手机、智能手表、平板电脑等便携电子产品的显示要求。而采用光刻工艺路线时，需要增加昂贵的光刻设备，投资大，效率低。
基于现有技术中存在的上述问题，本申请提供了一种显示面板、显示装置及显示面板的制备方法，以提高显示面板的像素密度，降低制造成本，提高制造效率和产品良率。
以下实施例中所使用的术语只是为了描述特定实施例的目的，而并非旨在作为对本申请的限制。如在本申请的说明书和所附权利要求书中所使用的那样，单数表达形式“一个”、“一种”、“所述”、“上述”、“该”和“这一”旨在也包括例如“一个或多个”这种表达形式，除非其上下文中明确地有相反指示。
在本说明书中描述的参考“一个实施例”或“一些实施例”等意味着在本申请的一个或多个实施例中包括结合该实施例描述的特定特征、结构或特点。由此，在本说明书中的不同之处出现的语句“在一个实施例中”、“在一些实施例中”、“在其他一些实施例中”、“在另外一些实施例中”等不是必然都参考相同的实施例，而是意味着“一个或多个但不是所有的实施例”，除非是以其他方式另外特别强调。术语“包括”、“包含”、“具有”及它们的变形都意味着“包括但不限于”，除非是以其他方式另外特别强调。
图1为本申请实施例中显示装置的一种结构示意图，该显示装置的具体类型不做限制，可以为手机、平板电脑或者电纸书等常见的移动终端，或者其它电子显示设置，如笔记本电脑、电视机或者设备显示器等。该显示装置100包括显示面板200、中框300、后壳400和印制电路板500。上述显示面板200与印制电路板500电连接，且显示面板200和印制电路板500设置于中框300的两侧，该中框300用于承载印制电路板和显示面板。上述后壳400位于印制电路板500背离中框300的一侧，也可以固定于中框300。具体的，上述显示面板200可以为Micro LED(微缩型发光二极管)显示面板200。图2为本申请实施例中显示面板的一种局部结构示意图，如图2所示，该显示面板200包括多个像素单元10，每个像素单元10包括至少三个颜色的子像素11，具体该像素单元10可以包括红色子像素112、绿色子像素113和蓝色子像素114；或者，像素单元10还可以包括红色子像素112、绿色子像素113、蓝色子像素114和白色子像素，以提高像素单元10的亮度。上述至少三个颜色的子像素11由钝化层12封装为一个像素单元10。则在制备上述显示面板200时，可以先制备LED晶圆，再在LED晶圆的表面制备子像素11的彩色功能层，如包括光转换材料层，以实现显示面板200的彩色显示。从而该方案可以利用制备LED晶圆的光刻设备来制备上述彩色功能层，则可以在晶圆上制备密度较高的像素，且无需准备额外的设备来制作显示面板的彩色功能层，有利于降低制造成本。此外，以像素单元10为单位进行钝 化层12封装和转移，与对单个子像素11进行转移相比，大大的减少了转移次数，降低了转移过程中导致产品损坏的概率，则有利于提高制造效率和产品良率。
每个显示面板200中，各个像素单元10的子像素11排布可以相同，或者也可以不同，本申请不做具体限制。如图2所示，各个像素单元10的子像素11的排布就不同。上述光转换材料层的材质也可以根据需求选择，例如可以为量子点材料、荧光粉或者有机荧光染料等，本申请也不做具体限制。
图3为本申请实施例中子像素的一种结构示意图，为了提高子像素11的使用寿命和成品率，提高显示面板200显示的可靠性和显示面板200的使用寿命，本申请实施例中的子像素11可以包括至少两个分像素111，上述至少两个分像素111并联设置。以图3为例，结合图4，图4为本申请实施例中两个分像素111的电路连接图。具体实施例中，上述子像素11可以包括第一分像素1111和第二分像素1112，还包括第一电极13和第二电极14。上述第一分像素1111和第二分像素1112并联于第一电极13和第二电极14之间。从而，该方案可以减少子像素11无法点亮的概率。
若第一分像素1111出现断路的情况，则第二分像素1112仍然连接于第一电极13与第二电极14之间，可以保持工作状态，且第二分像素1112的功率可以翻倍，亮度提升，因此，还可以保证子像素11的亮度，以使该子像素11正常工作。若第一分像素1111出现短路的情况，则可以利用激光切断第一分像素1111所在的电路，以使第一分像素1111断路。从而可以使第二分像素1112仍然保持工作状态，且第二分像素1112的功率可以翻倍，亮度提升，因此，可以保证子像素11的亮度，以使该子像素11正常工作。因此，该方案中，子像素11的使用寿命和成品率得到了提高，且修复率较高，从而降低了显示面板200的成本。也可以提高显示装置100的使用寿命和用户体验。
图5为本申请实施例中像素单元的一种结构示意图，如图5所示，像素单元10包括第一电极13和第二电极14，上述第一电极13和第二电极14可以位于子像素11的同一侧。每个像素单元10中的各个子像素11还可以进行共电极设计，即像素单元10中的所有子像素11的一端共用一个第二电极14，各个子像素11的另一端分别连接一个第一电极13。该方案中，由于以像素单元10为单位进行最后的切割和转移，因此可以实现像素单元10的所有子像素11共用一个第二电极14，则可以减少显示面板200的电极的总数，有利于减少像素单元10转移至具有驱动电路的基板时需要焊接电极的数量，既可以提高工艺效率，减少焊接时出现不良的情况。此外，也可以降低制备电极的成本。
具体的实施例中，可以使第一电极13为P电极，第二电极14为N电极；或者第一电极13为N电极，第一电极13为P电极，本申请不做具体限制。
请继续参考图5，像素单元10至少包括红色子像素112、绿色子像素113和蓝色子像素114。由于红色子像素112尺寸较小时，其发光效率较低，因此，红色子像素112的数量大于绿色子像素113的数量，绿色子像素113的数量可以等于蓝色子像素114的数量。例如，如图5所示的实施例中，像素单元10可以包括两个红色子像素112、一个绿色子像素113和一个蓝色子像素114。由于尺寸小的红色子像素112的发光效率与绿色子像素113或者蓝色子像素114相比，发光效率较低，为了提高色彩饱和度，可以增加红色子像素112的数量，以使各个颜色的子像素11的效率较为一致。
本申请实施例中，子像素11的周侧具有遮光挡墙18，一方面可以防止相邻的子像素11之间出现混光的问题，另一方面还可以使各个子像素11之间绝缘设置，使子像素11保 持独立。具体的，上述遮光挡墙18的材质不做具体限制，例如可以为高分子材料、金属或者金属化合物等等，遮光挡墙18的材料只需具有遮光性即可。
请参考图6，图6为本申请实施例中像素单元的剖面结构示意图。子像素11周侧具有铝质遮光挡墙181，铝质遮光挡墙181的表面具有较高的光反射率。从而子像素11发出的光线遇到上述铝质遮光挡墙181，可以使较多的光线反射至子像素11内部，从而有利于提高子像素11的亮度和发光效率。具体的，上述子像素11可以包括LED层19和彩色功能层190，上述LED层19主要产生具有一定亮度的光线，位于LED层19表面的彩色功能层190可以将LED层19的光线转换为彩色光线，以实现显示面板200的彩色显示。上述铝质遮光挡墙181一方面可以提高LED层19的亮度，另一方面，也可以增强彩色功能层190对光线的转换效率，进而提高子像素11的亮度和发光效率，提高显示面板200的显示效果。
具体的实施例中，铝质遮光挡墙181可以连接子像素11的第一电极13或者第二电极14，该方案中，铝质遮光挡墙181作为导电走线，则可以减少制备像素单元10时，导电走线的设置，简化工艺，降低成本。像素单元10的第一电极13和第二电极14位于子像素11的同一侧时，第一电极13与第二电极14中的一个电极需要利用穿过LED层19厚度方向的走线与LED层19连接，具体，可以使上述铝质遮光挡墙181需要连接上述穿过LED层19厚度方向的走线的电极电连接，从而无需额外制作穿过LED层19的导电走线，有利于提高LED占显示面板200的比率，有利于提高发光效率和显示效果。
此外，如图5所示，每个像素单元10中的各个子像素11还可以进行共电极设计，即像素单元10中的所有子像素11的一端共用一个第二电极14，各个子像素11的另一端分别连接一个第一电极13。当相邻子像素11之间设置铝质遮光挡墙181时，可以使上述铝质遮光挡墙181与第二电极14连接，以实现像素单元10的各个子像素11的一端共用一个第二电极14，则上述铝质遮光挡墙181还可以作为连接共用电极的走线，以减少额外的导电走线。
可选实施例中，上述LED层19可以为蓝光LED层，也可以为紫外光LED层，本申请不做具体限制。当上述LED层19为蓝光LED层时，红色子像素112对应的彩色功能层190设置有红色光转换材料，绿色子像素113对应的彩色功能层190设置有绿色光转换材料。而蓝色子像素114对应的彩色功能层190无需设置光转换材料，只需设置透明膜层使彩色功能层190整体平整性较好即可，例如，上述透明膜层具体可以为硅胶层。
请参考图7，图7为本申请实施例中发光二极管层的一种剖面结构示意图。上述像素单元10的LED层19可以包括依次设置的N型区层15、多量子阱层16以及P型区层17，相邻的子像素11之间具有遮光挡墙。该方案中，可以使遮光挡墙在大致垂直于LED层19的方向延伸，且穿过P型区层17和多量子阱层16，将相邻的子像素11的P型区层17之间绝缘遮光隔离，相邻的多量子阱层16之间绝缘遮光隔离。而像素单元10的N型区层15为整体的结构，即像素单元10的各个子像素11的N型区层15为一体成型结构。当然，在具体制备该像素单元的LED层19时，从制备工艺的角度，可以使遮光挡墙伸入N型区层15内设定深度，从而保证可以利用遮光挡墙将多量子阱层16隔离，提高LED的工作可靠性。
该方案中，可以使N电极为共电极，像素单元10的各个子像素11共用同一个N电极。由于像素单元10的N型区层15为整体结构，则有利于制备N电极。此外，可以使N电 极与N型区层15的中部电连接，则像素单元10的电子不易流至子像素11的边缘，可以降低子像素11漏电的风险。
另一种实施例中，还可以使遮光挡墙在大致垂直于LED层19的方向延伸，且穿过N型区层15和多量子阱层16，将相邻的子像素11的N型区层15之间绝缘遮光隔离，相邻的多量子阱层16之间绝缘遮光隔离。而像素单元10的P型区层17为整体的结构，即像素单元10的各个子像素11的N型区层15为一体成型结构。同样，在具体制备该像素单元的LED层19时，从制备工艺的角度，可以使遮光挡墙伸入P型区层17内设定深度，从而保证可以利用遮光挡墙将多量子阱层16隔离，提高LED的工作可靠性。该方案以P电极为共电极，具有与上述实施例相似的技术效果，此处不进行赘述。
请参考图8，图8为本申请实施例中像素单元的另一种剖面结构示意图。像素单元10包括LED层19和彩色功能层190，上述LED层19包括发光功能层191和第一分布式拉格反射镜层192，该第一分布式拉格反射镜层192位于发光功能层191背离彩色功能层的一侧，即位于LED层19背离彩色功能层190的一侧。上述第一分布式拉格反射镜层192能够反射蓝光，从而提高LED的发光效率。上述第一分布式拉格反射镜层192作为反射层设置于LED背离彩色功能层的一侧，由于第一分布式拉格反射镜层192为绝缘材质，因此出现短路的风险较低，有利于提高显示面板的可靠性。或者，上述反射层还可以为金属反射层，例如金属铝制作的反射层等，本申请不做具体限制。
上述第一分布式拉格反射镜层192采用两种不同折射率的材料(例如二氧化硅与二氧化钛)，以相互间隔的形式依次叠加，每层材料的光学厚度为中心反射波长的1/4。为保证设定波长范围内的光全部被反射，因此，第一分布式拉格反射镜层192包括多层结构，总厚度控制在5um以下。
具体的，上述另一种实施例中，上述LED层19朝向彩色功能层190一侧包括第二分布式拉格反射镜层。即第二分布式拉个反射镜层位于发光功能层191朝向彩色功能层190的一侧。该方案中的第二分布式拉格反射镜层193可以透过蓝光，反射红光和绿光，以提高像素单元10的光电转换效率。上述第二分布式拉格反射镜层193也采用两种不同折射率的材料(例如氧化硅与氧化钛)，以相互间隔的形式依次叠加，为多层结构。
基于相同的发明构思，本申请还提供了一种显示面板的制备方法，请参考图9，图9为本申请实施例中显示面板的制备方法的流程示意图；上述显示面板200的制备方法具体包括以下步骤：
步骤S101，制备晶圆(wafer)，上述晶圆包括LED层，请参考图10，图10为本申请实施例中制备晶圆的流程示意图，具体包括：
步骤S1011，在衬底30表面制备发光二极管(LED)层21，如图11a所示；
上述衬底30可以为蓝宝石衬底30，蓝宝石衬底30的成本较低，且与制备LED层21的材料的晶格较为适配，有利于形成LED层21。当然，在其它的实施例中，上述衬底30还可以为硅衬底30、碳化硅衬底30或者玻璃衬底30，本申请不做限制。
请参考图11a，在衬底30表面制备LED层21的具体过程可以包括：
在衬底30表面制做缓冲层211(GaN Buffer，氮化镓缓冲层)，缓冲层211的厚度可以为15nm；
在缓冲层211背离衬底30的表面依次生长LED218，以蓝色LED为例：
在350～500摄氏度条件下，在缓冲层211背离衬底30的表面生长GaN层212(undoped  GaN，无掺杂氮化镓层)，GaN层212的厚度具体可以为2um。生长过程中的气压具体可以为500～700mBar，V/III为2000～5000，生长速率为3～15nm/min。其中，V/III指的是第五主族元素N与第三主族元素Ga的摩尔比；生长速率指的是一定时间内生成物质的厚度的增加量；
在450～500摄氏度条件下，在GaN层212背离缓冲层211的表面生长N型掺杂GaN层213(N doped GaN，掺杂N型材料的氮化镓)，N型掺杂GaN层213的厚度可以为2um。生长过程中的气压具体可以为200～400mBar，V/III在6000～10000，生长速率在0.5～8um/h；
在400～500摄氏度条件下，在N型掺杂GaN层213背离上述GaN层212的表面生长多量子阱层214(Muti Quantum Well)，多量子阱层214由GaN(氮化镓)以及InGaN(氮化铟镓)叠加后形成。多量子阱层214的具体层数不做限制，但是，最上层以及最下层均为GaN，且相邻的量子阱可以复用一个GaN。上述InGaN厚度可以为3nm，GaN厚度可以为7nm。生长过程中的气压为200～400mBar，V/III为12000～30000，生长速率为0.5～3um/h；
在400～500摄氏度条件下，在多量子阱层214背离N型掺杂GaN层213的表面生长P型AlGaN层215(P-AlGaN Electron block layer，P型氮化铝镓电子阻挡层)。P型AlGaN层215为电子阻挡层，用于避免电子过流，提高发光效率。P型AlGaN层215的厚度可以为80nm。生长过程中的气压可以为50～300mBar，V/III可以为2000～5000，生长速率可以为0.5～2um/h；
在400～500摄氏度条件下，在P型AlGaN层215背离多量子阱层214的表面生长P型掺杂GaN层216(P doped GaN，掺杂P型材料的氮化镓)。厚度可以为150nm。生长过程中的气压为200～400mBar，V/III为6000～10000，生长速率为0.5～8um/h；
在P型掺杂GaN层216背离P型AlGaN层215的表面采用蒸镀工艺蒸镀一层透明电极217，如氧化铟锡薄膜，厚度例如可以为1um。
步骤S1012，在LED层21背离衬底30的一侧制备与LED层21电连接的多个第一电极22和多个第二电极23，如图11b所示；
该方案中，第一电极22与第二电极23设置于LED层21的同一侧，即倒装结构(flip chip)，该结构有利于提高LED218的发光效率，减少将第一电极22与第二电极23连接至具有驱动电路的基板时需要的走线数量，便于安装。上述第一电极22与第二电极23的材质可以为多元合金金属，例如SnAg合金或者NiPtAu合金，本申请不做具体限制。为了形成上述第一电极22与第二电极23，可以在LED层21背离衬底30的一侧设置具有设定结构的掩膜版，并蒸镀形成上述第一电极22与第二电极23。
步骤S1013，将晶圆具有电极的一侧固定至平盘40，剥离衬底30，如图11c所示；
具体实施该步骤时，可以利用胶50将上述晶圆粘接至平盘40，利用激光切割工艺剥离上述衬底30。
步骤S1014，切割LED层21使多个LED218分离，形成多个LED218，如图11d所示；
具体可以采用ICP工艺蚀刻上述多个LED218之间的区域，以分割LED218，形成多个可以独立驱动的LED218。
步骤S1015，在LED218之间制备第一遮光挡墙219，遮挡相邻LED218之间的光线，如图11e所示；
在切割上述LED层21时，LED218之间具有间隙，可以利用旋涂的方式将黑色光阻树脂填充在上述间隙内，再利用掩膜光固化上述LED218之间的间隙区域的黑色光祖树脂， 然后将多余的黑色光阻树脂清洗掉，则可以形成上述第一遮光挡墙219，以防止不同的LED218之间的光相互扩散。制备上述第一遮光挡墙219的材料不做限制，例如可以为高分子材料、金属或者金属化合物等等，第一遮光挡墙219的材料只需具有遮光性即可。
步骤S102，在上述LED层21表面制备彩色功能层2110，形成多个颜色的子像素，如图11f所示；
具体可以在LED218背离第一电极22的一侧制备彩色功能层2110，形成红色子像素、绿色子像素和蓝色子像素；
制备LED218后，直接制备彩色功能层2110，则可以利用制造晶圆的光刻设备，从而可以在提高制备精度的基础上，还可以降低成本，减少设备投入。上述彩色功能层2110包括光转换材料层，该光转换材料层的材质不做限制，可以为量子点材料、荧光粉或者有机荧光染料等。具体可以选择量子点材料，在量子点材料背离LED218一侧还设置有彩膜，具体的，上述量子点材料制备的光转换材料层的厚度可以为4um，彩膜的厚度可以为2um。具体加工时，制备光转换材料层的过程以红色子像素为例，可以为：先在整片晶圆表面旋涂红色量子点材料光刻胶，然后利用光刻板将需要的位置(红色子像素对应的LED218上方)进行感光固化，最后将未固化的红色量子点材料光刻胶洗掉。采用同样的工艺，可以在光转换材料层背离LED层21的一侧，采用与红色子像素相同的制备工艺制备彩膜。
上述彩色功能层2110与每个LED218相对的区域之间具有间隙，可以利用旋涂的方式将黑色光阻树脂填充在上述间隙内，再利用掩膜光固化上述间隙区域的黑色光祖树脂，然后将多余的黑色光阻树脂清洗掉，则可以在相邻的子像素之间形成第二遮光挡墙2111，以防止不同的子像素之间的光相互扩散。制备上述第二遮光挡墙2111的材料不做限制，例如可以为高分子材料、金属或者金属化合物等等，第二遮光挡墙2111的材料只需具有遮光性即可。
步骤S103，切割像素单元24之间的挡墙，形成多个独立的像素单元24，上述像素单元24包括至少三个颜色的子像素，如图11g；
上述像素单元24具体可以包括红色子像素、绿色子像素和蓝色子像素；也可以包括红色子像素、绿色子像素、蓝色子像素和白色子像素等，本申请不做具体限制。以像素单元24为单位进行切割，切割后形成独立的像素单元24，则在制备显示面板时，可以直接将上述像素单元24转移至具有驱动电路的基板，而无需单独转移各个子像素，从而可以大幅降低转移次数。具体可以采用掩膜配合干法刻蚀的工艺，对上述像素单元24进行切割。
步骤S104，在像素单元24外表面制备钝化层25，对像素单元24的子像素进行封装，如图11h。
上述钝化层25可以采用PECVD(Plasma Enhanced Chemical Vapor Deposition，等离子体增强化学的气相沉积法)的方式在芯片表面蒸镀钝化层25，该钝化层25的厚度可以为几百纳米厚，材质可以为二氧化硅或氮化硅等无机钝化材料。
步骤S105，将像素单元24转移至具有驱动电路的基板。
以像素单元24为单位转移至具有驱动电路的基板，则可以大幅降低转移次数，有利于提高转移效率，提高产品良率。
上述步骤S101还可以包括制备反射层的工艺，具体的，可以在步骤S1011中，在P型掺杂GaN层216背离AlGaN层的表面采用蒸镀工艺蒸镀一层透明电极217，之后，在 上述透明电极217背离上述P型掺杂GaN层216的表面制备第一分布式拉格反射镜层2112作为反射层，如图12所示，图12为本申请实施例中发光二极管的一种剖面结构示意图。然后执行步骤S1012，在该第一分布式拉格反射镜层2112背离衬底30的一侧表面形成多个第一电极22与多个第二电极23。上述第一分布式拉格反射镜层2112可以反射蓝光，从而提高LED218的发光效率。
具体制备上述第一分布式拉格反射镜层2112的工艺可以包括：采用两种不同折射率的材料，例如氧化硅与氧化钛，以相互间隔的形式依次叠加，每层材料的光学厚度为待反射光的波长的1/4。为保证设定波长范围内的光全部被反射，因此，第一分布式拉格反射镜层2112包括多层结构，总厚度控制在5um以下。
或者，上述反射层还可以为金属反射层，例如铝质反射层，制备金属反射层时，需要做好绝缘处理，以防止金属反射层导致短路问题。
进一步的实施例中，在上述步骤S101中，还可以在LED层21朝向彩色功能层2110的一侧制备第二分布式拉格反射镜层2113。具体的，可以在步骤S1013之后，在LED层21制备上述第二分布式拉格反射镜层2113，如图13所示，图13为本申请实施例中发光二极管的另一种剖面结构示意图。该方案中的第二分布式拉格反射镜层2113可以透过蓝光，反射红光和绿光，可以提高像素单元24的色彩饱和度。上述第二分布式拉格反射镜层2113的厚度可以为2.5um左右。上述第二分布式拉格反射镜层2113的制备工艺与上述第一分布式拉格反射镜层2112的制备工艺大致相同，本申请不做赘述。
另一种技术方案中，可以使LED层21的发光功能层位于第一分布式拉格反射镜层2112与第二分布式拉格反射镜层2113之间，如图13所示，该方案中的LED218发光效率较高。
为了实现子像素包括至少两个分像素，且上述至少两个分像素并联设置。可以在步骤S101制备晶圆时，在每个LED218设定位置采用离子注入工艺制备绝缘层，使每个LED218形成至少两个并联的分LED218；该方案中，上述离子注入工艺可以将具有绝缘性质离子注入至LED218内，以形成绝缘层。例如，可以将氦离子或者氮离子注入LED内，以形成绝缘层。具体制备上述绝缘层时，可以先制备掩膜漏出需要离子注入的部分，然后注入一定剂量的He离子，在LED218内形成具有非常高的绝缘性与不活泼性的绝缘层，从而使绝缘层两侧的LED218为分LED218，且并联连接。
另一种实施例中，还可以在每个LED218设定位置进行切割，以使每个LED形成至少两个并联的分LED218。该切割步骤可以与步骤S1014同时进行。
像素单元24的第一电极22和第二电极23可以位于子像素的同一侧。每个像素单元24中的各个子像素可以进行共电极设计，即像素单元24中的所有子像素的一端共用一个第二电极23，各个子像素的另一端分别连接一个第一电极22。该方案中，由于以像素单元24为单位进行最后的切割和转移，因此可以实现像素单元24的所有子像素共用一个第二电极23，则可以减少显示面板的电极的总数，有利于减少像素单元24转移至具有驱动电路的基板时需要焊接电极的数量，既可以提高工艺效率，减少焊接时出现不良的情况。也可以降低制备电极的成本。
具体的实施例中，可以使第一电极22为P电极，第二电极23为N电极；或者第一电极22为N电极，第一电极22为P电极，本申请不做具体限制。
像素单元24至少包括红色子像素、绿色子像素和蓝色子像素。由于红色子像素尺寸 较小时，其发光效率较低，因此，红色子像素的数量大于绿色子像素的数量，绿色子像素的数量可以等于蓝色子像素的数量。例如，像素单元可以包括两个红色子像素、一个绿色子像素和一个蓝色子像素。由于尺寸小的红色子像素的发光效率与绿色子像素或者蓝色子像素相比，发光效率较低，为了提高色彩饱和度，可以增加红色子像素的数量，以使各个颜色的子像素的效率较为一致。
请参考图14，图14为本申请实施例中发光二极管的一种结构示意图。上述LED层21包括依次设置的N型区层2114、多量子阱层214和P型区层2115，所述制备晶圆包括：切割上述LED层21形成多个LED218，具体可以切割多量子阱层214和P型区层2115，保留N型区层2114为整体N型区层。在具体执行该步骤时，可以切割N型区层2114设定深度，以保证多量子阱层214可以被完全切断，防止相邻的LED之间产生干扰，提高LED的工作可靠性。
该方案中，可以使N电极为共电极，像素单元24的各个子像素共用同一个N电极。由于像素单元24的N型区层2114为整体结构，则有利于制备N电极。此外，可以使N电极与N型区层2114的中部电连接，则像素单元24的电子不易流至子像素的边缘，可以降低子像素漏电的风险。
或者，基于相同的构思，可以切割多量子阱层214和上述N型区层2114，保留P型区层2115为整体P型区层。此处不进行赘述。
请参考图15，图15为本申请实施例中像素单元的一种结构示意图。在另一种具体的实施例中，上述子像素之间的挡墙可以为铝质遮光挡墙，则在步骤S101制备晶圆时，切割LED层21形成多个LED218，再在LED218之间制备铝质遮光挡墙。具体可以先在LED层21表面制备欧姆接触层2117，再切割LED层21形成多个LED218，再每个LED218外表面制备绝缘层2118，并在绝缘层2118表面制备通孔；在上述绝缘层2118外表面制备铝质遮光挡墙2116，该铝质遮光挡墙2116通过上述通孔和欧姆接触层2117与LED218的一端电连接，并蚀刻铝质遮光挡墙2116形成导电图案。在铝质遮光挡墙2116外制备彩色功能层2110，之后进一步完成铝质遮光挡墙，以隔离各个子像素的彩色功能层2110，之后在像素单元24外表面制备钝化层25，封装形成像素单元24。铝质遮光挡墙的表面具有较高的光反射率。从而子像素发出的光线遇到上述铝质遮光挡墙，可以使较多的光线反射至子像素内部，从而有利于提高子像素的亮度和发光效率。
进一步的，可以在像素单元24的一侧制备第一电极22和第二电极23，上述铝质遮光挡墙与第一电极22或者第二电极23电连接。该方案中，铝质遮光挡墙作为导电走线，则可以减少制备像素单元24时，导电走线的设置，简化工艺，降低成本。像素单元24的第一电极22和第二电极23位于子像素的同一侧时，第一电极22与第二电极23中的一个电极需要利用穿过LED层21厚度方向的走线与LED层21连接。具体可以使上述铝质遮光挡墙需要连接上述穿过LED层21厚度方向的走线的电极电连接，从而无需额外制作穿过LED层21的导电走线，有利于提高LED占显示面板的比率，有利于提高发光效率和显示效果。
或者，每个像素单元24中的各个子像素还可以进行共电极设计，即像素单元24中的所有子像素的一端共用一个第二电极23，各个子像素的另一端分别连接一个第一电极22。当相邻子像素之间设置铝质遮光挡墙时，可以使上述铝质遮光挡墙与第二电极23连接，以实现像素单元24的各个子像素的一端共用一个第二电极23，则上述铝质遮光挡墙还可 以作为连接共用电极的走线，以减少额外的导电走线。
以上，仅为本申请的具体实施方式，但本申请的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本申请揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本申请的保护范围之内。因此，本申请的保护范围应以权利要求的保护范围为准。

Claims (18)

  1. 一种显示面板，其特征在于，包括多个像素单元，所述像素单元包括至少三个颜色的子像素，所述至少三个颜色的子像素由钝化层封装为一个所述像素单元；所述像素单元的各个子像素的一端分别连接一个第一电极，另一端共用一个第二电极。
  2. 根据权利要求1所述的显示面板，其特征在于，每个所述子像素包括至少两个分像素，所述至少两个分像素并联设置。
  3. 根据权利要求1所述的显示面板，其特征在于，所述像素单元至少包括红色子像素和绿色子像素，其中，所述红色子像素的数量大于所述绿色子像素的数量。
  4. 根据权利要求1所述的显示面板，其特征在于，所述子像素周侧具有铝质遮光挡墙。
  5. 根据权利要求4所述的显示面板，其特征在于，所述铝质遮光挡墙连接所述子像素的第一电极或者第二电极。
  6. 根据权利要求1所述的显示面板，其特征在于，所述像素单元包括LED层和彩色功能层，所述LED层包括依次设置的N型区层、多量子阱层和P型区层，其中：
    所述像素单元的相邻的子像素中，所述多量子阱层和所述P型区层之间具有遮光挡墙，所述像素单元的所述N型区层为整体N型区层；或者，
    所述像素单元的相邻的子像素中，所述多量子阱层和所述N型区层之间具有遮光挡墙，所述像素单元的所述P型区层为整体P型区层。
  7. 根据权利要求1所述的显示面板，其特征在于，所述像素单元包括LED层和彩色功能层，所述LED层背离所述彩色功能层的一侧包括反射层。
  8. 根据权利要求1所述的显示面板，其特征在于，所述像素单元包括LED层和彩色功能层，所述LED层朝向所述彩色功能层的一侧包括第二分布式拉格反射镜层。
  9. 一种显示装置，其特征在于，包括中框、后壳、印制电路板以及根据权利要求1～8任一项所述的显示面板，其中：
    所述中框用于承载所述印制电路板和所述显示面板，所述印制电路板与所述显示面板位于所述中框的两侧，所述后壳位于所述印制电路板背离所述中框的一侧。
  10. 一种显示面板的制备方法，其特征在于，包括：
    制备晶圆，所述晶圆包括LED层；
    在所述LED层表面制备彩色功能层，形成多个颜色的子像素；
    切割像素单元之间的挡墙，形成多个独立的所述像素单元，所述像素单元包括至少三个颜色的子像素；
    在所述像素单元外表面制备钝化层，对所述像素单元的所述子像素进行封装；
    将具有所述钝化层的所述像素单元转移至具有驱动电路的基板。
  11. 根据权利要求10所述的显示面板的制备方法，其特征在于，所述制备晶圆包括：
    在衬底表面制备LED层，所述LED层背离所述衬底一侧的为反射层；
    在所述反射层背离所述衬底的一侧表面形成所述第一电极与所述第二电极。
  12. 根据权利要求10所述的显示面板的制备方法，其特征在于，所述制备晶圆包括：
    在所述LED层朝向所述彩色功能层的一侧制备第二分布式拉格反射镜层。
  13. 根据权利要求10所述的显示面板的制备方法，其特征在于，所述制备晶圆包括：
    在每个LED设定位置采用离子注入工艺制备绝缘层，使所述LED形成至少两个并联 的分LED；或者，
    在每个LED设定位置切割，使所述LED形成至少两个并联的分LED。
  14. 根据权利要求10所述的显示面板的制备方法，其特征在于，
    所述制备晶圆包括：切割所述LED层形成多个LED，在LED之间制备铝质遮光挡墙；
    所述在所述LED层表面制备彩色功能层，形成多个颜色的子像素包括：在子像素之间制备铝质遮光挡墙。
  15. 根据权利要求14所述的显示面板的制备方法，其特征在于，所述铝质遮光挡墙与所述子像素的第一电极或者第二电极电连接。
  16. 根据权利要求10所述的显示面板的制备方法，其特征在于，所述制备晶圆包括：
    制备LED层，所述LED层包括依次设置的N型区层、多量子阱层和P型区层；
    切割所述N型区层和所述多量子阱层；
    或者，
    制备LED层，所述LED层包括依次设置的N型区层、多量子阱层和P型区层；
    切割所述P型区层和所述多量子阱层。
  17. 根据权利要求10所述的显示面板的制备方法，其特征在于，所述像素单元至少包括红色子像素和绿色子像素，其中，所述红色子像素的数量大于所述绿色子像素的数量。
  18. 根据权利要求10所述的显示面板的制备方法，其特征在于，所述像素单元的各个子像素的一端分别连接一个第一电极，另一端共用一个第二电极。
PCT/CN2021/099469 2020-06-10 2021-06-10 显示面板、显示装置及显示面板的制备方法 Ceased WO2021249497A1 (zh)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2022575831A JP7532731B2 (ja) 2020-06-10 2021-06-10 表示パネル、表示装置、および表示パネルの製造方法
EP21821083.9A EP4152398A4 (en) 2020-06-10 2021-06-10 Display panel, display apparatus, and preparation method for display panel
US18/063,826 US20230105156A1 (en) 2020-06-10 2022-12-09 Display panel, display apparatus, and preparation method for display panel

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN202010522792.4 2020-06-10
CN202010522792.4A CN113851502A (zh) 2020-06-10 2020-06-10 显示面板、显示装置及显示面板的制备方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US18/063,826 Continuation US20230105156A1 (en) 2020-06-10 2022-12-09 Display panel, display apparatus, and preparation method for display panel

Publications (1)

Publication Number Publication Date
WO2021249497A1 true WO2021249497A1 (zh) 2021-12-16

Family

ID=78846845

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2021/099469 Ceased WO2021249497A1 (zh) 2020-06-10 2021-06-10 显示面板、显示装置及显示面板的制备方法

Country Status (5)

Country Link
US (1) US20230105156A1 (zh)
EP (1) EP4152398A4 (zh)
JP (1) JP7532731B2 (zh)
CN (1) CN113851502A (zh)
WO (1) WO2021249497A1 (zh)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2023148970A (ja) * 2022-03-30 2023-10-13 日亜化学工業株式会社 発光装置及びその製造方法
JP2025519726A (ja) * 2022-06-15 2025-06-26 ▲れい▼▲うぃ▼光電科技（蘇州）有限公司 Ｍｉｃｒｏ－ＬＥＤ表示チップ及びその製造方法

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114068609A (zh) * 2021-11-17 2022-02-18 上海天马微电子有限公司 Led单元、led源基板、显示面板和显示装置
CN114446942A (zh) * 2022-01-26 2022-05-06 Tcl华星光电技术有限公司 显示面板及其制作方法
CN115394762B (zh) * 2022-05-17 2024-07-09 诺视科技(苏州)有限公司 一种具有透明衬底的像素级分立器件及其制作方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109037266A (zh) * 2018-06-28 2018-12-18 英诺赛科（珠海）科技有限公司 多色led芯片及制备方法、像素led单元、显示面板及制备方法
CN109802018A (zh) * 2019-03-27 2019-05-24 京东方科技集团股份有限公司 微发光二极管阵列基板的制作方法
US20190244937A1 (en) * 2016-03-02 2019-08-08 Dexerials Corporation Display device and method for manufacturing the same, and light-emitting device and method for manufacturing the same
WO2020071634A1 (en) * 2018-10-01 2020-04-09 Samsung Electronics Co., Ltd. Display apparatus and manufacturing method for the same

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6547249B2 (en) 2001-03-29 2003-04-15 Lumileds Lighting U.S., Llc Monolithic series/parallel led arrays formed on highly resistive substrates
JP2003255862A (ja) 2002-02-28 2003-09-10 Matsushita Electric Ind Co Ltd ディスプレイモジュールおよびこれを用いた表示装置
JP6186904B2 (ja) * 2013-06-05 2017-08-30 日亜化学工業株式会社 発光装置
CN108475712B (zh) 2015-12-01 2021-11-09 夏普株式会社 图像形成元件
KR102524805B1 (ko) * 2016-02-12 2023-04-25 삼성전자주식회사 광원 모듈, 디스플레이 패널 및 이를 구비한 디스플레이 장치
WO2018070666A1 (ko) 2016-10-11 2018-04-19 주식회사 루멘스 Led 디스플레이 모듈 및 그 제조방법
WO2018097667A1 (ko) 2016-11-24 2018-05-31 엘지이노텍 주식회사 반도체 소자 및 이를 포함하는 표시 장치
TWI646680B (zh) * 2017-01-10 2019-01-01 英屬開曼群島商錼創科技股份有限公司 微型發光二極體晶片以及顯示面板
CN107359176B (zh) * 2017-06-12 2019-11-22 武汉天马微电子有限公司 一种有机发光显示面板及显示装置
CN111051934A (zh) 2017-09-22 2020-04-21 Dic株式会社 光转换膜及使用其的图像显示元件
US10388641B2 (en) 2017-10-19 2019-08-20 Tectus Corporation Ultra-dense LED projector
CN110112123A (zh) * 2018-02-01 2019-08-09 晶元光电股份有限公司 发光装置及其制造方法
US10984702B2 (en) * 2018-06-22 2021-04-20 Epistar Corporation Display apparatus with array of light emitting diodes and method of manufacturing the same
JP7177336B2 (ja) * 2018-07-20 2022-11-24 日亜化学工業株式会社 発光装置
KR20200051912A (ko) 2018-11-05 2020-05-14 삼성전자주식회사 Led 모듈 및 디스플레이 장치
CN110082971B (zh) * 2019-05-24 2022-01-11 合肥联宝信息技术有限公司 显示面板及显示装置
CN110808274B (zh) * 2019-11-14 2022-05-27 京东方科技集团股份有限公司 一种显示面板的制备方法、显示面板及显示装置

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20190244937A1 (en) * 2016-03-02 2019-08-08 Dexerials Corporation Display device and method for manufacturing the same, and light-emitting device and method for manufacturing the same
CN109037266A (zh) * 2018-06-28 2018-12-18 英诺赛科（珠海）科技有限公司 多色led芯片及制备方法、像素led单元、显示面板及制备方法
WO2020071634A1 (en) * 2018-10-01 2020-04-09 Samsung Electronics Co., Ltd. Display apparatus and manufacturing method for the same
CN109802018A (zh) * 2019-03-27 2019-05-24 京东方科技集团股份有限公司 微发光二极管阵列基板的制作方法

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP4152398A4 *

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2023148970A (ja) * 2022-03-30 2023-10-13 日亜化学工業株式会社 発光装置及びその製造方法
JP7583292B2 (ja) 2022-03-30 2024-11-14 日亜化学工業株式会社 発光装置の製造方法
JP2025519726A (ja) * 2022-06-15 2025-06-26 ▲れい▼▲うぃ▼光電科技（蘇州）有限公司 Ｍｉｃｒｏ－ＬＥＤ表示チップ及びその製造方法
JP7815483B2 (ja) 2022-06-15 2026-02-17 ▲れい▼▲うぃ▼光電科技（蘇州）有限公司 Ｍｉｃｒｏ－ＬＥＤ表示チップ及びその製造方法

Also Published As

Publication number Publication date
JP7532731B2 (ja) 2024-08-14
US20230105156A1 (en) 2023-04-06
EP4152398A4 (en) 2023-11-22
CN113851502A (zh) 2021-12-28
EP4152398A1 (en) 2023-03-22
JP2023528669A (ja) 2023-07-05

Similar Documents

Publication Publication Date Title
US11489006B2 (en) Display panel, preparation method thereof and display device
WO2021249497A1 (zh) 显示面板、显示装置及显示面板的制备方法
US10862010B2 (en) Integrated colour LED micro-display
US12183866B2 (en) Display device using micro LED, and manufacturing method therefor
TWI636562B (zh) 顯示裝置
CN102386200A (zh) 发光单元阵列与投影系统
US20230014515A1 (en) Display device using micro led and manufacturing method thereof
WO2024199489A9 (zh) 显示面板和电子设备
CN113748515B (zh) 显示面板和显示装置
KR20220032110A (ko) 고전압 플립칩 반도체 발광소자
US20190355785A1 (en) Display array
CN113811942B (zh) 显示面板和显示装置
CN115332288A (zh) 一种像素单元及其制作方法、微显示屏、分立器件
WO2023070526A1 (zh) 发光二极管结构及发光装置
CN114068775B (zh) 一种倒装led芯片、led封装模组及显示装置
US20190355705A1 (en) Method for manufacturing display array
US20210375982A1 (en) Display array
KR20230092671A (ko) 마이크로 발광 소자 디스플레이 장치 및 그 제조 방법
US20240113150A1 (en) Light emitting device and light emitting module having the same
CN118676287A (zh) Micro-LED显示芯片、显示装置和制备方法
CN116825927A (zh) Micro-LED芯片及其制作方法、显示面板和电子设备
KR20240018126A (ko) 표시 장치 및 표시 장치의 제조 방법
KR102867533B1 (ko) 화소용 반도체 발광 소자 및 이를 포함하는 디스플레이 장치
US20240355791A1 (en) Display module and display apparatus having light emitting device
EP4498439B1 (en) Light emitting element and display device using light emitting element

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 21821083

Country of ref document: EP

Kind code of ref document: A1

ENP Entry into the national phase

Ref document number: 2022575831

Country of ref document: JP

Kind code of ref document: A

ENP Entry into the national phase

Ref document number: 2021821083

Country of ref document: EP

Effective date: 20221214

NENP Non-entry into the national phase

Ref country code: DE