WO2022127659A1 - 保护方法、保护装置、电子设备、可读存储介质和芯片 - Google Patents

保护方法、保护装置、电子设备、可读存储介质和芯片 Download PDF

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Publication number
WO2022127659A1
WO2022127659A1 PCT/CN2021/136282 CN2021136282W WO2022127659A1 WO 2022127659 A1 WO2022127659 A1 WO 2022127659A1 CN 2021136282 W CN2021136282 W CN 2021136282W WO 2022127659 A1 WO2022127659 A1 WO 2022127659A1
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Prior art keywords
pin
configuration channel
universal serial
serial bus
bus interface
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PCT/CN2021/136282
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English (en)
French (fr)
Inventor
罗方丁
冯明俐
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Vivo Mobile Communication Co Ltd
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Vivo Mobile Communication Co Ltd
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Publication date
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Priority to EP21905588.6A priority Critical patent/EP4266154B1/en
Priority to ES21905588T priority patent/ES3041851T3/es
Publication of WO2022127659A1 publication Critical patent/WO2022127659A1/zh
Priority to US18/210,038 priority patent/US12430273B2/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • G06F13/4081—Live connection to bus, e.g. hot-plugging
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/266—Arrangements to supply power to external peripherals either directly from the computer or under computer control, e.g. supply of power through the communication port, computer controlled power-strips
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/382—Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H3/00—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
    • H02H3/20—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to excess voltage
    • H02H3/202—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to excess voltage for DC systems
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0002—Serial port, e.g. RS232C
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0042—Universal serial bus [USB]
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Definitions

  • the present application belongs to the technical field of electronic data transmission, and in particular relates to a protection method for a universal serial bus interface, a protection device for a universal serial bus interface, an electronic device, a readable storage medium and a chip.
  • On-The-Go (OTG) devices using Universal Serial Bus (USB) interface technology can realize communication connection and data exchange between various terminal devices, especially the realization of PDA (Personal Digital Assistant, PDA) devices, smart phones, digital cameras, camcorders, printers and other devices in a variety of different standards of connection.
  • PDA Personal Digital Assistant
  • OTG devices can realize the connection between slave devices without a master device.
  • Type-C universal serial bus interface has the advantages of being able to be inserted on both sides and small in size, so it has a wide application prospect in OTG equipment.
  • OTG devices with Type-C Universal Serial Bus interface have at least the following problems in the related art.
  • the pins need to be permanently energized to enable detection of the type of device inserted.
  • the configuration channel pins in the charged state are easily corroded or damaged due to short circuit, and thus the service life of the USB interface of Type-C is affected. .
  • the purpose of the embodiments of the present application is to provide a protection method for a universal serial bus interface, a protection device for a universal serial bus interface, an electronic device, a readable storage medium and a chip, which can solve the problem of Type- C's universal serial bus interface is prone to corrosion or damage due to short circuits.
  • an embodiment of the present application provides a protection method for a universal serial bus interface, the universal serial bus interface is provided with a configuration channel pin, and the protection method includes: detecting a voltage variable of the configuration channel pin; determining according to the voltage variable The transformation time of the voltage variable; compare the transformation time with the preset transformation time, and obtain the comparison result; when the comparison result is that the transformation time is less than or equal to the preset transformation time, the power supply of the configuration channel pin is cut off.
  • an embodiment of the present application provides a protection device for a universal serial bus interface, the universal serial bus interface is provided with configuration channel pins, and the protection device includes: a detection module, the detection module is used to detect the configuration channel pins. voltage variable; determination module, the determination module is used to determine the transformation time of the voltage variable according to the voltage variable; the comparison module, the comparison module is used to compare the transformation time with the preset transformation time, and obtain the comparison result; the protection module, when the comparison result is transformation When the time is less than or equal to the preset transition time, the protection module is used to cut off the power supply of the configuration channel pins.
  • an embodiment of the present application provides an electronic device, the electronic device includes a processor, a memory, and a program or instruction stored in the memory and executable on the processor.
  • the program or instruction is executed by the processor, the The steps of the protection method of the universal serial bus interface of the first aspect.
  • an embodiment of the present application provides a readable storage medium, on which a program or an instruction is stored, and when the program or instruction is executed by a processor, the protection method of the universal serial bus interface according to the first aspect is implemented. step.
  • an embodiment of the present application provides a chip, where the chip includes a processor and a communication interface, the communication interface and the processor are coupled, and the processor is used to run a program or an instruction to implement the protection of the universal serial bus interface as described in the first aspect steps of the method.
  • the embodiments of the present application by detecting the voltage of the configuration channel pin, the state of the configuration channel pin can be accurately determined according to the voltage of the configuration channel pin. Therefore, the embodiments of the present application can timely identify the short circuit or abnormality of the configuration channel pins caused by foreign objects entering the USB interface, and cut off the power supply of the configuration channel pins in time, so as to avoid the configuration channel pins from being corroded or damaged. Damaged by short circuit. In conclusion, the embodiments of the present application can effectively protect the universal serial bus interface and improve its service life.
  • 1 is a pin layout diagram of a universal serial bus interface in an embodiment of the application
  • FIG. 2 is a schematic structural diagram of a universal serial bus interface in an embodiment of the application
  • FIG. 3 is one of the flow charts of steps of a method for protecting a universal serial bus interface in an embodiment of the application
  • FIG. 4 is one of the schematic diagrams of a protection method for a universal serial bus interface in an embodiment of the application
  • FIG. 5 is the second schematic diagram of a protection method for a universal serial bus interface in an embodiment of the application.
  • FIG. 6 is a schematic diagram of a voltage change of a configuration channel pin in a short-circuit state according to an embodiment of the present application
  • FIG. 7 is the second flow chart of the steps of a method for protecting a universal serial bus interface in an embodiment of the application.
  • FIG. 8 is a schematic block diagram of the composition of an electronic device in an embodiment of the present application.
  • the protection method for a universal serial bus interface the protection device 110 for a universal serial bus interface, the electronic device 100 , and the readable storage medium provided by the embodiments of the present application are described below through specific embodiments and application scenarios thereof. and chips are described in detail.
  • the protection method provided by the embodiment of the present application is a protection method for a Type C universal serial bus interface.
  • the Type C universal serial bus interface includes the Type C universal serial bus interface at the socket end and the Type C universal serial bus interface at the plug end.
  • the pin arrangement of the Type C universal serial bus interface at the socket end and the Type C universal serial bus interface at the plug end are opposite. The pin layout is explained.
  • FIG. 1 is a pin layout diagram of a universal serial bus interface in an embodiment of the application.
  • the Type C universal serial bus interface has a symmetrical structure, which includes an upper row of pins and a lower row of pins that are oppositely arranged up and down.
  • the upper row of pins includes the first pin A1 of the upper row, the second pin A2 of the upper row, the third pin A3 of the upper row, the fourth pin A4 of the upper row, the fifth pin A5 of the upper row, The sixth pin A6 of the upper row, the seventh pin A7 of the upper row, the eighth pin A8 of the upper row, the ninth pin A9 of the upper row, the tenth pin A10 of the upper row, the eleventh pin A11 of the upper row and the upper row Row the twelfth pin A12.
  • the first pin A1 of the upper row is the ground pin GND
  • the second pin A2 of the upper row is the first transmission plus pin TX1+
  • the third pin A3 of the upper row is the first transmission minus pin TX1-
  • the upper row The fourth pin A4 is the voltage bus pin VBus
  • the fifth pin A5 of the upper row is the first configuration channel pin CC1
  • the sixth pin A6 of the upper row is the data plus pin D+
  • the seventh pin A7 of the upper row is the data Including minus pin D-
  • the eighth pin A8 of the upper row is the first extended function pin SBU1
  • the ninth pin A9 of the upper row is the voltage bus pin VBus
  • the tenth pin A10 of the upper row is the second receiving minus lead
  • the pin RX2- the eleventh pin A11 of the upper row is the second receiving plus pin RX2+
  • the twelfth pin A12 of the upper row is the ground pin GND.
  • the lower row of pins includes the lower row first pin B1, the lower row second pin B2, the lower row third pin B3, the lower row fourth pin B4, the lower row fifth pin B5, Bottom row sixth pin B6, bottom row seventh pin B7, bottom row eighth pin B8, bottom row ninth pin B9, bottom row tenth pin B10, bottom row eleventh pin B11 and bottom row Row the twelfth pin B12.
  • the first pin B1 of the lower row is the ground pin GND
  • the second pin B2 of the lower row is the second transmission plus pin TX2+
  • the third pin B3 of the lower row is the second transmission minus pin TX2-
  • the second pin of the lower row is the second transmission minus pin TX2-.
  • the fourth pin B4 is the voltage bus pin VBus
  • the fifth pin B5 of the lower row is the second configuration channel pin CC2
  • the sixth pin B6 of the lower row is the data plus pin D+
  • the seventh pin B7 of the lower row is the data
  • the minus pin D- is included
  • the eighth pin B8 in the lower row is the second extended function pin SBU2
  • the ninth pin B9 in the lower row is the voltage bus pin VBus
  • the tenth pin B10 in the lower row is the first receiving plus lead
  • the pin RX1- the eleventh pin B11 in the lower row is the first receiving plus pin RX1+
  • the twelfth pin B12 in the lower row is the ground pin GND.
  • the first configuration channel pin CC1 and the second configuration channel pin CC2 are both configuration channel pins, and the configuration channel pin is one of the important components of the Type C universal serial bus interface.
  • the role of the configuration channel pins is to detect or determine the type of device inserted.
  • the identification method of the OTG device in use is that the downstream port (Downstream Facing Port, DFP) is the master, and the upstream port (Upstream Facing Port, UFP) is the slave.
  • a dual role port (DRP) can be a downstream port or an upstream port. When two dual-role ports are connected together, either one is the downstream port and the other is the upstream port.
  • the configuration channel pin of the downstream port has a pull-up resistor Rp, and the configuration channel pin of the upstream port has a pull-down resistor Rd. When the two devices are not connected, the voltage bus pin VBus of the downstream port has no output.
  • the configuration channel pins include a first configuration channel pin CC1 and a second configuration channel pin CC2. Depending on which one of the first configuration channel pin CC1 and the second configuration channel pin CC2 detects the pull-down resistance, the direction of interface insertion can be determined, and thus the transmit plus pin and the receive plus pin are switched.
  • the configuration channel pins are used as insertion detection pins, and will enter different states (eg: ra/rd/rp_def/rp_15/rp_30) according to external load conditions or the configuration channel state of the OTG device.
  • the configuration channel status of each OTG device is stable, that is, when an OTG device is plugged in, there will be no two device identification voltages on the configuration channel.
  • the configuration channel status pin voltage of the Sink (English name: Sink) OTG device is shown in Table 1 and Table 2 below.
  • the configuration channel pin when used as the insertion detection element, it is necessary to ensure that the configuration channel pin is always charged. However, when there are foreign objects such as dust and debris in the USB interface, it will cause corrosion inside the USB interface, especially the pins of the configuration channel that are charged. This problem not only affects the realization of the universal serial bus interface to realize its conventional functions such as charging, data transmission, and screen projection, but also affects the service life of the universal serial bus interface. Even if there are technical solutions to reduce corrosion by means of coating or the like in the related art, the effect is limited and the cost is high.
  • FIG. 2 is a schematic structural diagram of a universal serial bus interface in an embodiment of the present application.
  • the fourth pin A4 in the upper row is the voltage bus pin VBus
  • the fifth pin A5 in the upper row is the first Configure the channel pin CC1
  • the sixth pin A6 in the upper row is the data plus pin D+.
  • the first configuration channel pin CC1 is set between the voltage bus pin VBus and the data plus pin D+.
  • the data plus pin D+ supports a working voltage of 5V, while the voltage bus pin VBus can support a maximum working voltage of 20V.
  • an embodiment of the present application proposes a protection method for a universal serial bus interface.
  • FIG. 3 is one of a flow chart of steps of a method for protecting a universal serial bus interface in an embodiment of the present application. As shown in FIG. 3 , based on the above principles, the following protection methods are proposed in the embodiments of the present application:
  • the short circuit phenomenon may occur between the first configuration channel pin CC1 and the voltage bus pin VBus, or between the first configuration channel pin CC1 and the data plus pin D+.
  • the gap between the first configuration channel pin CC1 and the voltage bus pin VBus is relatively large. From the perspective of probability, the first configuration channel pin CC1 There is a high possibility of foreign objects and short circuits to the voltage bus pin VBus. Therefore, in the embodiment of the present application, the protection method of the embodiment of the present application is described by taking the occurrence of a foreign object between the first configuration channel pin CC1 and the voltage bus pin VBus as an example.
  • FIG. 4 is one of the schematic diagrams of a protection method for a universal serial bus interface in an embodiment of the present application.
  • FIG. 5 is the second schematic diagram of a protection method for a universal serial bus interface in an embodiment of the present application.
  • the circuit can be equivalent to the structure shown in Figure 4, and the resistor R is the configuration channel pin Micro-short resistor to voltage bus pin VBus.
  • a capacitor C is present in the circuit at the voltage bus pin VBus. When foreign objects exist, the voltage of the configuration channel pins will change due to the action of the resistor R and the capacitor C.
  • the protection method of the embodiment of the present application detects the voltage change of the configuration channel pin in the universal serial bus interface through the design of the hardware circuit and the improvement of the control logic, and thereby controls the power on and off of the configuration channel pin , in order to accurately identify foreign objects or abnormal operation of the configuration channel pins, and timely and effectively protect the configuration channel pins under abnormal conditions.
  • the embodiments of the present application can not only effectively avoid or reduce the corrosion of the configuration channel pins, prolong the service life of the configuration channel pins, but also ensure the plug-and-play of the universal serial bus interface.
  • the reason for adopting the above embodiment is that the sawtooth voltage formed by the short circuit on the configuration channel pin not only crosses the device detection voltage in two or more states, but also causes the configuration channel pin to detect frequent switching of the inserted device. This detection of frequent device switching is due to voltage fluctuations on the configuration channel pins caused by short circuits.
  • the preset switching time in the above embodiment is the time required for the user to normally switch the OTG device.
  • the preset change time can be preset before the device leaves the factory. When it is determined through the configuration channel pin detection that the device is frequently switched, and the frequent switching time (ie, the transition time of the voltage variable) is less than or equal to the preset transition time, it indicates that the configuration channel pin is short-circuited. In this case, close the corresponding configuration channel output to prevent configuration channel corrosion.
  • determining the transition time according to the voltage variable includes determining the transition time according to a change period of the voltage variable.
  • determining the transition time according to the voltage variable includes determining the transition time according to the waveform of the voltage variable.
  • FIG. 6 is a schematic diagram of a voltage change of a configuration channel pin in a short-circuit state according to an embodiment of the present application. Due to the action of the resistor R and the capacitor C in Figure 4 and Figure 5, the voltage of the configuration channel pin will change as shown in Figure 6, so that the configuration channel pin will form a sawtooth voltage, and the specific value of the voltage will be horizontal Identify voltages across two or more configuration channel states. Therefore, in the embodiment of the present application, the transition time can be determined by the variation period variable or the waveform variable of the voltage. In some implementations of the embodiments of the present application, detecting the voltage variable of the configuration channel pin specifically includes, in response to a power-on command, cyclically detecting the voltage variable of the configuration channel pin.
  • detecting the voltage variable of the configuration channel pin specifically includes cyclically detecting the voltage variable of the configuration channel pin in response to the screen-on command.
  • detecting the voltage variable of the configuration channel pin specifically includes, in response to the configuration channel pin detection polling instruction, cyclically detecting the voltage variable of the configuration channel pin.
  • detecting the voltage variable of the configuration channel pin specifically includes cyclically detecting the voltage variable of the configuration channel pin in response to a universal serial bus interface connection instruction.
  • the configuration channel pins are dotted in the normal state, in the embodiment of the present application, when the OTG device is powered on or powered on, in response to the configuration channel pin detection polling command sent by the OTG device, the cycle is performed in a fixed cycle.
  • the ground is polled to detect the voltage variable of the configuration channel pin, so as to detect or identify the short circuit problem of the configuration channel pin in time.
  • the OTG device when the OTG device receives the command to be powered on, in response to the boot command, the voltage variable of the pin of the configuration channel is cyclically detected, or the present application
  • the OTG device when the OTG device receives the universal serial bus interface connection instruction, in response to the universal serial bus interface connection instruction, the voltage variable of the configuration channel pin is cyclically detected.
  • the corresponding terminal device screen will be turned on.
  • the state of the configuration channel can also be initialized by judging whether the screen is awake, and the configuration channel voltage variable detection can be started, that is, in response to the bright screen command , the loop detects the voltage variable of the configuration channel pin.
  • the embodiment of the present application may perform steps 102 to 102 cyclically at least twice. Step 106.
  • FIG. 7 is the second flow chart of the steps of the protection method of the universal serial bus interface according to the embodiment of the present application. As shown in FIG. 7 , the protection method of the embodiment of the present application specifically includes:
  • S204 is re-executed after the execution of S206;
  • FIG. 8 is a schematic block diagram of the composition of an electronic device in an embodiment of the present application.
  • an embodiment of the present application further provides an electronic device 100, including a processor 120, a memory 130, and a program or instruction stored in the memory 130 and executable on the processor 120, and the program or instruction is processed
  • the device 120 is executed, each process of the above-mentioned embodiment of the protection method for the universal serial bus interface can be achieved, and the same technical effect can be achieved. To avoid repetition, details are not repeated here.
  • the electronic devices in the embodiments of the present application include the aforementioned mobile electronic devices and non-mobile electronic devices.
  • the electronic device 100 includes, but is not limited to, a protection device 110 , a processor 120 and a memory 130 .
  • the protection device 110 includes a detection module 112 , a determination module 114 , and a protection module 118 .
  • the electronic device 100 may also include a power source such as a battery for supplying power to various components, and the power source may be logically connected to the processor 120 through a power management system, so as to manage charging, discharging, and power consumption management through the power management system and other functions.
  • the structure of the electronic device shown in FIG. 8 does not constitute a limitation on the electronic device.
  • the electronic device may include more or less components than the one shown, or combine some components, or arrange different components, which will not be repeated here. .
  • the detection module 112 is used to detect the voltage variable of the configuration channel pin.
  • the determination module 114 is used to determine the transition time according to the voltage variable.
  • the comparison module 116 is configured to compare the transition time with the preset transition time to obtain a comparison result. When the comparison result is that the transition time is less than or equal to the preset transition time, the protection module 118 is configured to cut off the power supply of the configuration channel pin when the configuration channel pin is in a short-circuit state.
  • the determining module 114 is specifically configured to determine the transition time according to the change period variable of the voltage, or the determining module 114 is specifically configured to determine the transition time according to the waveform variable of the voltage.
  • the detection module 112 is specifically configured to cyclically detect the voltage variable of the configuration channel pin in response to the power-on command. Or in response to a bright screen command, loop detection of the voltage variables of the configuration channel pins. Or in response to the configuration channel pin detection polling command, loop detection of the voltage variable of the configuration channel pin. Or in response to a Universal Serial Bus interface connect command, cyclically detect the voltage variables of the configuration channel pins.
  • the execution subject may be the protection device 110 of the universal serial bus interface, or, or a method in the protection device 110 of the universal serial bus interface.
  • a control module for executing a protection method for loading a universal serial bus interface is described by taking the protection method for loading the USB interface performed by the protection device 110 of the USB interface as an example.
  • the protection device 110 of the universal serial bus interface in this embodiment of the present application may be a device, or may be a component, an integrated circuit, or a chip in a terminal.
  • the apparatus may be a mobile electronic device or a non-mobile electronic device.
  • the mobile electronic device may be a mobile phone, a tablet computer, a notebook computer, a palmtop computer, an in-vehicle electronic device, a wearable device, an ultra-mobile personal computer (UMPC), a netbook, or a personal digital assistant (personal digital assistant).
  • UMPC ultra-mobile personal computer
  • netbook or a personal digital assistant
  • non-mobile electronic devices can be servers, network attached storage (Network Attached Storage, NAS), personal computer (personal computer, PC), television (television, TV), teller machine or self-service machine, etc., this application Examples are not specifically limited.
  • Network Attached Storage NAS
  • personal computer personal computer, PC
  • television television
  • teller machine or self-service machine etc.
  • the protection device 110 of the universal serial bus interface in the embodiment of the present application may be a device with an operating system.
  • the operating system may be an Android (Android) operating system, an ios operating system, or other possible operating systems, which are not specifically limited in the embodiments of the present application.
  • the protection device 110 of the universal serial bus interface provided by the embodiment of the present application can implement various processes implemented by the protection device 110 of the universal serial bus interface in the method embodiment of FIG. 1 or FIG.
  • Embodiments of the present application further provide a readable storage medium, where a program or an instruction is stored on the readable storage medium, and when the program or instruction is executed by a processor, each process of the above-mentioned embodiment of the protection method for a universal serial bus interface is implemented, and The same technical effect can be achieved, and in order to avoid repetition, details are not repeated here.
  • the processor is the processor in the electronic device in the above embodiment.
  • the readable storage medium includes a computer-readable storage medium, such as a computer read-only memory (Read-Only Memory, ROM), a random access memory (Random Access Memory, RAM), a magnetic disk or an optical disk, and the like.
  • An embodiment of the present application further provides a chip, where the chip includes a processor and a communication interface, the communication interface and the processor are coupled, and the processor is used to run a program or an instruction to implement each process of the above-mentioned embodiment of the protection method for a universal serial bus interface, And can achieve the same technical effect, in order to avoid repetition, it is not repeated here.
  • Examples of computer-readable storage media shown include non-transitory computer-readable storage media, such as read-only memory (Read-Only Memory, referred to as ROM), random access memory (Random Access Memory, referred to as RAM), magnetic disks or CD etc.
  • processors may be, but are not limited to, general purpose processors, special purpose processors, application specific processors, or field programmable logic circuits. It will also be understood that each block of the block diagrams and/or flowchart illustrations, and combinations of blocks in the block diagrams and/or flowchart illustrations, can also be implemented by special purpose hardware for performing the specified functions or actions, or by special purpose hardware and/or A combination of computer instructions is implemented.
  • the chip mentioned in the embodiments of the present application may also be referred to as a system-on-chip, a system-on-chip, a system-on-a-chip, or a system-on-a-chip, or the like.

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  • General Engineering & Computer Science (AREA)
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Abstract

一种保护方法、保护装置、电子设备、可读存储介质和芯片，属于电子数据传输的技术领域。保护方法包括：检测配置通道引脚的电压变量（S102）；根据电压变量确定电压变量的变换时间（S104）；将变换时间与预设变换时间进行比较，获得比较结果（S106）；当比较结果为变换时间小于或等于预设变换时间，切断配置通道引脚的供电（S108）。

Description

保护方法、保护装置、电子设备、可读存储介质和芯片
相关申请的交叉引用
本申请主张2020年12月15日在中国提交的中国专利申请号202011477746.3的优先权，其全部内容通过引用包含于此。
技术领域
本申请属于电子数据传输的技术领域，具体涉及一种通用串行总线接口的保护方法、一种通用串行总线接口的保护装置、一种电子设备、一种可读存储介质和一种芯片。
背景技术
采用通用串行总线(Universal Serial Bus，USB)接口技术的On-The-Go(OTG)设备可实现多种不同终端设备之间的通信连接和数据交换，特别是实现掌上电脑(Personal Digital Assistant，PDA)设备、智能手机、数码照相机、摄像机、打印机等设备间多种不同制式的连接。尤其，OTG设备可在没有主设备的情况下实现从设备之间的连接。
在多种通用串行总线接口中，Type-C的通用串行总线接口由于具有正反两面均可插入和体积小巧的优势，因而在OTG设备中具有广泛的应用前景。
然而，Type-C通用串行总线接口的OTG设备在相关技术中至少存在如下问题，如为了实现设备的即插即用，Type-C的通用串行总线接口的配置通道(Configuration Channel，CC)引脚需要处于常带电的状态，以实现对插入设备类型的检测。然而，当有异物进入Type-C的通用串行总线接口，带电状态下的配置通道引脚容易被腐蚀或因短路损坏，并由此导致 Type-C的通用串行总线接口的使用寿命受到影响。
发明内容
本申请实施例的目的是提供一种通用串行总线接口的保护方法、一种通用串行总线接口的保护装置、一种电子设备、一种可读存储介质和一种芯片，能够解决Type-C的通用串行总线接口容易被腐蚀或因短路损坏的问题。
第一方面，本申请实施例提供了一种通用串行总线接口的保护方法，通用串行总线接口设有配置通道引脚，保护方法包括：检测配置通道引脚的电压变量；根据电压变量确定电压变量的变换时间；将变换时间与预设变换时间进行比较，获得比较结果；当比较结果为变换时间小于或等于预设变换时间，切断配置通道引脚的供电。
第二方面，本申请实施例提供了一种通用串行总线接口的保护装置，通用串行总线接口设有配置通道引脚，保护装置包括：检测模块，检测模块用于检测配置通道引脚的电压变量；确定模块，确定模块用于根据电压变量确定电压变量的变换时间；比较模块，比较模块用于将变换时间与预设变换时间进行比较，获得比较结果；保护模块，当比较结果为变换时间小于或等于预设变换时间，保护模块用于切断配置通道引脚的供电。
第三方面，本申请实施例提供了一种电子设备，该电子设备包括处理器、存储器及存储在存储器上并可在处理器上运行的程序或指令，程序或指令被处理器执行时实现如第一方面的通用串行总线接口的保护方法的步骤。
第四方面，本申请实施例提供了一种可读存储介质，可读存储介质上存储程序或指令，程序或指令被处理器执行时实现如第一方面的通用串行总线接口的保护方法的步骤。
第五方面，本申请实施例提供了一种芯片，芯片包括处理器和通信接 口，通信接口和处理器耦合，处理器用于运行程序或指令，实现如第一方面的通用串行总线接口的保护方法的步骤。
在本申请实施例中，通过检测配置通道引脚的电压，可根据配置通道引脚的电压对配置通道引脚的状态进行准确地判定。由此，本申请实施例能够及时识别到因异物进入通用串行总线接口而导致的配置通道引脚的短路或异常，并及时切断配置通道引脚的供电，以避免配置通道引脚被腐蚀或因短路损坏。综上，本申请实施例可有效保护通用串行总线接口，提高其使用寿命受。
附图说明
图1为本申请实施例中的一种通用串行总线接口的引脚排布图；
图2为本申请实施例中的一种通用串行总线接口的结构示意图；
图3为本申请实施例中的一种通用串行总线接口的保护方法的步骤流程图之一；
图4为本申请实施例中的一种通用串行总线接口的保护方法的原理图之一；
图5为本申请实施例中的一种通用串行总线接口的保护方法的原理图之二；
图6为本申请实施例中的一种配置通道引脚在短路状态下的电压变化示意图；
图7为本申请实施例中的一种通用串行总线接口的保护方法的步骤流程图之二；
图8为本申请实施例中的一种电子设备的组成示意框图。
其中，图1和图2、图4至图6、图8中的附图标记与部件名称之间的对应关系为：
A1上排第一引脚；A2上排第二引脚；A3上排第三引脚；A4上排第 四引脚；A5上排第五引脚；A6上排第六引脚；A7上排第七引脚；A8上排第八引脚；A9上排第九引脚；A10上排第十引脚；A11上排第十一引脚；A12上排第十二引脚；B1下排第一引脚；B2下排第二引脚；B3下排第三引脚；B4下排第四引脚；B5下排第五引脚；B6下排第六引脚；B7下排第七引脚；B8下排第八引脚；B9下排第九引脚；B10下排第十引脚；B11下排第十一引脚；B12下排第十二引脚；GND地线引脚；VBus电压总线引脚；CC1第一配置通道引脚；CC2第二配置通道引脚；D+数据加引脚；D-数据包减引脚；SBU1第一扩展功能引脚；SBU2第二扩展功能引脚；TX1+第一发送加引脚；TX1-第一发送减引脚；TX2+第二发送加引脚；TX2-第二发送减引脚；RX1+第一接收加引脚；RX1-第一接收减引脚；RX2+第二接收加引脚；RX2-第二接收减引脚；R电阻；C电容；100电子设备；110保护装置；112检测模块；114判定模块；116保护模块；120处理器；130存储器；140通信接口。
具体实施方式
下面将结合本申请实施例中的附图，对本申请实施例进行清楚、完整地描述，显然，所描述的实施例是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员还可获得的其他实施例，这些实施例都属于本申请保护的范围。
本申请的说明书和权利要求书中的术语“第一”、“第二”等是用于区别类似的对象，而不用于描述特定的顺序或先后次序。应该理解这样使用的数据在适当情况下可以互换，以便本申请的实施例能够以除了在这里图示或描述的那些以外的顺序实施。此外，说明书以及权利要求中“和/或”表示所连接对象的至少其中之一，字符“/”，一般表示前后关联对象是一种“或”的关系。
下面结合图1至图8，通过具体的实施例及其应用场景对本申请实施 例提供的通用串行总线接口的保护方法、通用串行总线接口的保护装置110、电子设备100、可读存储介质和芯片进行详细地说明。
本申请实施例提供的保护方法为针对Type C通用串行总线接口的保护方法。Type C通用串行总线接口包括插座端的Type C通用串行总线接口和插头端的Type C通用串行总线接口。插座端的Type C通用串行总线接口和插头端的Type C通用串行总线接口的引脚排布方式相反，本申请实施例以插座端的Type C通用串行总线接口为例，对通用串行总线接口的引脚排布方式进行说明。
图1为本申请实施例中的一种通用串行总线接口的引脚排布图。如图1所示，Type C通用串行总线接口具有结构对称，其包括上下相对设置的上排引脚和下排引脚。
上排引脚由左至右依次包括上排第一引脚A1、上排第二引脚A2、上排第三引脚A3、上排第四引脚A4、上排第五引脚A5、上排第六引脚A6、上排第七引脚A7、上排第八引脚A8、上排第九引脚A9、上排第十引脚A10、上排第十一引脚A11和上排第十二引脚A12。上排第一引脚A1为地线引脚GND，上排第二引脚A2为第一发送加引脚TX1+，上排第三引脚A3为第一发送减引脚TX1-，上排第四引脚A4为电压总线引脚VBus，上排第五引脚A5为第一配置通道引脚CC1，上排第六引脚A6为数据加引脚D+，上排第七引脚A7为数据包减引脚D-，上排第八引脚A8为第一扩展功能引脚SBU1，上排第九引脚A9为电压总线引脚VBus，上排第十引脚A10为第二接收减引脚RX2-，上排第十一引脚A11为第二接收加引脚RX2+，和上排第十二引脚A12为地线引脚GND。
下排引脚由右至左依次包括下排第一引脚B1、下排第二引脚B2、下排第三引脚B3、下排第四引脚B4、下排第五引脚B5、下排第六引脚B6、下排第七引脚B7、下排第八引脚B8、下排第九引脚B9、下排第十引脚B10、下排第十一引脚B11和下排第十二引脚B12。下排第一引脚B1为地 线引脚GND，下排第二引脚B2为第二发送加引脚TX2+，下排第三引脚B3为第二发送减引脚TX2-，下排第四引脚B4为电压总线引脚VBus，下排第五引脚B5为第二配置通道引脚CC2，下排第六引脚B6为数据加引脚D+，下排第七引脚B7为数据包减引脚D-，下排第八引脚B8为第二扩展功能引脚SBU2，下排第九引脚B9为电压总线引脚VBus，下排第十引脚B10为第一接收加引脚RX1-，下排第十一引脚B11为第一接收加引脚RX1+，下排第十二引脚B12为地线引脚GND。
在上述引脚中，第一配置通道引脚CC1和第二配置通道引脚CC2均为配置通道引脚，配置通道引脚是Type C通用串行总线接口的重要部件之一。配置通道引脚的作用在于检测或判断插入设备的类型。
配置通道引脚实现上述功能的原理如下。OTG设备在使用时的识别方式为，下行端口(Downstream Facing Port，DFP)为主，上行端口(Upstream Facing Port，UFP)为从。双角色端口(Dual Role port，DRP)可以做下行端口也可以做上行端口。两个双角色端口连接在一起时，任意一方为下行端口，另一方为上行端口。在下行端口的配置通道引脚有上拉电阻Rp，在上行端口的配置通道引脚有下拉电阻Rd。两个设备未连接时，下行端口的电压总线引脚VBus是无输出的。两个设备连接后，两个配置通道引脚相连，下行端口的配置通道引脚检测到上行端口的下拉电阻Rd，则表明已连接，下行端口打开VBus电源开关，输出电源给上行端口。配置通道引脚包括第一配置通道引脚CC1和第二配置通道引脚CC2。根据第一配置通道引脚CC1和第二配置通道引脚CC2中的哪一者检测到下拉电阻，可确定接口插入的方向，并由此切换发送加引脚和接收加引脚。在上述过程中，配置通道引脚作为插入检测引脚，会根据外部负载情况或OTG设备的配置通道状态而进入不同的状态(例如：ra/rd/rp_def/rp_15/rp_30)。每一种OTG设备的配置通道状态都是稳定的，即当一个OTG设备插入时，配置通道上不会存在两种设备识别电压。这里，从(英文名称：Sink) OTG设备的配置通道状态引脚电压如下表1和表2所示。
表1：配置通道状态引脚电压(仅预设USB Tpye-C电流)
检测 最小电压 最大电压 阈值电压
vRa -0.25V 0.15V 0.2V
vRa-Connect 0.25V 2.18V —
表2 配置通道状态引脚电压(多元电流)
检测 最小电压 最大电压 阈值电压
vRa -0.25V 0.15V 0.2V
vRa-Connect 0.25V 2.04V —
vRa-USB 0.25V 0.61V 0.66V
vRa-1.5 0.70V 1.16V 1.23V
vRa-3.0 1.31V 2.04V —
然而，当采用配置通道引脚作为插入检测元件时，需要保证配置通道引脚处于常带电的状态。而通用串行总线接口中有积灰、碎屑等异物时，会导致通用串行总线接口内部，尤其是带电的配置通道引脚的腐蚀。这一问题不仅影响到通用串行总线接口实现其例如充电、数据传输、投屏等常规功能的实现，甚至会影响到通用串行总线接口的使用寿命。即使相关技术中存在通过镀膜等方式降低腐蚀的技术方案，但其效果有限且成本高昂。
图2为本申请实施例中的一种通用串行总线接口的结构示意图。如图2所示，以图1中Type C通用串行总线接口的上排引脚举例而言，上排第四引脚A4为电压总线引脚VBus，上排第五引脚A5为第一配置通道引脚CC1，上排第六引脚A6为数据加引脚D+。第一配置通道引脚CC1设置在电压总线引脚VBus和数据加引脚D+之间。数据加引脚D+支持5V的工作电压，而电压总线引脚VBus最高可以支持20V的工作电压。因此，当有异物卡在第一配置通道引脚CC1周围，则第一配置通道引脚CC1很容易出现短路情况，造成接口和设备损坏。为此，本申请实施例提出了一种通用 串行总线接口的保护方法。
图3为本申请实施例中的一种通用串行总线接口的保护方法的步骤流程图之一。如图3所示，基于上述原理，本申请实施例提出了如下的保护方法：
S102，检测配置通道引脚的电压变量；
S104，根据电压变量确定电压变量的变换时间；
S106，将变换时间与预设变换时间进行比较，获得比较结果；
S108，当比较结果为变换时间小于或等于预设变换时间，切断配置通道引脚的供电。
短路现象可能在第一配置通道引脚CC1与电压总线引脚VBus之间发生，也可能在第一配置通道引脚CC1与数据加引脚D+之间发生。如图2所示，由于电压总线引脚VBus的长度相对较长，第一配置通道引脚CC1与电压总线引脚VBus之间间隙较大，从概率角度而言，第一配置通道引脚CC1与电压总线引脚VBus之间出现异物和短路的可能性较高。因此，本申请实施例以第一配置通道引脚CC1与电压总线引脚VBus之间出现异物为例，对本申请实施例的保护方法进行说明。图4为本申请实施例中的一种通用串行总线接口的保护方法的原理图之一。图5为本申请实施例中的一种通用串行总线接口的保护方法的原理图之二。如图4和图5所示，当配置通道引脚和电压总线引脚VBus之间有异物产生微短时，在电路上可以等效为图4所示的架构，电阻R为配置通道引脚与电压总线引脚VBus之间的微短电阻。电压总线引脚VBus的电路之中存在电容C。异物存在时，由于电阻R和电容C的作用，会使得配置通道引脚的电压产生变化。鉴于上述原因，本申请实施例的保护方法通过硬件电路的设计和对控制逻辑的改进，检测通用串行总线接口中配置通道引脚的电压变化，并由此控制配置通道引脚的电力通断，以准确识别异物或配置通道引脚的工作异常，在异常状态下及时有效地保护配置通道引脚。本申请实施例不仅能够有效 避免或减少配置通道引脚的腐蚀，延长配置通道引脚的使用寿命，亦能够保证通用串行总线接口的即插即用。
采用上述实施方式的原因在于，配置通道引脚因短路形成的锯齿状电压不仅会横跨两个或两个以上状态的设备检测电压，还会使得配置通道引脚检测到插入设备发生频繁切换。设备发生频繁切换的这一检测结果是由于短路引起的配置通道引脚电压波动导致的。上述实施方式中的预设变换时间为用户正常切换OTG设备时需要的时间。预设变换时间可在设备出厂前进行预先设置。当通过配置通道引脚检测判断到设备频繁切换，并且频繁切换的时间(即电压变量的变换时间)小于或等于预设变换时间，则表明配置通道引脚短路。在此情况下，则关闭对应的配置通道输出，防止配置通道腐蚀。
在本申请实施例的部分实施方式中，根据电压变量确定变换时间包括根据电压变量的变化周期确定变换时间。
在本申请实施例的部分实施方式中，根据电压变量确定变换时间包括根据电压变量的波形确定变换时间。
图6为本申请实施例中的一种配置通道引脚在短路状态下的电压变化示意图。由于图4和图5中电阻R和电容C的作用，会使得配置通道引脚的电压产生如图6所示的变化，使得配置通道引脚形成锯齿状的电压，该电压的具体数值会横跨两种或两种以上的配置通道状态识别电压。因此，本申请实施例可通过电压的变化周期变量或波形变量确定变换时间。在本申请实施例的部分实施方式中，检测配置通道引脚的电压变量具体包括响应于开机指令，循环检测配置通道引脚的电压变量。
在本申请实施例的部分实施方式中，检测配置通道引脚的电压变量具体包括响应于亮屏指令，循环检测配置通道引脚的电压变量。
在本申请实施例的部分实施方式中，检测配置通道引脚的电压变量具体包括响应于配置通道引脚检测轮询指令，循环检测配置通道引脚的电压 变量。
在本申请实施例的部分实施方式中，检测配置通道引脚的电压变量具体包括响应于通用串行总线接口连接指令，循环检测配置通道引脚的电压变量。
需要说明的是，由于配置通道引脚在常态下带点，因此，本申请实施例在OTG设备开机或通电常态下，响应于OTG设备发出的配置通道引脚检测轮询指令，以固定周期循环地以轮询方式检测配置通道引脚的电压变量，以及时检测或识别配置通道引脚的短路问题。
在此基础上，为了进一步对配置通道以及通用串行总线接口实施保护，本申请实施例在OTG设备接收待开机指令时，响应于开机指令，循环检测配置通道引脚的电压变量，或者本申请实施例在OTG设备接收通用串行总线接口连接指令时，响应于通用串行总线接口连接指令，循环检测配置通道引脚的电压变量。此外，用户在使用OTG设备时，均会打开对应的终端设备屏幕，因此本申请实施例还可通过判断屏幕是否唤醒，来初始化配置通道状态，开始配置通道电压变量检测，即响应于亮屏指令，循环检测配置通道引脚的电压变量。
需要说明的是，由于配置通道引脚与电压总线引脚之间的微短电阻会由于反复插拔而逐渐消失或者逐渐变大，因此，本申请实施例可至少两次地循环执行步骤102至步骤106。
图7为本申请实施例的通用串行总线接口的保护方法的步骤流程图之二。如图7所示，本申请实施例的保护方法具体包括：
S202，打开配置通道轮询；
S204，判定用户是否手动关闭OTG|设备，其中，若判定结果为是，则执行S206，若判定结果为否，则执行S208；
S206，保持OTG|设备关闭；
这里，S206执行完毕后重新执行S204；
S208，检测配置通道状态，以判定是否有异物，其中，若判定结果为是，则执行S210，若判定结果为否，则执行步骤212；
S210，关闭配置通道轮询，其中，S210执行完毕后重新执行S216；
S212，打开OTG|设备，其中，S212执行完毕后重新执行S214；
S214，OTG|设备实现即插即用功能；
S216，判定OTG|设备的屏幕是否亮起，其中，若判定结果为是，则执行S218，若判定结果为否，则执行S220；
S218，判定用户是否手动打开OTG|设备，其中，若判定结果为是，则执行S220，若判定结果为否，则执行S222；
S220，判定OTG|设备的屏幕是否由灭到亮，其中，若判定结果为是，则执行S202，若判定结果为否，则执行S224；
S222，保持配置通道轮询关闭，其中，S222执行完毕后重新执行S216；
S224，保持配置通道轮询关闭。
图8为本申请实施例中的一种电子设备的组成示意框图。如图8所示，本申请实施例还提供一种电子设备100，包括处理器120，存储器130，存储在存储器130上并可在处理器120上运行的程序或指令，该程序或指令被处理器120执行时实现上述通用串行总线接口的保护方法实施例的各个过程，且能达到相同的技术效果，为避免重复，这里不再赘述。
需要注意的是，本申请实施例中的电子设备包括上述的移动电子设备和非移动电子设备。
电子设备100包括但不限于保护装置110、处理器120和存储器130。保护装置110包括检测模块112、确定模块114、和保护模块118。本领域技术人员可以理解，电子设备100还可以包括给各个部件供电的电源比如电池，电源可以通过电源管理系统与处理器120逻辑相连，从而通过电源管理系统实现管理充电、放电、以及功耗管理等功能。图8中示出的电子设备结构并不构成对电子设备的限定，电子设备可以包括比图示更多或更 少的部件，或者组合某些部件，或者不同的部件布置，在此不再赘述。
检测模块112用于检测配置通道引脚的电压变量。确定模块114用于根据电压变量确定变换时间。比较模块116用于将变换时间与预设变换时间进行比较，获得比较结果。当比较结果为变换时间小于或等于预设变换时间，保护模块118用于在配置通道引脚处于短路状态时，切断配置通道引脚的供电。确定模块114具体用于根据电压的变化周期变量确定变换时间，或者确定模块114具体用于根据电压的波形变量确定变换时间。
检测模块112具体用于响应于开机指令，循环检测配置通道引脚的电压变量。或响应于亮屏指令，循环检测配置通道引脚的电压变量。或响应于配置通道引脚检测轮询指令，循环检测配置通道引脚的电压变量。或响应于通用串行总线接口连接指令，循环检测配置通道引脚的电压变量。
需要说明的是，本申请实施例提供的通用串行总线接口的保护方法，执行主体可以为通用串行总线接口的保护装置110，或者，或者该通用串行总线接口的保护装置110中的用于执行加载通用串行总线接口的保护方法的控制模块。本申请实施例中以通用串行总线接口的保护装置110执行加载通用串行总线接口的保护方法为例，说明本申请实施例提供的通用串行总线接口的保护方法。
本申请实施例中的通用串行总线接口的保护装置110可以是装置，也可以是终端中的部件、集成电路、或芯片。该装置可以是移动电子设备，也可以为非移动电子设备。示例性的，移动电子设备可以为手机、平板电脑、笔记本电脑、掌上电脑、车载电子设备、可穿戴设备、超级移动个人计算机(ultra-mobile personal computer，UMPC)、上网本或者个人数字助理(personal digital assistant，PDA)等，非移动电子设备可以为服务器、网络附属存储器(Network Attached Storage，NAS)、个人计算机(personal computer，PC)、电视机(television，TV)、柜员机或者自助机等，本申请实施例不作具体限定。
本申请实施例中的通用串行总线接口的保护装置110可以为具有操作系统的装置。该操作系统可以为安卓(Android)操作系统，可以为ios操作系统，还可以为其他可能的操作系统，本申请实施例不作具体限定。
本申请实施例提供的通用串行总线接口的保护装置110能够实现图1或图7的方法实施例中通用串行总线接口的保护装置110实现的各个过程，为避免重复，这里不再赘述。
本申请实施例还提供一种可读存储介质，可读存储介质上存储有程序或指令，该程序或指令被处理器执行时实现上述通用串行总线接口的保护方法实施例的各个过程，且能达到相同的技术效果，为避免重复，这里不再赘述。
其中，处理器为上述实施例中的电子设备中的处理器。可读存储介质，包括计算机可读存储介质，如计算机只读存储器(Read-Only Memory，ROM)、随机存取存储器(Random Access Memory，RAM)、磁碟或者光盘等。
本申请实施例另提供了一种芯片，芯片包括处理器和通信接口，通信接口和处理器耦合，处理器用于运行程序或指令，实现上述通用串行总线接口的保护方法实施例的各个过程，且能达到相同的技术效果，为避免重复，这里不再赘述。所示的计算机可读存储介质的示例包括非暂态计算机可读存储介质，如只读存储器(Read-Only Memory，简称ROM)、随机存取存储器(Random Access Memory，简称RAM)、磁碟或者光盘等。
上面参考根据本申请的实施例的方法、装置(系统)和计算机程序产品的流程图和/或框图描述了本申请的各方面。应当理解，流程图和/或框图中的每个方框以及流程图和/或框图中各方框的组合可以由计算机程序指令实现。这些计算机程序指令可被提供给通用计算机、专用计算机、或其它可编程数据处理装置的处理器，以产生一种机器，使得经由计算机或其它可编程数据处理装置的处理器执行的这些指令使能对流程图和/或框图的 一个或多个方框中指定的功能/动作的实现。这种处理器可以是但不限于是通用处理器、专用处理器、特殊应用处理器或者现场可编程逻辑电路。还可理解，框图和/或流程图中的每个方框以及框图和/或流程图中的方框的组合，也可以由执行指定的功能或动作的专用硬件来实现，或可由专用硬件和计算机指令的组合来实现。
应理解，本申请实施例提到的芯片还可以称为系统级芯片、系统芯片、芯片系统或片上系统芯片等。
需要说明的是，在本文中，术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含，从而使得包括一系列要素的过程、方法、物品或者装置不仅包括那些要素，而且还包括没有明确列出的其他要素，或者是还包括为这种过程、方法、物品或者装置所固有的要素。在没有更多限制的情况下，由语句“包括一个……”限定的要素，并不排除在包括该要素的过程、方法、物品或者装置中还存在另外的相同要素。此外，需要指出的是，本申请实施方式中的方法和装置的范围不限按示出或讨论的顺序来执行功能，还可包括根据所涉及的功能按基本同时的方式或按相反的顺序来执行功能，例如，可以按不同于所描述的次序来执行所描述的方法，并且还可以添加、省去、或组合各种步骤。另外，参照某些示例所描述的特征可在其他示例中被组合。
通过以上的实施方式的描述，本领域的技术人员可以清楚地了解到上述实施例方法可借助软件加必需的通用硬件平台的方式来实现，当然也可以通过硬件，但很多情况下前者是更佳的实施方式。基于这样的理解，本申请本质上或者说对相关技术做出贡献的部分可以以计算机软件产品的形式体现出来，该计算机软件产品存储在一个存储介质(如ROM/RAM、磁碟、光盘)中，包括若干指令用以使得一台终端(可以是手机，计算机，服务器，空调器，或者网络设备等)执行本申请各个实施例所示的方法。
上面结合附图对本申请的实施例进行了描述，但是本申请并不局限于 上述的具体实施方式，上述的具体实施方式仅仅是示意性的，而不是限制性的，本领域的普通技术人员在本申请的启示下，在不脱离本申请宗旨和权利要求所保护的范围情况下，还可做出很多形式，均属于本申请的保护之内。

Claims (11)

  1. 一种通用串行总线接口的保护方法，其中，所述通用串行总线接口设有配置通道引脚，所述保护方法包括：
    检测所述配置通道引脚的电压变量；
    根据所述电压变量确定所述电压变量的变换时间；
    将所述变换时间与预设变换时间进行比较，获得比较结果；
    当所述比较结果为所述变换时间小于或等于所述预设变换时间，切断所述配置通道引脚的供电。
  2. 根据权利要求1所述的通用串行总线接口的保护方法，其中，所述根据所述电压变量确定所述电压变量的变换时间，包括：
    根据所述电压的变化周期变量确定所述变换时间；和/或
    根据所述电压的波形变量确定所述变换时间。
  3. 根据权利要求1或2所述的通用串行总线接口的保护方法，其中，所述检测所述配置通道引脚的电压变量，包括：
    响应于开机指令，循环检测所述配置通道引脚的电压变量；或
    响应于亮屏指令，循环检测所述配置通道引脚的电压变量；或
    响应于配置通道引脚检测轮询指令，循环检测所述配置通道引脚的电压变量；或
    响应于通用串行总线接口连接指令，循环检测所述配置通道引脚的电压变量。
  4. 一种通用串行总线接口的保护装置，所述通用串行总线接口设有配置通道引脚，所述保护装置包括：
    检测模块(112)，所述检测模块(112)用于检测所述配置通道引脚的电压变量；
    确定模块(114)，所述确定模块(114)用于根据所述电压变量确定所述电压变量的变换时间；
    比较模块(116)，所述比较模块(116)用于将所述变换时间与预设变换时间进行比较，获得比较结果；
    保护模块(118)，当所述比较结果为所述变换时间小于或等于所述预设变换时间，所述保护模块(118)用于切断所述配置通道引脚的供电。
  5. 根据权利要求4所述的通用串行总线接口的保护装置，其特征在于，所述确定模块(114)具体用于：
    根据所述电压的变化周期变量确定所述变换时间；和/或
    根据所述电压的波形变量确定所述变换时间。
  6. 根据权利要求4或5所述的通用串行总线接口的保护装置，其特征在于，所述检测模块(112)具体用于：
    响应于开机指令，循环检测所述配置通道引脚的电压变量；或
    响应于亮屏指令，循环检测所述配置通道引脚的电压变量；或
    响应于配置通道引脚检测轮询指令，循环检测所述配置通道引脚的电压变量；或
    响应于通用串行总线接口连接指令，循环检测所述配置通道引脚的电压变量。
  7. 一种电子设备，包括处理器(120)，存储器(130)及存储在所述存储器(130)上并可在所述处理器(120)上运行的程序或指令，所述程序或指令被所述处理器(120)执行时实现如权利要求1至3中任一项所述的通用串行总线接口的保护方法的步骤。
  8. 一种电子设备，被配置用于执行如权利要求1至3中任一项所述的通用串行总线接口的保护方法的步骤。
  9. 一种可读存储介质，所述可读存储介质上存储程序或指令，所述程序或指令被处理器执行时实现如权利要求1至3中任一项所述的通用串行总线接口的保护方法的步骤。
  10. 一种芯片，所述芯片包括处理器(120)和通信接口(140)，所述通信接口(140)和所述处理器(120)耦合，所述处理器(120)用于运行程序或指令，实现如权利要求1至3中任一项所述的通用串行总线接口的保护方法的步骤。
  11. 一种计算机程序产品，包括有形地包含在计算机可读介质上的计算机程序，所述计算机程序包含用于执行权利要求1至3中任一项所述的通用串行总线接口的保护方法的程序代码。
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