WO2023000367A1 - 限流电路 - Google Patents

限流电路 Download PDF

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Publication number
WO2023000367A1
WO2023000367A1 PCT/CN2021/109098 CN2021109098W WO2023000367A1 WO 2023000367 A1 WO2023000367 A1 WO 2023000367A1 CN 2021109098 W CN2021109098 W CN 2021109098W WO 2023000367 A1 WO2023000367 A1 WO 2023000367A1
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WO
WIPO (PCT)
Prior art keywords
terminal
voltage
electrically connected
unit
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2021/109098
Other languages
English (en)
French (fr)
Inventor
李浩然
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TCL China Star Optoelectronics Technology Co Ltd
Original Assignee
TCL China Star Optoelectronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by TCL China Star Optoelectronics Technology Co Ltd filed Critical TCL China Star Optoelectronics Technology Co Ltd
Priority to EP21810512.0A priority Critical patent/EP4376243A4/en
Priority to KR1020217027624A priority patent/KR102627169B1/ko
Priority to JP2021549396A priority patent/JP7555942B2/ja
Priority to US17/603,073 priority patent/US12132307B2/en
Publication of WO2023000367A1 publication Critical patent/WO2023000367A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H9/00—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
    • H02H9/001—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection limiting speed of change of electric quantities, e.g. soft switching on or off
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H3/00—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
    • H02H3/006—Calibration or setting of parameters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H7/00—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
    • H02H7/10—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers
    • H02H7/12—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers
    • H02H7/1213—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers for DC-DC converters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H7/00—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
    • H02H7/20—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for electronic equipment
    • H02H7/205—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for electronic equipment for controlled semi-conductors which are not included in a specific circuit arrangement
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0045—Converters combining the concepts of switch-mode regulation and linear regulation, e.g. linear pre-regulator to switching converter, linear and switching converter in parallel, same converter or same transistor operating either in linear or switching mode
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/32—Means for protecting converters other than automatic disconnection
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/025—Reduction of instantaneous peaks of current
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H3/00—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
    • H02H3/08—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to excess current
    • H02H3/087—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to excess current for DC applications
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H9/00—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
    • H02H9/02—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess current
    • H02H9/025—Current limitation using field effect transistors
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0067—Converter structures employing plural converter units, other than for parallel operation of the units on a single load
    • H02M1/007—Plural converter units in cascade
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of DC power input into DC power output
    • H02M3/02—Conversion of DC power input into DC power output without intermediate conversion into AC
    • H02M3/04—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
    • H02M3/10—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators

Definitions

  • the present application relates to the field of display technology, in particular to a current limiting circuit.
  • the disadvantage of the traditional design is that the current limit value for AVDD is fixed. If the current limit value is too small, it will cause the power management integrated chip to fail to build up the voltage within the specified time due to the current limit due to the heavy load startup; if the current limit value is too large, it will also fail. When the power management integrated chip is short-circuited in the back-end load, the long-term high current will cause damage to components, such as: source driver damage and fire.
  • the present application provides a current-limiting circuit, which can make the current-limiting value of the current-limiting circuit adjustable, thereby preventing the power management integrated chip from failing to start when it is overloaded, and preventing the power management integrated chip from being damaged by short-circuit startup.
  • the present application provides a current limiting circuit, which includes:
  • a current limiting module which is electrically connected to the control terminal of the first transistor, and the current limiting module is used to output a control signal to the control terminal of the first transistor to control the state of the first transistor, so that the The current limiting value of the current limiting circuit is adjustable.
  • the current limiting module includes a boost unit, a variable voltage unit, a first comparison unit, and a constant current unit;
  • the first terminal of the boosting unit is electrically connected to the first voltage terminal
  • the second terminal of the boosting unit is electrically connected to the input terminal of the first transistor
  • the first terminal of the variable voltage unit One end is electrically connected to the first voltage end
  • the second end of the variable voltage unit is electrically connected to the first end of the first comparison unit
  • the second end of the first comparison unit is electrically connected to the first comparison unit.
  • the input end of the first transistor is electrically connected
  • the third end of the first comparison unit is electrically connected to the first end of the constant current unit
  • the second end of the constant current unit is electrically connected to the first transistor.
  • the control terminal is electrically connected; among them,
  • the boost unit is used to make the voltage of the second terminal of the boost unit greater than the voltage of the first terminal of the boost unit; the variable voltage unit is used to output a variable voltage; the first comparison unit Outputting a constant current unit control signal at the third terminal of the first comparison unit based on the voltage at the first terminal of the first comparison unit and the voltage at the second terminal of the first comparison unit; the constant current The unit is used to output a constant current under the control of the constant current unit control signal.
  • the boost unit includes an inductor, a second transistor, and a diode;
  • the first terminal of the inductor is electrically connected to the first voltage terminal
  • the second terminal of the inductor and the first terminal of the second transistor are electrically connected to the first terminal of the diode, and the diode
  • the second end of the second transistor is electrically connected to the input end of the first transistor, and the second end of the second transistor is electrically connected to the ground end.
  • the current limiting value of the current limiting circuit can be obtained according to the following formula:
  • I (V1-V2)/R, wherein, I is the current limiting value of the current limiting circuit, V1 is the voltage value set by the variable voltage source, V2 is the voltage drop value of the diode, and R is The impedance value of the inductor.
  • variable voltage unit includes a variable voltage source; the first end of the variable voltage source is electrically connected to the first voltage end, and the variable voltage source The second end of the second end is electrically connected with the first end of the first comparison unit.
  • the first comparison unit includes a first comparator; the first end of the first comparator is electrically connected to the second end of the variable voltage unit, and the first A second end of a comparator is electrically connected to the input end of the first transistor, and a third end of the first comparator is electrically connected to the first end of the constant current unit.
  • the constant current unit includes a constant current source; the first end of the constant current source is electrically connected to the third end of the first comparison unit, and the constant current source The second end of the constant current source is electrically connected to the control end of the first transistor, and the third end of the constant current source is electrically connected to the ground end.
  • the current limiting module further includes a timing unit and a second comparison unit;
  • the timing unit is electrically connected to the first terminal of the second comparison unit; the second terminal of the second comparison unit is electrically connected to the second voltage terminal, and the third terminal of the second comparison unit receiving a fixed voltage signal, the fourth end of the second comparison unit is electrically connected to the control end of the first transistor;
  • the timing unit is used to output a control signal of the comparison unit at intervals of a preset time; the second comparison unit is used to control the control signal of the comparison unit based on the voltage of the second terminal of the second comparison unit and the The voltage of the third terminal of the second comparison unit outputs the first transistor control signal to the control terminal of the first transistor at the fourth terminal of the second comparison unit.
  • the timing unit includes a timer, and the timer is electrically connected to the first end of the second comparison unit.
  • the second comparison unit includes a second comparator; the first end of the second comparator is electrically connected to the timing unit; the second end of the second comparator terminal is electrically connected to the second voltage terminal, the third terminal of the second comparator is connected to a fixed voltage signal, and the fourth terminal of the second comparator is electrically connected to the control terminal of the first transistor .
  • the voltage of the fixed voltage signal is between 0.85 times the voltage of the first voltage terminal and 0.9 times the voltage of the first voltage terminal.
  • the current limiting circuit further includes a first capacitor, a second capacitor, a third capacitor and a resistor;
  • the first end of the first capacitor is electrically connected to the first voltage end
  • the first end of the second capacitor is electrically connected to the input end of the first transistor
  • one end of the third capacitor and The first terminal of the resistor is electrically connected to the second voltage terminal, the second terminal of the first capacitor, the second terminal of the second capacitor, the second terminal of the third capacitor and the The second end of the resistor is electrically connected to the ground.
  • the present application also provides a current limiting circuit, which includes:
  • a current limiting module which is electrically connected to the control terminal of the first transistor, and the current limiting module is used to output a control signal to the control terminal of the first transistor to control the state of the first transistor, so that the The current limiting value of the current limiting circuit is adjustable;
  • the current limiting module includes a boost unit, a variable voltage unit, a first comparison unit and a constant current unit;
  • the first terminal of the boosting unit is electrically connected to the first voltage terminal
  • the second terminal of the boosting unit is electrically connected to the input terminal of the first transistor
  • the first terminal of the variable voltage unit One end is electrically connected to the first voltage end
  • the second end of the variable voltage unit is electrically connected to the first end of the first comparison unit
  • the second end of the first comparison unit is electrically connected to the first comparison unit.
  • the input end of the first transistor is electrically connected
  • the third end of the first comparison unit is electrically connected to the first end of the constant current unit
  • the second end of the constant current unit is electrically connected to the first transistor.
  • the control terminal is electrically connected; among them,
  • the boost unit is used to make the voltage of the second terminal of the boost unit greater than the voltage of the first terminal of the boost unit;
  • the variable voltage unit is used to output a variable voltage;
  • the first comparison unit Outputting a constant current unit control signal at the third terminal of the first comparison unit based on the voltage at the first terminal of the first comparison unit and the voltage at the second terminal of the first comparison unit;
  • the constant current The unit is used to output a constant current under the control of the constant current unit control signal;
  • the current limiting circuit also includes a first capacitor, a second capacitor, a third capacitor and a resistor;
  • the first end of the first capacitor is electrically connected to the first voltage end
  • the first end of the second capacitor is electrically connected to the input end of the first transistor
  • one end of the third capacitor and The first terminal of the resistor is electrically connected to the second voltage terminal, the second terminal of the first capacitor, the second terminal of the second capacitor, the second terminal of the third capacitor and the The second end of the resistor is electrically connected to the ground.
  • the boost unit includes an inductor, a second transistor, and a diode;
  • the first terminal of the inductor is electrically connected to the first voltage terminal
  • the second terminal of the inductor and the first terminal of the second transistor are electrically connected to the first terminal of the diode, and the diode
  • the second end of the second transistor is electrically connected to the input end of the first transistor, and the second end of the second transistor is electrically connected to the ground end.
  • the current limiting value of the current limiting circuit can be obtained according to the following formula:
  • I (V1-V2)/R, wherein, I is the current limiting value of the current limiting circuit, V1 is the voltage value set by the variable voltage source, V2 is the voltage drop value of the diode, and R is The impedance value of the inductor.
  • variable voltage unit includes a variable voltage source; the first end of the variable voltage source is electrically connected to the first voltage end, and the variable voltage source The second end of the second end is electrically connected with the first end of the first comparison unit.
  • the first comparison unit includes a first comparator; the first end of the first comparator is electrically connected to the second end of the variable voltage unit, and the first A second end of a comparator is electrically connected to the input end of the first transistor, and a third end of the first comparator is electrically connected to the first end of the constant current unit.
  • the constant current unit includes a constant current source; the first end of the constant current source is electrically connected to the third end of the first comparison unit, and the constant current source The second end of the constant current source is electrically connected to the control end of the first transistor, and the third end of the constant current source is electrically connected to the ground end.
  • the current limiting module further includes a timing unit and a second comparison unit;
  • the timing unit is electrically connected to the first terminal of the second comparison unit; the second terminal of the second comparison unit is electrically connected to the second voltage terminal, and the third terminal of the second comparison unit receiving a fixed voltage signal, the fourth end of the second comparison unit is electrically connected to the control end of the first transistor;
  • the timing unit is used to output a control signal of the comparison unit at intervals of a preset time; the second comparison unit is used to control the control signal of the comparison unit based on the voltage of the second terminal of the second comparison unit and the The voltage of the third terminal of the second comparison unit outputs the first transistor control signal to the control terminal of the first transistor at the fourth terminal of the second comparison unit.
  • the timing unit includes a timer, and the timer is electrically connected to the first end of the second comparison unit;
  • the second comparison unit includes a second comparator; the first end of the second comparator is electrically connected to the timing unit; the second end of the second comparator is electrically connected to the second voltage end connected, the third terminal of the second comparator is connected to a fixed voltage signal, and the fourth terminal of the second comparator is electrically connected to the control terminal of the first transistor.
  • the current limiting circuit provided by this application outputs a control signal to the control terminal of the first transistor through the current limiting module to control the state of the first transistor, so that the current limiting value of the current limiting circuit can be adjusted, thereby preventing the power management integrated chip from resetting. Load boot failure, and prevent the power management integrated chip short-circuit boot damage.
  • FIG. 1 is a schematic structural diagram of a current limiting circuit provided by an embodiment of the present application
  • Fig. 2 is another structural schematic diagram of the current limiting circuit provided by the embodiment of the present application.
  • FIG. 3 is another structural schematic diagram of the current limiting circuit provided by the embodiment of the present application.
  • FIG. 4 is a schematic circuit diagram of a current limiting circuit provided in an embodiment of the present application.
  • FIG. 6 is a schematic diagram of the principle of the discharge process of the boost unit.
  • the embodiment of the present application provides a current limiting circuit, which can make the current limiting value of the current limiting circuit adjustable, so as to prevent the power management integrated chip from failing to start when it is overloaded, and to prevent the power management integrated chip from being damaged when it is turned on by short circuit. Details are given below. It should be noted that the description sequence of the following embodiments is not intended to limit the preferred sequence of the embodiments.
  • the transistors used in all the embodiments of the present application may be thin film transistors or field effect transistors or other devices with the same characteristics.
  • the transistors used in this embodiment of the present application may include P-type transistors and/or N-type transistors. Wherein, when the gate of the P-type transistor is at a low level, the source and the drain are turned on; when the gate is at a high level, the source and the drain are turned off. For N-type transistors, when the gate is at a high level, the source and drain are turned on; when the gate is at a low level, the source and drain are turned off.
  • FIG. 1 is a schematic structural diagram of a current limiting circuit provided by an embodiment of the present application.
  • the current limiting circuit 10 provided by the embodiment of the present application includes a first voltage terminal A, a second voltage terminal B, a first transistor T1 and a current limiting module 100 .
  • the input end of the first transistor T1 and the output end of the first transistor T1 are connected in series on the line formed by the first voltage end A and the second voltage end B.
  • the current limiting module 100 is electrically connected to the control terminal of the first transistor T1.
  • the current limiting module 100 is used to output a control signal to the control terminal of the first transistor T1 to control the state of the first transistor T1 so that the current limiting value of the current limiting circuit 10 can be adjusted. It can be understood that the first end of the first transistor T1 is one of the source or the drain of the transistor, and the second end of the first transistor T1 is the other of the source or the drain of the transistor. A control terminal of the transistor T1 is the gate of the transistor.
  • the first voltage terminal A may be the working voltage input terminal of the power management chip; the second voltage terminal B may be the AVDD voltage output terminal.
  • the power management integrated chip will limit the current during the start-up process of the AVDD voltage. The purpose is to slowly turn on the first transistor T1, and the AVDD voltage will be established smoothly to prevent excessive current from damaging the loop. other electronic components.
  • the current-limiting value of the current-limiting circuit 10 is adjustable.
  • the current limiting circuit 10 of the embodiment of the present application can set the current limiting value of the current limiting circuit 10 according to the actual situation, so that the current limiting value of the current limiting circuit 10 can be adjusted, thereby preventing the power management integrated chip from being overloaded. Boot failure, and prevent the power management integrated chip from short-circuiting and booting damage.
  • FIG. 2 is another schematic structural diagram of the current limiting circuit provided by the embodiment of the present application.
  • the current limiting module 100 includes a boost unit 101 , a variable voltage unit 102 , a first comparison unit 1031 and a constant current unit 104 .
  • the first terminal of the boost unit 101 is electrically connected to the first voltage terminal A.
  • the second end of the boost unit 101 is electrically connected to the input end of the first transistor T1.
  • the first terminal of the variable voltage unit 102 is electrically connected to the first voltage terminal A.
  • the second end of the variable voltage unit 102 is electrically connected to the first end of the first comparison unit 1031 .
  • the second end of the first comparing unit 1031 is electrically connected to the input end of the first transistor T1.
  • the second end of the constant current unit 104 is electrically connected to the control end of the first transistor T1. It can be understood that in the embodiment of the present application, the current limiting value of the current limiting circuit 10 is adjustable through the boost unit 101 , the variable voltage unit 102 , the first comparison unit 1031 and the constant current unit 104 .
  • FIG. 3 is another schematic structural diagram of the current limiting circuit provided by the embodiment of the present application.
  • the difference between the current limiting circuit 10 shown in FIG. 3 and the current limiting circuit 10 shown in FIG. 2 is that the current limiting circuit 10 shown in FIG. 3 further includes a second comparison unit 1032 and a timing unit 105 .
  • the current limiting module 100 includes a boost unit 101 , a variable voltage unit 102 , a comparison unit 103 , a constant current unit 104 and a timing unit 105 .
  • the comparison unit 103 includes a first comparison unit 1031 and a second comparison unit 1032 .
  • the first terminal of the boost unit 101 is electrically connected to the first voltage terminal A.
  • the second end of the boost unit 101 is electrically connected to the input end of the first transistor T1.
  • the first terminal of the variable voltage unit 102 is electrically connected to the first voltage terminal A.
  • the second end of the variable voltage unit 102 is electrically connected to the first end of the first comparison unit 1031 .
  • the second end of the first comparing unit 1031 is electrically connected to the input end of the first transistor T1.
  • the third end of the first comparison unit 1031 is electrically connected to the first end of the constant current unit 104 .
  • the second end of the constant current unit 104 is electrically connected to the control end of the first transistor T1.
  • the timing unit 105 is electrically connected to the first end of the second comparison unit 1032 .
  • the second end of the second comparison unit 1032 is electrically connected to the second voltage end B. As shown in FIG.
  • the third terminal of the second comparison unit 1032 is connected to the fixed voltage signal M.
  • the fourth end of the second comparison unit 1032 is electrically connected to the control end of the first transistor T1. It can be understood that in the embodiment of the present application, the current limiting value and the limiting value of the current limiting circuit 10 are made Flow time is adjustable.
  • the boost unit 101 is a common switching DC boost circuit, which controls the inductor L to store and release energy by turning on and off the second transistor Q, so that the output voltage of the boost unit 101 is higher than the input voltage . That is, in the embodiment of the present application, the boost unit 101 is used to make the voltage of the second end of the boost unit 101 greater than the voltage of the first end of the boost unit 101 . It can be understood that the first end of the boost unit 101 is an input voltage input end, and the second end of the boost unit 101 is an output voltage output end.
  • variable voltage unit 102 is a model abstracted from the actual power supply, and can always maintain a certain voltage at its two ends regardless of the amount of current flowing.
  • the variable voltage unit 102 has two basic properties: first, its terminal voltage has nothing to do with the flowing current; second, the voltage of the variable voltage unit 102 itself is definite, but the current flowing through it is arbitrary. That is, in the embodiment of the present application, the variable voltage unit 102 is used to output a variable voltage, and the variable voltage can be set according to actual needs.
  • the comparison unit 103 includes a first comparison unit 1031 and a second comparison unit 1032 .
  • the comparison unit 103 compares two or more data items to determine whether they are equal, or to determine the size relationship and arrangement order between them, which is called comparison.
  • a circuit or device that can realize this comparison function is called a comparison unit.
  • the function of the comparison unit is to compare the magnitude of the two voltages (using the high or low level of the output voltage to indicate the magnitude relationship between the two input voltages), when the voltage at the "+" input terminal is higher than the "-” input terminal, the voltage comparison
  • the output of the voltage comparator is high level; when the voltage of the "+” input terminal is lower than the "-” input terminal, the output of the voltage comparator is low level.
  • the first comparison unit 1031 is configured to output a constant voltage at the third terminal of the first comparison unit 1031 based on the voltage at the first terminal of the first comparison unit 1031 and the voltage at the second terminal of the first comparison unit 1031.
  • flow unit 104 control signal; the second comparison unit 1032 is used for under the control of the comparison unit control signal, based on the voltage of the second terminal of the second comparison unit 1032 and the voltage of the third terminal of the second comparison unit 1032, in the second comparison unit
  • the fourth end of 1032 outputs the control signal of the first transistor T1 to the control end of the first transistor T1.
  • the first terminal of the first comparison unit 1031 is a “-” input terminal
  • the second terminal of the first comparison unit 1031 is a “+” input terminal
  • the third terminal of the first comparison unit 1031 is an output terminal.
  • the constant current control signal output by the third terminal of the first comparison unit 1031 is low level; when the first comparison unit When the voltage at the first end of 1031 is lower than the voltage at the second end of the first comparison unit 1031, the constant current control signal output from the third end of the first comparison unit 1031 is at a high level.
  • the first terminal of the second comparison unit 1032 is an enabling terminal
  • the second terminal of the second comparison unit 1032 is a “+” input terminal
  • the third terminal of the second comparison unit 1032 is a “-” input terminal
  • the second comparison unit 1032 is a “-” input terminal.
  • the fourth end of 1032 is the output end.
  • the first transistor T1 control signal output by the fourth terminal of the second comparison unit 1032 is high level;
  • the control signal of the first transistor T1 output from the output terminal of the second comparing unit 1032 is at a low level.
  • the constant current unit 104 is a model abstracted from the actual power supply, and its terminal button can always provide a certain current to the outside regardless of the voltage at its two ends.
  • the constant current unit 104 has two basic properties: first, the current it provides is a constant value, which has nothing to do with the voltage at both ends; second, the current of the constant current unit 104 itself is determined, while the voltage at both ends is arbitrary . That is, in the embodiment of the present application, the constant current unit 104 is used to output a constant current under the control of the constant current unit control signal, and the constant current can be set according to actual needs.
  • the timing unit 105 is a register for setting the current limiting time. That is, in the embodiment of the present application, the timing unit 105 is configured to output the comparison unit control signal at preset time intervals.
  • the second comparison unit 1032 started to work; when the first end of the second comparison unit 1032 did not receive the comparison unit control signal, the second comparison unit 1032 Suspend work.
  • the boost unit 101 includes an inductor L, a second transistor Q and a diode D1.
  • the first end of the inductor L is electrically connected to the first voltage end A.
  • the second terminal of the inductor L, the first terminal of the second transistor Q and the first terminal of the diode D1 are electrically connected.
  • the second end of the diode D1 is electrically connected to the input end of the first transistor T1.
  • the second terminal of the second transistor Q is electrically connected to the ground terminal GND.
  • the working process of the boost unit 101 can be divided into two parts: charging and discharging.
  • FIG. 5 is a schematic diagram of the charging process of the boost unit 101 .
  • FIG. 6 is a schematic diagram of the principle of the discharge process of the boost unit 101 .
  • the second transistor Q is turned on, which can be understood as the second transistor Q here is equivalent to a line that directly connects the input terminal of the second transistor Q to the output of the second transistor Q connect the ends.
  • the input voltage flows through the inductor L.
  • Diode D1 prevents the capacitor from discharging to ground. Since the input is direct current, the current on the inductor L increases linearly at a certain rate, and this rate is related to the size of the inductor L.
  • the second transistor Q is turned off.
  • the current flowing through the inductor L does not immediately become zero, but slowly changes from the value at the end of charging to zero.
  • the original circuit has been disconnected, so the inductance L can only be discharged through the new circuit, that is, the inductance L starts to charge the capacitor, and the voltage across the capacitor rises. At this time, the voltage is already higher than the input voltage, and the boost is completed.
  • the variable voltage unit 102 includes a variable voltage source.
  • the first end of the variable voltage source is electrically connected to the first voltage end A.
  • the second end of the variable voltage source is electrically connected to the first end of the first comparison unit 1031 .
  • the variable voltage unit 102 can be devices with the same characteristics. That is, the variable voltage unit 102 may be other devices capable of providing variable voltage.
  • the current limiting value of the current limiting circuit is 1 A; when the inductor When the impedance of L is 50 milliohms and the voltage drop of diode D1 is 350 millivolts, when the voltage of the variable voltage source is set to 450 millivolts, the current limiting value of the current limiting circuit is 2 amps; when the impedance of the inductor L is 50 milliohms, when the voltage drop of diode D1 is 350 millivolts, when the voltage of the variable voltage source is set to 500 millivolts, the current limiting value of the current limiting circuit is 3 amps; when the impedance of the inductor L is 50 milliohms, When the voltage drop of the diode D1 is 350 millivolts and the voltage of the current limiting value of the current limiting circuit is 1 A; when the inductor When the impedance of L is 50 milliohms and the voltage drop of diode D1 is 350 millivolts, when the voltage of the
  • the first comparison unit 1031 includes a first comparator.
  • the first end of the first comparator is electrically connected to the second end of the variable voltage unit 102 .
  • the second terminal of the first comparator is electrically connected with the input terminal of the first transistor T1.
  • the third terminal of the first comparator is electrically connected to the first terminal of the constant current unit 104 .
  • the first terminal of the first comparator is a "-" input terminal
  • the second terminal of the first comparator is a "+” input terminal
  • the third terminal of the first comparator is an output terminal.
  • the first comparator compares the sum of the voltage of the first voltage terminal A plus the voltage of the variable voltage source with the voltage of the first terminal of the first transistor T1. When the sum of the voltage of the first voltage terminal A plus the voltage of the variable voltage source is greater than the voltage of the first terminal of the first transistor T1, the first comparator outputs a low level; when the voltage of the first voltage terminal A is added When the sum of the voltages of the variable voltage sources is less than the voltage of the first terminal of the first transistor T1, the first comparator outputs a high level.
  • the constant current unit 104 includes a constant current source.
  • the first end of the constant current source is electrically connected to the third end of the first comparison unit 1031 .
  • the second end of the constant current source is electrically connected to the control end of the first transistor T1.
  • the third terminal of the constant current source is electrically connected to the ground terminal GND.
  • the constant current unit 104 may be other devices with the same characteristics. That is, the constant current unit 104 may be other devices capable of providing constant current. Wherein, when the first end of the constant current source is at a high level, the constant current source works; when the first end of the constant current source is at a low level, the constant current source is turned off.
  • the timing unit 105 includes a timer.
  • the timer is electrically connected to the first end of the second comparing unit 1032 .
  • the timing unit 105 may be other devices with the same characteristics. That is, the timing unit 105 may be other devices with a timing function.
  • the timer outputs a high-level signal at preset time intervals. For example: the timer can set different detection time slots, such as 4 milliseconds, 6 milliseconds, 8 milliseconds or 10 milliseconds.
  • the second comparison unit 1032 includes a second comparator.
  • the first end of the second comparator is electrically connected to the timing unit 105 .
  • the second terminal of the second comparator is electrically connected to the second voltage terminal B.
  • the third terminal of the second comparator is connected to the fixed voltage signal M.
  • the fourth terminal of the second comparator is electrically connected to the control terminal of the first transistor T1.
  • the first end of the second comparator is the enabling end
  • the second end of the second comparator is the "+" input end
  • the third end of the second comparator is the "-" input end
  • the second end of the second comparator is the "-" input end.
  • the fourth end is the output end.
  • the first transistor T1 control signal output by the fourth terminal of the second comparator is high level;
  • the control signal of the first transistor T1 output from the output terminal of the second comparator is at a low level.
  • the second comparator when the first terminal of the second comparator is at high level, the second comparator works; when the first terminal of the second comparator is at low level, the second comparator is turned off.
  • the second comparator compares the voltage of the second voltage terminal B with the voltage of the fixed voltage signal M. When the voltage of the second voltage terminal B is greater than the voltage of the variable signal, the first comparator outputs a high level; when the voltage of the second voltage terminal B is lower than the voltage of the variable signal, the first comparator outputs a low level.
  • the voltage value of the fixed voltage signal M is between 0.85 times the voltage value of the first voltage terminal A and 0.9 times the voltage value of the first voltage terminal A.
  • the voltage value of the fixed voltage signal M can be set to be between 0.85 times the voltage value of the first voltage terminal A and 0.9 times the voltage value of the first voltage terminal A.
  • a multiplier can be connected in series between the first voltage terminal A and the third terminal of the second comparison unit 1032, so that the voltage value of the fixed voltage signal M is between 0.85 times that of the first voltage terminal A. between the voltage value and 0.9 times the voltage value of the first voltage terminal A.
  • the voltage of the variable voltage source is set to 400 millivolts as an example for illustration.
  • the current on the line formed by the first voltage terminal A and the second voltage terminal B is input from the first voltage terminal A, passes through the inductor L, the diode D1, and the first transistor T1 to reach the second voltage terminal B.
  • the voltage of the variable voltage source is currently set to 400 millivolts.
  • the constant current source starts and continuously pulls down the potential of the control terminal of the first transistor T1 with a current of 20 microamps, so that The first transistor T1 is gradually turned on, and the first voltage terminal A charges the second voltage terminal B.
  • the constant current source is turned off, and the potential of the control terminal of the first transistor T1 is no longer pulled down with a current of 20 microamps, so that The first transistor T1 is in a half-open state to achieve the purpose of current limitation.
  • the timer is a register for setting the current limit time, and the current setting is 4 milliseconds. Indicates that the first transistor T1 is turned on as the starting point for timing, and the voltage value of the second voltage terminal B is detected after 4ms.
  • the voltage value of the second voltage terminal B is greater than 0.9 times the voltage of the first voltage terminal A, it is considered a power loop Normal, keep the first transistor T1 turned on; if the voltage value of the second voltage terminal B is less than 0.9 times the voltage of the first voltage terminal A, it means that there may be a load short circuit in the loop, and the first transistor T1 is turned off to protect the electronics at the back end components.
  • variable voltage unit 102, the first comparison unit 1031, the constant current unit 104, the timing unit 105, and the second comparison unit 1032 are all set in the power management chip; the boost unit 101 and the first transistor T1 are set Outside the power management chip.
  • the current limiting circuit provided in the embodiment of the present application further includes a first capacitor C1 , a second capacitor C2 , a third capacitor C3 and a resistor Rr.
  • the first end of the first capacitor C1 is electrically connected to the first voltage end A.
  • the first end of the second capacitor C2 is electrically connected to the input end of the first transistor T1.
  • One terminal of the third capacitor C3 and the first terminal of the resistor Rr are electrically connected to the second voltage terminal B.
  • the second terminal of the first capacitor C1 , the second terminal of the second capacitor C2 , the second terminal of the third capacitor C3 and the second terminal of the resistor Rr are electrically connected to the ground terminal GND.
  • the current limiting module outputs a control signal to the control terminal of the first transistor to control the state of the first transistor, so that the current limiting value and current limiting time of the current limiting circuit can be adjusted, so that Prevent the power management integrated chip from overloading and booting failure, and prevent the power management integrated chip from being damaged when it is short-circuited and booting.

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Abstract

一种限流电路（10），包括第一电压端（A）；第二电压端（B）；第一晶体管（T1），其输入端与输出端串接在第一电压端（A）与第二电压端（B）形成的线路上；以及限流模块（100），其与第一晶体管（T1）的控制端电性连接，限流模块（100）用于输出控制信号至第一晶体管（T1）的控制端，控制第一晶体管（T1）的状态，以使得限流电路（10）的限流值可调。

Description

限流电路 技术领域
本申请涉及显示技术领域，具体涉及一种限流电路。
 背景技术
在显示面板行业中，传统的电源管理集成芯片会在AVDD电压的启动过程中进行限流的动作，其目的是为了使隔离晶体管缓慢打开，AVDD电压平缓建立，防止出现过大的电流损伤环路中的其他电子元器件。
但是，传统设计的缺点是对于AVDD的限流值是固定不变的。如果这个限流值过小，会导致电源管理集成芯片在重载开机的情况下，由于被限流，导致电压无法在规定时间内建立，从而开机失败；如果这个限流值过大，也会导致电源管理集成芯片在后端负载出现短路时，长时间的大电流导致元器件损坏，比如：源极驱动器损坏起火。
 技术问题
本申请提供一种限流电路，可以使得限流电路的限流值可调，从而可以防止电源管理集成芯片重载开机失败，以及防止电源管理集成芯片短路开机损坏。
 技术解决方案
第一方面，本申请提供一种限流电路，其包括：
第一电压端；
第二电压端；
第一晶体管，其输入端与输出端串接在所述第一电压端与所述第二电压端形成的线路上；以及
限流模块，其与所述第一晶体管的控制端电性连接，所述限流模块用于输出控制信号至所述第一晶体管的控制端，控制所述第一晶体管的状态，以使得所述限流电路的限流值可调。
在本申请提供的限流电路中，所述限流模块包括升压单元、可变电压单元、第一比较单元以及恒流单元；
所述升压单元的第一端与所述第一电压端电性连接，所述升压单元的第二端与所述第一晶体管的输入端电性连接，所述可变电压单元的第一端与所述第一电压端电性连接，所述可变电压单元的第二端与所述第一比较单元的第一端电性连接，所述第一比较单元的第二端与所述第一晶体管的输入端电性连接，所述第一比较单元的第三端与所述恒流单元的第一端电性连接，所述恒流单元的第二端与所述第一晶体管的控制端电性连接；其中，
所述升压单元用于使得所述升压单元的第二端的电压大于所述升压单元的第一端的电压；所述可变电压单元用于输出可变电压；所述第一比较单元用于基于所述第一比较单元的第一端的电压以及所述第一比较单元的第二端的电压，在所述第一比较单元的第三端输出恒流单元控制信号；所述恒流单元用于在所述恒流单元控制信号的控制下输出恒定电流。
在本申请提供的限流电路中，所述升压单元包括电感、第二晶体管以及二极管；
所述电感的第一端与所述第一电压端电性连接，所述电感的第二端、所述第二晶体管的第一端与所述二极管的第一端电性连接，所述二极管的第二端与所述第一晶体管的输入端电性连接，所述第二晶体管的第二端与接地端电性连接。
在本申请提供的限流电路中，所述限流电路的限流值可以根据以下公式得到：
I=（V1-V2）/R，其中，I为所述限流电路的限流值，V1为所述可变电压源设定的电压值，V2为所述二极管的压降值，R为所述电感的阻抗值。
在本申请提供的限流电路中，所述可变电压单元包括一可变电压源；所述可变电压源的第一端与所述第一电压端电性连接，所述可变电压源的第二端与所述第一比较单元的第一端电性连接。
在本申请提供的限流电路中，所述第一比较单元包括第一比较器；所述第一比较器的第一端与所述可变电压单元的第二端电性连接，所述第一比较器的第二端与所述第一晶体管的输入端电性连接，所述第一比较器的第三端与所述恒流单元的第一端电性连接。
在本申请提供的限流电路中，所述恒流单元包括一恒流源；所述恒流源的第一端与所述第一比较单元的第三端电性连接，所述恒流源的第二端与所述第一晶体管的控制端电性连接，所述恒流源的第三端与接地端电性连接。
在本申请提供的限流电路中，所述限流模块还包括定时单元以及第二比较单元；
所述定时单元与所述第二比较单元的第一端电性连接；所述第二比较单元的第二端与所述第二电压端电性连接，所述第二比较单元的第三端接入固定电压信号，所述第二比较单元的第四端与所述第一晶体管的控制端电性连接；
所述定时单元用于间隔预设时间输出比较单元控制信号；所述第二比较单元用于在所述比较单元控制信号的控制下，基于所述第二比较单元的第二端的电压以及所述第二比较单元的第三端的电压，在所述第二比较单元的第四端输出第一晶体管控制信号至所述第一晶体管的控制端。
在本申请提供的限流电路中，所述定时单元包括定时器，所述定时器与所述第二比较单元的第一端电性连接。
在本申请提供的限流电路中，所述第二比较单元包括第二比较器；所述第二比较器的第一端与所述定时单元电性连接；所述第二比较器的第二端与所述第二电压端电性连接，所述第二比较器的第三端接入固定电压信号，所述第二比较器的第四端与所述第一晶体管的控制端电性连接。
在本申请提供的限流电路中，所述固定电压信号的电压介于0.85倍的第一电压端的电压与0.9倍的第一电压端的电压之间。
在本申请提供的限流电路中，所述限流电路还包括第一电容、第二电容、第三电容以及电阻；
所述第一电容的第一端与所述第一电压端电性连接，所述第二电容的第一端与所述第一晶体管的输入端电性连接，所述第三电容的一端以及所述电阻的第一端与所述第二电压端电性连接，所述第一电容的第二端、所述第二电容的第二端、所述第三电容的第二端以及所述电阻的第二端与接地端电性连接。
第二方面，本申请还提供一种限流电路，其包括：
第一电压端；
第二电压端；
第一晶体管，其输入端与输出端串接在所述第一电压端与所述第二电压端形成的线路上；以及
限流模块，其与所述第一晶体管的控制端电性连接，所述限流模块用于输出控制信号至所述第一晶体管的控制端，控制所述第一晶体管的状态，以使得所述限流电路的限流值可调；
所述限流模块包括升压单元、可变电压单元、第一比较单元以及恒流单元；
所述升压单元的第一端与所述第一电压端电性连接，所述升压单元的第二端与所述第一晶体管的输入端电性连接，所述可变电压单元的第一端与所述第一电压端电性连接，所述可变电压单元的第二端与所述第一比较单元的第一端电性连接，所述第一比较单元的第二端与所述第一晶体管的输入端电性连接，所述第一比较单元的第三端与所述恒流单元的第一端电性连接，所述恒流单元的第二端与所述第一晶体管的控制端电性连接；其中，
所述升压单元用于使得所述升压单元的第二端的电压大于所述升压单元的第一端的电压；所述可变电压单元用于输出可变电压；所述第一比较单元用于基于所述第一比较单元的第一端的电压以及所述第一比较单元的第二端的电压，在所述第一比较单元的第三端输出恒流单元控制信号；所述恒流单元用于在所述恒流单元控制信号的控制下输出恒定电流；
所述限流电路还包括第一电容、第二电容、第三电容以及电阻；
所述第一电容的第一端与所述第一电压端电性连接，所述第二电容的第一端与所述第一晶体管的输入端电性连接，所述第三电容的一端以及所述电阻的第一端与所述第二电压端电性连接，所述第一电容的第二端、所述第二电容的第二端、所述第三电容的第二端以及所述电阻的第二端与接地端电性连接。
在本申请提供的限流电路中，所述升压单元包括电感、第二晶体管以及二极管；
所述电感的第一端与所述第一电压端电性连接，所述电感的第二端、所述第二晶体管的第一端与所述二极管的第一端电性连接，所述二极管的第二端与所述第一晶体管的输入端电性连接，所述第二晶体管的第二端与所述接地端电性连接。
在本申请提供的限流电路中，所述限流电路的限流值可以根据以下公式得到：
I=（V1-V2）/R，其中，I为所述限流电路的限流值，V1为所述可变电压源设定的电压值，V2为所述二极管的压降值，R为所述电感的阻抗值。
在本申请提供的限流电路中，所述可变电压单元包括一可变电压源；所述可变电压源的第一端与所述第一电压端电性连接，所述可变电压源的第二端与所述第一比较单元的第一端电性连接。
在本申请提供的限流电路中，所述第一比较单元包括第一比较器；所述第一比较器的第一端与所述可变电压单元的第二端电性连接，所述第一比较器的第二端与所述第一晶体管的输入端电性连接，所述第一比较器的第三端与所述恒流单元的第一端电性连接。
在本申请提供的限流电路中，所述恒流单元包括一恒流源；所述恒流源的第一端与所述第一比较单元的第三端电性连接，所述恒流源的第二端与所述第一晶体管的控制端电性连接，所述恒流源的第三端与接地端电性连接。
在本申请提供的限流电路中，所述限流模块还包括定时单元以及第二比较单元；
所述定时单元与所述第二比较单元的第一端电性连接；所述第二比较单元的第二端与所述第二电压端电性连接，所述第二比较单元的第三端接入固定电压信号，所述第二比较单元的第四端与所述第一晶体管的控制端电性连接；
所述定时单元用于间隔预设时间输出比较单元控制信号；所述第二比较单元用于在所述比较单元控制信号的控制下，基于所述第二比较单元的第二端的电压以及所述第二比较单元的第三端的电压，在所述第二比较单元的第四端输出第一晶体管控制信号至所述第一晶体管的控制端。
在本申请提供的限流电路中，所述定时单元包括定时器，所述定时器与所述第二比较单元的第一端电性连接；
所述第二比较单元包括第二比较器；所述第二比较器的第一端与所述定时单元电性连接；所述第二比较器的第二端与所述第二电压端电性连接，所述第二比较器的第三端接入固定电压信号，所述第二比较器的第四端与所述第一晶体管的控制端电性连接。
 有益效果
本申请提供的限流电路，通过限流模块输出控制信号至第一晶体管的控制端，控制第一晶体管的状态，以使得限流电路的限流值可调，从而可以防止电源管理集成芯片重载开机失败，以及防止电源管理集成芯片短路开机损坏。
 附图说明
为了更清楚地说明本申请实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本申请实施例提供的限流电路的结构示意图；
图2为本申请实施例提供的限流电路的另一结构示意图；
图3为本申请实施例提供的限流电路的再一结构示意图；
图4为本申请实施例提供的限流电路的电路示意图；
图5为升压单元充电过程的原理示意图；
图6为升压单元放电过程的原理示意图。
 本发明的实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述。显然，所描述的实施例仅仅是本申请的一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。应当理解的是，此处所描述的具体实施方式仅用于说明和解释本申请，并不用于限制本申请。本申请的权利要求书以及说明书中的术语“第一”、“第二”、“第三”、“第四”等是用于区别不同对象，而不是用于描述特定顺序。
本申请实施例提供一种限流电路，其可以使得限流电路的限流值可调，从而可以防止电源管理集成芯片重载开机失败，以及防止电源管理集成芯片短路开机损坏。下文进行详细说明。需要说明的是，以下实施例的描述顺序不作为对实施例优选顺序的限定。本申请所有实施例中采用的晶体管可以为薄膜晶体管或场效应管或其他特性相同的器件。
此外，本申请实施例所采用的晶体管可以包括P型晶体管和/或N型晶体管两种。其中，P型晶体管在栅极为低电平时，源极与漏极导通；在栅极为高电平时，源极与漏极截止。N型晶体管为在栅极为高电平时，源极与漏极导通；在栅极为低电平时，源极与漏极截止。
请参阅图1，图1为本申请实施例提供的限流电路的结构示意图。如图1所示，本申请实施例提供的限流电路10包括第一电压端A、第二电压端B、第一晶体管T1以及限流模块100。第一晶体管T1的输入端与第一晶体管T1的输出端串接在第一电压端A和第二电压端B形成的线路上。限流模块100与第一晶体管T1的控制端电性连接。限流模块100用于输出控制信号至第一晶体管T1的控制端，控制第一晶体管T1的状态，以使得限流电路10的限流值可调。可以理解的，第一晶体管T1的第一端即为晶体管的源极或者漏极中的一者，第一晶体管T1的第二端即为晶体管的源极或者漏极中的另一者，第一晶体管T1的控制端即为晶体管的栅极。
需要说明的是，第一电压端A可以为电源管理芯片的工作电压输入端；第二电压端B可以为AVDD电压输出端。在显示面板行业中，电源管理集成芯片会在AVDD电压的启动过程中进行限流的动作，其目的是为了使第一晶体管T1缓慢打开，AVDD电压平缓建立，防止出现过大的电流损伤环路中的其他电子元器件。
如果限流电路10的限流值过小，会导致电源管理集成芯片在重载开机的情况下，由于被限流，导致电压无法在规定时间内建立，从而开机失败；如果限流电路10的限流值过大，也会导致电源管理集成芯片在后端负载出现短路时，长时间的大电流导致元器件损坏。在本申请实施例中，限流电路10的限流值是可调的。也即，本申请实施例的限流电路10可以根据实际情况对限流电路10的限流值进行设置，可以使得限流电路10的限流值可调，从而可以防止电源管理集成芯片重载开机失败，以及防止电源管理集成芯片短路开机损坏。
请参阅图2，图2为本申请实施例提供的限流电路的另一结构示意图。如图2所示，限流模块100包括升压单元101、可变电压单元102、第一比较单元1031以及恒流单元104。升压单元101的第一端与第一电压端A电性连接。升压单元101的第二端与第一晶体管T1的输入端电性连接。可变电压单元102的第一端与第一电压端A电性连接。可变电压单元102的第二端与第一比较单元1031的第一端电性连接。第一比较单元1031的第二端与第一晶体管T1的输入端电性连接。恒流单元104的第二端与第一晶体管T1的控制端电性连接。可以理解的，本申请实施例通过升压单元101、可变电压单元102、第一比较单元1031以及恒流单元104使得限流电路10的限流值可调。
在一些实施例中，请参阅图3，图3为本申请实施例提供的限流电路的再一结构示意图。其中，图3所示的限流电路10与图2所示的限流电路10的区别在于，图3所示的限流电路10还包括第二比较单元1032以及定时单元105。
具体的，如图3所示，限流模块100包括升压单元101、可变电压单元102、比较单元103、恒流单元104以及定时单元105。比较单元103包括第一比较单元1031以及第二比较单元1032。升压单元101的第一端与第一电压端A电性连接。升压单元101的第二端与第一晶体管T1的输入端电性连接。可变电压单元102的第一端与第一电压端A电性连接。可变电压单元102的第二端与第一比较单元1031的第一端电性连接。第一比较单元1031的第二端与第一晶体管T1的输入端电性连接。第一比较单元1031的第三端与恒流单元104的第一端电性连接。恒流单元104的第二端与第一晶体管T1的控制端电性连接。定时单元105与第二比较单元1032的第一端电性连接。第二比较单元1032的第二端与第二电压端B电性连接。第二比较单元1032的第三端接入固定电压信号M。第二比较单元1032的第四端与第一晶体管T1的控制端电性连接。可以理解的，本申请实施例通过升压单元101、可变电压单元102、第一比较单元1031、第二比较单元、恒流单元104以及定时单元105使得限流电路10的限流值以及限流时间可调。
其中，升压单元101是一种常见的开关直流升压电路，它通过第二晶体管Q导通和关断来控制电感L储存和释放能量，从而使得升压单元101的输出电压比输入电压高。也即，在本申请实施例中，升压单元101用于使得升压单元101的第二端的电压大于升压单元101的第一端的电压。可以理解的，升压单元101的第一端为输入电压输入的一端，升压单元101的第二端为输出电压输出的一端。
其中，可变电压单元102是从实际电源抽象出来的一种模型，在其两端总能保持一定的电压而不论流过的电流为多少。可变电压单元102具有两个基本的性质：第一，它的端电压与流过的电流无关；第二，可变电压单元102自身电压是确定的，而流过它的电流是任意的。也即，在本申请实施例中，可变电压单元102用于输出一可变电压，可变电压可以根据实际需要设定。
其中，比较单元103包括第一比较单元1031以及第二比较单元1032。比较单元103是对两个或多个数据项进行比较，以确定它们是否相等，或确定它们之间的大小关系及排列顺序称为比较。能够实现这种比较功能的电路或装置称为比较单元。比较单元的功能为比较两个电压的大小(用输出电压的高或低电平，表示两个输入电压的大小关系)，当”+”输入端电压高于”-”输入端时，电压比较器输出为高电平；当”+”输入端电压低于”-”输入端时，电压比较器输出为低电平。
在本申请实施例中，第一比较单元1031用于基于第一比较单元1031的第一端的电压以及第一比较单元1031的第二端的电压，在第一比较单元1031的第三端输出恒流单元104控制信号；第二比较单元1032用于在比较单元控制信号的控制下，基于第二比较单元1032的第二端的电压以及第二比较单元1032的第三端的电压，在第二比较单元1032的第四端输出第一晶体管T1控制信号至第一晶体管T1的控制端。
需要说明的是，第一比较单元1031的第一端为“-”输入端，第一比较单元1031的第二端为“+”输入端，第一比较单元1031的第三端为输出端。当第一比较单元1031的第一端的电压大于第一比较单元1031的第二端的电压时，第一比较单元1031的第三端输出的恒流控制信号为低电平；当第一比较单元1031的第一端的电压小于第一比较单元1031的第二端的电压时，第一比较单元1031的第三端输出的恒流控制信号为高电平。第二比较单元1032的第一端为使能端，第二比较单元1032的第二端为“+”输入端，第二比较单元1032的第三端为“-”输入端，第二比较单元1032的第四端为输出端。当第二比较单元1032的第一端为高电平时，第二比较单元1032开始工作；当第二比较单元1032的第一端为低电平时，第二比较单元1032暂停工作。当第二比较单元1032的第二端的电压大于第二比较单元1032的第三端的电压时，第二比较单元1032的第四端输出的第一晶体管T1控制信号为高电平；当第二比较单元1032的第二端的电压小于第二比较单元1032的第三端的电压时，第二比较单元1032的输出端输出的第一晶体管T1控制信号为低电平。
其中，恒流单元104是从实际电源抽象出来的一种模型，其端钮总能向外部提供一定的电流而不论其两端的电压为多少。恒流单元104具有两个基本的性质：第一，它提供的电流是定值，其与两端的电压无关；第二，恒流单元104自身电流是确定的，而它两端的电压是任意的。也即，在本申请实施例中，恒流单元104用于在恒流单元控制信号的控制下输出恒定电流，恒定电流可以根据实际需要设定。
其中，定时单元105为设定限流时间的寄存器。也即，在本申请实施例中，定时单元105用于间隔预设时间输出比较单元控制信号。当第二比较单元1032的第一端接收到比较单元控制信号时，第二比较单元1032开始工作；当第二比较单元1032的第一端未接收到比较单元控制信号时，第二比较单元1032暂停工作。
具体的，请参阅图4，图4为本申请实施例提供的限流电路的电路示意图。结合图3、图4所示，升压单元101包括电感L、第二晶体管Q以及二极管D1。电感L的第一端与第一电压端A电性连接。电感L的第二端、第二晶体管Q的第一端与二极管D1的第一端电性连接。二极管D1的第二端与第一晶体管T1的输入端电性连接。第二晶体管Q的第二端与接地端GND电性连接。其中，升压单元101的工作过程可分为充电和放电两部分。
请参阅图5、图6，图5为升压单元101充电过程的原理示意图。图6为升压单元101放电过程的原理示意图。结合图4、图5所示，在充电过程中，第二晶体管Q导通，可理解为第二晶体管Q这里相当于一根线直接将第二晶体管Q的输入端和第二晶体管Q的输出端连起来。这时，输入电压流过电感L。二极管D1防止电容对地放电。由于输入是直流电，所以电感L上的电流以一定的比率线性增加，这个比率跟电感L大小有关。随着电感L电流增加，电感L里储存了一些能量。结合图4、图6所示，在放电过程中，第二晶体管Q断开。当第二晶体管Q断开时，由于电感L的电流保持特性，流经电感L的电流不会马上变为0，而是缓慢的由充电完毕时的值变为0。而原来的电路已断开，于是电感L只能通过新电路放电，即电感L开始给电容充电，电容两端电压升高，此时电压已经高于输入电压了，升压完毕。
具体的，结合图3、图4所示，可变电压单元102包括一可变电压源。可变电压源的第一端与第一电压端A电性连接。可变电压源的第二端与第一比较单元1031的第一端电性连接。在一些实施例中，可变电压单元102可以为其特性相同的器件。也即，可变电压单元102可以为其他能提供可变电压的器件。
其中，限流电路10的限流值可以根据以下公式得到：I=（V1-V2）/R，其中，I为限流电路的限流值，V1为可变电压源设定的电压值，V2为二极管D1的压降值，R为电感L的阻抗。比如：当电感L的阻抗为50毫欧，二极管D1的压降为350毫伏时，可变电压源的电压设定为400毫伏时，限流电路的限流值为1安；当电感L的阻抗为50毫欧，二极管D1的压降为350毫伏时，可变电压源的电压设定为450毫伏时，限流电路的限流值为2安；当电感L的阻抗为50毫欧，二极管D1的压降为350毫伏时，可变电压源的电压设定为500毫伏时，限流电路的限流值为3安；当电感L的阻抗为50毫欧，二极管D1的压降为350毫伏时，可变电压源的电压设定为5500毫伏时，限流电路的限流值为4安。基于此，本申请实施例可以通过设定可变电压源的电压值，来增加限流电路的多种限流值。
具体的，结合图3、图4所示，第一比较单元1031包括第一比较器。第一比较器的第一端与可变电压单元102的第二端电性连接。第一比较器的第二端与第一晶体管T1的输入端电性连接。第一比较器的第三端与恒流单元104的第一端电性连接。
其中，第一比较器的第一端为“-”输入端，第一比较器的第二端为“+”输入端，第一比较器的第三端为输出端。当第一比较器的第一端的电压大于第一比较器的第二端的电压时，第一比较器的第三端输出的恒流控制信号为低电平；当第一比较器的第一端的电压小于第一比较器的第二端的电压时，第一比较器的第三端输出的恒流控制信号为高电平。
其中，第一比较器是将第一电压端A的电压加上可变电压源的电压的和与第一晶体管T1的第一端的电压进行比较。当第一电压端A的电压加上可变电压源的电压的和大于第一晶体管T1的第一端的电压时，第一比较器输出低电平；当第一电压端A的电压加上可变电压源的电压的和小于第一晶体管T1的第一端的电压时，第一比较器输出高电平。
具体的，结合图3、图4所示，恒流单元104包括一恒流源。恒流源的第一端与第一比较单元1031的第三端电性连接。恒流源的第二端与第一晶体管T1的控制端电性连接。恒流源的第三端与接地端GND电性连接。需要说明的是，在一些实施例中，恒流单元104可以为其他特性相同的器件。也即，恒流单元104可以为其他能提供恒定电流的器件。其中，当恒流源的第一端为高电平时，恒流源工作；当恒流源的第一端为低电平时，恒流源关断。
具体的，结合图2、图3所示，定时单元105包括定时器。定时器与第二比较单元1032的第一端电性连接。需要说明的是，在一些实施例中，定时单元105可以为其他特性相同的器件。也即，定时单元105可以为其他具有定时功能的器件。其中，定时器间隔预设时间输出高电平信号。比如：定时器可以设定不同的侦测时间档位，比如4毫秒、6毫秒、8毫秒或者10毫秒。
具体的，结合图3、图4所示，第二比较单元1032包括第二比较器。第二比较器的第一端与定时单元105电性连接。第二比较器的第二端与第二电压端B电性连接。第二比较器的第三端接入固定电压信号M。第二比较器的第四端与第一晶体管T1的控制端电性连接。
其中，第二比较器的第一端为使能端，第二比较器的第二端为“+”输入端，第二比较器的第三端为“-”输入端，第二比较器的第四端为输出端。当第二比较器的第一端为高电平时，第二比较器开始工作；当第二比较器的第一端为低电平时，第二比较器暂停工作。当第二比较器的第二端的电压大于第二比较器的第三端的电压时，第二比较器的第四端输出的第一晶体管T1控制信号为高电平；当第二比较器的第二端的电压小于第二比较器的第三端的电压时，第二比较器的输出端输出的第一晶体管T1控制信号为低电平。
其中，当第二比较器的第一端为高电平时，第二比较器工作；当第二比较器的第一端为低电平时，第二比较器关断。第二比较器是将第二电压端B的电压与固定电压信号M的电压进行比较。当第二电压端B的电压大于可变信号的电压时，第一比较器输出高电平；当第二电压端B的电压小于可变信号的电压时，第一比较器输出低电平。
其中，固定电压信号M的电压值介于0.85倍的第一电压端A的电压值与0.9倍的第一电压端A的电压值之间。在一些实施例中，可以设定固定电压信号M的电压值介于0.85倍的第一电压端A的电压值与0.9倍的第一电压端A的电压值之间。在另一些实施例中，可以在第一电压端A与第二比较单元1032的第三端之间串联一乘法器，使得固定电压信号M的电压值介于0.85倍的第一电压端A的电压值与0.9倍的第一电压端A的电压值之间。
进一步的，以可变电压源的电压设定为400毫伏为例进行说明。第一电压端A与第二电压端B形成的线路上的电流从第一电压端A输入，经过电感L、二极管D1、第一晶体管T1到达第二电压端B。通过侦测第一电压端A和第一晶体管T1的第一端之间的压差，并与可变电压源的电压（当前设定可变电压源的电压为400毫伏）进行比较。当第一电压端A与第一晶体管T1的第一端之间的压差小于400毫伏时，恒流源启动，并以20微安的电流持续下拉第一晶体管T1的控制端的电位，使得第一晶体管T1逐渐打开，第一电压端A向第二电压端B进行充电。当第一电压端A与第一晶体管T1的第一端之间的压差大于400毫伏时，恒流源关闭，不再以20微安的电流下拉第一晶体管T1的控制端的电位，使第一晶体管T1处于半开启状态，达到限流的目的。
进一步的，以定时器设定为4毫秒、固定电压信号M设定为0.9倍的第一端的电压为例进行说明。定时器为设定限流时间的寄存器，当前设定为4毫秒。表示以第一晶体管T1开启作为起点进行计时，4ms后侦测第二电压端B的电压值，若第二电压端B的电压值大于0.9倍的第一电压端A的电压，认为电源环路正常，保持第一晶体管T1开启；若第二电压端B的电压值小于0.9倍的第一电压端A的电压，则代表环路中可能出现负载短路，关闭第一晶体管T1，保护后端的电子元器件。
在一些实施例中，可变电压单元102、第一比较单元1031、恒流单元104、定时单元105以及第二比较单元1032均设置在电源管理芯片内；升压单元101以及第一晶体管T1设置在电源管理芯片外。
在一些实施例中，本申请实施例提供的限流电路还包括第一电容C1、第二电容C2、第三电容C3以及电阻Rr。其中，第一电容C1的第一端与第一电压端A电性连接。第二电容C2的第一端与第一晶体管T1的输入端电性连接。第三电容C3的一端以及电阻Rr的第一端与第二电压端B电性连接。第一电容C1的第二端、第二电容C2的第二端、第三电容C3的第二端以及电阻Rr的第二端与接地端GND电性连接。
本申请实施例提供的限流电路，通过限流模块输出控制信号至第一晶体管的控制端，控制第一晶体管的状态，以使得限流电路的限流值和限流时间可调，从而可以防止电源管理集成芯片重载开机失败，以及防止电源管理集成芯片短路开机损坏。
以上对本申请实施例所提供的限流电路进行了详细介绍，本文中应用了具体个例对本申请的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本申请的方法及其核心思想；同时，对于本领域的技术人员，依据本申请的思想，在具体实施方式及应用范围上均会有改变之处，综上所述，本说明书内容不应理解为对本申请的限制。

Claims (20)

  1. 一种限流电路，其包括：
    第一电压端；
    第二电压端；
    第一晶体管，其输入端与输出端串接在所述第一电压端与所述第二电压端形成的线路上；以及
    限流模块，其与所述第一晶体管的控制端电性连接，所述限流模块用于输出控制信号至所述第一晶体管的控制端，控制所述第一晶体管的状态，以使得所述限流电路的限流值可调。
  2. 根据权利要求1所述的限流电路，其中，所述限流模块包括升压单元、可变电压单元、第一比较单元以及恒流单元；
    所述升压单元的第一端与所述第一电压端电性连接，所述升压单元的第二端与所述第一晶体管的输入端电性连接，所述可变电压单元的第一端与所述第一电压端电性连接，所述可变电压单元的第二端与所述第一比较单元的第一端电性连接，所述第一比较单元的第二端与所述第一晶体管的输入端电性连接，所述第一比较单元的第三端与所述恒流单元的第一端电性连接，所述恒流单元的第二端与所述第一晶体管的控制端电性连接；其中，
    所述升压单元用于使得所述升压单元的第二端的电压大于所述升压单元的第一端的电压；所述可变电压单元用于输出可变电压；所述第一比较单元用于基于所述第一比较单元的第一端的电压以及所述第一比较单元的第二端的电压，在所述第一比较单元的第三端输出恒流单元控制信号；所述恒流单元用于在所述恒流单元控制信号的控制下输出恒定电流。
  3. 根据权利要求2所述的限流电路，其中，所述升压单元包括电感、第二晶体管以及二极管；
    所述电感的第一端与所述第一电压端电性连接，所述电感的第二端、所述第二晶体管的第一端与所述二极管的第一端电性连接，所述二极管的第二端与所述第一晶体管的输入端电性连接，所述第二晶体管的第二端与接地端电性连接。
  4. 根据权利要求3所述的限流电路，其中，所述限流电路的限流值可以根据以下公式得到：
    I=（V1-V2）/R，其中，I为所述限流电路的限流值，V1为所述可变电压源设定的电压值，V2为所述二极管的压降值，R为所述电感的阻抗值。
  5. 根据权利要求2所述的限流电路，其中，所述可变电压单元包括一可变电压源；所述可变电压源的第一端与所述第一电压端电性连接，所述可变电压源的第二端与所述第一比较单元的第一端电性连接。
  6. 根据权利要求2所述的限流电路，其中，所述第一比较单元包括第一比较器；所述第一比较器的第一端与所述可变电压单元的第二端电性连接，所述第一比较器的第二端与所述第一晶体管的输入端电性连接，所述第一比较器的第三端与所述恒流单元的第一端电性连接。
  7. 根据权利要求2所述的限流电路，其中，所述恒流单元包括一恒流源；所述恒流源的第一端与所述第一比较单元的第三端电性连接，所述恒流源的第二端与所述第一晶体管的控制端电性连接，所述恒流源的第三端与接地端电性连接。
  8. 根据权利要求2所述的限流电路，其中，所述限流模块还包括定时单元以及第二比较单元；
    所述定时单元与所述第二比较单元的第一端电性连接；所述第二比较单元的第二端与所述第二电压端电性连接，所述第二比较单元的第三端接入固定电压信号，所述第二比较单元的第四端与所述第一晶体管的控制端电性连接；
    所述定时单元用于间隔预设时间输出比较单元控制信号；所述第二比较单元用于在所述比较单元控制信号的控制下，基于所述第二比较单元的第二端的电压以及所述第二比较单元的第三端的电压，在所述第二比较单元的第四端输出第一晶体管控制信号至所述第一晶体管的控制端。
  9. 根据权利要求8所述的限流电路，其中，所述定时单元包括定时器，所述定时器与所述第二比较单元的第一端电性连接。
  10. 根据权利要求8所述的限流电路，其中，所述第二比较单元包括第二比较器；所述第二比较器的第一端与所述定时单元电性连接；所述第二比较器的第二端与所述第二电压端电性连接，所述第二比较器的第三端接入固定电压信号，所述第二比较器的第四端与所述第一晶体管的控制端电性连接。
  11. 根据权利要求8所述的限流电路，其中，所述固定电压信号的电压介于0.85倍的第一电压端的电压值与0.9倍的第一电压端的电压之间。
  12. 根据权利要求1所述的限流电路，其中，所述限流电路还包括第一电容、第二电容、第三电容以及电阻；
    所述第一电容的第一端与所述第一电压端电性连接，所述第二电容的第一端与所述第一晶体管的输入端电性连接，所述第三电容的一端以及所述电阻的第一端与所述第二电压端电性连接，所述第一电容的第二端、所述第二电容的第二端、所述第三电容的第二端以及所述电阻的第二端与接地端电性连接。
  13. 一种限流电路，其包括：
    第一电压端；
    第二电压端；
    第一晶体管，其输入端与输出端串接在所述第一电压端与所述第二电压端形成的线路上；以及
    限流模块，其与所述第一晶体管的控制端电性连接，所述限流模块用于输出控制信号至所述第一晶体管的控制端，控制所述第一晶体管的状态，以使得所述限流电路的限流值可调；
    所述限流模块包括升压单元、可变电压单元、第一比较单元以及恒流单元；
    所述升压单元的第一端与所述第一电压端电性连接，所述升压单元的第二端与所述第一晶体管的输入端电性连接，所述可变电压单元的第一端与所述第一电压端电性连接，所述可变电压单元的第二端与所述第一比较单元的第一端电性连接，所述第一比较单元的第二端与所述第一晶体管的输入端电性连接，所述第一比较单元的第三端与所述恒流单元的第一端电性连接，所述恒流单元的第二端与所述第一晶体管的控制端电性连接；其中，
    所述升压单元用于使得所述升压单元的第二端的电压大于所述升压单元的第一端的电压；所述可变电压单元用于输出可变电压；所述第一比较单元用于基于所述第一比较单元的第一端的电压以及所述第一比较单元的第二端的电压，在所述第一比较单元的第三端输出恒流单元控制信号；所述恒流单元用于在所述恒流单元控制信号的控制下输出恒定电流；
    所述限流电路还包括第一电容、第二电容、第三电容以及电阻；
    所述第一电容的第一端与所述第一电压端电性连接，所述第二电容的第一端与所述第一晶体管的输入端电性连接，所述第三电容的一端以及所述电阻的第一端与所述第二电压端电性连接，所述第一电容的第二端、所述第二电容的第二端、所述第三电容的第二端以及所述电阻的第二端与接地端电性连接。
  14. 根据权利要求13所述的限流电路，其中，所述升压单元包括电感、第二晶体管以及二极管；
    所述电感的第一端与所述第一电压端电性连接，所述电感的第二端、所述第二晶体管的第一端与所述二极管的第一端电性连接，所述二极管的第二端与所述第一晶体管的输入端电性连接，所述第二晶体管的第二端与接地端电性连接。
  15. 根据权利要求14所述的限流电路，其中，所述限流电路的限流值可以根据以下公式得到：
    I=（V1-V2）/R，其中，I为所述限流电路的限流值，V1为所述可变电压源设定的电压值，V2为所述二极管的压降值，R为所述电感的阻抗值。
  16. 根据权利要求13所述的限流电路，其中，所述可变电压单元包括一可变电压源；所述可变电压源的第一端与所述第一电压端电性连接，所述可变电压源的第二端与所述第一比较单元的第一端电性连接。
  17. 根据权利要求13所述的限流电路，其中，所述第一比较单元包括第一比较器；所述第一比较器的第一端与所述可变电压单元的第二端电性连接，所述第一比较器的第二端与所述第一晶体管的输入端电性连接，所述第一比较器的第三端与所述恒流单元的第一端电性连接。
  18. 根据权利要求13所述的限流电路，其中，所述恒流单元包括一恒流源；所述恒流源的第一端与所述第一比较单元的第三端电性连接，所述恒流源的第二端与所述第一晶体管的控制端电性连接，所述恒流源的第三端与接地端电性连接。
  19. 根据权利要求13所述的限流电路，其中，所述限流模块还包括定时单元以及第二比较单元；
    所述定时单元与所述第二比较单元的第一端电性连接；所述第二比较单元的第二端与所述第二电压端电性连接，所述第二比较单元的第三端接入固定电压信号，所述第二比较单元的第四端与所述第一晶体管的控制端电性连接；
    所述定时单元用于间隔预设时间输出比较单元控制信号；所述第二比较单元用于在所述比较单元控制信号的控制下，基于所述第二比较单元的第二端的电压以及所述第二比较单元的第三端的电压，在所述第二比较单元的第四端输出第一晶体管控制信号至所述第一晶体管的控制端。
  20. 根据权利要求19所述的限流电路，其中，所述定时单元包括定时器，所述定时器与所述第二比较单元的第一端电性连接；
    所述第二比较单元包括第二比较器；所述第二比较器的第一端与所述定时单元电性连接；所述第二比较器的第二端与所述第二电压端电性连接，所述第二比较器的第三端接入固定电压信号，所述第二比较器的第四端与所述第一晶体管的控制端电性连接。
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