WO2023098398A1 - 通信方法及装置 - Google Patents
通信方法及装置 Download PDFInfo
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- WO2023098398A1 WO2023098398A1 PCT/CN2022/129947 CN2022129947W WO2023098398A1 WO 2023098398 A1 WO2023098398 A1 WO 2023098398A1 CN 2022129947 W CN2022129947 W CN 2022129947W WO 2023098398 A1 WO2023098398 A1 WO 2023098398A1
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0041—Arrangements at the transmitter end
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
- H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
- H04L27/36—Modulator circuits; Transmitter circuits
- H04L27/366—Arrangements for compensating undesirable properties of the transmission path between the modulator and the demodulator
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
- H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
- H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
- H04L27/3405—Modifications of the signal space to increase the efficiency of transmission, e.g. reduction of the bit error rate, bandwidth, or average power
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
- H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
- H04L27/3405—Modifications of the signal space to increase the efficiency of transmission, e.g. reduction of the bit error rate, bandwidth, or average power
- H04L27/3444—Modifications of the signal space to increase the efficiency of transmission, e.g. reduction of the bit error rate, bandwidth, or average power by applying a certain rotation to regular constellations
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
- H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
- H04L27/36—Modulator circuits; Transmitter circuits
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
- H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
- H04L27/36—Modulator circuits; Transmitter circuits
- H04L27/361—Modulation using a single or unspecified number of carriers, e.g. with separate stages of phase and amplitude modulation
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
- H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
- H04L27/38—Demodulator circuits; Receiver circuits
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
- H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
- H04L27/38—Demodulator circuits; Receiver circuits
- H04L27/3809—Amplitude regulation arrangements
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
- H04L1/0002—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the transmission rate
- H04L1/0003—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the transmission rate by switching between different modulation schemes
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0071—Use of interleaving
Definitions
- the present application relates to the technical field of wireless communication, and in particular to a communication method and device.
- AWGN additive white gaussian noise
- the channel in the real environment is mostly a fading channel, which is affected by multipath, the relative position movement of receiving target/sending target, nonlinear characteristics of radio frequency devices, etc., and presents frequency selection and fading characteristics. Therefore, when transmitting information in a fading channel, if the channel coding based on the AWGN channel structure is used, the error correction capability of the fading channel will be poor, which will affect the reliability of the system.
- the present application provides a communication method and device, which can enable a fading channel to achieve good error correction capability, and help improve the reliability of information transmission.
- the embodiment of the present application provides a communication method, and the execution body of the method may be an originating device, or may be a chip applied in the originating device.
- the following description is made by taking the executing subject as an originating device as an example.
- the method includes: the originating device determines a first sequence and a second sequence of quadrature amplitude modulation (QAM) based on N bit sets. Wherein, the first sequence includes N in-phase components, and the second sequence includes N quadrature components, or the first sequence includes N orthogonal components, and the second sequence includes N in-phase components, and N is an integer greater than or equal to 2.
- the originating device performs interleaving processing on the first sequence to obtain the third sequence.
- the transmitting device sends the symbol sequence determined based on the second sequence and the third sequence to the receiving device.
- the symbol sequence includes N QAM symbols.
- the same bit set is mapped twice, and the bit information carried by the bit set is transmitted through two sequences (such as the above-mentioned second sequence and third sequence). Since the third sequence has been interleaved, the interference of the bit information at different positions is averaged, and the channel characteristics of the fading channel become uniform, which is closer to the AWGN channel, so as to achieve good error correction capability and help To improve the reliability of information transmission.
- the N in-phase components are determined based on the first codebook.
- the first codebook at least indicates the mapping relationship between the bit set and the in-phase component.
- the N orthogonal components are determined based on the second codebook.
- the second codebook at least indicates the mapping relationship between the bit set and the orthogonal component.
- the originating device maps the N bit sets to the first sequence and maps the N bit sets to the second sequence based on the preset codebook and bit value status in the bit set.
- the N in-phase components include N in-phase components of the first symbol
- the N quadrature components include N quadrature components of the first symbol.
- the first symbol is obtained by rotating the second symbol on the constellation diagram by a first angle
- the first modulation order of the first symbol is the square of the second modulation order of the second symbol.
- the second symbol is a symbol after bit set modulation. Rotation is based on the origin of the constellation diagram, and rotates clockwise or counterclockwise.
- the first angle is greater than or equal to the following angle: after a symbol of the second modulation order rotates clockwise or counterclockwise on the constellation diagram, it is the minimum angle rotated when encountering the first symbol of the first modulation order.
- the originating device can obtain the first sequence and the second sequence based on the constellation rotation manner.
- the first angle satisfies:
- ⁇ represents the first angle
- ⁇ represents pi
- n represents an integer greater than or equal to
- sin -1 represents arc sine
- the bit set includes X bits, the modulation order of the QAM symbol is 2 2X , and X is a positive integer.
- the embodiment of the present application provides a communication method, and the execution body of the method may be a receiving device, or may be a chip applied in the receiving device.
- the following description is made by taking the execution subject as an example of the receiving device.
- the method includes: a receiving device receives a symbol sequence from a transmitting device, wherein the symbol sequence includes N quadrature amplitude modulation (QAM) symbols.
- the receiving device determines the fourth sequence and the fifth sequence according to the symbol sequence, wherein the fourth sequence includes the in-phase components of N QAM symbols, the fifth sequence includes the orthogonal components of N QAM symbols, or the fourth sequence includes N Quadrature components of QAM symbols, the fifth sequence includes in-phase components of N QAM symbols.
- the receiving device performs deinterleaving processing on the fourth sequence to obtain the sixth sequence.
- the receiving device jointly demodulates the fifth sequence and the sixth sequence to obtain N bit sets.
- the bit set includes X bits, the modulation order of the QAM symbol is 2 2X , and X is a positive integer.
- the embodiment of the present application provides a communication device, which can be the originating device in the above-mentioned first aspect or any possible design of the first aspect, or a chip that realizes the functions of the above-mentioned originating device; the communication
- the device includes corresponding modules, units, or means (means) for realizing the above methods, and the modules, units, or means can be implemented by hardware, software, or by executing corresponding software on hardware.
- the hardware or software includes one or more modules or units corresponding to the above functions.
- the communication device includes a processing unit and a sending unit.
- the processing unit is configured to determine the first sequence and the second sequence of the quadrature amplitude modulation (QAM) based on the N bit sets.
- the first sequence includes N in-phase components
- the second sequence includes N quadrature components, or the first sequence includes N orthogonal components, and the second sequence includes N in-phase components, and N is an integer greater than or equal to 2.
- the processing unit is further configured to perform interleaving processing on the first sequence to obtain a third sequence.
- a sending unit configured to send the symbol sequence determined based on the second sequence and the third sequence to the receiving device.
- the symbol sequence includes N QAM symbols.
- the N in-phase components are determined based on the first codebook.
- the first codebook at least indicates the mapping relationship between the bit set and the in-phase component.
- the N orthogonal components are determined based on the second codebook.
- the second codebook at least indicates the mapping relationship between the bit set and the orthogonal component.
- the N in-phase components include N in-phase components of the first symbol
- the N quadrature components include N quadrature components of the first symbol.
- the first symbol is obtained by rotating the second symbol on the constellation diagram by a first angle
- the first modulation order of the first symbol is the square of the second modulation order of the second symbol.
- the second symbol is a symbol after bit set modulation. Rotation is based on the origin of the constellation diagram, and rotates clockwise or counterclockwise.
- the first angle is greater than or equal to the following angle: the smallest angle rotated when a symbol of the second modulation order encounters the first symbol of the first modulation order after rotating clockwise or counterclockwise on the constellation diagram.
- the first angle satisfies:
- ⁇ represents the first angle
- ⁇ represents pi
- n represents an integer greater than or equal to
- sin -1 represents arc sine
- the bit set includes X bits, the modulation order of the QAM symbol is 2 2X , and X is a positive integer.
- the embodiment of the present application provides a communication device, which can be the receiving end device in the second aspect or any possible design of the second aspect, or a chip that realizes the function of the receiving end device;
- the above-mentioned communication device includes corresponding modules, units, or means (means) for realizing the above-mentioned method, and the modules, units, or means may be implemented by hardware, software, or by executing corresponding software on hardware.
- the hardware or software includes one or more modules or units corresponding to the above functions.
- the communication device includes a receiving unit and a processing unit.
- the receiving unit is configured to receive a symbol sequence from the transmitting device, where the symbol sequence includes N quadrature amplitude modulation (QAM) symbols.
- the processing unit is configured to determine a fourth sequence and a fifth sequence according to the symbol sequence, wherein the fourth sequence includes in-phase components of N QAM symbols, the fifth sequence includes orthogonal components of N QAM symbols, or the fourth sequence includes Quadrature components of N QAM symbols, the fifth sequence includes in-phase components of N QAM symbols.
- the processing unit is further configured to perform deinterleaving processing on the fourth sequence to obtain a sixth sequence.
- the processing unit is further configured to jointly demodulate the fifth sequence and the sixth sequence to obtain N bit sets.
- the bit set includes X bits, the modulation order of the QAM symbol is 2 2X , and X is a positive integer.
- the embodiment of the present application provides a communication device, including: a processor and a memory; the memory is used to store computer instructions, and when the processor executes the instructions, the communication device performs any of the above aspects or any In one aspect, any possible design is performed by the originating device.
- the communication device may be the originating device in the first aspect or any possible design of the first aspect, or a chip implementing the functions of the foregoing originating device.
- an embodiment of the present application provides a communication device, including: a processor; the processor is coupled to a memory, and is used to read and execute instructions in the memory, so that the communication device performs any of the above aspects Or a method executed by the originating device in any possible design of any aspect.
- the communication device may be the originating device in the first aspect or any possible design of the first aspect, or a chip implementing the functions of the foregoing originating device.
- the embodiment of the present application provides a chip, including a processing circuit and an input/output interface.
- the input and output interface is used to communicate with modules other than the chip, for example, the chip may be a chip that implements the function of the originating device in the above-mentioned first aspect or any possible design of the first aspect.
- the processing circuit is used to run computer programs or instructions to implement the method in the above first aspect or any possible design of the first aspect.
- the embodiment of the present application provides a communication device, including: a processor and a memory; the memory is used to store computer instructions, and when the processor executes the instructions, the communication device performs any of the above aspects or any
- any possible design is a method executed by the receiving end device.
- the communication device may be the receiving end device in the second aspect or any possible design of the second aspect, or a chip that realizes the function of the receiving end device.
- an embodiment of the present application provides a communication device, including: a processor; the processor is coupled to a memory, and is used to read and execute instructions in the memory, so that the communication device performs any of the above aspects Or a method executed by the receiving end device in any possible design of any aspect.
- the communication device may be the receiving end device in the second aspect or any possible design of the second aspect, or a chip that realizes the function of the receiving end device.
- the embodiment of the present application provides a chip, including a processing circuit and an input/output interface.
- the input and output interface is used for communicating with modules other than the chip, for example, the chip may be a chip that realizes the function of the receiving device in the second aspect or any possible design of the second aspect.
- the processing circuit is used to run computer programs or instructions to implement the method in the above second aspect or any possible design of the second aspect.
- the embodiment of the present application provides a computer-readable storage medium, the computer-readable storage medium stores instructions, and when it is run on a computer, the computer can execute any one of the above-mentioned aspects. method.
- the embodiment of the present application provides a computer program product containing instructions, which when run on a computer, enables the computer to execute the method in any one of the above aspects.
- the embodiment of the present application provides a circuit system, the circuit system includes a processing circuit, and the processing circuit is configured to execute the method according to any one of the foregoing aspects.
- the embodiment of the present application provides a communication system, where the communication system includes the originating device and the receiving device in any one of the foregoing aspects.
- FIG. 1 is a schematic structural diagram of a communication system provided by an embodiment of the present application.
- FIG. 2 is a basic flowchart of a wireless communication provided by an embodiment of the present application.
- FIG. 3 is a performance result diagram of a fading channel provided by an embodiment of the present application.
- FIG. 4 is a constellation diagram provided by an embodiment of the present application.
- FIG. 5 is a schematic flowchart of a communication method provided by an embodiment of the present application.
- FIG. 6 is a schematic flowchart of another communication method provided by the embodiment of the present application.
- FIG. 7 is a schematic flowchart of another communication method provided by the embodiment of the present application.
- FIG. 8 is a schematic diagram of a constellation rotation scenario provided by an embodiment of the present application.
- FIG. 9 is a schematic diagram of a constellation rotation scenario provided by an embodiment of the present application.
- FIG. 10 is a schematic diagram of an interleaving process provided by an embodiment of the present application.
- FIG. 11 is a simulation result diagram provided by the embodiment of the present application.
- FIG. 12 is another simulation result diagram provided by the embodiment of the present application.
- FIG. 13 is another simulation result diagram provided by the embodiment of the present application.
- FIG. 14 is another simulation result diagram provided by the embodiment of the present application.
- FIG. 15 is a schematic structural diagram of a communication device provided by an embodiment of the present application.
- FIG. 16 is a schematic structural diagram of another communication device provided by an embodiment of the present application.
- FIG. 1 is a schematic structural diagram of a communication system 1000 applied in an embodiment of the present application.
- the communication system includes a radio access network 100 and a core network 200 , and optionally, the communication system 1000 may also include the Internet 300 .
- the radio access network 100 may include at least one radio access network device (such as 110a and 110b in Figure 1), and may also include at least one terminal device (such as 120a-120j in Figure 1).
- the terminal equipment is connected to the wireless access network equipment in a wireless manner, and the wireless access network equipment is connected to the core network in a wireless or wired manner.
- the core network equipment and the wireless access network equipment can be independent and different physical equipment, or the functions of the core network equipment and the logical functions of the wireless access network equipment can be integrated on the same physical equipment, or it can be a physical equipment It integrates some functions of core network equipment and some functions of radio access network equipment.
- Terminal devices and terminal devices and wireless access network devices may be connected to each other in a wired or wireless manner.
- FIG. 1 is only a schematic diagram.
- the communication system may also include other network devices, such as wireless relay devices and wireless backhaul devices, which are not shown in FIG. 1 .
- the radio access network equipment can be a base station (base station), an evolved base station (evolved NodeB, eNodeB), a transmission reception point (transmission reception point, TRP), and the next generation in the fifth generation (5th generation, 5G) mobile communication system
- Base station (next generation NodeB, gNB), the next generation base station in the sixth generation (6th generation, 6G) mobile communication system, the base station in the future mobile communication system or the access node in the WiFi system, etc.; it can also complete the base station part
- a functional module or unit for example, can be a centralized unit (central unit, CU) or a distributed unit (distributed unit, DU).
- the CU here completes the functions of the radio resource control protocol and the packet data convergence protocol (PDCP) of the base station, and also completes the function of the service data adaptation protocol (SDAP); the DU completes the functions of the base station
- the functions of the radio link control layer and the medium access control (medium access control, MAC) layer can also complete the functions of part of the physical layer or all of the physical layer.
- 3rd generation partnership project, 3GPP third generation partnership project
- the radio access network device may be a macro base station (such as 110a in Figure 1), a micro base station or an indoor station (such as 110b in Figure 1), or a relay node or a donor node.
- the embodiment of the present application does not limit the specific technology and specific equipment form adopted by the radio access network equipment.
- a base station is used as an example of a radio access network device for description below.
- a terminal device may also be called a terminal, a user equipment (user equipment, UE), a mobile station, a mobile terminal, and the like.
- Terminal devices can be widely used in various scenarios, such as device-to-device (D2D), vehicle-to-everything (V2X) communication, machine-type communication (MTC), Internet of Things (internet of things, IOT), virtual reality, augmented reality, industrial control, automatic driving, telemedicine, smart grid, smart furniture, smart office, smart wear, smart transportation, smart city, etc.
- Terminal devices can be mobile phones, tablet computers, computers with wireless transceiver functions, wearable devices, vehicles, drones, helicopters, airplanes, ships, robots, robotic arms, smart home devices, etc.
- the embodiment of the present application does not limit the specific technology and specific device form adopted by the terminal device.
- Base stations and terminal equipment can be fixed or mobile. Base stations and terminal equipment can be deployed on land, including indoors or outdoors, handheld or vehicle-mounted; they can also be deployed on water; they can also be deployed on aircraft, balloons and artificial satellites in the air.
- the embodiments of the present application do not limit the application scenarios of the base station and the terminal device.
- the helicopter or drone 120i in FIG. Device 120i is a base station; however, for base station 110a, 120i is a terminal device, that is, communication between 110a and 120i is performed through a wireless air interface protocol. Of course, communication between 110a and 120i may also be performed through an interface protocol between base stations. In this case, compared to 110a, 120i is also a base station. Therefore, both the base station and the terminal equipment can be collectively referred to as a communication device, 110a and 110b in FIG. 1 can be referred to as a communication device with a base station function, and 120a-120j in FIG. 1 can be referred to as a communication device with a terminal device function.
- the communication between the base station and the terminal equipment, between the base station and the base station, between the terminal equipment and the terminal equipment can be carried out through the licensed spectrum, the communication can also be carried out through the unlicensed spectrum, and the communication can also be carried out through the licensed spectrum and the unlicensed spectrum at the same time; Communication may be performed by using a frequency spectrum below 6 gigahertz (gigahertz, GHz), or may be performed by using a frequency spectrum above 6 GHz, or may also be performed by simultaneously using a frequency spectrum below 6 GHz and a frequency spectrum above 6 GHz.
- the embodiments of the present application do not limit the frequency spectrum resources used for wireless communication.
- the functions of the base station may also be performed by modules (such as chips) in the base station, or may be performed by a control subsystem including the functions of the base station.
- the control subsystem including base station functions here may be the control center in the above application scenarios such as smart grid, industrial control, intelligent transportation, and smart city.
- the functions of the terminal equipment may also be performed by a module (such as a chip or a modem) in the terminal equipment, or may be performed by a device including the functions of the terminal equipment.
- the base station sends downlink signals or downlink information to the terminal equipment, and the downlink information is carried on the downlink channel;
- the terminal equipment sends uplink signals or uplink information to the base station, and the uplink information is carried on the uplink channel.
- the terminal equipment needs to establish a wireless connection with the cell controlled by the base station.
- a cell with which a terminal device has established a wireless connection is called the serving cell of the terminal device.
- Figure 2 is a basic flowchart for communicating using wireless technology.
- the sending device will perform source coding, channel coding (channel encoding), rate matching (rate matching), bit interleaving (bit interleaving), and modulation mapping on the source to obtain the signal to be transmitted and send it to the receiving device.
- the end device sends this signal.
- the signal may be disturbed by noise as it travels on the channel between the source device and the receiver device.
- the receiving device After receiving the signal, the receiving device performs demodulation and mapping, bit deinterleaving, derate matching, channel decoding and source decoding on the signal, and obtains the destination (that is, the restored source ).
- FIG. 2 only shows some steps in the sending and receiving process, and there may be other steps in actual implementation, which is not limited in this embodiment of the present application.
- An AWGN channel refers to a channel in which the noise of the channel is uniformly distributed on the frequency spectrum and the amplitude is normally distributed. AWGN channels are mostly used for simulation of communication systems.
- a fading channel refers to a channel that exhibits frequency selection and fading characteristics due to the influence of multipath, movement of the relative position of the receiving target/sending target, and nonlinear characteristics of radio frequency devices.
- the channels in the real environment are mostly fading channels, which are more complicated than AWGN channels.
- Fig. 3 shows performance results of fading channels. In the case of transmitting signals over a fading channel, the gains of signals transmitted through different pilot points are different, as shown by the broken line in FIG. 3 .
- Modulation mapping means that the transmitting device maps the bits in the bit sequence (for example, the interleaved bits in FIG. 2 ) to the constellation points in the constellation diagram.
- one constellation point corresponds to one bit or multiple bits, and one bit in the bit sequence can be mapped to one bit in the constellation point.
- One constellation point corresponds to one modulation symbol.
- modulation mapping is to process the bit sequence to be transmitted in the time domain, frequency domain or code domain, so as to transmit as much information as possible with the smallest possible bandwidth.
- the transmitting device divides the bit sequence, every n bits form a bit set, and maps each bit set to a modulation symbol.
- QPSK can also be understood as QAM4.
- the modulation mode is quadrature amplitude modulation (quadrature amplitude modulation, QAM) 16
- n 4
- the modulation order is 16.
- the modulation order of QAM can also be other values, which will not be repeated here.
- a modulation symbol is determined based on an in-phase (in-phase, I) component and a quadrature (quadrature, Q) component.
- I in-phase
- Q quadrature
- Table 1 the QAM16 codebook is shown in Table 1:
- the first two bits in a bit set are used to determine the in-phase component, that is, b 0 b 1 is used to determine a value of I, as shown in bold numbers.
- the last two bits in a bit set are used to determine the quadrature component, that is, b 2 b 3 is used to determine a value of Q, as shown in the normally displayed value.
- 0000 is used as a bit set. Based on the first two 00s in the bit set, it is determined that the value of I is 3. Based on the last two 00s in the bit set, it is determined that the value of Q is 3.
- the in-phase component and the quadrature component of the obtained modulation symbol are both 3, as shown by the black dot at the upper right in FIG. 4 .
- Table 1 For the mapping status of other rows, refer to Table 1, which will not be repeated here.
- the constellation diagram of QAM16 is shown in Figure 4.
- demodulation mapping that is, the process of recovering bit sequences from constellation points.
- the log likelihood ratio of a bit refers to the natural logarithm of the ratio of the probability that the bit is 0 to the probability that the bit is 1. If the probability of the bit being 1 is recorded as p(1), and the probability of the bit being 0 is recorded as p(0), then the log likelihood ratio of the bit is ln[p(0)/p(1)] .
- the received signal satisfies:
- Y represents the received modulation symbol
- X represents the transmitted modulation symbol
- H represents the channel response
- ⁇ 2 represents the noise variance in the channel.
- Channel response and noise variance can be estimated by channel estimation techniques. Therefore, the maximum likelihood of the transmitted modulation symbol is estimated by the received modulation symbol Y, the channel response H and the noise variance ⁇ 2 , that is, the likelihood probability satisfies:
- ⁇ represents the normalized value
- e represents the mathematical constant
- Y represents the received modulation symbol
- H represents the channel response
- Xi represents the i-th modulation symbol among all possible modulation symbols under this modulation
- ⁇ 2 represents the noise variance
- Indicates the received modulation symbols Indicates the received modulation symbol is the probability of Xi .
- LLR represents the logarithmic likelihood ratio
- Xi represents the i-th modulation symbol among all possible modulation symbols under the modulation
- ⁇ 3, 3 ⁇ represents a modulation symbol whose in-phase component and quadrature component are both 3.
- Other modulation symbols of can be deduced by analogy and will not be repeated here.
- Xi can represent ⁇ 3, 3 ⁇ .
- i and j are the case of other values, and so on, and will not be repeated here.
- ⁇ 2 represents the noise variance in the channel
- max represents the maximum value
- Xi represents the ith modulation symbol among all possible modulation symbols under this modulation
- Y represents the received modulation symbol
- H represents the channel response
- i and j are positive integers.
- Channel coding also called error control coding, is to add redundant bits to information bits (for example, the bits after source coding in Figure 2 ) at the source device, and these redundant bits are related to the information bits.
- the bits after channel coding include information bits and redundant bits in sequence.
- Channel decoding means that the terminal device detects and corrects the errors generated in the transmission process according to the correlation between redundant bits and information bits, and restores the information bits, thereby resisting the interference of the transmission process and improving information transmission. reliability.
- channel coding The construction basis of channel coding is to assume that all information passes through the AWGN channel. However, the channels in the real environment are mostly fading channels with frequency selection and fading characteristics. Therefore, if the channel coding based on the AWGN channel structure is still used, the error correction capability of the fading channel will be poor, which will affect the reliability of the system.
- an embodiment of the present application provides a communication method, which is applied to the communication system in FIG. 1 .
- the originating device maps N bit sets to the first sequence and the second sequence of QAM respectively.
- the first sequence includes N in-phase components
- the second sequence includes N quadrature components.
- the first sequence includes N quadrature components
- the second sequence includes N in-phase components, where N is an integer greater than or equal to 2.
- the originating device performs interleaving processing on the first sequence to obtain the third sequence.
- the transmitting device sends the symbol sequence determined based on the second sequence and the third sequence to the receiving device.
- the above symbol sequence includes N QAM symbols.
- the same bit set is mapped twice, and the bit information carried by the bit set is transmitted through two sequences (such as the above-mentioned second sequence and third sequence). Since the third sequence has been interleaved, the interference of the bit information at different positions is averaged, and the channel characteristics of the fading channel become uniform, which is closer to the AWGN channel, so as to achieve good error correction capability and help To improve the reliability of information transmission.
- the communication method 500 includes the following steps:
- the originating device acquires a bit sequence.
- the originating device is a device to send information.
- the source device can also be described as a source device, a source device, a source device, etc.
- the embodiment of the present application does not limit the name of the source device, and only uses the source device as an example for description.
- the originating device may be a terminal device.
- the originating device may be an access network device.
- the bit sequence is a sequence composed of multiple bits, such as a sequence composed of 1000 bits, which can be recorded as b 0 b 1 b 2 b 3 ...b 996 b 997 b 998 b 999 .
- b 0 represents the first bit in the above bit sequence
- b 1 represents the second bit in the above bit sequence, and the notation of other bits can be deduced by analogy, and will not be repeated here.
- the bit sequence is a sequence composed of bits of the information source that have undergone information source coding, channel coding, rate matching and bit interleaving, and is to be modulated and mapped.
- the originating device divides the bit sequence into N bit sets.
- each bit set in the N bit sets includes one or more bits.
- N is an integer greater than or equal to 2.
- the number of bits in each bit set is determined based on the modulation order of the QAM symbols transmitted between the source device and the receive device.
- each bit set includes X bits, and the modulation order of the QAM symbols transmitted between the transmitting device and the receiving device is 2 2X .
- QAM symbols refer to the introduction of S505, which will not be repeated here.
- the number of bits in each bit set may be determined based on downlink control information (DCI), Such as paging-radio network temporary identity (P-RNTI), random access-radio network temporary identity (RA-RNTI), system information wireless network temporary identifier (system information-radio network tempory identity, SI-RNTI) scrambled DCI, the modulation order of the corresponding PDSCH transmission is 2.
- DCI downlink control information
- P-RNTI paging-radio network temporary identity
- RA-RNTI random access-radio network temporary identity
- SI-RNTI system information wireless network temporary identifier
- the modulation order of the corresponding PDSCH transmission is 2.
- the modulation order of PDSCH transmission is obtained by looking up the table, as shown in Table 7.1.7.1-1 of 36.213.
- the value of N is 1000, that is, the above bit sequence is divided into 1000 bit sets, which can be recorded as A 0 A 1 A 2 A 3 ... A 996 A 997 A 998 A 999 .
- a 0 means the first bit set in the above 1000 bit sets
- a 1 means the second bit set in the above 1000 bit sets, and the notation of other bit sets can be deduced by analogy, and will not be repeated here.
- the value of N is 500, that is, the above bit sequence is divided into 500 bit sets, which can be recorded as A 0 A 1 A 2 A 3 ... A 496 A 497 A 498 A 499 .
- the notation of the bit set can refer to the description in the previous paragraph, and will not be repeated here.
- the value of N is 250, that is, the above bit sequence is divided into 250 bit sets, which can be recorded as A 0 A 1 A 2 A 3 ... A 296 A 297 A 298 A 249 .
- the notation of the bit set can refer to the description in the previous paragraph, and will not be repeated here.
- modulation order may also have other numbers, and correspondingly, the number of bits in the bit set also changes, and the division of the bit set will not be repeated one by one.
- the originating device maps the N bit sets to the first sequence and the second sequence respectively.
- N bit sets can refer to the introduction of S502, which will not be repeated here.
- the above-mentioned first sequence and the second sequence respectively include a component in quadrature amplitude modulation.
- the first sequence includes N in-phase components
- the second sequence includes N quadrature components.
- the first sequence includes N quadrature components
- the second sequence includes N in-phase components.
- the N in-phase components are in one-to-one correspondence with the N bit sets
- the N orthogonal components are also in one-to-one correspondence with the N bit sets.
- the kth bit set in the N bit sets corresponds to the kth in-phase component in the N in-phase components.
- the kth bit set in the N bit sets also corresponds to the kth orthogonal component in the N orthogonal components.
- k is a positive integer
- k is less than or equal to N.
- the modulation order of the quadrature amplitude modulation is 2 2X .
- X represents the number of bits in the bit set. For example, each bit set includes 2 bits, then the modulation order of the quadrature amplitude modulation is 16. For another example, if each bit set includes 4 bits, then the modulation order of the above-mentioned quadrature amplitude modulation is 256, and the case of other bit sets can be deduced by analogy, and will not be repeated here.
- the implementation process of S503 is introduced by taking the example that the first sequence includes N in-phase components and the second sequence includes N quadrature components.
- the implementation of S503 includes the following two methods:
- S503 includes S503a and S503b:
- the originating device maps the N bit sets to the first sequence according to the first codebook.
- the first codebook at least indicates the mapping relationship between the bit set and the in-phase component.
- the first codebook is introduced, as shown in Table 2.
- each bit set includes two bits, respectively marked as b 0 b 1 .
- b 0 b 1 is used to determine the value of the in-phase component in a QAM16. For example, taking the first line as an example, the value of the in-phase component is determined to be 3 based on bit 00 in the bit set. For another example, taking the second row as an example, the value of the in-phase component is determined to be 1 based on bit 01 in the bit set. For the mapping status of other rows, refer to Table 2, which will not be repeated here.
- the first codebook is only introduced by taking each bit set including 2 bits as an example.
- the number X of bits in each bit set can also have other values, and the in-phase component indicated by the first codebook will also change, which will not be repeated here.
- the originating device maps the N bit sets to the second sequence according to the second codebook.
- the second codebook at least indicates the mapping relationship between the bit set and the orthogonal component.
- the second codebook is introduced, as shown in Table 3.
- each bit set includes two bits, respectively marked as b 0 b 1 .
- b 0 b 1 is used to determine the value of the quadrature component in a QAM16. For example, taking the first row as an example, based on bit 00 in the bit set, it is determined that the value of the orthogonal component is -1. For another example, taking the second row as an example, the value of the orthogonal component is determined to be 3 based on bit 01 in the bit set. For the mapping status of other rows, refer to Table 3, which will not be repeated here.
- the second codebook is only introduced by taking each bit set including 2 bits as an example.
- the number X of bits in each bit set can also have other values, and the orthogonal components indicated by the second codebook will also change, which will not be described here.
- the originating device maps the N bit sets to the first sequence and maps the N bit sets to the second sequence based on the preset codebook and bit value status in the bit set.
- the originating device may execute S503a first, then S503b, or execute S503b first, and then execute S503a, or execute S503a and S503b at the same time. This is not limited.
- the first sequence includes N in-phase components and the second sequence includes N orthogonal components as an example for introduction.
- the originating device can map the N bit sets to the second sequence according to the above-mentioned first codebook, and according to the above-mentioned first codebook Two codebooks are used to map N bit sets to the first sequence. Refer to S503a and S503b for the specific implementation process, which will not be repeated here.
- S503 includes S503c and S503d:
- the transmitting device modulates the first bit set to obtain modulation symbol 1.
- the modulation order of modulation symbol 1 is equal to 2 X .
- X represents the number of bits in each bit set in the N bit sets.
- the first bit set includes 2 bits
- the modulation symbol 1 is a modulation symbol obtained through QPSK modulation
- the modulation order of the modulation symbol 1 is 4.
- the first bit set includes 4 bits
- the modulation symbol 1 is a modulation symbol obtained through QAM16 modulation
- the modulation order of the modulation symbol 1 is 16.
- the first bit set includes 8 bits
- the modulation symbol 1 is a modulation symbol obtained through QAM256 modulation
- the modulation order of the modulation symbol 1 is 256.
- the number of bits in the first bit set may also have other values, and correspondingly, the modulation order of the modulation symbol 1 also changes, which will not be repeated here.
- the transmitting device performs constellation rotation on modulation symbol 1 to obtain modulation symbol 2.
- the modulation order of modulation symbol 2 is the square of the modulation order of modulation symbol 1 .
- the modulation order of modulation symbol 1 is 2, and the modulation order of modulation symbol 2 is 4.
- the modulation order of modulation symbol 1 is 4, then the modulation order of modulation symbol 2 is 16.
- the modulation order of modulation symbol 1 is 16, then the modulation order of modulation symbol 2 is 256.
- the constellation rotation refers to rotating the constellation point corresponding to the modulation symbol 1 clockwise or counterclockwise on the plane where the modulation symbol 1 is located, with the origin of the constellation diagram where the modulation symbol 1 is located as the center of a circle.
- FIG. 8 taking modulation symbol 1 as an example after QPSK modulation, the constellation points corresponding to modulation symbol 1 are shown in FIG. 8 , and the rotation direction of the constellation rotation is shown in FIG. 8 .
- the magnitude of the constellation rotation angle is equal to the first angle.
- the first angle is greater than or equal to the following angles:
- the minimum angle rotated when encountering the first symbol with a modulation order of 2 2X As shown in FIG. 9 , taking the QPSK modulated symbol X1 rotating counterclockwise in the constellation diagram as an example, during the rotation process, the minimum angle rotated when the first symbol of QAM16 is encountered. Exemplarily, the first angle satisfies:
- ⁇ represents the first angle
- ⁇ Indicates the minimum angle that a symbol with a modulation order of 2X rotates clockwise or counterclockwise on the constellation diagram when it encounters the first symbol with a modulation order of 2 2X
- ⁇ means pi
- n means greater than or Integer equal to 0
- sin -1 means arc sine
- the modulation symbols whose modulation order is 2X are QPSK-modulated symbols
- the modulation symbols whose modulation order is 22X are QAM16-modulated symbols.
- energy normalization constant The value is The first angle satisfies:
- the modulation symbols whose modulation order is 2X are QAM16 modulated symbols
- the modulation symbols whose modulation order is 22X are QAM256 modulated symbols.
- energy normalization constant The value is The first angle satisfies:
- the modulation symbols whose modulation order is 2X are QAM64 modulated symbols
- the modulation symbols whose modulation order is 22X are QAM4096 modulated symbols.
- energy normalization constant The value is The first angle satisfies:
- the modulation symbols whose modulation order is 2X are QAM256 modulated symbols
- the modulation symbols whose modulation order is 22X are QAM65536 modulated symbols.
- energy normalization constant The value is The first angle satisfies:
- the transmitting device can obtain the modulation symbol 2 based on the constellation rotation manner.
- the in-phase component of the modulation symbol 2 is used as a component in the first sequence, and the quadrature component of the modulation symbol 2 is used as a component in the second sequence.
- the quadrature component of the modulation symbol 2 is used as a component in the first sequence, and the in-phase component of the modulation symbol 2 is used as a component in the second sequence.
- the originating device can determine two components corresponding to the first bit set, that is, one component in the first sequence and one component in the second sequence.
- the originating device performs interleaving processing on the first sequence to obtain a third sequence.
- the interleaving process can be understood as exchanging positions of at least two components in the first sequence.
- the position to be transposed is randomly determined, so that the channel characteristics of the fading channel become as uniform as possible, so that the fading channel is closer to the AWGN channel.
- the positions of at least two components are swapped.
- the more components with position swapping the more favorable the gain for smoothing the fading channel, and the more uniform the channel characteristics of the fading channel become.
- only the exchange of positions of all components in the first sequence is used as an example for introduction.
- the first sequence includes 500 in-phase components.
- the arrangement order of the 500 in-phase components is shown in the first box in Figure 10, from left to right, in order: in-phase component 1, in-phase component 2, in-phase component 3 , in-phase component 4, ..., in-phase component 497, in-phase component 498, in-phase component 499, in-phase component 500.
- the interleaving process includes that the in-phase component 1 and the in-phase component 500 exchange positions, the in-phase component 2 and the in-phase component 499 exchange positions, and the positions of other in-phase components can be deduced by analogy, which will not be repeated here.
- the interleaving process in FIG. 10 is only an exemplary illustration, and the positions to be swapped are randomly determined, and the positions to be swapped may also have other situations, which will not be repeated here.
- the arrangement order of the 500 in-phase components is shown in the second box in Figure 10, from left to right, in order: in-phase component 500, in-phase component 499, in-phase component 498, in-phase component 497, ... , in-phase component 4, in-phase component 3, in-phase component 2, in-phase component 1.
- the third sequence when the first sequence includes N in-phase components, the third sequence also includes N in-phase components, and only the arrangement order of the N in-phase components is different from the arrangement order of the N in-phase components in the first sequence.
- the third sequence also includes N orthogonal components, and only the arrangement order of the N orthogonal components is different from the arrangement order of the N orthogonal components in the first sequence.
- S503 is implemented as S503a and S503b
- the originating device after the originating device executes S503a, it may execute S503b first, and then S504, or it may execute S504 first, and then execute S503b, or it may execute S503b and S504 at the same time. Examples are not limited to this.
- the originating device determines a symbol sequence based on the second sequence and the third sequence.
- the symbol sequence includes N QAM symbols.
- the modulation order of each QAM symbol in the N QAM symbols is equal to 2 2X .
- X represents the number of bits in each bit set in S502.
- each bit set includes 2 bits
- each QAM symbol in the bit sequence is a QAM16 modulated symbol, and the modulation order is 16.
- each bit set includes 4 bits
- each QAM symbol in the bit sequence is a QAM256 modulated symbol
- the modulation order is 256.
- each QAM symbol in the bit sequence is a QAM4096 modulated symbol, and the modulation order is 4096.
- the originating device bases the first quadrature component in the second sequence and the first in-phase component in the third sequence component to determine the first QAM symbol in the symbol sequence.
- the originating device determines a second QAM symbol in the symbol sequence based on the second quadrature component in the second sequence and the second in-phase component in the third sequence.
- Other QAM symbols in the symbol sequence can be deduced by analogy, and will not be repeated here.
- the transmitting device sends the symbol sequence to the receiving device.
- the receiving device receives the symbol sequence from the sending device.
- the receiving device can communicate with the sending device.
- the receiving device can also be described as a receiving device, a receiving device, a receiving device, etc.
- the embodiment of the present application does not limit the name of the receiving device, and only the receiving device is used as an example for introduction.
- the receiving device may be an access network device.
- the receiving device may be a terminal device.
- the source device after the source device performs resource mapping on the symbol sequence, it sends the symbol sequence to the receive device through the mapped resources.
- the receiving device receives the symbol sequence from the transmitting device through the mapped resources.
- the receiving device determines the fourth sequence and the fifth sequence according to the symbol sequence.
- the fourth sequence includes in-phase components of N QAM symbols, and the fifth sequence includes quadrature components of N QAM symbols.
- the fourth sequence includes quadrature components of N QAM symbols
- the fifth sequence includes in-phase components of N QAM symbols.
- the receiving device determines the first in-phase component in the fourth sequence based on the first QAM symbol in the symbol sequence , and the first orthogonal component in the fifth sequence.
- the receiving end device determines the second in-phase component in the fourth sequence and the second quadrature component in the fifth sequence based on the second QAM symbol in the symbol sequence.
- Other components in the fourth sequence, and other components in the fifth sequence can be deduced by analogy, and will not be repeated here.
- the components in the fourth sequence are also in-phase components, and when the first sequence includes N quadrature components, the components in the fourth sequence are also quadrature components , in order to do deinterleaving processing.
- the receiving device performs deinterleaving processing on the fourth sequence to obtain a sixth sequence.
- the deinterleaving process is an inverse process of the interleaving process, which can also be understood as exchanging the positions of at least two components in the fourth sequence.
- the position to be transposed in the fourth sequence is the same as the position to be transposed in the first sequence, so as to restore the arrangement position of each component.
- the arrangement order of the 500 in-phase components is from left to right, as follows: in-phase component 1, in-phase component 2, in-phase component 3, in-phase component 4, ... , In-phase component 497, In-phase component 498, In-phase component 499, In-phase component 500.
- the deinterleaving process in S508 is the reverse process of the interleaving process in S504. Therefore, the de-interleaving process includes exchanging positions of in-phase component 1 and in-phase component 500, exchanging positions of in-phase component 2 and in-phase component 499, and the positions of other in-phase components can be deduced by analogy, and will not be repeated here.
- the arrangement order of the 500 in-phase components from left to right is: in-phase component 500, in-phase component 499, in-phase component 498, in-phase component 497, ..., in-phase component 4, in-phase component 3, in-phase component 2 , in-phase component 1.
- the receiving device jointly demodulates the fifth sequence and the sixth sequence to obtain N bit sets.
- the receiving device performs joint demodulation according to the first quadrature component in the fifth sequence and the first in-phase component in the sixth sequence to obtain the first bit set in the N bit sets.
- the receiving device performs joint demodulation according to the second orthogonal component in the fifth sequence and the second in-phase component in the sixth sequence to obtain the second bit set in the N bit sets.
- the process of determining other bit sets in the N bit sets will not be described again.
- 500 bit sets are still taken as an example, and each bit set includes two bits.
- the bits in a bit set can be recorded as b 0 b 1 .
- the value of bit b0 is determined based on LLR b0 . Among them, LLR b0 satisfies:
- formula (5) is calculated based on the mapping relationship in Table 2 and Table 3, and LLR b0 represents the logarithmic likelihood ratio of bit b0 .
- bit b 0 b 1 is 00
- the in-phase component xi representing the transmitted QAM symbol is In the case of , the in-phase component y i of the received QAM symbol is Likelihood probability of
- the in-phase component x q representing the transmitted QAM symbol is In the case of , the in-phase component y q of the received QAM symbol is Likelihood probability of .
- the in-phase component xi representing the transmitted QAM symbol is In the case of , the in-phase component y i of the received QAM symbol is Likelihood probability of ,
- the in-phase component x q representing the transmitted QAM symbol is In the case of , the in-phase component y q of the received QAM symbol is Likelihood probability of .
- the in-phase component xi representing the transmitted QAM symbol is In the case of , the in-phase component y i of the received QAM symbol is Likelihood probability of ,
- the in-phase component x q representing the transmitted QAM symbol is In the case of , the in-phase component y q of the received QAM symbol is Likelihood probability of .
- the in-phase component xi representing the transmitted QAM symbol is In the case of , the in-phase component y i of the received QAM symbol is Likelihood probability of ,
- the in-phase component x q representing the transmitted QAM symbol is In the case of , the in-phase component y q of the received QAM symbol is Likelihood probability of .
- bit b1 The value of bit b1 is determined based on LLR b1 . Among them, LLR b1 satisfies:
- formula (6) is calculated based on the mapping relationship in Table 2 and Table 3, and LLR b1 represents the logarithmic likelihood ratio of bit b1 .
- bit b 0 b 1 is 00
- the in-phase component xi representing the transmitted QAM symbol is In the case of , the in-phase component y i of the received QAM symbol is Likelihood probability of
- the in-phase component x q representing the transmitted QAM symbol is In the case of , the in-phase component y q of the received QAM symbol is Likelihood probability of .
- the in-phase component xi representing the transmitted QAM symbol is In the case of , the in-phase component y i of the received QAM symbol is Likelihood probability of ,
- the in-phase component x q representing the transmitted QAM symbol is In the case of , the in-phase component y q of the received QAM symbol is Likelihood probability of .
- the in-phase component xi representing the transmitted QAM symbol is In the case of , the in-phase component y i of the received QAM symbol is Likelihood probability of ,
- the in-phase component x q representing the transmitted QAM symbol is In the case of , the in-phase component y q of the received QAM symbol is Likelihood probability of .
- the in-phase component xi representing the transmitted QAM symbol is In the case of , the in-phase component y i of the received QAM symbol is Likelihood probability of ,
- the in-phase component x q representing the transmitted QAM symbol is In the case of , the in-phase component y q of the received QAM symbol is Likelihood probability of .
- the receiving device repeats the above process to obtain the log likelihood ratio LLR of each bit set in the N bit sets.
- S504 may also be replaced by: the originating device performs interleaving processing on the second sequence to obtain the seventh sequence.
- S505 is replaced by: the originating device determines a symbol sequence based on the first sequence and the seventh sequence.
- S508 is replaced by: the originating device performs deinterleaving processing on the fifth sequence to obtain an eighth sequence.
- S509 is replaced by: the originating device jointly demodulates the fourth sequence and the eighth sequence to obtain N bit sets.
- the two sequences may also be interleaved in S504, that is, S504 may also be replaced by: the originating device performs interleaving on the first sequence to obtain the third sequence, and performs interleaving on the second sequence Interleaved to obtain the seventh sequence.
- S505 is replaced by: the originating device determines a symbol sequence based on the third sequence and the seventh sequence, which will not be repeated here.
- S508 is replaced by: the originating device performs deinterleaving processing on the fourth sequence to obtain the sixth sequence, and performs deinterleaving processing on the fifth sequence to obtain the eighth sequence.
- S509 is replaced by: the originating device jointly demodulates the sixth sequence and the eighth sequence to obtain N bit sets.
- Fig. 11 is the simulation result under the AWGN channel
- Fig. 12 to Fig. 14 are the simulation results of the extended typical urban channel model (3rd generation partnership project-extended typical urban model, 3GPP-ETU) of the 3rd Generation Partnership Project.
- 3rd generation partnership project-extended typical urban model 3GPP-ETU
- the AWGN channel is taken as an example, that is, the symbol sequence in S506 is transmitted through the AWGN channel.
- FIG. 11 shows the simulation results when information transmission is performed using the above-mentioned implementation mode 1 and implementation mode 2 (that is, the two implementation modes in S503 above).
- the horizontal axis is the symbol signal-to-noise ratio (Es/N0), and the vertical axis is the block error rate (block error rate, BLER).
- Es/N0 symbol signal-to-noise ratio
- BLER block error rate
- implementation mode 2 constellation rotation is performed after QPSK modulation is performed on each bit set, and the performance result of this mode is shown in the broken line marked by the black dot in FIG. 11 . It can be seen from FIG. 11 that, taking the AWGN channel as an example, in the case of the same symbol SNR (Es/N0), the BLER of the implementation mode 1 is close to the BLER of the implementation mode 2. It can also be understood that the performances of the implementation mode 1 and the implementation mode 2 are the same.
- Fig. 12 shows the channel gain of different pilot points for a weakened channel.
- the vertical axis is the modulus of the channel response
- the horizontal axis is the ranking of the channel response moduli.
- Fig. 13 shows a performance simulation diagram of a modulation mode.
- the vertical axis is the packet error rate (packet error rate, PER), and the horizontal axis is the signal-to-noise ratio (SNR).
- packet error rate packet error rate
- SNR signal-to-noise ratio
- one modulation symbol can carry two bits of information.
- the modulation modes in FIG. 13 include two types: the first type, ordinary QPSK; the second type, the modulation mode shown in the communication method 500 of the present application, and each bit set includes two bits.
- the broken line marked by black dots in Fig. 13 shows the PER performance results of ordinary QPSK.
- the broken line marked with a diamond in Figure 13 shows the PER performance result of the modulation method given in this application, that is, the QAM16 symbol sequence is obtained after two mappings, or QPSK modulation is performed first, and then the QPSK modulated symbols are subjected to constellation rotation , to get the QAM16 symbol sequence. It can be seen from FIG. 13 that, under the same PER, compared with ordinary QPSK, the SNR of the modulation scheme shown in this application has a gain of 1.8 dB.
- Fig. 14 shows a performance simulation diagram of another modulation mode.
- the vertical axis is PER
- the horizontal axis is SNR.
- one modulation symbol can carry four bits of information.
- the modulation mode in FIG. 14 includes two types: the first type, common QAM16; the second type, the modulation mode shown in the communication method 500 of the present application, and each bit set includes four bits.
- the broken line marked by black dots in Fig. 14 shows the PER performance results of common QAM16.
- the SNR of the modulation scheme shown in this application has a gain of 1.1 dB.
- the embodiment of the present application further provides a communication device, and the communication device may be the network element in the foregoing method embodiment, or a device including the foregoing network element, or may be a component applicable to the network element.
- the communication device includes hardware structures and/or software modules corresponding to each function.
- the present application can be implemented in the form of hardware or a combination of hardware and computer software in combination with the units and algorithm steps of each example described in the embodiments disclosed herein. Whether a certain function is executed by hardware or computer software drives hardware depends on the specific application and design constraints of the technical solution. Skilled artisans may use different methods to implement the described functions for each specific application, but such implementation should not be regarded as exceeding the scope of the present application.
- FIG. 15 shows a schematic structural diagram of a communication device 1500 .
- the communication device 1500 includes a processing unit 1501 , a sending unit 1502 and a receiving unit 1503 .
- the processing unit 1501 is used to support the originating device to execute S501, S502, S503, S504, and S505 in FIG. 5, and/or the originating device in the embodiment of this application Additional processing operations that need to be performed.
- the sending unit 1502 is configured to support the originating device to perform S506 in FIG. 5 , and/or other sending operations that the originating device needs to perform in this embodiment of the application.
- the receiving unit 1503 is used to support other receiving operations that the originating device needs to perform.
- the processing unit 1501 is used to support the receiving device to execute S507, S508, and S509 in FIG. 5, and/or the receiving device in the embodiment of the present application Additional processing operations that need to be performed.
- the receiving unit 1503 is configured to support the receiving device to perform S506 in FIG. 5 , and/or other receiving operations that the receiving device needs to perform in the embodiment of the present application.
- the sending unit 1503 is used to support other sending operations that the receiving device needs to perform.
- the communication device 1500 may further include a storage unit 1504 for storing program codes and data of the communication device, and the data may include but not limited to original data or intermediate data.
- the processing unit 1501 may be a processor or a controller, such as a CPU, a general processor, an application specific integrated circuit (ASIC), a field programmable gate array (field programmable gate array, FPGA) or other Programmable logic devices, transistor logic devices, hardware components, or any combination thereof. It can implement or execute the various illustrative logical blocks, modules and circuits described in connection with the present disclosure.
- the processor can also be a combination of computing functions, for example, a combination of one or more microprocessors, a combination of DSP and a microprocessor, and so on.
- the sending unit 1502 may be a communication interface, a transmitter, or a sending circuit, etc., wherein the communication interface is collectively referred to as, in a specific implementation, the communication interface may include multiple interfaces, for example, it may include: interface and/or other interfaces.
- the receiving unit 1503 may be a communication interface, a receiver or a receiving circuit, etc., wherein the communication interface is collectively referred to as, in a specific implementation, the communication interface may include multiple interfaces, for example, may include: interface and/or other interfaces.
- the sending unit 1502 and the receiving unit 1503 may be physically or logically implemented as the same unit.
- the storage unit 1504 may be a memory.
- the processing unit 1501 is a processor
- the sending unit 1502 and the receiving unit 1503 are communication interfaces
- the storage unit 1504 is a memory
- the communication device involved in this embodiment of the present application may be as shown in FIG. 16 .
- the communication device includes: a processor 1601 , a communication interface 1602 , and a memory 1603 .
- the communication device may further include a bus 1604 .
- the communication interface 1602, the processor 1601 and the memory 1603 can be connected to each other through the bus 1604;
- the bus 1604 can be a peripheral component interconnect standard (peripheral component interconnect, PCI) bus or an extended industry standard architecture (extended industry standard architecture, EISA) bus etc.
- the bus 1604 can be divided into address bus, data bus, control bus and so on. For ease of representation, only one thick line is used in FIG. 16 , but it does not mean that there is only one bus or one type of bus.
- the embodiments of the present application further provide a computer program product carrying computer instructions, and when the computer instructions are run on a computer, the computer is made to execute the method described in the foregoing embodiments.
- an embodiment of the present application further provides a computer-readable storage medium, where the computer-readable storage medium stores computer instructions, and when the computer instructions are run on a computer, the computer executes the method described in the above-mentioned embodiments.
- an embodiment of the present application further provides a chip, including: a processing circuit and a transceiver circuit, and the processing circuit and the transceiver circuit are used to implement the methods described in the foregoing embodiments.
- the processing circuit is used to execute the processing action in the corresponding method
- the transceiver circuit is used to execute the receiving/sending action in the corresponding method.
- all or part of them may be implemented by software, hardware, firmware or any combination thereof.
- software When implemented using software, it may be implemented in whole or in part in the form of a computer program product.
- the computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on the computer, the processes or functions according to the embodiments of the present application will be generated in whole or in part.
- the computer can be a general purpose computer, a special purpose computer, a computer network, or other programmable devices.
- the computer instructions may be stored in or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer instructions may be transmitted from a website, computer, server or data center Transmission to another website site, computer, server or data center by wired (such as coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (such as infrared, wireless, microwave, etc.).
- the computer-readable storage medium may be any available medium that can be accessed by a computer, or a data storage device including a server, a data center, and the like integrated with one or more available media.
- the available medium may be a magnetic medium (for example, a floppy disk, a hard disk, a tape), an optical medium (for example, a digital video disc (digital video disc, DVD)), or a semiconductor medium (for example, a solid state drive (solid state drive, SSD)) wait.
- a magnetic medium for example, a floppy disk, a hard disk, a tape
- an optical medium for example, a digital video disc (digital video disc, DVD)
- a semiconductor medium for example, a solid state drive (solid state drive, SSD)
- the disclosed system, device and method can be implemented in other ways.
- the device embodiments described above are only illustrative.
- the division of the modules is only a logical function division. In actual implementation, there may be other division methods.
- multiple modules or components can be combined or May be integrated into another system, or some features may be ignored, or not implemented.
- the mutual coupling or direct coupling or communication connection shown or discussed may be through some interfaces, and the indirect coupling or communication connection of devices or modules may be in electrical or other forms.
- the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or may be distributed to multiple devices. Part or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.
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Abstract
本申请提供了通信方法及装置,涉及无线通信技术领域,能够使得衰落信道实现良好的纠错能力,有助于提升信息传输可靠性。该方法包括:发端设备基于N个比特集合确定正交幅度调制QAM的第一序列和第二序列。其中,第一序列包括N个同相分量,第二序列包括N个正交分量,或第一序列包括N个正交分量,第二序列包括N个同相分量,N为大于或等于2的整数。然后,发端设备对第一序列进行交织处理,以得到第三序列。之后,发端设备向收端设备发送基于第二序列和第三序列确定的符号序列。其中,符号序列包括N个QAM符号。
Description
本申请要求于2021年12月02日提交国家知识产权局、申请号为202111464150.4、申请名称为“通信方法及装置”的中国专利申请的优先权,其全部内容通过引用结合在本申请中。
本申请涉及无线通信技术领域,尤其涉及一种通信方法及装置。
通信系统大多采用信道编码来抵抗干扰,以提升系统可靠性。信道编码的构造基础是假设所有的信息都经过高斯加性白噪声(additive white gaussian noise,AWGN)信道。其中,AWGN信道,是指信道的噪声在频谱上均匀分布,幅度上呈正态分布的信道。
然而,真实环境中的信道多为衰落信道(fading channel),即受到多径、接收目标/发送目标相对位置的移动、射频器件的非线性特性等影响,而呈现频选、衰落特性。因此,在衰落信道传输信息时,若沿用基于AWGN信道构造的信道编码,则衰落信道的纠错能力较差,影响系统可靠性。
发明内容
本申请提供一种通信方法及装置,能够使得衰落信道实现良好的纠错能力,有助于提升信息传输可靠性。
为达到上述目的,本申请实施例采用如下技术方案:
第一方面,本申请实施例提供一种通信方法,该方法的执行主体可以是发端设备,也可以是应用于发端设备中的芯片。下面以执行主体是发端设备为例进行描述。该方法包括:发端设备基于N个比特集合确定正交幅度调制QAM的第一序列和第二序列。其中,第一序列包括N个同相分量,第二序列包括N个正交分量,或第一序列包括N个正交分量,第二序列包括N个同相分量,N为大于或等于2的整数。然后,发端设备对第一序列进行交织处理,以得到第三序列。之后,发端设备向收端设备发送基于第二序列和第三序列确定的符号序列。其中,符号序列包括N个QAM符号。
如此,同一比特集合进行了两次映射,该比特集合携带的比特信息通过两个序列(如上述第二序列和第三序列)进行传输。由于第三序列已做交织处理,所以,不同位置上的比特信息受到的干扰得到平均化,也使得衰落信道的信道特征变得均匀,更接近AWGN信道,从而实现良好的纠错能力,有助于提升信息传输可靠性。
在一种可能的设计中,N个同相分量是基于第一码本确定的。其中,第一码本至少指示比特集合与同相分量之间的映射关系。N个正交分量是基于第二码本确定的。其中,第二码本至少指示比特集合与正交分量之间的映射关系。
如此,发端设备基于预设的码本和比特集合中的比特取值状况,将N个比特集合映射到第一序列,以及将N个比特集合映射到第二序列。
在一种可能的设计中,N个同相分量包括N个第一符号的同相分量,N个正交分量包括N个第一符号的正交分量。其中,第一符号是第二符号在星座图上旋转第一角度得到的,且 第一符号的第一调制阶数是第二符号的第二调制阶数的平方。第二符号是比特集合调制后的符号。旋转是以星座图的原点为圆心,沿顺时针或逆时针进行的旋转。第一角度大于或等于以下角度:第二调制阶数的一个符号在星座图上沿顺时针或逆时针旋转之后,遇到第一调制阶数的首个符号时所旋转的最小角度。
如此,发端设备基于星座旋转方式,即可得到第一序列和第二序列。
在一种可能的设计中,第一角度满足:
在一种可能的设计中,比特集合包括X个比特,QAM符号的调制阶数是2
2X,X为正整数。
第二方面,本申请实施例提供一种通信方法,该方法的执行主体可以是收端设备,也可以是应用于收端设备中的芯片。下面以执行主体是收端设备为例进行描述。该方法包括:收端设备接收来自发端设备的符号序列,其中,符号序列包括N个正交幅度调制QAM符号。收端设备根据符号序列,确定第四序列和第五序列,其中,第四序列包括N个QAM符号的同相分量,第五序列包括N个QAM符号的正交分量,或第四序列包括N个QAM符号的正交分量,第五序列包括N个QAM符号的同相分量。收端设备对第四序列进行解交织处理,以得到第六序列。收端设备对第五序列和第六序列进行联合解调,以得到N个比特集合。
在一种可能的设计中,比特集合包括X个比特,QAM符号的调制阶数是2
2X,X为正整数。
第三方面,本申请实施例提供一种通信装置,该通信装置可以为上述第一方面或第一方面任一种可能的设计中的发端设备,或者实现上述发端设备功能的芯片;所述通信装置包括实现上述方法相应的模块、单元、或手段(means),该模块、单元、或means可以通过硬件实现,软件实现,或者通过硬件执行相应的软件实现。该硬件或软件包括一个或多个与上述功能相对应的模块或单元。
该通信装置包括处理单元和发送单元。其中,处理单元,用于基于N个比特集合确定正交幅度调制QAM的第一序列和第二序列。其中,第一序列包括N个同相分量,第二序列包括N个正交分量,或第一序列包括N个正交分量,第二序列包括N个同相分量,N为大于或等于2的整数。处理单元,还用于对第一序列进行交织处理,以得到第三序列。发送单元,用于向收端设备发送基于第二序列和第三序列确定的符号序列。其中,符号序列包括N个QAM符号。
在一种可能的设计中,N个同相分量是基于第一码本确定的。其中,第一码本至少指示比特集合与同相分量之间的映射关系。N个正交分量是基于第二码本确定的。其中,第二码本至少指示比特集合与正交分量之间的映射关系。
在一种可能的设计中,N个同相分量包括N个第一符号的同相分量,N个正交分量包括N个第一符号的正交分量。其中,第一符号是第二符号在星座图上旋转第一角度得到的,且第一符号的第一调制阶数是第二符号的第二调制阶数的平方。第二符号是比特集合调制后的符号。旋转是以星座图的原点为圆心,沿顺时针或逆时针进行的旋转。第一角度大于或等于 以下角度:第二调制阶数的一个符号在星座图上沿顺时针或逆时针旋转之后,遇到第一调制阶数的首个符号时所旋转的最小角度。
在一种可能的设计中,第一角度满足:
在一种可能的设计中,比特集合包括X个比特,QAM符号的调制阶数是2
2X,X为正整数。
第四方面,本申请实施例提供一种通信装置,该通信装置可以为上述第二方面或第二方面任一种可能的设计中的收端设备,或者实现上述收端设备功能的芯片;所述通信装置包括实现上述方法相应的模块、单元、或手段(means),该模块、单元、或means可以通过硬件实现,软件实现,或者通过硬件执行相应的软件实现。该硬件或软件包括一个或多个与上述功能相对应的模块或单元。
该通信装置包括接收单元和处理单元。其中,接收单元,用于接收来自发端设备的符号序列,其中,符号序列包括N个正交幅度调制QAM符号。处理单元,用于根据符号序列,确定第四序列和第五序列,其中,第四序列包括N个QAM符号的同相分量,第五序列包括N个QAM符号的正交分量,或第四序列包括N个QAM符号的正交分量,第五序列包括N个QAM符号的同相分量。处理单元,还用于对第四序列进行解交织处理,以得到第六序列。处理单元,还用于对第五序列和第六序列进行联合解调,以得到N个比特集合。
在一种可能的设计中,比特集合包括X个比特,QAM符号的调制阶数是2
2X,X为正整数。
第五方面,本申请实施例提供了一种通信装置,包括:处理器和存储器;该存储器用于存储计算机指令,当该处理器执行该指令时,使得该通信装置执行上述任一方面或任一方面任一种可能的设计中发端设备所执行的方法。该通信装置可以为上述第一方面或第一方面任一种可能的设计中的发端设备,或者实现上述发端设备功能的芯片。
第六方面,本申请实施例提供了一种通信装置,包括:处理器;所述处理器与存储器耦合,用于读取存储器中的指令并执行,以使该通信装置执行如上述任一方面或任一方面任一种可能的设计中的发端设备所执行的方法。该通信装置可以为上述第一方面或第一方面任一种可能的设计中的发端设备,或者实现上述发端设备功能的芯片。
第七方面,本申请实施例提供一种芯片,包括处理电路和输入输出接口。其中,输入输出接口用于与芯片之外的模块通信,例如,该芯片可以为实现上述第一方面或第一方面任一种可能的设计中的发端设备功能的芯片。处理电路用于运行计算机程序或指令,以实现以上第一方面或第一方面任一种可能的设计中的方法。
第八方面,本申请实施例提供了一种通信装置,包括:处理器和存储器;该存储器用于存储计算机指令,当该处理器执行该指令时,使得该通信装置执行上述任一方面或任一方面任一种可能的设计中收端设备所执行的方法。该通信装置可以为上述第二方面或第二方面任一种可能的设计中的收端设备,或者实现上述收端设备功能的芯片。
第九方面,本申请实施例提供了一种通信装置,包括:处理器;所述处理器与存储器耦 合,用于读取存储器中的指令并执行,以使该通信装置执行如上述任一方面或任一方面任一种可能的设计中的收端设备所执行的方法。该通信装置可以为上述第二方面或第二方面任一种可能的设计中的收端设备,或者实现上述收端设备功能的芯片。
第十方面,本申请实施例提供一种芯片,包括处理电路和输入输出接口。其中,输入输出接口用于与芯片之外的模块通信,例如,该芯片可以为实现上述第二方面或第二方面任一种可能的设计中的收端设备功能的芯片。处理电路用于运行计算机程序或指令,以实现以上第二方面或第二方面任一种可能的设计中的方法。
第十一方面,本申请实施例提供一种计算机可读存储介质,该计算机可读存储介质中存储有指令,当其在计算机上运行时,使得计算机可以执行上述任一方面中任一项的方法。
第十二方面,本申请实施例提供一种包含指令的计算机程序产品,当其在计算机上运行时,使得计算机可以执行上述任一方面中任一项的方法。
第十三方面,本申请实施例提供一种电路系统,电路系统包括处理电路,处理电路被配置为执行如上述任一方面中任一项的方法。
第十四方面,本申请实施例提供一种通信系统,该通信系统包括上述各个方面中任一项中的发端设备和收端设备。
其中,第二方面至第十四方面中任一种设计所带来的技术效果可参考上文所提供的对应的方法中的有益效果,此处不再赘述。
图1为本申请实施例提供的一种通信系统的架构示意图;
图2为本申请实施例提供的一种无线通信的基本流程图;
图3为本申请实施例提供的一种衰落信道的性能结果图;
图4为本申请实施例提供的一种星座图;
图5为本申请实施例提供的一种通信方法的流程示意图;
图6为本申请实施例提供的再一种通信方法的流程示意图;
图7为本申请实施例提供的又一种通信方法的流程示意图;
图8为本申请实施例提供的一种星座旋转的场景示意图;
图9为本申请实施例提供的一种星座旋转的场景示意图;
图10为本申请实施例提供的一种交织处理的过程示意图;
图11为本申请实施例提供的一种仿真结果图;
图12为本申请实施例提供的再一种仿真结果图;
图13为本申请实施例提供的又一种仿真结果图;
图14为本申请实施例提供的又一种仿真结果图;
图15为本申请实施例提供的一种通信装置的结构示意图;
图16为本申请实施例提供的再一种通信装置的结构示意图。
下面将结合附图,对本申请中的技术方案进行描述。
图1是本申请的实施例应用的通信系统1000的架构示意图。如图1所示,该通信系统包括无线接入网100和核心网200,可选的,通信系统1000还可以包括互联网300。其中,无 线接入网100可以包括至少一个无线接入网设备(如图1中的110a和110b),还可以包括至少一个终端设备(如图1中的120a-120j)。终端设备通过无线的方式与无线接入网设备相连,无线接入网设备通过无线或有线方式与核心网连接。核心网设备与无线接入网设备可以是独立的不同的物理设备,也可以是将核心网设备的功能与无线接入网设备的逻辑功能集成在同一个物理设备上,还可以是一个物理设备上集成了部分核心网设备的功能和部分的无线接入网设备的功能。终端设备和终端设备之间以及无线接入网设备和无线接入网设备之间可以通过有线或无线的方式相互连接。图1只是示意图,该通信系统中还可以包括其它网络设备,如还可以包括无线中继设备和无线回传设备,在图1中未画出。
无线接入网设备可以是基站(base station)、演进型基站(evolved NodeB,eNodeB)、发送接收点(transmission reception point,TRP)、第五代(5th generation,5G)移动通信系统中的下一代基站(next generation NodeB,gNB)、第六代(6th generation,6G)移动通信系统中的下一代基站、未来移动通信系统中的基站或WiFi系统中的接入节点等;也可以是完成基站部分功能的模块或单元,例如,可以是集中式单元(central unit,CU),也可以是分布式单元(distributed unit,DU)。这里的CU完成基站的无线资源控制协议和分组数据汇聚层协议(packet data convergence protocol,PDCP)的功能,还可以完成业务数据适配协议(service data adaptation protocol,SDAP)的功能;DU完成基站的无线链路控制层和介质访问控制(medium access control,MAC)层的功能,还可以完成部分物理层或全部物理层的功能,有关上述各个协议层的具体描述,可以参考第三代合作伙伴计划(3rd generation partnership project,3GPP)的相关技术规范。无线接入网设备可以是宏基站(如图1中的110a),也可以是微基站或室内站(如图1中的110b),还可以是中继节点或施主节点等。本申请的实施例对无线接入网设备所采用的具体技术和具体设备形态不做限定。为了便于描述,下文以基站作为无线接入网设备的例子进行描述。
终端设备也可以称为终端、用户设备(user equipment,UE)、移动台、移动终端等。终端设备可以广泛应用于各种场景,例如,设备到设备(device-to-device,D2D)、车物(vehicle to everything,V2X)通信、机器类通信(machine-type communication,MTC)、物联网(internet of things,IOT)、虚拟现实、增强现实、工业控制、自动驾驶、远程医疗、智能电网、智能家具、智能办公、智能穿戴、智能交通、智慧城市等。终端设备可以是手机、平板电脑、带无线收发功能的电脑、可穿戴设备、车辆、无人机、直升机、飞机、轮船、机器人、机械臂、智能家居设备等。本申请的实施例对终端设备所采用的具体技术和具体设备形态不做限定。
基站和终端设备可以是固定位置的,也可以是可移动的。基站和终端设备可以部署在陆地上,包括室内或室外、手持或车载;也可以部署在水面上;还可以部署在空中的飞机、气球和人造卫星上。本申请的实施例对基站和终端设备的应用场景不做限定。
基站和终端设备的角色可以是相对的,例如,图1中的直升机或无人机120i可以被配置成移动基站,对于那些通过120i接入到无线接入网100的终端设备120j来说,终端设备120i是基站;但对于基站110a来说,120i是终端设备,即110a与120i之间是通过无线空口协议进行通信的。当然,110a与120i之间也可以是通过基站与基站之间的接口协议进行通信的,此时,相对于110a来说,120i也是基站。因此,基站和终端设备都可以统一称为通信装置,图1中的110a和110b可以称为具有基站功能的通信装置,图1中的120a-120j可以称为具有终端设备功能的通信装置。
基站和终端设备之间、基站和基站之间、终端设备和终端设备之间可以通过授权频谱进行通信,也可以通过免授权频谱进行通信,也可以同时通过授权频谱和免授权频谱进行通信;可以通过6千兆赫(gigahertz,GHz)以下的频谱进行通信,也可以通过6GHz以上的频谱进行通信,还可以同时使用6GHz以下的频谱和6GHz以上的频谱进行通信。本申请的实施例对无线通信所使用的频谱资源不做限定。
在本申请的实施例中,基站的功能也可以由基站中的模块(如芯片)来执行,也可以由包含有基站功能的控制子系统来执行。这里的包含有基站功能的控制子系统可以是智能电网、工业控制、智能交通、智慧城市等上述应用场景中的控制中心。终端设备的功能也可以由终端设备中的模块(如芯片或调制解调器)来执行,也可以由包含有终端设备功能的装置来执行。
在本申请中,基站向终端设备发送下行信号或下行信息,下行信息承载在下行信道上;终端设备向基站发送上行信号或上行信息,上行信息承载在上行信道上。终端设备为了与基站进行通信,需要与基站控制的小区建立无线连接。与终端设备建立了无线连接的小区称为该终端设备的服务小区。当终端设备与该服务小区进行通信的时候,还会受到来自邻区的信号的干扰。
图2是采用无线技术进行通信的基本流程图。如图2所示,发端设备将对信源进行信源编码、信道编码(channel encoding)、速率匹配(rate matching)、比特交织(bit interleaving)、调制映射后,得到待传输的信号,向收端设备发送该信号。该信号在发端设备和收端设备之间的信道上传输时,可能会受到噪声的干扰。收端设备接收到该信号后,对该信号进行解调制映射、比特解交织(bit deinterleaving)、解速率匹配(derate matching)、信道解码和信源解码后,得到信宿(即还原出的信源)。
应理解,图2中仅仅示出了发送和接收过程中的部分步骤,在实际实现时,还可以有其他的步骤,本申请实施例对此不作限制。
为了便于理解本申请实施例,下面对本申请涉及的相关技术做简单介绍。
1,AWGN信道、衰落信道
AWGN信道,是指信道的噪声在频谱上均匀分布,幅度上呈正态分布的信道。AWGN信道多用于通信系统的仿真。
衰落信道,是指受到多径、接收目标/发送目标相对位置的移动、射频器件的非线性特性等影响,而呈现频选、衰落特性的信道。真实环境中的信道多为衰落信道,相比于AWGN信道更加复杂。示例性的,图3示出了衰落信道的性能结果。在衰落信道传输信号的情况下,通过不同导频点传输的信号的增益不同,如图3中的折线所示。
2,调制映射
调制映射,就是在发端设备对比特序列(例如,图2中的比特交织后的比特)中的比特映射到星座图中的星座点上。其中,一个星座点对应一个比特位或多个比特位,比特序列中的一个比特可以映射到星座点中的一个比特位。一个星座点对应一个调制符号。
调制映射的目的,是把需要传输的比特序列在时域、频域或码域上进行处理,以达到用尽量小的带宽传输尽量多的信息。
示例性的,发端设备对比特序列进行划分,每n个bit形成一个比特集合,将每个比特集合映射到调制符号上。其中,调制方式为二进制相移键控(binary phase shift keying,BPSK) 时,n=1,调制阶数为2。调制方式为正交相移键控(quadrature phase shift keying,QPSK)时,n=2,调制阶数为4。其中,QPSK也可以理解为QAM4。调制方式为正交振幅调制(quadrature amplitude modulation,QAM)16时,n=4,调制阶数为16。调制方式为QAM64时,n=6,调制阶数为64。调制方式为QAM256时,n=8,调制阶数为256。QAM的调制阶数也可以是其他取值,此处不再一一赘述。
其中,一个调制符号是基于同相(in-phase,I)分量和正交(quadrature,Q)分量确定的。示例性的,QAM16码本如表1所示:
表1
在表1中,一个比特集合中的前两位用于确定同相分量,即b
0b
1用于确定一个I的取值,如粗体数字所示。一个比特集合中的后两位用于确定正交分量,即b
2b
3用于确定一个Q的取值,如正常显示的数值所示。示例性的,以第一行为例,0000作为一个比特集合。基于该比特集合中的前两个00,确定I的取值为3。基于该比特集合中的后两个00,确定Q的取值为3。也就是说,对0000调整后,得到的调制符号的同相分量和正交分量均为3,如图4中右上方的黑点所示。其他行的映射状况可以参见表1,此处不再赘述。QAM16的星座图如图4所示。
调制映射的逆过程是解调制映射,即从星座点上恢复比特序列的过程。
3,对数似然比(likelihood rate,LLR)
一个比特的对数似然比是指该比特为0的概率和该比特为1的概率的比值取自然对数。若将该比特为1的概率记为p(1),该比特为0的概率记为p(0),则该比特的对数似然比为ln[p(0)/p(1)]。
示例性的,在收端设备侧,接收信号满足:
Y=HX+σ
2 公式(1)
其中,Y表示接收的调制符号,X表示发送的调制符号,H表示信道响应,σ
2表示信道中的噪声方差。
信道响应和噪声方差可以通过信道估计技术进行估计。因此,通过接收的调制符号Y,信道响应H和噪声方差σ
2估计发送的调制符号的最大可能性,即似然概率满足:
其中,Δ表示归一化值,e表示数学常数,Y表示接收的调制符号,H表示信道响应,X
i表示该调制下所有可能的调制符号中第i个调制符号,σ
2表示信道中的噪声方差,
表示接收的调制符号,
表示接收的调制符号
是X
i的概率。
结合公式(1)和公式(2),LLR满足:
其中,LLR表示对数似然比,X
i表示该调制下所有可能的调制符号中第i个调制符号,
表示该调制下所有可能的调制符号中第j个比特是0的所有调制符号的集合,
表示该调制下所有可能的调制符号中第j个比特是1的所有调制符号的集合,
表示接收的调制符号,
表示接收的调制符号是X
i的概率,具体可以参见公式(2),i和j是正整数。
以QAM16为例,在j=0的情况下,即b
0的取值为0,b
1b
2b
3的取值可以为0,也可以为1。结合表1,
其中,{3,3}表示同相分量和正交分量均为3的调制符号。
的其他调制符号可以此类推,不再赘述。
表示
中的第i个调制符号X
i。在j=0,且i=1的情况下,X
i可以表示{3,3}。i和j是其他取值的情况,可以此类推,不再赘述。
以QAM16为例,在j=0的情况下,即b
0的取值为1,b
1b
2b
3的取值可以为0,也可以为1。结合表1,
表示
中的第i个调制符号X
i。在j=0,且i=1的情况下,X
i可以表示{-1,3}。i和j是其他取值的情况,可以此类推,不再赘述。
通过log-max的方式对公式(3)进行简化,即:
其中,σ
2表示信道中的噪声方差,max表示取最大值,X
i表示该调制下所有可能的调制符号中第i个调制符号,
表示该调制下所有可能的调制符号中第j个比特是0的所有调制符号的集合,
表示该调制下所有可能的调制符号中第j个比特是1的所有调制符号的集合,Y表示接收的调制符号,H表示信道响应,i和j是正整数。
4,信道编码
信道编码,也叫差错控制编码,就是在发端设备对信息比特(例如,图2中的信源编码后的比特)添加冗余比特,这些冗余比特是和信息比特相关的。信道编码后的比特依次包括 信息比特和冗余比特。
信道编码的逆过程为信道解码,信道解码即接端设备根据冗余比特与信息比特的相关性来检测和纠正传输过程产生的差错,还原出信息比特,从而对抗传输过程的干扰,提高信息传输的可靠性。
信道编码的构造基础是假设所有的信息都经过AWGN信道。然而,真实环境中的信道多为衰落信道,有频选、衰落特性。因此,若沿用基于AWGN信道构造的信道编码,则衰落信道的纠错能力较差,影响系统可靠性。
有鉴于此,本申请实施例提供了一种通信方法,应用于图1的通信系统。在本申请实施例提供的通信方法中,发端设备将N个比特集合分别映射到QAM的第一序列和第二序列。其中,第一序列包括N个同相分量,第二序列包括N个正交分量。或者,第一序列包括N个正交分量,第二序列包括N个同相分量,N为大于或等于2的整数。然后,发端设备对第一序列进行交织处理,以得到第三序列。之后,发端设备向收端设备发送基于第二序列和第三序列确定的符号序列。其中,上述符号序列包括N个QAM符号。这样一来,同一比特集合进行了两次映射,该比特集合携带的比特信息通过两个序列(如上述第二序列和第三序列)进行传输。由于第三序列已做交织处理,所以,不同位置上的比特信息受到的干扰得到平均化,也使得衰落信道的信道特征变得均匀,更接近AWGN信道,从而实现良好的纠错能力,有助于提升信息传输可靠性。
下面,结合图5,对本申请实施例提出的通信方法500进行详细介绍。该通信方法500包括以下步骤:
S501、发端设备获取比特序列。
其中,发端设备是待发送信息的设备。发端设备,也可以描述为发端装置,发送端设备,发送端装置等,本申请实施例对发端设备的名称不作限定,仅以发端设备为例进行描述。示例性的,以图1为例,在上行传输时,发端设备可以是终端设备。在下行传输时,发端设备可以是接入网设备。
其中,比特序列是多个比特构成的序列,如1000个比特构成的序列,可以记为b
0b
1b
2b
3…b
996b
997b
998b
999。b
0表示上述比特序列中的首个比特,b
1表示上述比特序列中的第2个比特,其他比特的记法可以此类推,不再赘述。示例性的,以图2为例,比特序列是信源经过信源编码、信道编码、速率匹配和比特交织的比特所构成的序列,待进行调制映射。
S502、发端设备将比特序列划分为N个比特集合。
其中,N个比特集合中每个比特集合包括一个或多个比特。N为大于或等于2的整数。每个比特集合中的比特数量,是基于发端设备与收端设备之间传输的QAM符号的调制阶数确定的。其中,每个比特集合包括X个比特,发端设备与收端设备之间传输的QAM符号的调制阶数为2
2X。QAM符号可以参见S505的介绍,此处不再赘述。
示例性的,以物理下行共享信道(physical downlink shared channel,PDSCH)传输使用的调制阶数为例,每个比特集合中比特的数量可以是基于下行控制信息(downlink control information,DCI)确定的,如寻呼无线网络临时标识符(paging-radio network tempory identity,P-RNTI)、随机接入无线网络临时标识符(radom access-radio network tempory identity,RA-RNTI)、系统信息无线网络临时标识符(system information-radio network tempory identity,SI-RNTI)加扰的DCI,其对应的PDSCH传输的调制阶数为2。除了上述RNTI加扰的DCI之 外,PDSCH传输的调制阶数通过查表得到,如36.213的表7.1.7.1-1所示。在发端设备与收端设备之间传输的QAM符号的调制阶数确定的情况下,发送设备即可确定每个比特集合中的比特数量。
例如,以QPSK调制为例,调制阶数4=2
2x1,每个比特集合包括1个比特。仍以1000个比特构成的序列为例,N的取值为1000,即上述比特序列划分为1000个比特集合,可以记为A
0A
1A
2A
3…A
996A
997A
998A
999。A
0表示上述1000个比特集合中的首个比特集合,A
1表示上述1000个比特集合中的第2个比特集合,其他比特集合的记法可以此类推,不再赘述。
再如,以QAM16调制为例,调制阶数16=2
2x2,每个比特集合包括2个比特。仍以1000个比特构成的序列为例,N的取值为500,即上述比特序列划分为500个比特集合,可以记为A
0A
1A
2A
3…A
496A
497A
498A
499。其中,比特集合的记法可以参见前一段的描述,不再赘述。
又如,以QAM256调制为例,调制阶数256=2
2x4,每个比特集合包括4个比特。仍以1000个比特构成的序列为例,N的取值为250,即上述比特序列划分为250个比特集合,可以记为A
0A
1A
2A
3…A
296A
297A
298A
249。其中,比特集合的记法可以参见前一段的描述,不再赘述。
应理解,调制阶数也可以有其他数量,相应的,比特集合中的比特数量也发生变化,比特集合的划分状况不再一一赘述。
S503、发端设备将N个比特集合分别映射到第一序列和第二序列。
其中,N个比特集合可以参见S502的介绍,此处不再赘述。
其中,上述第一序列和第二序列分别包括正交幅度调制中的一种分量。示例性的,第一序列包括N个同相分量,第二序列包括N个正交分量。或者,第一序列包括N个正交分量,第二序列包括N个同相分量。其中,N个同相分量与N个比特集合一一对应,N个正交分量与N个比特集合也一一对应。例如,N个比特集合中的第k个比特集合,对应N个同相分量中的第k个同相分量。N个比特集合中的第k个比特集合,也对应N个正交分量中的第k个正交分量。其中,k为正整数,且k小于或等于N。
其中,上述正交幅度调制的调制阶数为2
2X。X表示比特集合中的比特数量。例如,每个比特集合包括2个比特,则上述正交幅度调制的调制阶数为16。再如,每个比特集合包括4个比特,则上述正交幅度调制的调制阶数为256,其他比特集合的情况可以此类推,不再赘述。
示例性的,以第一序列包括N个同相分量,第二序列包括N个正交分量为例,对S503的实现过程进行介绍。S503的实现方式包括如下两种:
实现方式1,如图6所示,S503包括S503a和S503b:
S503a、发端设备按照第一码本,将N个比特集合映射到第一序列。
其中,第一码本至少指示比特集合与同相分量之间的映射关系。示例性的,以每个比特集合包括2个比特,QAM16的同相分量为例,对第一码本进行介绍,如表2所示。
表2
在表2中,每个比特集合包括两个比特,分别记为b
0b
1。b
0b
1用于确定一个QAM16中同相分量的取值。例如,以第一行为例,基于该比特集合中的比特00,确定同相分量的取值为3。再如,以第二行为例,基于该比特集合中的比特01,确定同相分量的取值为1。其他行的映射状况可以参见表2,此处不再赘述。
应理解,第一码本仅以每个比特集合包括2个比特为例,进行介绍。当然,每个比特集合的比特数量X也可以有其他数值,第一码本指示的同相分量也会发生变化,此处不再一一赘述。
S503b、发端设备按照第二码本,将N个比特集合映射到第二序列。
其中,第二码本至少指示比特集合与正交分量之间的映射关系。示例性的,以每个比特集合包括2个比特,QAM16的正交分量为例,对第二码本进行介绍,如表3所示。
表3
在表3中,每个比特集合包括两个比特,分别记为b
0b
1。b
0b
1用于确定一个QAM16中正交分量的取值。例如,以第一行为例,基于该比特集合中的比特00,确定正交分量的取值为-1。再如,以第二行为例,基于该比特集合中的比特01,确定正交分量的取值为3。其他行的映射状况可以参见表3,此处不再赘述。
应理解,第二码本仅以每个比特集合包括2个比特为例,进行介绍。当然,每个比特集合的比特数量X也可以有其他数值,第二码本指示的正交分量也会发生变化,此处不再一一赘述。
如此,发端设备基于预设的码本和比特集合中的比特取值状况,将N个比特集合映射到第一序列,以及将N个比特集合映射到第二序列。
需要说明的是,在S503实现为S503a和S503b的情况下,发端设备可以先执行S503a,再执行S503b,也可以先执行S503b,再执行S503a,还可以同时执行S503a和S503b,本申请实施例对此不作限定。在上述实现方式1中,仅以第一序列包括N个同相分量,第二序列包括N个正交分量为例,进行介绍。当然,在第一序列包括N个正交分量,第二序列包括N个同相分量的情况下,发端设备可以按照上述第一码本,将N个比特集合映射到第二序列,以及按照上述第二码本,将N个比特集合映射到第一序列,具体实现过程可以参见S503a和S503b,此处不再赘述。
实现方式2,将N个比特集合中的某一个比特集合,记为第一比特集合,以第一比特集合为例,对比特集合的处理过程进行说明。如图7所示,S503包括S503c和S503d:
S503c、发端设备对第一比特集合进行调制,以得到调制符号1。
其中,调制符号1的调制阶数等于2
X。X表示N个比特集合中每个比特集合的比特数量。
例如,第一比特集合包括2个比特,调制符号1是经过QPSK调制得到的调制符号,调制符号1的调制阶数为4。
再如,第一比特集合包括4个比特,调制符号1是经过QAM16调制得到的调制符号,调制符号1的调制阶数为16。
又如,第一比特集合包括8个比特,调制符号1是经过QAM256调制得到的调制符号,调制符号1的调制阶数为256。
应理解,第一比特集合中的比特数量也可以有其他取值,相应的,调制符号1的调制阶数也发生变化,此处不再一一赘述。
S503d、发端设备对调制符号1进行星座旋转,以得到调制符号2。
其中,调制符号2的调制阶数是调制符号1的调制阶数的平方。例如,调制符号1的调制阶数是2,则调制符号2的调制阶数是4。再如,调制符号1的调制阶数是4,则调制符号2的调制阶数是16。又如,调制符号1的调制阶数是16,则调制符号2的调制阶数是256。
其中,星座旋转是指,以调制符号1所在星座图的原点为圆心,在星座图所在平面上,将调制符号1对应的星座点沿顺时针或逆时针进行的旋转。示例性的,如图8所示,以调制符号1是QPSK调制后的符号为例,调制符号1对应的星座点如图8所示,星座旋转的旋转方向如图8中的箭头所示。
其中,星座旋转的角度大小等于第一角度。第一角度大于或等于以下角度:
调制阶数为2
X的一个符号在星座图上沿顺时针或逆时针旋转之后,遇到调制阶数为2
2X的首个符号时所旋转的最小角度。如图9所示,以QPSK调制的符号X1,在星座图中沿逆时针方向进行旋转为例,旋转过程中,遇到QAM16的首个符号时所旋转的最小角度。示例性的,第一角度满足:
其中,θ表示第一角度,
表示调制阶数为2
X的一个符号在星座图上沿顺时针或逆时针旋转之后,遇到调制阶数为2
2X的首个符号时所旋转的最小角度,π表示圆周率,n表示大于或等于0的整数,sin
-1表示反正弦,
表示调制阶数为2
2X的符号的能量归一化常数。
如此,发端设备基于星座旋转方式,即可得到调制符号2。该调制符号2的同相分量作为第一序列中的一个分量,该调制符号2的正交分量作为第二序列中的一个分量。或者,反之,该调制符号2的正交分量作为第一序列中的一个分量,该调制符号2的同相分量作为第二序列中的一个分量。如此,发端设备即可确定第一比特集合对应的两个分量,即第一序列中的一个分量,以及第二序列中的一个分量。
应理解,在上述S503c和S503d中,仅以第一比特集合为例,对S503的实现过程进行介绍。针对N个比特集合中的其他比特集合,处理过程可以参见S503c和S503d,以得到第一序列中的其他分量,以及第二序列中的其他分量,此处不再一一赘述。
S504、发端设备对第一序列进行交织处理,以得到第三序列。
其中,交织处理,可以理解为,调换第一序列中至少两个分量的位置。在第一序列中,待发生调换的位置是随机确定的,以使衰落信道的信道特性尽可能变得均匀,从而使得衰落信道更接近AWGN信道。在第一序列中,至少两个分量的位置发生互换。当然,在第一序列中,位置互换的分量越多,越有利于平滑处理衰落信道的增益,衰落信道的信道特性变得越均匀。在本申请实施例中,仅以第一序列中的全部分量的位置发生互换为例,进行介绍。
示例性的,仍以1000个比特构成的比特序列为例,划分为500个比特集合的情况下,第一序列包括500个同相分量。如图10所示,在交织处理之前,500个同相分量的排列顺序如图10中的第一个方框所示,从左到右,依次为:同相分量1,同相分量2,同相分量3,同相分量4,…,同相分量497,同相分量498,同相分量499,同相分量500。示例性的,交织处理包括,同相分量1与同相分量500互换位置,同相分量2与同相分量499互换位置,其他同相分量之间的位置可以此类推,不再赘述。应理解,图10中的交织处理仅是示例性说明,待调换的位置是随机确定的,待调换的位置也可以有其他情形,此处不再一一赘述。在交织处理之后,500个同相分量的排列顺序如图10中的第二个方框所示,从左到右,依次为:同相分量500,同相分量499,同相分量498,同相分量497,…,同相分量4,同相分量3,同相分量2,同相分量1。
示例性的,在第一序列包括N个同相分量的情况下,第三序列也包括N个同相分量,仅N个同相分量的排列顺序与第一序列中N个同相分量的排列顺序不同。在第一序列包括N个正交分量的情况下,第三序列也包括N个正交分量,仅N个正交分量的排列顺序与第一序列中N个正交分量的排列顺序不同。
应理解,在S503实现为S503a和S503b的情况下,发端设备执行S503a之后,可以先执行S503b,再执行S504,也可以先执行S504,再执行S503b,还可以同时执行S503b和S504,本申请实施例对此不作限定。
S505、发端设备基于第二序列和第三序列确定符号序列。
其中,第二序列可以参见S503的说明,第三序列可以参见S504的说明,此处不再赘述。
其中,符号序列包括N个QAM符号。N个QAM符号中每个QAM符号的调制阶数等于2
2X。X表示S502中每个比特集合中的比特数量。例如,在每个比特集合包括2个比特的情况下,比特序列中每个QAM符号是QAM16调制后的符号,调制阶数是16。再如,在每个比特集合包括4个比特的情况下,比特序列中每个QAM符号是QAM256调制后的符号,调制阶数是256。又如,在每个比特集合包括6个比特的情况下,比特序列中每个QAM符号 是QAM4096调制后的符号,调制阶数是4096。
示例性的,在第二序列包括N个正交分量,第三序列包括N个同相分量的情况下,发端设备基于第二序列中的首个正交分量,以及第三序列中的首个同相分量,来确定符号序列中的首个QAM符号。发端设备基于第二序列中的第二个正交分量,以及第三序列中的第二个同相分量,来确定符号序列中的第二个QAM符号。符号序列中的其他QAM符号可以此类推,不再赘述。
S506、发端设备向收端设备发送符号序列。相应的,收端设备接收来自发端设备的符号序列。
其中,符号序列可以参见S505的介绍,此处不再赘述。
其中,收端设备能够与发端设备进行通信。收端设备,也可以描述为收端装置,接收端设备,接收端装置等,本申请实施例对收端设备的名称不作限定,仅以收端设备为例进行介绍。示例性的,仍以图1为例,在上行传输时,收端设备可以是接入网设备。在下行传输时,收端设备可以是终端设备。
示例性的,发端设备对符号序列进行资源映射之后,通过映射的资源向收端设备发送符号序列。相应的,收端设备通过映射的资源接收来自发端设备的符号序列。
应理解,S506中的符号序列在真实环境中传输,所以,该符号序列经过的信道即为上述衰落信道,详见名词解释部分的介绍,此处不再赘述。
S507、收端设备根据符号序列,确定第四序列和第五序列。
其中,第四序列包括N个QAM符号的同相分量,第五序列包括N个QAM符号的正交分量。或者,第四序列包括N个QAM符号的正交分量,第五序列包括N个QAM符号的同相分量。
示例性的,在第四序列包括N个同相分量,第五序列包括N个正交分量的情况下,收端设备基于符号序列中的首个QAM符号,确定第四序列中的首个同相分量,以及第五序列中的首个正交分量。收端设备基于符号序列中的第二个QAM符号,确定第四序列中的第二个同相分量,以及第五序列中的第二个正交分量。第四序列中的其他分量,以及第五序列中的其他分量,可以此类推,不再赘述。
应理解,在第一序列包括N个同相分量的情况下,第四序列中的分量也是同相分量,在第一序列包括N个正交分量的情况下,第四序列中的分量也是正交分量,以便于做解交织处理。
S508、收端设备对第四序列进行解交织处理,以得到第六序列。
其中,解交织处理是交织处理的逆过程,也可以理解为,调换第四序列中至少两个分量的位置。其中,第四序列中待发生调换的位置与第一序列中发生调换的位置相同,以恢复出各个分量的排列位置。
示例性的,仍500个同相分量为例,在解交织处理之前,500个同相分量的排列顺序从左到右,依次为:同相分量1,同相分量2,同相分量3,同相分量4,…,同相分量497,同相分量498,同相分量499,同相分量500。S508中的解交织处理是S504中交织处理的逆过程。所以,解交织处理包括,同相分量1与同相分量500互换位置,同相分量2与同相分量499互换位置,其他同相分量之间的位置可以此类推,不再赘述。在解交织处理之后,500个同相分量的排列顺序从左到右,依次为:同相分量500,同相分量499,同相分量498,同相分量 497,…,同相分量4,同相分量3,同相分量2,同相分量1。
S509、收端设备对第五序列和第六序列进行联合解调,以得到N个比特集合。
其中,第五序列可以参见S507的说明,第六序列可以参见S508的说明,此处不再赘述。N个比特集合可以参见S502的介绍,此处不再赘述。
示例性的,收端设备根据第五序列中的首个正交分量,以及第六序列中的首个同相分量进行联合解调,以得到N个比特集合中首个比特集合。收端设备根据第五序列中的第二个正交分量,以及第六序列中的第二个同相分量进行联合解调,以得到N个比特集合中第二个比特集合。N个比特集合中其他比特集合的确定过程不再赘述。示例性的,仍以500个比特集合为例,每个比特集合包括两个比特。示例性的,一个比特集合中的比特可以记为b
0b
1。比特b
0的取值是基于LLR
b0确定的。其中,LLR
b0满足:
其中,公式(5)是基于表2和表3中的映射关系进行计算的,LLR
b0表示比特b
0的对数似然比。假设比特b
0b
1的取值为00时,
表示发送的QAM符号的同相分量x
i是
的情况下,接收的QAM符号的同相分量y
i是
的似然概率,
表示发送的QAM符号的同相分量x
q是
的情况下,接收的QAM符号的同相分量y
q是
的似然概率。假设比特b
0b
1的取值为01时,
表示发送的QAM符号的同相分量x
i是
的情况下,接收的QAM符号的同相分量y
i是
的似然概率,
表示发送的QAM符号的同相分量x
q是
的情况下,接收的QAM符号的同相分量y
q是
的似然概率。假设比特b
0b
1的取值为11时,
表示发送的QAM符号的同相分量x
i是
的情况下,接收的QAM符号的同相分量y
i是
的似然概率,
表示发送的QAM符号的同相分量x
q是
的情况下,接收的QAM符号的同相分量y
q是
的似然概率。假设比特b
0b
1的取值为10时,
表示发送的QAM符号的同相分量x
i是
的情况下,接收的QAM符号的同相分量y
i是
的似然概率,
表示发送的QAM符号的同相分量x
q是
的情况下,接收的QAM符号的同相分量y
q是
的似然概率。
比特b
1的取值是基于LLR
b1确定的。其中,LLR
b1满足:
其中,公式(6)是基于表2和表3中的映射关系进行计算的,LLR
b1表示比特b
1的对数似然比。假设比特b
0b
1的取值为00时,
表示发送的QAM符号的同相分量x
i是
的情况下,接收的QAM符号的同相分量y
i是
的似然概率,
表示发送的QAM符号的同相分量x
q是
的情况下,接收的QAM符号的同相分量y
q是
的似然概率。假设比特 b
0b
1的取值为10时,
表示发送的QAM符号的同相分量x
i是
的情况下,接收的QAM符号的同相分量y
i是
的似然概率,
表示发送的QAM符号的同相分量x
q是
的情况下,接收的QAM符号的同相分量y
q是
的似然概率。假设比特b
0b
1的取值为01时,
表示发送的QAM符号的同相分量x
i是
的情况下,接收的QAM符号的同相分量y
i是
的似然概率,
表示发送的QAM符号的同相分量x
q是
的情况下,接收的QAM符号的同相分量y
q是
的似然概率。假设比特b
0b
1的取值为11时,
表示发送的QAM符号的同相分量x
i是
的情况下,接收的QAM符号的同相分量y
i是
的似然概率,
表示发送的QAM符号的同相分量x
q是
的情况下,接收的QAM符号的同相分量y
q是
的似然概率。收端设备重复上述过程,即可得到N个比特集合中每个比特集合的对数似然比LLR。
需要说明的是,S504中仅以一个序列,即上述第一序列进行交织处理,第二序列未作交织处理为例,进行介绍。当然,作交织处理的还可以是第二序列,即对第二序列进行交织处理,第一序列未作交织处理。也就是说,S504也可以替换为:发端设备对第二序列进行交织处理,以得到第七序列。相应的,S505替换为:发端设备基于第一序列和第七序列确定符号序列。S508替换为:发端设备对第五序列进行解交织处理,以得到第八序列。S509替换为:发端设备对第四序列和第八序列进行联合解调,以得到N个比特集合。
或者,在本申请实施例中,S504中也可以对两个序列进行交织处理,即S504也可以替换为:发端设备对第一序列进行交织处理,以得到第三序列,以及对第二序列进行交织处理,以得到第七序列。相应的,S505替换为:发端设备基于第三序列和第七序列确定符号序列,此处不再赘述。S508替换为:发端设备对第四序列进行解交织处理,以得到第六序列,以及对第五序列进行解交织处理,以得到第八序列。S509替换为:发端设备对第六序列和第八序列进行联合解调,以得到N个比特集合。
下面,对仿真结果进行介绍。其中,图11是AWGN信道下的仿真结果,图12至图14是第三代合作伙伴计划的扩展典型城市信道模型(3rd generation partnership project-extended typical urban model,3GPP-ETU)的仿真结果。
示例性的,以AWGN信道为例,即S506中的符号序列经过AWGN信道传输。图11示出了采用上述实现方式1和实现方式2(即上述S503中两种实现方式)进行信息传输时的仿真结果。在图11中,横轴为符号信噪比(Es/N0),纵轴为块误码率(block error rate,BLER)。以每个比特集合包括2个比特为例,在实现方式1中,每个比特集合进行了两次映射,该方式的性能结果如图11中菱形标识的折线所示。在实现方式2中,每个比特集合进行了QPSK调制之后,进行星座旋转,该方式的性能结果如图11中黑点标识的折线所示。由图11可知,以AWGN信道为例,在相同符号信噪比(Es/N0)的情况下,实现方式1的BLER与实现方式2的BLER接近。也可以理解为,实现方式1和实现方式2的性能是相同的。
图12示出了衰弱信道不同导频点的信道增益。在图12中,纵轴为信道响应的模,横轴为信道响应模的排序。由图12中无菱形标识的折线可知,相关技术中衰弱信道的信道增益变化幅度大。采用本申请实施例通信方法500之后,衰弱信道的信道增益变化相对平缓。尤其 在信道增益的平均值(即0.8)附近,衰弱信道的信道增益变化十分平缓,以使符号序列在传输过程中受到的干扰得到平均化,有助于提升信息传输可靠性。
图13示出了一种调制方式的性能仿真图。在图13中,纵轴为包错误率(packet error rate,PER),横轴为信噪比(signal-to-noise ratio,SNR)。在图13的调制方式中,一个调制符号可携带两bit的信息。图13的调制方式包括两种:第一种,普通QPSK;第二种,本申请通信方法500示出的调制方式,且每个比特集合包括两个比特的情况。图13中黑点标识的折线示出了普通QPSK的PER性能结果。图13中菱形标识的折线示出了本申请给出的调制方式的PER性能结果,即经过两次映射之后得到QAM16的符号序列,或先经过QPSK调制,再将QPSK调制后的符号进行星座旋转,以得到QAM16的符号序列。由图13可知,在PER相同的情况下,相比于普通QPSK,本申请示出的调制方式的SNR有1.8dB的增益。
图14示出了再一种调制方式的性能仿真图。在图14中,纵轴为PER,横轴为SNR。在图14的调制方式中,一个调制符号可携带四bit的信息。图14的调制方式包括两种:第一种,普通QAM16;第二种,本申请通信方法500示出的调制方式,且每个比特集合包括四个比特的情况。图14中黑点标识的折线示出了普通QAM16的PER性能结果。图14中菱形标识的折线示出了本申请给出的调制方式的PER性能结果,即经过两次映射之后得到QAM256符号序列,或先经过QAM16调制,再将QAM16调制后的符号进行星座旋转,以得到QAM256符号序列。由图14可知,在PER相同的情况下,相比于普通QAM16,本申请示出的调制方式的SNR有1.1dB的增益。
上述主要从各个网元之间交互的角度对本申请实施例提供的方案进行了介绍。相应的,本申请实施例还提供了通信装置,该通信装置可以为上述方法实施例中的网元,或者包含上述网元的装置,或者为可用于网元的部件。可以理解的是,该通信装置为了实现上述功能,其包含了执行各个功能相应的硬件结构和/或软件模块。本领域技术人员应该很容易意识到,结合本文中所公开的实施例描述的各示例的单元及算法步骤,本申请能够以硬件或硬件和计算机软件的结合形式来实现。某个功能究竟以硬件还是计算机软件驱动硬件的方式来执行,取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能,但是这种实现不应认为超出本申请的范围。
示例性的,图15示出了一种通信装置1500的结构示意图。该通信装置1500包括处理单元1501、发送单元1502和接收单元1503。
一种可能的示例中,以通信装置1500为发端设备为例,处理单元1501用于支持发端设备执行图5中的S501、S502、S503、S504、S505,和/或本申请实施例中发端设备需要执行的其他处理操作。发送单元1502用于支持发端设备执行图5中的S506,和/或本申请实施例中发端设备需要执行的其他发送操作。接收单元1503用于支持发端设备需要执行的其他接收操作。
再一种可能的示例中,以通信装置1500为收端设备为例,处理单元1501用于支持收端设备执行图5中的S507、S508、S509,和/或本申请实施例中收端设备需要执行的其他处理操作。接收单元1503用于支持收端设备执行图5中的S506,和/或本申请实施例中收端设备需要执行的其他接收操作。发送单元1503用于支持收端设备需要执行的其他发送操作。
可选的,该通信装置1500还可以包括存储单元1504,用于存储通信装置的程序代码和数据,数据可以包括不限于原始数据或者中间数据等。
其中,处理单元1501可以是处理器或控制器,例如可以是CPU,通用处理器,专用集成电路(application specific integrated circuit,ASIC),现场可编程逻辑门阵列(field programmable gate array,FPGA)或者其他可编程逻辑器件、晶体管逻辑器件、硬件部件或者其任意组合。其可以实现或执行结合本申请公开内容所描述的各种示例性的逻辑方框,模块和电路。处理器也可以是实现计算功能的组合,例如包含一个或多个微处理器组合,DSP和微处理器的组合等等。
发送单元1502可以是通信接口、发送器或发送电路等,其中,该通信接口是统称,在具体实现中,该通信接口可以包括多个接口,例如可以包括:发端设备与收端设备之间的接口和/或其他接口。
接收单元1503可以是通信接口、接收器或接收电路等,其中,该通信接口是统称,在具体实现中,该通信接口可以包括多个接口,例如可以包括:发端设备与收端设备之间的接口和/或其他接口。
发送单元1502和接收单元1503可以是物理上或者逻辑上实现为同一个单元。
存储单元1504可以是存储器。
当处理单元1501为处理器,发送单元1502和接收单元1503为通信接口,存储单元1504为存储器时,本申请实施例所涉及的通信装置可以为图16所示。
参阅图16所示,该通信装置包括:处理器1601、通信接口1602、存储器1603。可选的,通信装置还可以包括总线1604。其中,通信接口1602、处理器1601以及存储器1603可以通过总线1604相互连接;总线1604可以是外设部件互连标准(peripheral component interconnect,PCI)总线或扩展工业标准结构(extended industry standard architecture,EISA)总线等。所述总线1604可以分为地址总线、数据总线、控制总线等。为便于表示,图16中仅用一条粗线表示,但并不表示仅有一根总线或一种类型的总线。
可选的,本申请实施例还提供一种携带计算机指令的计算机程序产品,当该计算机指令在计算机上运行时,使得计算机执行上述实施例所介绍的方法。
可选的,本申请实施例还提供一种计算机可读存储介质,所述计算机可读存储介质存储计算机指令,当该计算机指令在计算机上运行时,使得计算机执行上述实施例所介绍的方法。
可选的,本申请实施例还提供一种芯片,包括:处理电路和收发电路,处理电路和收发电路用于实现上述实施例所介绍的方法。其中,处理电路用于执行相应方法中的处理动作,收发电路用于执行相应方法中的接收/发送的动作。
在上述实施例中,可以全部或部分地通过软件、硬件、固件或者其任意组合来实现。当使用软件实现时,可以全部或部分地以计算机程序产品的形式实现。所述计算机程序产品包括一个或多个计算机指令。在计算机上加载和执行所述计算机程序指令时,全部或部分地产生按照本申请实施例所述的流程或功能。所述计算机可以是通用计算机、专用计算机、计算机网络、或者其他可编程装置。所述计算机指令可以存储在计算机可读存储介质中,或者从一个计算机可读存储介质向另一个计算机可读存储介质传输,例如,所述计算机指令可以从一个网站站点、计算机、服务器或数据中心通过有线(例如同轴电缆、光纤、数字用户线(digital subscriber line,DSL))或无线(例如红外、无线、微波等)方式向另一个网站站点、计算机、服务器或数据中心进行传输。所述计算机可读存储介质可以是计算机能够存取的任何可用介质或者是包括一个或多个可用介质集成的服务器、数据中心等数据存储设备。所述可用介质 可以是磁性介质(例如,软盘、硬盘、磁带)、光介质(例如,数字视频光盘(digital video disc,DVD))、或者半导体介质(例如固态硬盘(solid state drive,SSD))等。
在本申请所提供的几个实施例中,应该理解到,所揭露的系统,装置和方法,可以通过其它的方式实现。例如,以上所描述的装置实施例仅仅是示意性的,例如,所述模块的划分,仅仅为一种逻辑功能划分,实际实现时可以有另外的划分方式,例如多个模块或组件可以结合或者可以集成到另一个系统,或一些特征可以忽略,或不执行。另一点,所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口,装置或模块的间接耦合或通信连接,可以是电性或其它的形式。
所述作为分离部件说明的单元可以是或者也可以不是物理上分开的,作为单元显示的部件可以是或者也可以不是物理单元,即可以位于一个地方,或者也可以分布到多个设备上。可以根据实际的需要选择其中的部分或者全部单元来实现本实施例方案的目的。
通过以上的实施方式的描述,所属领域的技术人员可以清楚地了解到本申请可借助软件加必需的通用硬件的方式来实现,当然也可以通过硬件,但很多情况下前者是更佳的实施方式。基于这样的理解,本申请的技术方案本质上或者说做出贡献的部分可以以软件产品的形式体现出来,该计算机软件产品存储在可读取的存储介质中,如计算机的软盘,硬盘或光盘等,包括若干指令用以使得一台计算机设备(可以是个人计算机,服务器,或者网络设备等)执行本申请各个实施例所述的方法。
以上所述,仅为本申请的具体实施方式,但本申请的保护范围并不局限于此,在本申请揭露的技术范围内的变化或替换,都应涵盖在本申请的保护范围之内。因此,本申请的保护范围应以所述权利要求的保护范围为准。
Claims (19)
- 一种通信方法,其特征在于,包括:发端设备基于N个比特集合确定正交幅度调制QAM的第一序列和第二序列,所述第一序列包括N个同相分量,所述第二序列包括N个正交分量,或所述第一序列包括N个正交分量,所述第二序列包括N个同相分量,所述N为大于或等于2的整数;所述发端设备对所述第一序列进行交织处理,以得到第三序列;所述发端设备向收端设备发送基于所述第二序列和所述第三序列确定的符号序列,其中,所述符号序列包括N个QAM符号。
- 根据权利要求1所述的方法,其特征在于,所述N个同相分量是基于第一码本确定的,其中,所述第一码本至少指示所述比特集合与同相分量之间的映射关系;所述N个正交分量是基于第二码本确定的,其中,所述第二码本至少指示所述比特集合与正交分量之间的映射关系。
- 根据权利要求1所述的方法,其特征在于,所述N个同相分量包括N个第一符号的同相分量;所述N个正交分量包括N个第一符号的正交分量;其中,所述第一符号是第二符号在星座图上旋转第一角度得到的,且所述第一符号的第一调制阶数是所述第二符号的第二调制阶数的平方;所述第二符号是所述比特集合调制后的符号;所述旋转是以所述星座图的原点为圆心,沿顺时针或逆时针进行的旋转;所述第一角度大于或等于以下角度:所述第二调制阶数的一个符号在星座图上沿顺时针或逆时针旋转之后,遇到所述第一调制阶数的首个符号时所旋转的最小角度。
- 根据权利要求1至4任一项所述的方法,其特征在于,所述比特集合包括X个比特,所述QAM符号的调制阶数是2 2X,所述X为正整数。
- 一种通信方法,其特征在于,包括:收端设备接收来自发端设备的符号序列,其中,所述符号序列包括N个正交幅度调制QAM符号;所述收端设备根据所述符号序列,确定第四序列和第五序列,其中,所述第四序列包括所述N个QAM符号的同相分量,所述第五序列包括所述N个QAM符号的正交分量,或所述第四序列包括所述N个QAM符号的正交分量,所述第五序列包括所述N个QAM符号的同相分量;所述收端设备对所述第四序列进行解交织处理,以得到第六序列;所述收端设备对所述第五序列和所述第六序列进行联合解调,以得到N个比特集合。
- 根据权利要求6所述的方法,其特征在于,所述比特集合包括X个比特,所述QAM符号的调制阶数是2 2X,所述X为正整数。
- 一种通信装置,其特征在于,包括:处理单元,用于基于N个比特集合确定正交幅度调制QAM的第一序列和第二序列,其中,所述第一序列包括N个同相分量,所述第二序列包括N个正交分量,或所述第一序列包括N个正交分量,所述第二序列包括N个同相分量,所述N为大于或等于2的整数;所述处理单元,还用于对所述第一序列进行交织处理,以得到第三序列;发送单元,用于向收端设备发送基于所述第二序列和所述第三序列确定的符号序列,其中,所述符号序列包括N个QAM符号。
- 根据权利要求8所述的装置,其特征在于,所述N个同相分量是基于第一码本确定的,其中,所述第一码本至少指示所述比特集合与同相分量之间的映射关系;所述N个正交分量是基于第二码本确定的,其中,所述第二码本至少指示所述比特集合与正交分量之间的映射关系。
- 根据权利要求8所述的装置,其特征在于,所述N个同相分量包括N个第一符号的同相分量;所述N个正交分量包括N个第一符号的正交分量;其中,所述第一符号是第二符号在星座图上旋转第一角度得到的,且所述第一符号的第一调制阶数是所述第二符号的第二调制阶数的平方;所述第二符号是所述比特集合调制后的符号;所述旋转是以所述星座图的原点为圆心,沿顺时针或逆时针进行的旋转;所述第一角度大于或等于以下角度:所述第二调制阶数的一个符号在星座图上沿顺时针或逆时针旋转之后,遇到所述第一调制阶数的首个符号时所旋转的最小角度。
- 根据权利要求8至11任一项所述的装置,其特征在于,所述比特集合包括X个比特,所述QAM符号的调制阶数是2 2X,所述X为正整数。
- 一种通信装置,其特征在于,包括:接收单元,用于接收来自发端设备的符号序列,其中,所述符号序列包括N个正交幅度调制QAM符号;处理单元,用于根据所述符号序列,确定第四序列和第五序列,其中,所述第四序列包括所述N个QAM符号的同相分量,所述第五序列包括所述N个QAM符号的正交分量,或所述第四序列包括所述N个QAM符号的正交分量,所述第五序列包括所述N个QAM符号的同相分量;所述处理单元,还用于对所述第四序列进行解交织处理,以得到第六序列;所述处理单元,还用于对所述第五序列和所述第六序列进行联合解调,以得到N个比特 集合。
- 根据权利要求13所述的装置,其特征在于,所述比特集合包括X个比特,所述QAM符号的调制阶数是2 2X,所述X为正整数。
- 一种通信装置,其特征在于,包括:处理器和存储器,所述处理器和所述存储器耦合,所述存储器存储有程序指令,当所述存储器存储的程序指令被所述处理器执行时,如权利要求1至5中任一项所述的方法被实现。
- 一种通信装置,其特征在于,包括:处理器和存储器,所述处理器和所述存储器耦合,所述存储器存储有程序指令,当所述存储器存储的程序指令被所述处理器执行时,如权利要求6或7任一项所述的方法被实现。
- 一种芯片,其特征在于,所述芯片包括逻辑电路和输入输出接口,所述输入输出接口用于与所述芯片之外的模块通信,所述逻辑电路用于运行计算机程序或指令,以实现如权利要求1至7中任一项所述的方法。
- 一种计算机可读存储介质,其特征在于,所述计算机可读存储介质存储程序,所述程序被处理器调用时,权利要求1至7任一项所述的方法被执行。
- 一种通信系统,其特征在于,包括发端设备和收端设备,其中所述发端设备用于执行如权利要求1至5中任一项所述的方法,所述收端设备用于执行如权利要求6或7所述的方法。
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| KR102396814B1 (ko) * | 2017-05-02 | 2022-05-11 | 삼성전자 주식회사 | 통신 또는 방송 시스템에서 채널 부호화/복호화 방법 및 장치 |
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| WO2021223071A1 (en) * | 2020-05-06 | 2021-11-11 | Huawei Technologies Co., Ltd. | Device and method for decoding and equalizing |
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Also Published As
| Publication number | Publication date |
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| EP4412117A4 (en) | 2025-01-22 |
| CN116232537A (zh) | 2023-06-06 |
| EP4412117A1 (en) | 2024-08-07 |
| US12609859B2 (en) | 2026-04-21 |
| US20240333576A1 (en) | 2024-10-03 |
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