WO2023185451A1 - 位置检测方法及相关装置 - Google Patents

位置检测方法及相关装置 Download PDF

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Publication number
WO2023185451A1
WO2023185451A1 PCT/CN2023/081358 CN2023081358W WO2023185451A1 WO 2023185451 A1 WO2023185451 A1 WO 2023185451A1 CN 2023081358 W CN2023081358 W CN 2023081358W WO 2023185451 A1 WO2023185451 A1 WO 2023185451A1
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Prior art keywords
decision
decision signal
signal
value
error
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English (en)
French (fr)
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WO2023185451A9 (zh
Inventor
陆玉春
王玮钰
李焕路
张海洋
李亮
周勤煜
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Huawei Technologies Co Ltd
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Huawei Technologies Co Ltd
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Priority to EP23777827.9A priority Critical patent/EP4485824A4/en
Publication of WO2023185451A1 publication Critical patent/WO2023185451A1/zh
Priority to US18/898,884 priority patent/US20250023763A1/en
Anticipated expiration legal-status Critical
Publication of WO2023185451A9 publication Critical patent/WO2023185451A9/zh
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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/0078—Avoidance of errors by organising the transmitted data in a format specifically designed to deal with errors, e.g. location
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L25/03012—Arrangements for removing intersymbol interference operating in the time domain
    • H04L25/03114—Arrangements for removing intersymbol interference operating in the time domain non-adaptive, i.e. not adjustable, manually adjustable, or adjustable only during the reception of special signals
    • H04L25/03146—Arrangements for removing intersymbol interference operating in the time domain non-adaptive, i.e. not adjustable, manually adjustable, or adjustable only during the reception of special signals with a recursive structure
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/20—Arrangements for detecting or preventing errors in the information received using signal quality detector
    • H04L1/203—Details of error rate determination, e.g. BER, FER or WER
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L25/03178—Arrangements involving sequence estimation techniques
    • H04L25/03248—Arrangements for operating in conjunction with other apparatus
    • H04L25/03254—Operation with other circuitry for removing intersymbol interference
    • H04L25/03267—Operation with other circuitry for removing intersymbol interference with decision feedback equalisers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03891—Spatial equalizers
    • H04L25/03949—Spatial equalizers equalizer selection or adaptation based on feedback
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L2025/03777—Arrangements for removing intersymbol interference characterised by the signalling
    • H04L2025/03783—Details of reference signals
    • H04L2025/03796—Location of reference signals
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L2025/03777—Arrangements for removing intersymbol interference characterised by the signalling
    • H04L2025/03802—Signalling on the reverse channel

Definitions

  • the present application relates to the field of communication technology, and in particular, to a position detection method and related devices.
  • High-speed link technology is the basic technology for chips and interfaces.
  • ISI channel inter-symbol interference
  • PIN/APD photodetectors
  • TIA transimpedance amplifiers
  • CTLE continuous time linear equalization
  • FFE feed forward equalizer
  • DFE DFE
  • sequence similar technologies such as MLSE (maximum likelihood sequence estimation) and RSSE (Reduced State Sequence Estimation). Random judgment technology.
  • CTLE has an amplifying effect on noise and has only limited equalization configurations, so it must be used with FFE and DFE.
  • FFE feed forward equalizer
  • DFE DFE
  • MLSE maximum likelihood sequence estimation
  • RSSE Reduced State Sequence Estimation
  • Embodiments of the present application provide a position detection method and device, which can determine the position of a sudden error decision signal in a decision signal sequence.
  • inventions of the present application provide a position detection method.
  • the execution subject of the method may be a position detection device or a chip applied in the position detection device.
  • the following description takes the execution subject being a position detection device as an example.
  • the method includes: a position detection device obtains a decision feedback equalizer coefficient, where the decision feedback equalizer coefficient includes a tap coefficient; obtains a decision signal sequence of the decision feedback equalizer; if the tap coefficient is less than or equal to a first preset threshold, then Determine the first position of the decision signal in the decision signal sequence where the burst error starts; determine the decision signal based on the first position The second position of the decision signal for the burst error end in the decision signal sequence.
  • the tap coefficient is the tap coefficient of the decision feedback equalizer.
  • the tap coefficient can also be called the channel ⁇ value.
  • the position detection device when the position detection device determines the position of the decision signal of SoB in the judgment signal sequence, the position detection device can also determine the position of the decision signal of EoB in the judgment signal sequence based on SoB, providing a way to eliminate errors between SoB and EoB. foundation, helping to reduce the bit error rate.
  • the position detection method in the embodiment of the present application further includes: determining the second position of the decision signal in the decision signal sequence that indicates the end of the burst error based on the first position includes: determining the burst error The final candidate position of the final decision signal appears in the decision signal sequence at the latest, and the first candidate position is the position of at least one decision signal after the decision signal that the sudden error started; based on the first candidate position and the The first position determines a first decision area, and the first decision area includes a first candidate position, a position corresponding to a decision signal between the first position and the first candidate position;
  • the second position of the decision signal in the decision signal sequence where the burst error ends is determined based on the first decision area.
  • the position detection device determines the latest position and the first position where the EoB decision signal may appear in the decision signal sequence, the range of the position detection device searching for the EoB decision signal is reduced to a certain extent, further reducing the cost.
  • the calculation amount of the position detection device is reduced.
  • the position detection method in the embodiment of the present application further includes: determining the second position of the decision signal that ends with a burst error in the decision signal sequence based on the first decision area, including: obtaining the The difference value corresponding to the decision signal in the first decision area, wherein the difference value is the difference between the symbol value of the decision signal and the corresponding equalization value; determine the distance from the first position in the decision area
  • the position where the positive and negative signs of the difference corresponding to the decision symbol at the first candidate position are the same for the first time as the positive and negative signs of the difference between the previous adjacent decision symbols is the decision signal in which the burst error ends in the decision signal sequence. second position.
  • the position detection device determines the latest position where the EoB decision signal may appear in the decision signal sequence
  • the positive value of the difference corresponding to each decision signal identifier in the first decision area determined based on the first position and LEoB is Negative sign
  • the position with the same positive and negative sign as the difference corresponding to the previous adjacent position decision signal is set to the second position of the decision signal in the decision signal sequence that ends with a burst error, so as to quickly and accurately determine the decision signal in the decision signal sequence.
  • the second position of the signal is determined when the burst error ends, thereby improving the accuracy and efficiency of error position detection.
  • determining the second position of the decision signal in the decision signal sequence in which the burst error ends based on the first decision area includes: obtaining the corresponding decision signal in the first decision area.
  • the error image determine the error estimation image based on the difference value and the error image, where the difference value is the difference between the symbol value of the decision signal and the corresponding equalization value, and the error estimation image is the difference
  • the difference between the value and the error image determine the position of the decision signal with the largest absolute value of the error estimate image as the second position.
  • the position detection device determines the latest position where the EoB decision signal may appear in the decision signal sequence
  • the estimated decision error corresponding to each decision signal identifier is determined within the first decision area determined based on SoB and LEoB, and it is determined
  • the position where the absolute value of the decision error is estimated to be the largest is the second position of the decision signal where the burst error ends in the decision signal sequence, so as to quickly and accurately determine the second position of the decision signal where the burst error ends in the decision signal sequence, This improves the accuracy and efficiency of error location detection.
  • determining the latest first candidate position of the decision signal that the burst error ends in the decision signal sequence includes: obtaining the DFE check value corresponding to the decision signal in the decision signal sequence, where, The DFE check value is determined based on the symbol value of the decision signal and the corresponding error estimation pattern; the position where the DFE check value of the decision signal exceeds the preset range is determined to be the first candidate position.
  • the preset range can be [0,3]. If the DFE check value is -1 or 4, the DFE check value exceeds the preset range. Of course, The DFE check value can also be other values.
  • the position detection device can determine which one after the SoB's decision signal based on the value status of the DFE check value corresponding to each signal position.
  • the signal position is the latest signal position where the EoB decision signal may appear in the decision signal sequence, that is, the second position in the decision signal sequence.
  • the method further includes: if the tap coefficient is greater than or equal to a first preset threshold, determine the third position of the decision signal where the burst error ends in the decision signal sequence; determine the burst error The second candidate position where the starting decision signal begins to appear in the decision signal sequence, the second candidate position is the position of at least one decision signal before the decision signal that ends in burst error; according to the second candidate position and the The third position determines the fourth position of the decision signal in the sequence of decision signals where the burst error begins.
  • the tap coefficient when the tap coefficient is greater than or equal to the first preset threshold, first determine the third position of the decision signal in the decision signal sequence where the burst error ends, and then determine the fourth position of the SoB decision signal in the decision signal sequence based on the third position. Location.
  • the area of the fourth position is further defined based on the second candidate position to reduce the range of the position detection device searching for the decision signal of the SoB, further reducing the computational load of the position detection device.
  • determining the fourth position of the decision signal in the decision signal sequence where a burst error starts based on the second candidate position and the third position includes: based on the third position and the second candidate position to determine a second decision area, the second decision area including the second candidate position, the position corresponding to the decision signal between the second candidate position and the third position; obtaining the first The difference between the decision signals in the two decision areas; the difference is the difference between the symbol value of the decision signal and the corresponding equalization value; determine the maximum absolute value of the difference between the decision signals in the second decision area.
  • the position of the decision signal is the fourth position.
  • the second decision area where the decision signal in the decision signal sequence where the burst error starts is located is determined, and The position of the decision signal corresponding to the maximum absolute value of the difference in this area is determined to be the fourth position.
  • the method further includes: correcting the decision signal corresponding to the first position to the second position to reduce a bit error rate.
  • embodiments of the present application provide a position detection device, including: a communication unit and a processing unit, wherein the communication unit is used to obtain decision feedback equalizer coefficients, and the decision feedback equalizer coefficients include tap coefficients; The communication unit is also used to obtain the decision signal sequence of the decision feedback equalizer; the processing unit is used to determine the start of a burst error in the decision signal sequence if the tap coefficient is less than a first preset threshold. The first position of the decision signal; the processing unit is further configured to determine, based on the first position, the second position of the decision signal in the decision signal sequence in which the burst error ends.
  • the processing unit is further configured to: determine the latest first candidate position in the decision signal sequence where the decision signal for the end of the burst error occurs, and the first candidate position is where the burst error starts. The position of at least one decision signal after the decision signal; determining a first decision area based on the first candidate position and the first position, the first decision area including the first candidate position, the first position and the Positions corresponding to the decision signals between the first candidate positions; determining the second position of the decision signal in the decision signal sequence where the burst error ends based on the first decision area.
  • the processing unit is further configured to: obtain a difference value corresponding to the decision signal in the first decision area, where the difference value is a symbol value of the decision signal and a corresponding equalization value. the difference between; determine the positive and negative sign of the difference corresponding to the decision symbol from the first position to the first candidate position in the first decision area and the positive and negative sign of the difference between the previous adjacent decision symbols The position where the negative symbols are the same for the first time is the second position of the decision signal where the burst error ends in the decision signal sequence.
  • the processing unit is further configured to: obtain an error image corresponding to the decision signal in the first decision area; and determine an error estimation image based on a difference value and the error image, wherein the difference value is the difference between the symbol value of the decision signal and the corresponding equalization value, and the error estimation image is the difference between the difference and the error image; determine the maximum absolute value of the error estimation image
  • the position of the decision signal is the second position.
  • the processing unit is further configured to: obtain a DFE check value corresponding to the decision signal in the decision signal sequence, wherein the DFE check value is based on the symbol value of the decision signal and the corresponding error estimate The pattern is determined; the position where the DFE check value of the decision signal exceeds the preset range is determined to be the first candidate position.
  • the processing unit is further configured to: if the tap coefficient is greater than or equal to a first preset threshold, determine the third position of the decision signal that the burst error ends in the decision signal sequence; determine the burst error.
  • the second candidate position where the error-started decision signal begins to appear in the decision signal sequence, and the second candidate position is the position of at least one decision signal before the burst error-end decision signal; according to the second candidate position and The third position determines a fourth position of the decision signal in the sequence of decision signals where a burst error begins.
  • the processing unit is further configured to: determine a second decision area based on the third position and the second candidate position, where the second decision area includes the second candidate position, the third candidate position, and the second candidate position. The position corresponding to the decision signal between the two candidate positions and the third position; obtain the difference value of the decision signal in the second decision area; the difference value is the symbol value of the decision signal and the corresponding equalization value. Difference; determine the position of the judgment signal corresponding to the maximum absolute value of the difference of the judgment signals in the second judgment area as the fourth position.
  • the processing unit is further configured to correct the decision signal corresponding to the first position to the second position.
  • embodiments of the present application provide a position detection device, including: a processor and a memory; the memory is used to store computer instructions, and when the processor executes the instructions, the position detection device performs the above first aspect Or any of the possible design methods in the first aspect.
  • the position detection device may be the position detection device in the above-mentioned first aspect or any possible design of the first aspect, or a chip that implements the function of the above-mentioned position detection device.
  • embodiments of the present application provide a chip including a logic circuit and an input and output interface.
  • the input and output interface is used to communicate with a module outside the chip.
  • the chip may be a chip that implements the function of the position detection device in the above-mentioned first aspect or any possible design of the first aspect.
  • the input and output interface inputs the position of the decision signal in the decision signal sequence where the burst error ends, or the first target value corresponding to the first signal position.
  • Logic circuits are used to run computer programs or instructions to implement the method in the above first aspect or any possible design of the first aspect.
  • embodiments of the present application provide a computer-readable storage medium that stores instructions that, when run on a computer, enable the computer to execute any one of the above-mentioned first aspects. Detection method.
  • embodiments of the present application provide a computer program product containing instructions that, when run on a computer, enable the computer to perform any of the position detection methods in any of the above aspects.
  • inventions of the present application provide a circuit system.
  • the circuit system includes a processing circuit, and the processing circuit is configured to perform the position detection method in any one of the above aspects.
  • Figure 1 is a schematic diagram of a link balancing architecture provided by an embodiment of the present application.
  • Figure 2 is a schematic diagram of yet another link balancing architecture provided by an embodiment of the present application.
  • Figure 3 is a schematic diagram of a decision feedback structure provided by an embodiment of the present application.
  • Figure 4 is a schematic diagram of another link balancing architecture provided by an embodiment of the present application.
  • Figure 5 is a schematic diagram of a high-speed interconnection scenario provided by an embodiment of the present application.
  • Figure 6 is a schematic structural diagram of a position detection device provided by an embodiment of the present application.
  • Figure 7 is a schematic diagram of a detection method provided by an embodiment of the present application.
  • Figure 8 is a schematic flow chart of a position detection method provided by an embodiment of the present application.
  • Figure 9 is a schematic flowchart of a method for determining a second position provided by an embodiment of the present application.
  • Figure 10 is a schematic flowchart of yet another method for determining a second position provided by an embodiment of the present application.
  • Figure 11 is a schematic flowchart of yet another method for determining a second position provided by an embodiment of the present application.
  • Figure 12 is a schematic flowchart of a method for determining the fourth position provided by an embodiment of the present application.
  • Figure 13 is a schematic flowchart of a method for determining the fourth position provided by an embodiment of the present application.
  • Figure 14 is a schematic flowchart of a method for determining a second candidate location provided by an embodiment of the present application
  • Figure 15 is a performance comparison chart provided by the embodiment of the present application.
  • Figure 16 is another performance comparison chart provided by the embodiment of the present application.
  • Figure 17 is a schematic structural diagram of a position detection device provided by an embodiment of the present application.
  • Figure 18 is a schematic structural diagram of yet another position detection device provided by an embodiment of the present application.
  • modulation the process of mapping a sequence of bits into a signal suitable for transmission in the channel is called "modulation.”
  • PAM Pulse amplitude modulation
  • a signal modulation technique that uses signal amplitude to represent transmitted data.
  • common ones include PAM-2 modulation, PAM-4 modulation, etc.
  • PAM-2 modulation uses two levels to represent one bit of information.
  • PAM-4 modulation uses four levels to represent two bits of information.
  • the decision signal identifier which can also be described as "the signal position of the decision signal” or “the position of the decision signal”, is used to identify the position of a decision signal in the decision signal sequence.
  • the decision signal sequence is the sequence to which the decision signal belongs.
  • the introduction of "decision signal” and “decision signal sequence” can be found in the subsequent description, and will not be described again here.
  • a decision signal The identifier corresponds to a signal position.
  • the position of the first judgment signal among the above 18 judgment signals can be recorded as judgment signal identifier 1
  • the position of the second judgment signal among the above 18 judgment signals can be recorded as judgment signal identifier 2
  • the other decisions among the above 18 judgment signals can be recorded as judgment signal identifier 1.
  • the position notation of the signal can be deduced in this way and will not be repeated here.
  • Precoded data refers to the data obtained by precoding the input data using a precoder at the sending end.
  • the precoding technology used by the precoder may be 1/(1+D) precoding technology.
  • the input data can be recorded as Din.
  • the processing process of 1/(1+D) precoding technology is as follows: when the precoder receives the original input data at a signal position, the precoder uses the "precoded data of the previous signal position" "Perform precoding processing on the "original input data of the current signal position” (for example, subtract the "precoded data of the previous signal position” from the "original input data of the current signal position", and then perform a modulo operation) to Obtain "precoded data of the current signal position".
  • Channel refers to the channel for transmitting data between the sender and the receiver.
  • the data transmitted in the channel is precoded data.
  • the channel in Table 1 is the (1+D) channel.
  • the description of the data after transmission on the (1+D) channel is as follows: the "precoded data of the previous signal position" of the decision signal identifier 1 does not exist and is regarded as “0". "Precoded data corresponding to the decision signal identifier 1" is "1". Add “the 'precoded data of the previous signal position' of the decision signal identifier 1" and “the precoded data corresponding to the decision signal identifier 1" to obtain the data transmitted through the (1+D) channel , that is, "1". The "precoded data of the previous signal position" of the decision signal identifier 2 is “1". "Precoded data corresponding to the decision signal identifier 2" is "2".
  • the theoretical value refers to the value of precoded data transmitted from the transmitter to the receiver through the channel without considering the channel noise.
  • the theoretical value may be the value in the row where "channel" is located.
  • Noise refers to the interference existing in the channel.
  • the noise corresponding to the decision signal identifier 1 is "-0.19", which refers to the interference of the precoded data corresponding to the decision signal identifier 1 during the channel transmission process.
  • the noise corresponding to the decision signal identifier 2 is "0.17”, which refers to the interference of the precoded data corresponding to the decision signal identifier 2 during the channel transmission process.
  • the noise values of precoded data identified by other judgment signals during channel transmission can be found in Table 1 or Table 2, which will not be described again here.
  • the input signal of DFE refers to the signal input to DFE, which can be recorded as dfe_input.
  • the DFE belongs to the device at the receiving end.
  • the input signal of DFE refers to the In this case, after the precoded data is transmitted through the channel, the value of the DFE is entered.
  • the value of the input signal corresponding to the judgment signal identifier 1 is "0.81", which is the superposition of the value "1" in the row of "channel” and the value “-0.19” in the row of “noise” The result afterwards.
  • the value of the input signal corresponding to the decision signal identifier 2 is "3.17”, which is the result of the superposition of the value "3" in the row of "channel” and the value "0.17” in the row of "noise”.
  • the value status of the input signals corresponding to other judgment signal identifiers can be found in Table 1, which will not be described again here.
  • the input signal sequence includes at least two input signals, and the at least two input signals are arranged in a certain order.
  • the arrangement order of the input signals includes the order in which the DFE receives the above-mentioned input signals. For two adjacent input signals in an input signal sequence, if the first input signal is the current input signal received by the DFE, then the second input signal is the next input signal of the current input signal received by the DFE.
  • the equalized value refers to the value of the signal after equalization processing.
  • the equalization value is the output signal of DFE, denoted as dfe_output.
  • the adder in the DFE uses the symbol value of the decision signal of the previous input signal (dfe_sliced data) to equalize the current input signal to obtain the equalized value (dfe_output) corresponding to the current input signal.
  • the equalization value corresponding to a signal position refers to the equalization value used to determine the decision signal at the signal position.
  • the equalization value corresponding to signal position 1 is recorded as the equalization value 0.81
  • the decision signal at signal position 1 is the equalization of the decider in the DFE.
  • the value 0.81 is the signal after judgment processing. Among them, the introduction of the "decision signal”, “decision signal sequence” and “symbol value of the decision signal” can be found in the subsequent description and will not be repeated here.
  • the balanced value sequence includes at least two balanced values, and the at least two balanced values are arranged in a certain order.
  • the arrangement order of the equalization values includes the order in which the DFE determines the above-mentioned equalization values. For two adjacent equalization values in an equalization value sequence, if the first equalization value is the equalization value corresponding to the current input signal determined by DFE, then the second equalization value is the next equalization value of the current input signal determined by DFE. The equalization value corresponding to the input signal.
  • the decision signal refers to the signal after decision processing of the equalized value.
  • the symbol value of the decision signal refers to the size of the decision signal.
  • the symbol value of the signal is decided.
  • the symbol value of the decision signal is recorded as dfe_sliced data.
  • the determiner of the DFE performs decision processing on the current equalization value to obtain the symbol value of the decision signal corresponding to the equalization value.
  • the decision signal sequence includes at least two decision signals, and the at least two decision signals are arranged in a certain order.
  • the arrangement order of the decision signals includes the DFE determining the order of the above decision signals. For two adjacent decision signals in a decision signal sequence, if the first decision signal is the decision signal corresponding to the current equalization value determined by DFE, then the second decision signal is the next one to the current equalization value determined by DFE. The decision signal corresponding to the equalization value.
  • the arrangement order of the balanced values can be found in the relevant introduction of "Balanced Value Sequence", which will not be described again here.
  • the symbol value of a decision signal is related to modulation. Taking PAM-4 modulation as an example, the symbol value of the decision signal is one of “0”, “1", “2” and “3”, or the symbol value of the decision signal is "-3", " A value among -1", "+1” and "+3". In the embodiment of this application, in the case of PAM-4 modulation, the explanation is given as an example of 'the symbol value of a decision signal is one of "0", “1", “2” and "3". .
  • the difference refers to the difference between the symbol value of the decision signal at a signal position and the equalization value corresponding to the signal position.
  • the difference can be a positive value or a negative value.
  • the difference is recorded as err.
  • the difference corresponding to a signal position refers to the difference between the symbol value of the decision signal at the signal position and the equalization value corresponding to the signal position.
  • the difference value corresponding to signal position 1 is the difference between the symbol value of the decision signal at signal position 1 and the equalization value corresponding to signal position 1 .
  • the sequence of difference values includes at least two difference values, and the at least two difference values are arranged in a certain order.
  • the order of the difference values in the difference sequence is the order of the decision signals.
  • Decision noise also known as DFE decision error value, refers to the estimated noise value corresponding to the signal position where the equalization value is located during the decision processing of the equalization value.
  • the decision noise is denoted as dfe_sliced_noise.
  • the decision noise corresponding to a signal position refers to the difference between the symbol value of the decision signal at the signal position and the equalization value corresponding to the signal position.
  • the decision noise corresponding to signal position 1 is the difference between the symbol value of the decision signal at signal position 1 and the equalization value corresponding to signal position 1.
  • the decision noise corresponding to signal position 1 is the difference value corresponding to signal position 1.
  • the decision noise corresponding to signal position 1 is the product of the difference corresponding to signal position 1 and a certain coefficient.
  • Error pattern (out Error), error estimation pattern (ErrorSIGNPredicted)
  • the error pattern refers to the difference between the symbol value of the error-determined signal and the theoretical value.
  • the error occurring in the above-mentioned decision signal may be a random error or a sudden error, which is not limited in this embodiment of the present application.
  • the error pattern can be recorded as out Error.
  • the error pattern can be positive or negative.
  • the error estimation pattern is the numerical value estimated using the error pattern.
  • the error estimation pattern can be recorded as ErrorSIGNPredicted.
  • the error pattern and the error transfer characteristics of DFE are used for estimation to obtain the error estimation pattern. Taking Table 1 as an example, the error pattern corresponding to the decision signal identifier 16 is "-1". Using the error propagation characteristics of DFE, it is obtained that the error estimation pattern corresponding to the decision signal identifier 15 is "+1", and then the error pattern corresponding to the decision signal identifier 3 is obtained. The error estimate pattern is "+1".
  • an error estimation pattern corresponding to a signal position can also be described as "an error estimation pattern corresponding to a decision signal.”
  • the error estimation pattern corresponding to a signal position can be a positive value or a negative value.
  • the value of the error estimation pattern corresponding to a signal position is positive, it means that the symbol value of the decision signal corresponding to the signal position is greater than the theoretical value.
  • the theoretical value is obtained by subtracting the value of the error estimation pattern from the symbol value of the decision signal.
  • the value of the error estimation pattern corresponding to a signal position is negative, it means that the sign value of the decision signal corresponding to the signal position is smaller than the theoretical value. In this case, the theoretical value is obtained by subtracting the negative value of the error estimation pattern from the symbol value of the decision signal.
  • the DFE check value is used to estimate the symbol value of the decision signal in the decision signal sequence.
  • the DFE check value is recorded as dfe_sliced_data_Predicted.
  • the DFE check value corresponding to a signal position is a value determined based on the symbol value of the judgment signal at the signal position and the error estimation pattern corresponding to the signal position.
  • the DFE check value corresponding to signal position 1 is the symbol value of the decision signal at signal position 1 The difference between error estimate patterns corresponding to signal position 1.
  • the value range of the DFE check value is related to modulation. For example, taking PAM-4 modulation as an example, the symbol value of a decision signal is one of "0", “1", "2" and "3". The value range of the DFE check value is [0, 3]. If the DFE check value corresponding to a signal position exceeds [0, 3], it indicates that the signal position is the position of the decision signal where the burst error starts.
  • Random error means that during the signal transmission process, the erroneous signal positions are completely unrelated to each other, that is, the previous erroneous signal position has no impact on the next erroneous signal position.
  • Burst error refers to the phenomenon that during the signal transmission process, erroneous signal positions are related to each other, and erroneous signal positions appear in series. In other words, in a burst error, if one signal position is wrong, the signal position after the signal position has a high probability of being wrong.
  • the name describing the "error signal location" includes at least one of the following:
  • the signal position of the start of burst error refers to the signal position of the first error in the burst error.
  • the signal position of the earliest start of burst error refers to the earliest possible position of the first erroneous signal in the burst error.
  • the signal position of the end of burst error refers to the signal position of the last error in the burst error.
  • the signal position of the latest end of burst error refers to the latest possible position of the last error signal in the burst error.
  • the "signal position of SoB” can also be described as the "position of the decision signal of SoB", that is, the position of the decision signal of SoB in the decision signal sequence.
  • “ESoB's signal position” can also be described as “ESoB's decision signal position”, that is, the earliest possible position of SoB's decision signal in the decision signal sequence.
  • “EoB signal position” can also be described as “EoB decision signal position”, that is, the position of the EoB decision signal in the decision signal sequence.
  • Decoded data refers to the data obtained by decoding the received data using decoding technology when the data received by the receiving end is precoded data.
  • the value of the error flag corresponding to a certain decision signal flag is "0"
  • the value of the error flag corresponding to a certain judgment signal flag is "1”
  • the equalization value corresponding to the signal position is greater than the theoretical value.
  • the value of the error flag corresponding to a certain judgment signal flag is "-1"
  • one decision signal identifier corresponds to the position of a decision signal.
  • Tables 1 and 2 respectively show 18 decision signal identifiers, that is, 18 signal positions.
  • the original input data is the data input to the precoder.
  • the precoder outputs precoded data.
  • the precoded data is transmitted through the channel. Without considering noise, after channel transmission, the theoretical value corresponding to each decision signal identifier is the value in the row of "channel” in Table 1 or Table 2. Furthermore, when considering noise, the noise corresponding to each judgment signal identifier is the value in the row of "noise” in Table 1 or Table 2.
  • each input signal in the DFE input signal sequence is the "value after superposition of the theoretical value after channel transmission and noise" at the corresponding signal position.
  • Each value can be found in Table 1 or Table 2.
  • DFE uses an adder to equalize the input signal sequence to obtain a sequence of equalized values.
  • For the values of each equalized value please refer to the value of the row of "Equalized value of DFE" in Table 1 or Table 2.
  • DFE uses a determiner to perform decision processing on the equalized numerical sequence to obtain a decision signal sequence. See Table 1 or Table 2 for the symbol value of each decision signal.
  • the decision noise estimated by DFE is as shown in the value of the row of "DFE's decision noise" in Table 1 or Table 2.
  • the value of the error estimation pattern is as shown in the row of "DFE error estimation pattern” in Table 1 or Table 2.
  • the "DFE check value” determined based on the symbol value of the decision signal and the error estimation pattern is the value in the row of the "DFE check value” in Table 1 or Table 2.
  • the position of the ESoB decision signal is shown in the value in the row of "The earliest possible position of SoB” in Table 1. In the value in the row of "The earliest possible position of SoB", if the value corresponding to a decision signal identifier is "0", it means that the signal position is not the position of the ESoB decision signal.
  • the corresponding value of a decision signal identifier is "-1", it means that the signal position is the position of the ESoB decision signal.
  • the position of the LEoB decision signal is shown in the value in the row of "The latest possible position of LEBE" in Table 2. In the value in the row of "The latest possible position of LEoB”, if the value corresponding to a decision signal identifier is "0”, it means that the signal position is not the position of the LEoB decision signal. If the corresponding value of a decision signal identifier is "1”, it means that the signal position is the position of the LEoB decision signal.
  • the receiving end decodes the received data to obtain decoded data, as shown in the data in the row of "decoded data” in Table 1 or Table 2.
  • the "error mark” shows the signal position where an error occurs in the above-mentioned decision signal sequence.
  • Signal equalization technology is a signal processing technology. Signals are prone to distortion during channel transmission, and signal equalization technology can make the signal have characteristics opposite to those of the channel to "offset" the "distortion" during channel transmission, thereby improving the transmission effect. Signal equalization technologies include continuous time linear equalizer (CTLE), feed forward equalizer (FFE), DFE, etc.
  • CTLE continuous time linear equalizer
  • FFE feed forward equalizer
  • DFE DFE
  • the first one is a link balancing architecture based on CTLE, FFE and DFE.
  • Figure 1 shows a link balancing architecture based on CTLE, FFE and DFE.
  • the link balancing architecture includes the transmitter and the receiver, as shown in the dotted box in Figure 1.
  • the transmitter includes FFE and error control coding (ECC) (optional).
  • ECC error control coding
  • the receiving end includes CDR (clock and data recovery) module, least mean square (LMS) adaptation module, CTLE, analog to digital converter (Analog to Digital Converter, ADC), FFE, DFE, maximum likelihood sequence estimation module (maximum likelihood sequence estimation, MLSE), where MLSE serves as an error correction module.
  • CDR clock and data recovery
  • LMS least mean square
  • the LMS adaptation module sends the coefficient of DFE (c_dfe) to DFE, FFE and MLSE.
  • This coefficient (c_dfe) includes the tap coefficient ⁇ of the DFE and the interval dlevel between two adjacent levels in the PAM signal.
  • the signal output by the FFE is the input signal (dfe_input) of the DFE, and the input signal (dfe_input) is input to the DFE and MLSE.
  • the DFE outputs the equalized output signal (dfe_output) obtained by equalizing the input signal (dfe_input) to the MLSE.
  • the DFE will also output the decision signal (sym) obtained after judging the equalized output signal and the difference (err) between the decision signal and the equalized output signal to the LMS adaptive module and MLSE.
  • MLSE performs error correction on the decision signal (sym) based on the received signal, and then outputs the corrected decision signal (sym_dly).
  • the DFE equalizer of the above-mentioned link balancing architecture causes link errors to propagate, thereby increasing the total bit error rate.
  • the SoB and EoB left over after Precoding technology have become the main source of link errors, affecting the further improvement of link quality.
  • MLSE has better equalization effect, this technical solution has problems such as high complexity, high delay and high power consumption.
  • Figure 2 shows another link balancing architecture based on CTLE, FFE and DFE.
  • the difference between the link balancing architecture shown in Figure 2 and the link balancing architecture shown in Figure 1 is that the error correction module in Figure 2 is OD-MLSE.
  • the link balancing architecture shown in Figure 2 is an on-demand MLSE solution based on the OD-MLSE balancing technology. This solution uses the burst error cut-off position EoBD detection technology to start the MLSE function module.
  • DFE has a decision feedback structure. Specifically, DFE includes adders (the circle where the "+” is in Figure 3), registers (the box where the character “D” is in Figure 3), and multipliers (where the " ⁇ " is in Figure 3 circle) and the determiner (the box where the polyline is located in Figure 3).
  • DFE decision feedback structure
  • DFE uses the symbol value of the decision signal of the previous input signal (dfe_sliced data) to equalize the current input signal to obtain the equalized value (dfe_output) .
  • the DFE uses a determiner to determine the equalization value (dfe_output) to obtain the symbol value (dfe_sliced data) of the decision signal corresponding to the equalization value (dfe_output).
  • the sending end usually uses 1/(1+D) precoding technology to precode the data to be sent, and the receiving end uses (1+D) precoding decoding technology to restore the original data.
  • precoding technology can suppress error transmission.
  • precoding technology still cannot detect and eliminate errors at the start of burst error (SoB), which limits the further reduction of the link error rate.
  • the link balancing architecture provides a detection technology based on EoBD (End of Burst-error Detection) error cut-off position.
  • EoBD End of Burst-error Detection
  • the working principle of the link balancing architecture is: DFE receives an input signal (dfe_input) and outputs dfe_output, dfe_sliced_data, c_dfe and other information to the error location detection and correction module.
  • the error position detection and correction module determines the error end position (EoB, End of Burst-error) based on the error propagation introduced by DFE, and then determines the error start position SoB based on the error end position.
  • EroB End of Burst-error
  • the technology shown in Figure 4 is suitable for situations where the (1+ ⁇ D) channel ⁇ value (also known as tap coefficient) is large, such as a scenario where the tap coefficient is close to 1, or the tap coefficient is greater than 0.5 and less than 1.
  • ⁇ is small, the probability of error transmission overflow is small, which may easily cause the error location detection and error correction module to be unable to identify the location of the EoB, resulting in missed detection and loss of error detection and correction performance.
  • interconnection link can be one of the following types:
  • the first type is an interconnection link between chips (chip) through a channel. As shown in (a) in Figure 5, there is an interconnection link between chip A and chip B through a channel.
  • the second type is the interconnection link between the chip and the optical module (module), and between the optical module and the optical module. As shown in (b) in Figure 5, the interconnection link between chip A and optical module A, optical module A and optical module Interconnection links between modules B, and between optical module B and chip B.
  • the third type is an interconnection link between boards that are interconnected through channels. As shown in (c) in Figure 5, there is an interconnection link between board A and board B through channels.
  • the fourth type is the interconnection link between systems through channels.
  • the interconnection link between system A and system B is through channels.
  • the system can be a general-purpose computer, a router, a switch, or even a terminal device such as a mobile phone.
  • the interconnection link can be an electrical link, such as a printed circuit board (PCB), coaxial cable, etc., or it can be an optical link or a wireless link.
  • PCB printed circuit board
  • coaxial cable etc.
  • optical link or a wireless link.
  • Figure 6 shows a schematic structural diagram of a position detection device provided by an embodiment of the present application.
  • the position detection device includes a judgment module and an error position detection module. It can be understood that FIG. 6 is only a schematic diagram of the position detection device provided by this application. The position detection device may include more or fewer modules than in FIG. 6 , and this application does not limit this.
  • the judgment module is used to receive the DFE coefficient output by the DFE, and the DFE coefficient includes the tap coefficient.
  • the judgment module compares the relationship between the tap coefficient and the preset threshold, and determines the detection method of the error position detection module based on the relationship.
  • the error position detection module determines the position of the erroneous decision signal in the decision signal sequence based on the determined detection method and the relevant data output by the DFE (including but not limited to dfe_input, dfe_output, dfe_sliced_data, c_dfe). This position includes the burst error start position SoB and the burst error end position EoB.
  • the error location detection module includes two detection methods:
  • the error position detection module detects the burst error start position SoB, and uses SoB as a trigger to backtrace the decision signal sequence passed by the DFE to detect the burst error end position EoB.
  • Detection method two the error position detection module detects the burst error end position EoB, and uses EoB as a trigger to trace back the decision signal sequence passed by the DFE to detect the burst error starting position SoB.
  • the judgment module determines that the detection method of the error position detection module is detection method one.
  • the judgment module determines that the detection method of the error position detection module is detection method two.
  • the preset threshold can be set based on the actual bit error probability (Bit Error Ratio, BER) of the channel. For example, if the preset threshold is 0.6, the actual bit error probability of the channel is 0.12; the preset threshold is 0.7, the actual bit error probability of the channel is 0.14; the preset threshold is 0.8, the actual bit error probability of the channel is 0.13, Then the preset threshold can be set to 0.6, so that the actual bit error probability of the channel is optimal or meets the preset requirements.
  • BER Bit Error Ratio
  • Figure 7 is a method for detecting burst error locations based on the architecture shown in Figure 6 provided by this application. The method is as follows:
  • Step 1 The position detection device receives the information transmitted by the DFE.
  • the information includes (but is not limited to) dfe_input, dfe_output, dfe_sliced_data, c_dfe.
  • the DFE may be located inside the position detection device or outside the position detection device, which is not limited in the embodiments of the present application.
  • Step 2 The position detection device performs "cache" or “delay” processing on all or part of the information passed by the DFE.
  • the cached or delayed data depth is D.
  • the cached or delayed data can be used for subsequent error correction, or will be cached and output when the position detection device does not detect a bit error.
  • D can be the length preset by the position detection device, or it can be the length of the decision signal sequence transmitted by the DFE.
  • Step 3 The judgment module of the position detection device detects whether the ⁇ value is greater than the preset threshold ⁇ _th.
  • the corresponding preset threshold can also be set according to the specific channel environment.
  • step 4 If ⁇ > ⁇ _th, go to step 4, if ⁇ _th, go to step 5.
  • Step 4 If ⁇ > ⁇ _th, the judgment module determines that the detection method of the position detection module is detection method two.
  • step 4 includes the following steps:
  • the error position detection module performs error correction on the position detection module passed between SoB and EoB, and outputs the error-corrected decision symbol sequence.
  • the position detection module does not detect EoB, it means that there is no sudden error in the decision symbol sequence, and the error position detection module outputs the original decision symbol sequence. The error location detection and correction process ends.
  • Step 5 If ⁇ _th, the judgment module determines that the detection method of the position detection module is detection method two.
  • step 5 includes the following steps:
  • the error position detection module detects a sudden error starting and ending at EoB, it performs error correction on the decision signal sequence transmitted between SoB and EoB, and outputs the error-corrected decision signal sequence. If the error position detection module does not detect the SoB, the original decision signal sequence is output. The error location detection and correction process ends.
  • Step 6 The position detection device transmits the error location, error probability and other information of EoB and SoB to FEC, and FEC performs flexible decoding.
  • FEC is an error control technology that adds redundant information to the transmitted signal so that the FEC decoding module at the receiving end can use the redundant information to detect possible errors in the received signal and correct them.
  • Reed-Solomon (RS) code is often used for various data protection and verification.
  • the RS code can be expressed as RS(N, K). Among them, N represents the codeword length, and K represents the effective information length.
  • Embodiments of the present application provide a position detection method based on the architecture shown in Figure 6 for detecting burst error positions.
  • the position detection method is applied in the burst error detection process.
  • the position detection method includes the following steps:
  • the position detection device obtains a decision feedback equalization coefficient (c_dfe), which includes a tap coefficient.
  • the channel detection device receives the decision feedback equalization coefficient (c_dfe) output by the DFE.
  • the decision feedback equalization coefficient (c_dfe) may also include a DFE equalization coefficient, which is the level difference between two adjacent levels of the decision signal after DFE decision.
  • the error position detection method can be determined based on the relationship between the tap coefficient and the first preset threshold. Specifically, since DFE is a feedback equalizer, it is easy to cause erroneous transmission when there is signal misjudgment. If the tap coefficient is greater than the first preset threshold, when there is signal misjudgment, erroneous transmission may easily lead to overflow, making it easy to identify the location of the EoB. If the tap coefficient is less than or equal to the first preset threshold, when there is a signal misjudgment, the error transmission is not easy to overflow, making it difficult to identify the location of the EoB, but it is easy to identify the location of the SoB. In this way, different detection methods are determined based on different relationships between the tap coefficients and the first preset threshold, so as to reduce the probability of missed detection and reduce the loss of error detection and correction performance.
  • S803 if the tap coefficient is less than or equal to the first preset threshold, S803 is executed. If the tap coefficient is large At the first preset threshold, execute S805.
  • the decision signal sequence is the sequence output by the DFE.
  • the position detection device includes an error position detection module.
  • the DFE sends a decision signal sequence to the error position detection module.
  • the error position detection module receives the decision signal sequence from the DFE.
  • the decision signal sequence includes multiple decision signals. Taking Table 2 as an example, the position of a decision signal corresponds to a decision signal identifier. Table 2 shows the positions of the 18 decision signals, namely decision signal identification 1 to decision signal identification 18.
  • the decision signal sequence includes the symbol values of the decision signal at the above-mentioned 18 signal positions.
  • the SoB can be used as a trigger to trace back the information passed by the DFE to determine the burst error end position EoB.
  • the detection method is determined based on the relationship between the tap coefficient and the first preset threshold, thereby reducing the probability of missed detection and reducing the loss of error detection and correction performance.
  • implementation process of S804 can be described as, for example but not limited to, as follows:
  • the position detection device first determines the range in which SOB may appear, and then determines "the position of the EoB decision signal in the decision signal sequence" within this range.
  • the position detection device traces the information back based on the SoB position to find LEoB (Latest End of Burst-error), where the area between SoB and LEoB is the first judgment area where SoB may appear, and then in the first Search the position of the SOB within the error propagation pattern within the decision area.
  • LEoB Test End of Burst-error
  • the first decision area includes the location of the LEoB, and also includes the locations corresponding to the decision signals of the SoB and the LEoB.
  • the position detection device determines the fourth position of the SoB decision signal in the decision signal sequence based on the third position.
  • the position detection device when the tap coefficient is greater than or equal to the first preset threshold, the position detection device first determines the third position of the decision signal in the decision signal sequence where the burst error ends, and then determines the SoB decision signal in the decision signal sequence based on the third position. the fourth position.
  • Step 1 The position detection device obtains the target value 1 corresponding to the signal position A in the judgment signal sequence.
  • signal position A is the position of one or more decision signals in the decision signal sequence.
  • signal position A may be one or more decision signal identifiers from decision signal identifiers 1 to 18 .
  • the target value 1 includes at least one of the following: the symbol value of the decision signal at signal position A, the equalization value corresponding to signal position A, or the difference value corresponding to signal position A.
  • the difference value corresponding to signal position A is the difference between the symbol value of the decision signal at signal position A and the equalization value corresponding to signal position A.
  • the DFE sends the difference value to the error position detection module.
  • the error position detection module receives the difference value from the DFE.
  • target value 1 includes the symbol value of the decision signal at signal position A and the equalization value corresponding to signal position A
  • the DFE sends the symbol value of the decision signal and the equalization value to the error position detection module.
  • the error position detection module receives the symbol value and equalization value of the decision signal from the DFE.
  • the DFE sends the symbol value, equalization value and sum of the decision signal to the error position detection module. Difference value.
  • the error position detection module receives the symbol value, equalization value and difference value of the decision signal from the DFE.
  • the DFE transmits at least one of the following to the error position detection module: the decision signal sequence, the equalization value sequence, or the difference sequence corresponding to the signal position A.
  • Step 2 The position detection device determines the position of the decision signal in the decision signal sequence where the burst error starts based on the target value 1.
  • the error position detection module determines a signal position from signal position A to be the position of the decision signal of SoB in the decision signal sequence based on the symbol value of the decision signal at signal position A and the equalization value corresponding to signal position 1. Or the error position detection module determines a signal position from signal position A as the position of the SoB decision signal in the decision signal sequence based on the difference corresponding to signal position 1.
  • the position of the SoB decision signal in the decision signal sequence is determined based on the relationship between the difference value and the second preset threshold. Specifically, the difference value corresponding to each decision signal in the decision signal sequence is determined. If the difference value is greater than the second preset threshold, then the decision signal is the position of the SoB decision signal.
  • signal position A includes a position of a decision signal. Taking “signal position A is implemented as the decision signal identifier 9 in Table 2" as an example, the second preset threshold is 0.4, and the decision signal at signal position A The symbol value is “0", the equalization value corresponding to signal position A is "0.58", and the difference value corresponding to signal position A is "-0.42".
  • the error position detection module determines that the signal position identified by the decision signal identifier 9 is the position of the SoB decision signal in the decision signal sequence based on the difference (that is, 0.42) being greater than the preset threshold 0.4.
  • the error position detection module determines that the signal position identified by the judgment signal identifier 9 is the SoB in the judgment signal sequence based on the equalization value corresponding to the signal position A (i.e. 0.58) and the symbol value of the decision signal at the signal position A (i.e. 1). The location of the judgment signal.
  • the error position detection module judges the position of each judgment signal in signal position A.
  • the specific process please refer to the description in the previous paragraph. Here No further details will be given.
  • the decision signal whose difference is greater than the second preset threshold for the first time in the decision signal sequence is set as the decision signal of SoB s position.
  • the second preset threshold may be preset in the position detection device, and the second preset threshold may be a fixed value, for example, preset according to parameters of a channel processed by the position detection device.
  • the second preset threshold can also change in real time according to the channel parameters.
  • the second preset threshold may be “ ⁇ dlevel”, where ⁇ represents the preset error anomaly coefficient of DFE.
  • ⁇ dlevel may be acquired simultaneously by the position detection device when acquiring the decision signal, where dlevel may be the interval between two adjacent symbol levels of the PAM-N signal.
  • ⁇ dlevel may also be a fixed value preset in the error correction device, and this application does not limit this.
  • the position detection device when the position detection device obtains the target value 1 at the signal position A, the position detection device obtains the symbol value of the decision signal at the signal position A, the equalization value corresponding to the signal position A, and the difference value corresponding to the signal position A. at least one value, and then determine the position of the SoB decision signal in the decision signal sequence based on the relationship between the target value 1 and the second preset threshold, providing a basis for determining the position of the EoB decision signal.
  • S804 includes:
  • the position detection device determines the first candidate position based on the first position.
  • the first candidate position is the latest candidate position in the judgment signal sequence in which the decision signal of burst error end appears.
  • the first candidate position is the position of the latest end of burst error (Latest End of Burst-error, LEoB) decision signal that may occur in the decision signal sequence.
  • the possible locations where SoB's decision signals may appear are described as "candidates" Location".
  • the position detection device determines the first determination area based on the first position and the first candidate position.
  • the first decision area includes the first candidate position, the position corresponding to the decision signal between the first position and the first candidate position.
  • the first decision area includes signal positions between "decision signal identifier 14", “decision signal identifier 10" and “decision signal identifier 14".
  • the first decision area includes “decision signal identifier 10" to " The decision signal identifies a signal position in 14".
  • the error position detection module obtains the "position of the decision signal of SoB" and the target value 2, starting from the position of the decision signal of SoB, the "decision signal identification 9" to "decision signal identification 14" in the decision signal sequence are The corresponding decision signal is traced back, and the position of the EoB decision signal in the decision signal sequence is determined based on the target value 2 at different signal positions.
  • the position detection device determines the second position based on the first judgment area.
  • the second position is selected from the first decision area.
  • the error position detection module in the position detection device traces back from the first position to the first candidate position and then stops.
  • the position detection device determines the latest position where the EoB decision signal may appear in the decision signal sequence, the range of the position detection device searching for the EoB decision signal is narrowed to a certain extent, and the efficiency of the position detection device is further reduced. Computation.
  • S8041 includes the following steps:
  • Step 11 The position detection device determines the DFE check value corresponding to the signal position F based on the symbol value of the decision signal at the signal position F and the error estimation pattern corresponding to the signal position F.
  • the signal position F includes the position of at least one decision signal located after the SoB decision signal in the decision signal sequence.
  • the signal position D includes the position of a decision signal after the decision signal identifier 9.
  • the signal position D is implemented as the signal position corresponding to "decision signal identifier 11", or the signal position D is implemented as The signal position corresponding to "Decision Signal Identification 12".
  • the error estimation pattern corresponding to the signal position F is determined based on the error transfer characteristics of the DFE. For example, still taking Table 2 as an example, the decision noise corresponding to the position of the SoB decision signal (ie, decision signal identifier 9) is "-0.42", which means that the equalization value is smaller than the symbol value of the decision signal. In this way, the error position detection module determines that the error estimation pattern corresponding to the position of the decision signal of SoB is "+1". Combined with the error propagation characteristics of DFE, the error estimation pattern corresponding to the signal position after the decision signal mark 9 is shown in Table 2. For example, the error estimation pattern corresponding to the decision signal identifier 14 is "-1", and the error estimation pattern corresponding to the decision signal identifier 13 is "+1".
  • the implementation process of S8041 is as follows: in the position detection device, the "symbol value of the judgment signal corresponding to the signal position F" and the “error estimation pattern corresponding to the signal position F” are subtracted to obtain the DFE correction corresponding to the signal position F. test value.
  • the signal position F is implemented as the decision signal identifier 14" as an example
  • the "symbol value of the decision signal at the signal position F” is "3”
  • the "error estimation pattern corresponding to the signal position D" is "-1”. By subtracting the two, you can get the "DFE check value corresponding to signal position F" as "4".
  • Step 12 The position detection device compares the DFE check value corresponding to the signal position F with the preset range A to obtain the comparison result.
  • the preset range A is determined based on the symbol value after DFE decision.
  • the symbol value after DFE decision includes at least one value among "0", “1", “2” and "3". In this way, the default range 2 is [0,3].
  • the comparison result indicates which signal position F has a DFE check value that exceeds the preset range A.
  • the SoBD module in the position detection device compares the "DFE check value corresponding to the decision signal identifier 13" with the preset range A to obtain the comparison As a result, as the second comparison result indicates, the "DFE check value corresponding to the decision signal identifier 13" does not exceed the preset range A.
  • Step 13 The position detection device determines the first candidate position based on the comparison result.
  • the position detection device determines the signal position indicated by the comparison result (that is, the DFE check value exceeds the preset range A). Let the signal position of range A) be the first candidate position. On the contrary, if the comparison result indicates that "the DFE check value corresponding to the signal position F does not exceed the preset range A", then the position detection device determines that the signal position F does not include the first candidate position.
  • the "DFE check value corresponding to the decision signal identifier 12" does not exceed the preset range A.
  • the signal position corresponding to the "decision signal identifier 12" is not the first candidate position.
  • the error position detection module further determines whether the signal position corresponding to the "decision signal identifier 13" is the first candidate position. If the signal position corresponding to the "decision signal identifier 13" is not the first candidate position, the error position detection module continues to determine the status of the "decision signal identifier 14", and this cycle continues until the error position detection module determines that the "decision signal identifier 14" corresponds to the signal position.
  • the DFE check value that is, 4)" exceeds the preset range A. In this case, the signal position corresponding to the "decision signal identifier 14" is the first candidate position.
  • the position detection device determines the DFE check value corresponding to each signal position, the position detection device can determine which signal position is the possible EoB decision signal in the decision signal sequence based on the value of the DFE check value.
  • the latest signal position is the first candidate position.
  • S8043 includes:
  • the position detection device obtains the difference value corresponding to the decision signal in the first decision area.
  • the difference is the difference between the symbol value of the decision signal and the corresponding equalization value.
  • the difference can be calculated by the following formula:
  • the position detection device determines that the position where the sign of the difference corresponding to the decision symbol from the first position to the first candidate position is the same as the sign of the difference corresponding to the previous adjacent decision symbol is the second position.
  • the judgment signal identifier 9 to the judgment signal identifier 14 are the positions corresponding to the judgment signal in the first judgment area, the differences between the above positions are: 0.42, 0.22, 0.48, -0.03, respectively. 0.26 and 0.01, the positive and negative signs of the difference are: -, +, +, -, +, +; the positions with the same positive and negative signs as the differences in the previous positions are decision signal identification 11 and decision signal identification 14 respectively.
  • the position of the decision signal identifier 11 is marked as the position of the EoB, that is, the decision The second position in the signal sequence of the decision signal for the end of burst error.
  • the position where the positive and negative signs of the difference between the decision symbols are the same is set as EoB .
  • the position detection device determines the latest position where the EoB decision signal may appear in the decision signal sequence
  • the sign of the difference corresponding to each decision signal identifier in the first decision area determined by SoB and LEoB is determined.
  • set the position with the same sign of the difference corresponding to the previous adjacent position decision signal as a burst in the decision signal sequence The second position of the error end decision signal.
  • S8043 includes:
  • the position detection device obtains the prediction decision error corresponding to the decision symbol of the first decision area.
  • the prediction decision error is also called the wrong image.
  • the decision threshold of the SoB is 0.4
  • the absolute value of the difference is greater than 0.4, then the position of the decision signal mark 9 is determined to be SoB. Since the difference is a negative value, the prediction decision error corresponding to the decision signal mark 9 is +1. Due to the transmission of burst errors, the The predicted decision errors corresponding to the decision signal identifier 10 to the decision signal identifier 14 are: -1, +1, -1, +1, -1.
  • the prediction decision error corresponding to the decision signal identifier is -1
  • the prediction decision errors corresponding to the decision signal identifiers following the decision signal identifier are: +1 , -1, +1, -1, etc.
  • the position detection device determines the estimated decision error corresponding to the decision symbol of the decision area based on the difference between the difference and the predicted decision error.
  • the estimated judgment error is also called the error estimation pattern.
  • the difference is the difference between the symbol value of the decision signal (dfe_sliced data) and the corresponding equalization value (dfe_output);
  • the estimated decision error is the difference between the difference and the predicted decision error. Then the calculation formula of the estimated judgment error is:
  • Estimated decision error symbol value - equalization value - predicted decision error.
  • the position detection device determines that the position of the judgment signal with the largest absolute value of the estimated judgment error is the second position.
  • the estimated judgment errors corresponding to the decision signal identifier 10 to the decision signal identifier 14 are: -0.58, 0.68, -0.53, 1.47, -1.08, 0.84 respectively; then the estimated judgment error with the largest absolute value is is 1.47. That is, the position corresponding to the decision signal of the decision signal indicator 14 is the second position.
  • the position detection device determines the latest position where the EoB decision signal may appear in the decision signal sequence
  • the estimated decision error corresponding to each decision signal identifier is determined within the first decision area determined based on SoB and LEoB, and it is determined
  • the position where the absolute value of the estimated decision error is the largest is the second position of the decision signal in the decision signal sequence where the burst error ends.
  • S806 includes:
  • the position detection device determines the second candidate position in the judgment signal sequence where the decision signal for the burst error starts to appear.
  • the second candidate position is the position of at least one decision signal before the decision signal of burst error end.
  • the position detection device determines a second determination area based on the second candidate position and the third position.
  • the second decision area includes the decision signal of the second candidate position, and the second decision area also includes the decision signal located before the third position and after the second candidate position.
  • the position detection device determines the fourth position of the decision signal where the burst error starts in the decision signal sequence based on the second decision area.
  • the position detection device determines the earliest position where the decision signal of SoB may appear in the decision signal sequence, the range of the position detection device searching for the decision signal of SoB is narrowed to a certain extent, and the operation of the position detection device is further reduced. quantity.
  • S8063 includes:
  • the position detection device obtains the difference value of the judgment signal in the second judgment area
  • the difference is the difference between the symbol value of the decision signal (dfe_sliced data) and the corresponding equalization value (dfe_output);
  • the position detection device determines that the position of the judgment signal corresponding to the maximum absolute value of the difference between the judgment signals in the second judgment area is the fourth position.
  • the second decision area includes a signal position from "decision signal identifier 4" to "decision signal identifier 16".
  • the corresponding differences (dfe_slicing_error) from decision signal identification 4 to decision signal identification 16 are 0.13, -0.15, 0.13, 0.10, 0.13, -0.49, 0.02, -0.13, -0.03, 0.11, -0.09, -0.04, -0.04 .
  • the maximum absolute value of the difference is 0.49, that is, the absolute value of the difference corresponding to the decision signal identifier 9 is the maximum, and the fourth position is the position of the decision symbol corresponding to the decision signal identifier 9 .
  • the second decision area where the decision signal in the decision signal sequence where the burst error starts is located is determined, and The position of the decision signal corresponding to the maximum absolute value of the difference in this area is determined to be the fourth position.
  • S8061 includes:
  • the position detection device determines the DFE check value corresponding to the signal position D based on the symbol value of the decision signal at the signal position D and the error estimation pattern corresponding to the signal position D.
  • the signal position D includes the position of at least one decision signal located before the EoB decision signal in the decision signal sequence.
  • the signal position D includes the position of a decision signal before the decision signal identifier 17.
  • the signal position D is implemented as the signal position corresponding to "decision signal identifier 16", or the signal position D is implemented as The signal position corresponding to "Decision Signal Identification 15".
  • the error estimation pattern corresponding to the signal position D is determined based on the error transfer characteristics of the DFE. For example, still taking Table 1 as an example, the decision noise corresponding to the position of the EoB decision signal (ie, decision signal mark 17) is "1.07", which means that the equalization value is greater than the symbol value of the decision signal. In this way, the position detection module determines that the error estimation pattern corresponding to the position of the EoB decision signal is "+1". Combined with the error propagation characteristics of DFE, the error estimation pattern corresponding to the signal position before the decision signal mark 17 is shown in Table 1. For example, the error estimation pattern corresponding to the decision signal identifier 16 is "-1", and the error estimation pattern corresponding to the decision signal identifier 15 is "+1".
  • the implementation process of S141 is as follows: the error position detection module in the position detection device subtracts the "symbol value of the judgment signal corresponding to the signal position D" and the "error estimation pattern corresponding to the signal position D” to obtain the signal position. DFE check value corresponding to D. For example, taking “the signal position D is implemented as the decision signal identifier 16" as an example, the “symbol value of the decision signal at the signal position D" is "0", and the "error estimation pattern corresponding to the signal position D" is "-1". By subtracting the two, you can get the "DFE check value corresponding to signal position D" as "1".
  • the position detection device compares the DFE check value corresponding to the signal position D with the preset range to obtain the first comparison result.
  • the preset range is determined based on the symbol value after DFE decision.
  • the symbol value after DFE decision includes at least one value among "0", “1", “2” and "3".
  • the default range is [0,3].
  • the first comparison result indicates which signal position D has a DFE check value that exceeds the preset range.
  • the SoBD module in the position detection device compares the "DFE check value corresponding to the decision signal identifier 16" with the preset range to obtain the first
  • the comparison results are as follows:
  • the second comparison result indicates that the "DFE check value corresponding to the decision signal identifier 16" does not exceed the preset range.
  • the position detection device determines the signal position C according to the first comparison result.
  • the signal position C is one of the signal positions D.
  • the error position detection module in the position detection device determines the signal position indicated by the first comparison result ( That is, the signal position (the DFE check value exceeds the preset range) is the signal position C.
  • the first comparison result indicates that "the DFE check value corresponding to signal position D does not exceed the preset range”
  • the error position detection module in the position detection device determines that signal position D does not include signal position C.
  • the error position detection module determines that the "DFE check value corresponding to the judgment signal identification 16" does not exceed the preset range.
  • the signal position corresponding to the "decision signal identification 16" is not a signal position.
  • the SoBD module further determines whether the signal position corresponding to "decision signal identification 15" is signal position C. If the signal position corresponding to "decision signal identification 15" is not signal position C, the error position detection module continues to determine the status of "decision signal identification 14", and this cycle continues until the error position detection module determines the DFE calibration corresponding to "decision signal identification 4". "test value (i.e. -1)" exceeds the preset range. In this case, the signal position corresponding to "Judgment Signal Identification 4" is the signal position C.
  • the position detection device determines the DFE check value corresponding to each signal position, the position detection device can determine which signal position is the possible decision signal for SoB in the decision signal sequence based on the value of the DFE check value.
  • the position detection device does not obtain the position of the EoB decision signal in the decision signal sequence, it means that there is no sudden error in the decision signal sequence, and the position detection device outputs the original decision signal sequence.
  • the position detection device when the position detection device determines the position of the EoB decision signal in the decision signal sequence, the position detection device can also obtain the signal position B before the EoB decision signal.
  • Target value such as at least one of the symbol value of the decision signal at signal position B, the equalization value corresponding to signal position B and the first difference value corresponding to signal position B, and then determine the decision signal of SoB in the decision signal sequence based on the target value
  • the position provides a basis for eliminating errors at the SoB and helps reduce the bit error rate.
  • the position detection device provided by this application is also used to correct based on the decision signal corresponding to the wrong position in the decision signal sequence. This application does not limit the specific correction method.
  • FIG. 15 shows a performance comparison diagram when the tap coefficient is less than or equal to the first preset threshold.
  • the horizontal axis is the tap coefficient (ALPHA) of DFE, that is, Es/No.
  • the vertical axis is the bit error rate (BER), which can also be called the bit error probability.
  • the curve FFE+DFE is based on the (1+D) channel and the equalization performance curve of DFE under the condition of precoding off.
  • the curve FULL MLSE is based on the (1+D) channel, the performance curve of MLSE when precoding is turned on.
  • the curve SOB_USEC errsigh is based on the (1+D) channel and adopts the balanced performance curve of method mode one.
  • the curve EoB_USEC is based on the (1+D) channel and uses the balanced performance curve of method mode 2.
  • the tap coefficient is less than about 0.825, the performance of method mode one is better than the equalization performance of method mode two.
  • the tap coefficient is greater than about 0.825, the performance of method mode two is better than the equalization performance of method mode one.
  • the equalization performance of method mode one and method mode two under different tap coefficients is similar to MLSE, but the power consumption and computational complexity of this application are both smaller than MLSE.
  • FIG. 16 shows a performance comparison diagram when the tap coefficient is greater than the first preset threshold.
  • the horizontal axis is the signal-to-noise ratio, expressed by dividing the energy carried by each symbol by the noise power spectral density, that is, Es/No.
  • the vertical axis is the bit error rate (BER), which can also be called the bit error probability.
  • the curve Un-Coded represents the equalization performance curve of DFE under the precoding off condition based on the (1+D) channel in the prior art.
  • the curve (1+D)DFE PrecOff indicates that in the existing technology, based on the (1+D) channel, DFE is Performance curve under closed conditions.
  • the curve (1+D)DFE PrecOn represents the performance curve of DFE under precoding-on condition based on the (1+D) channel in the existing technology.
  • the curve (1+D)EoBD USEC PrecOff represents the performance curve of the error position detection module based on the (1+D) channel under precoding off conditions.
  • the curve (1+D)EoBD USEC PrecON represents the performance curve of the error position detection module based on the (1+D) channel when precoding is turned on.
  • the curve (1+D)Full MSLSE PrecOff represents the performance curve of the error position detection module based on the (1+D) channel under MSLSE off conditions.
  • the curve (1+D)Full MSLSE PrecOn represents the performance curve of the error position detection module based on the (1+D) channel when precoding is turned on.
  • the error detection provided by this application has performance comparable to that of turning on MLSE, but the power consumption and computational complexity of the method provided by this application are far less than those of MLSE.
  • embodiments of the present application also provide a position detection device.
  • the position detection device may be the device in the above method embodiment, or may be a component that can be used in the above device. It can be understood that, in order to implement the above functions, the position detection device includes hardware structures and/or software modules corresponding to each function.
  • the present application can be implemented in the form of hardware or a combination of hardware and computer software. Whether a function is performed by hardware or computer software driving the hardware depends on the specific application and design constraints of the technical solution. Skilled artisans may implement the described functionality using different methods for each specific application, but such implementations should not be considered beyond the scope of this application.
  • FIG. 17 shows a schematic structural diagram of a position detection device 1000.
  • the position detection device 1000 includes a communication unit 1003 and a processing unit 1002.
  • the communication unit 1003 executes S801-S807 of the position detection device, and/or the communication unit 1003 is also used to execute the position detection device in the embodiment of the present application.
  • Other sending and receiving steps of the detection device The processing unit 1002 is used to perform S801-S807 of the position detection device in the embodiment of the present application, and/or the processing unit 1002 is used to perform other processing steps of the position detection device in the embodiment of the present application.
  • processing unit 1002 in the embodiment of the present application can be implemented by a processor or a processor-related circuit component
  • the communication unit 1003 can be implemented by a transceiver or a transceiver-related circuit component.
  • the position detection device 1000 may also include a storage unit 1001 for storing the program code and data of the position detection device 1000.
  • the data may include but is not limited to original data or intermediate data.
  • the processing unit 1002 may be a processor or a controller, such as a central processing unit (CPU), a general-purpose processor, a digital signal processor (DSP), an application specific integrated circuit (Application Specific Integrated Circuit). circuit (ASIC), off-the-shelf programmable gate array (FPGA) or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. It may implement or execute the various illustrative logical blocks, modules, and circuits described in connection with this disclosure.
  • the processor can also be a combination that implements computing functions, such as a combination of one or more microprocessors, a combination of DSP and microprocessors, and so on.
  • the communication unit 1003 may be a communication interface, a transceiver, a transceiver circuit, etc., where the communication interface is a general term. In specific implementation, the communication interface may include multiple interfaces.
  • the storage unit 1001 may be a memory.
  • the processing unit 1002 is a processor
  • the communication unit 1003 is a communication interface
  • the storage unit 1001 is a memory
  • the position detection device 1100 involved in the embodiment of the present application may be as shown in FIG. 17 .
  • the position detection device 1100 includes: Processor 1102, transceiver 1103, memory 1101.
  • the transceiver 1103 may be an independently configured transmitter, which may be used to send information to other devices, or the transceiver may be an independently configured receiver, which may be used to receive information from other devices.
  • the transceiver may also be a component that integrates the functions of sending and receiving information. The embodiments of this application do not limit the specific implementation of the transceiver.
  • the position detection device 1100 may also include a bus 1104.
  • the transceiver 1103, the processor 1102 and the memory 1101 can be connected to each other through the bus 1104;
  • the bus 1104 can be a peripheral component interconnect standard (peripheral component interconnect, PCI) bus or an extended industry standard architecture (EISA) bus etc.
  • the bus 1104 can be divided into an address bus, a data bus, a control bus, etc. For ease of presentation, only one thick line is used in Figure 11, but it does not mean that there is only one bus or one type of bus.
  • this embodiment of the present application provides a chip, which includes a logic circuit and an input and output interface.
  • the input and output interface is used to communicate with modules outside the chip, and the logic circuit is used to perform other operations on the position detection device in the above method embodiment except for the sending and receiving operations.
  • the input and output interface executes S801-S807 of the position detection device, and/or the input and output interface is also used to execute the position detection device in the embodiment of the present application.
  • Other sending and receiving steps of the detection device The logic circuit is used to perform S801-S807 of the position detection device in the embodiment of the present application, and/or the logic circuit is also used to perform other processing steps in the embodiment of the present application.
  • the above embodiments may be implemented in whole or in part by software, hardware, firmware, or any combination thereof.
  • software When implemented using software, it may be implemented in whole or in part in the form of a computer program product.
  • the computer program product includes one or more computer instructions.
  • the computer program instructions When the computer program instructions are loaded and executed on a computer, the processes or functions described in the embodiments of the present application are generated in whole or in part.
  • the computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device.
  • the computer instructions may be stored in or transmitted from one computer-readable storage medium to another, e.g., the computer instructions may be transferred from a website, computer, server, or data center Transmission to another website, computer, server or data center through wired (such as coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (such as infrared, wireless, microwave, etc.) means.
  • the computer-readable storage medium may be any available medium that can be accessed by a computer or a data storage device such as a server or data center integrated with one or more available media.
  • the available media may be magnetic media (e.g., floppy disks, hard disks, magnetic tapes), optical media (e.g., digital video discs (DVD), or semiconductor media (e.g., solid state disks (SSD))) wait.
  • magnetic media e.g., floppy disks, hard disks, magnetic tapes
  • optical media e.g., digital video discs (DVD)
  • semiconductor media e.g., solid state disks (SSD)
  • the disclosed systems, devices and methods can be implemented in other ways.
  • the device embodiments described above are only illustrative.
  • the division of the units is only a logical function division. In actual implementation, there may be other division methods.
  • multiple units or components may be combined or can be integrated into another system, or some features can be ignored, or not implemented.
  • the coupling or direct coupling or communication connection between each other shown or discussed may be through some interfaces, and the indirect coupling or communication connection of the devices or units may be in electrical or other forms.
  • the units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place, or they may be distributed to multiple network devices. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.
  • each functional unit in each embodiment of the present application can be integrated into one processing unit, each functional unit can exist independently, or two or more units can be integrated into one unit.
  • the above integrated unit can be implemented in the form of hardware or in the form of hardware plus software functional units.
  • the present application can be implemented by means of software plus necessary general hardware. Of course, it can also be implemented by hardware, but in many cases the former is a better implementation. .
  • the technical solution of the present application can be embodied in the form of a software product in essence or that contributes to the existing technology.
  • the computer software product is stored in a readable storage medium, such as a computer floppy disk. , a hard disk or an optical disk, etc., including a number of instructions to cause a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the methods described in various embodiments of this application.

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Abstract

本申请提供了位置检测方法及相关装置，涉及通信技术领域。该方法包括：获取判决反馈均衡器系数，该判决反馈均衡器系数包括抽头系数；获取判决反馈均衡器的判决信号序列；若该抽头系数小于或等于第一预设阈值，则确定所述判决信号序列中突发错误开始的判决信号的第一位置；依据所述第一位置确定所述判决信号序列中突发错误结束的判决信号的第二位置。本申请通过抽头系数与预设阈值的关系确定对应的位置检测方法，并依据该位置检测方法准确确定判决信号序列中突发错误对应的判决信号的位置，以助于消除判决信号序列中的突发错误。

Description

位置检测方法及相关装置
相关申请的交叉引用
本申请主张于2022年03月31日提交中国专利局，申请号为202210346736.9、申请名称为“位置检测方法及相关装置”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及通信技术领域，尤其涉及一种位置检测方法及相关装置。
背景技术
伴随着云计算、大数据、物联网、人工智能等相关产业的高速发展，数据量呈现井喷式爆发性增长。高速链路技术是芯片和接口的基础技术，链路传输速率的不断提升使得信道码间干扰(inter symbol imerference，ISI)愈发严重，插损增大误码率提高。对于光电互联链路而言，光纤的色散以及光电转换器件，如驱动器(Driver)，调制器(Modulator)，光电检测器(PIN/APD)，跨阻放大器(TIA)等器件的带宽限制作用逐渐凸显，因此也需要更强的均衡技术来补偿器件欠带宽带来的码间干扰。
现有的均衡技术主要包括：CTLE(continuous time linear equalization)、FFE(feed forward equalizer)、DFE(DNS)等直接检测技术和MLSE(maximum likelihood sequence estimation)、RSSE(Reduced State Sequence Estimation)等序列似然判决技术。模拟均衡方法CTLE对噪声有放大作用且只有有限的均衡配置，须搭配FFE和DFE使用。FFE部署在接收端时，同样对噪声有放大作用。DFE可以精确的把Post ISI均衡掉，然而一旦出现误码，会发生误码传递，使总误码率提高。MLSE、RSSE等序列似然判决技术具有更好的性能，但是其复杂度比FFE和DFE高，同时存在加-比较-选择(ACS)反馈环路，在高速平行实现的条件下需要做展开，消耗大量的芯片面积和功耗。
另外，当链路ISI劣化时，伴随而来的是链路误码率的提升，使得现有的FEC(forward error correction)纠错算法存在性能风险，需要提升FEC的纠错能力。传统提升FEC纠错能力的方式是增加校验位、提高开销、提升纠错能力，但会带来链路利用率下降、时延增加、译码复杂度增加等问题。
发明内容
本申请实施例提供一种位置检测方法及装置，能够确定判决信号序列中突发错误的判决信号的位置。
为达到上述目的，本申请实施例采用如下技术方案：
第一方面，本申请实施例提供一种位置检测方法，该方法的执行主体可以是位置检测装置，也可以是应用于位置检测装置中的芯片。下面以执行主体是位置检测装置为例进行描述。该方法包括：位置检测装置获取判决反馈均衡器系数，所述判决反馈均衡器系数包括抽头系数；获取判决反馈均衡器的判决信号序列；若所述抽头系数小于或等于第一预设阈值，则确定所述判决信号序列中突发错误开始的判决信号的第一位置；依据所述第一位置确定所述判 决信号序列中突发错误结束的判决信号的第二位置。其中，抽头系数为判决反馈均衡器的抽头系数，当然抽头系数也可称为信道α值。
如此，在位置检测装置确定判决信号序列中SoB的判决信号的位置的情况下，位置检测装置还能依据SoB确定判决信号序列中EoB的判决信号的位置，为消除SoB和EoB之间的错误提供基础，有助于降低误码率。
在一种可能的设计中，本申请实施例位置检测方法还包括：所述依据所述第一位置确定所述判决信号序列中突发错误结束的判决信号的第二位置包括：确定突发错误结束的判决信号在判决信号序列中最晚出现的第一候选位置，所述第一候选位置是突发错误开始的判决信号之后的至少一个判决信号的位置；依据所述第一候选位置和所述第一位置确定第一判决区域，所述第一判决区域包括第一候选位置、所述第一位置和所述第一候选位置之间的判决信号对应的位置；
依据所述第一判决区域确定所述判决信号序列中突发错误结束的判决信号的第二位置。
如此，在位置检测装置确定判决信号序列中EoB的判决信号可能出现的最晚的位置和第一位置的情况下，在一定程度上缩小了位置检测装置搜索EoB的判决信号的范围，进一步降低了位置检测装置的运算量。
在一种可能的设计中，本申请实施例位置检测方法还包括：所述依据所述第一判决区域确定所述判决信号序列中突发错误结束的判决信号的第二位置，包括：获取所述第一判决区域内的判决信号对应的差值，其中，所述差值为判决信号的符号值和对应的均衡数值之间的差值；确定所述判决区域内中从所述第一位置至所述第一候选位置的判决符号对应的差值的正负符号与之前相邻的判决符号的差值的正负符号首次相同的位置为所述判决信号序列中突发错误结束的判决信号的第二位置。
如此，在位置检测装置确定判决信号序列中EoB的判决信号可能出现的最晚的位置的情况下，依据第一位置和LEoB确定的第一判决区域内每个判决信号标识对应的差值的正负符号，将与之前相邻位置判决信号对应的差值的正负符号相同的位置设置为该判决信号序列中突发错误结束的判决信号的第二位置，以便于快速准确确定判决信号序列中突发错误结束的判决信号的第二位置，进而提升错误位置检测的准确性和效率。
在一种可能的设计中，所述依据所述第一判决区域确定所述判决信号序列中突发错误结束的判决信号的第二位置，包括：获取所述第一判决区域内的判决信号对应的错误图像；依据差值和所述错误图像确定错误估计图像，其中所述差值为所述判决信号的符号值和对应的均衡数值之间的差值，所述错误估计图像为所述差值与所述错误图像之间的差值；确定所述错误估计图像的绝对值最大的判决信号的位置为第二位置。
如此，在位置检测装置确定判决信号序列中EoB的判决信号可能出现的最晚的位置的情况下，依据SoB和LEoB确定的第一判决区域内确定每个判决信号标识对应的估计判决误差，确定估计判决误差的绝对值为最大的位置即为该判决信号序列中突发错误结束的判决信号的第二位置，以便于快速准确确定判决信号序列中突发错误结束的判决信号的第二位置，进而提升错误位置检测的准确性和效率。
在一种可能的设计中，所述确定突发错误结束的判决信号在判决信号序列中最晚出现的第一候选位置，包括：获取判决信号序列中判决信号对应的DFE校验值，其中，所述DFE校验值是基于判决信号的符号值和对应的错误估计图样确定的；确定所述判决信号的DFE校验值超出预设范围的位置为第一候选位置。
其中预设范围可为[0,3]，若DFE校验值为-1或4，则DFE校验值超出预设范围，当然， DFE校验值还可为其他值。
如此，在位置检测装置能够确定各个信号位置对应的DFE校验值的情况下，位置检测装置即可根据各个信号位置对应的DFE校验值的取值状况，确定SoB的判决信号之后的哪一信号位置为判决信号序列中EoB的判决信号可能出现最晚的信号位置，也即判决信号序列中的第二位置。
在一种可能的设计中，所述方法还包括：若所述抽头系数大于或等于第一预设阈值确定所述判决信号序列中突发错误结束的判决信号的第三位置；确定突发错误开始的判决信号在判决信号序列中开始出现的第二候选位置，所述第二候选位置是突发错误结束的判决信号之前的至少一个判决信号的位置；依据所述第二候选位置和所述第三位置确定所述判决信号序列中突发错误开始的判决信号的第四位置。
如此，当抽头系数大于或等于第一预设阈值，首先确定判决信号序列中突发错误结束的判决信号的第三位置，然后依据该第三位置确定判决信号序列中SoB的判决信号的第四位置。进一步依据第二候选位置限定第四位置的区域，以减少位置检测装置搜索SoB的判决信号的范围，进一步降低了位置检测装置的运算量。
在一种可能的设计中，所述依据所述第二候选位置和所述第三位置确定所述判决信号序列中突发错误开始的判决信号的第四位置，包括：依据所述第三位置和所述第二候选位置确定第二判决区域，所述第二判决区域包括第二候选位置、所述第二候选位置和所述第三位置之间的判决信号对应的位置；获取所述第二判决区域内判决信号的差值；所述差值为判决信号的符号值和对应的均衡数值之间的差值；确定所述第二判决区域内判决信号的差值的绝对值最大对应的判决信号的位置为第四位置。
如此，依据所述第二候选位置和所述判决信号序列中突发错误结束的判决信号的第三位置，确定所述判决信号序列中突发错误开始的判决信号所在的第二判决区域，并在该区域内确定差值的绝对值最大对应的判决信号的位置为第四位置。
在一种可能的设计中，所述方法还包括：纠正所述第一位置至所述第二位置对应的判决信号，以降低误码率。
第二方面，本申请实施例提供一种位置检测装置，包括：通信单元和处理单元，其中，所述通信单元，用于获取判决反馈均衡器系数，所述判决反馈均衡器系数包括抽头系数；所述通信单元，还用于获取判决反馈均衡器的判决信号序列；所述处理单元，用于若所述抽头系数小于第一预设阈值，则确定所述判决信号序列中突发错误开始的判决信号的第一位置；所述处理单元，还用于依据所述第一位置确定所述判决信号序列中突发错误结束的判决信号的第二位置。
在一种可能的设计中，所述处理单元进一步用于：确定突发错误结束的判决信号在判决信号序列中最晚出现的第一候选位置，所述第一候选位置是突发错误开始的判决信号之后的至少一个判决信号的位置；依据所述第一候选位置和所述第一位置确定第一判决区域，所述第一判决区域包括第一候选位置、所述第一位置和所述第一候选位置之间的判决信号对应的位置；依据所述第一判决区域确定所述判决信号序列中突发错误结束的判决信号的第二位置。
在一种可能的设计中，所述处理单元进一步用于：获取所述第一判决区域内的判决信号对应的差值，其中，所述差值为判决信号的符号值和对应的均衡数值之间的差值；确定所述第一判决区域内中从所述第一位置至所述第一候选位置的判决符号对应的差值的正负符号与之前相邻的判决符号的差值的正负符号首次相同的位置为所述判决信号序列中突发错误结束的判决信号的第二位置。
在一种可能的设计中，所述处理单元进一步用于：获取所述第一判决区域内的判决信号对应的错误图像；依据差值和所述错误图像确定错误估计图像，其中所述差值为所述判决信号的符号值和对应的均衡数值之间的差值，所述错误估计图像为所述差值与所述错误图像之间的差值；确定所述错误估计图像的绝对值最大的判决信号的位置为第二位置。
在一种可能的设计中，所述处理单元进一步用于：获取判决信号序列中判决信号对应的DFE校验值，其中，所述DFE校验值是基于判决信号的符号值和对应的错误估计图样确定的；确定所述判决信号的DFE校验值超出预设范围的位置为第一候选位置。
在一种可能的设计中，所述处理单元进一步用于：若所述抽头系数大于或等于第一预设阈值确定所述判决信号序列中突发错误结束的判决信号的第三位置；确定突发错误开始的判决信号在判决信号序列中开始出现的第二候选位置，所述第二候选位置是突发错误结束的判决信号之前的至少一个判决信号的位置；依据所述第二候选位置和所述第三位置确定所述判决信号序列中突发错误开始的判决信号的第四位置。
在一种可能的设计中，所述处理单元进一步用于：依据所述第三位置和所述第二候选位置确定第二判决区域，所述第二判决区域包括第二候选位置、所述第二候选位置和所述第三位置之间的判决信号对应的位置；获取所述第二判决区域内判决信号的差值；所述差值为判决信号的符号值和对应的均衡数值之间的差值；确定所述第二判决区域内判决信号的差值的绝对值最大对应的判决信号的位置为第四位置。
在一种可能的设计中，所述处理单元还用于：纠正所述第一位置至所述第二位置对应的判决信号。
第三方面，本申请实施例提供了一种位置检测装置，包括：处理器和存储器；该存储器用于存储计算机指令，当该处理器执行该指令时，使得该位置检测装置执行上述第一方面或第一方面任一种可能的设计中的方法。该位置检测装置可以为上述第一方面或第一方面任一种可能的设计中的位置检测装置，或者实现上述位置检测装置功能的芯片。
第四方面，本申请实施例提供一种芯片，包括逻辑电路和输入输出接口。其中，输入输出接口用于与芯片之外的模块通信，例如，该芯片可以为实现上述第一方面或第一方面任一种可能的设计中的位置检测装置功能的芯片。输入输出接口输入判决信号序列中突发错误结束的判决信号的位置、或第一信号位置对应的第一目标数值。逻辑电路用于运行计算机程序或指令，以实现以上第一方面或第一方面任一种可能的设计中的方法。
第五方面，本申请实施例提供一种计算机可读存储介质，该计算机可读存储介质中存储有指令，当其在计算机上运行时，使得计算机可以执行上述第一方面中任一项的位置检测方法。
第六方面，本申请实施例提供一种包含指令的计算机程序产品，当其在计算机上运行时，使得计算机可以执行上述任一方面中任一项的位置检测方法。
第七方面，本申请实施例提供一种电路系统，电路系统包括处理电路，处理电路被配置为执行如上述任一方面中任一项的位置检测方法。
其中，第二方面至第七方面中任一种设计所带来的技术效果可参考上文所提供的对应的方法中的有益效果，此处不再赘述。
附图说明
图1为本申请实施例提供的一种链路均衡架构的示意图；
图2为本申请实施例提供的再一种链路均衡架构的示意图；
图3为本申请实施例提供的一种判决反馈结构的示意图；
图4为本申请实施例提供的又一种链路均衡架构的示意图；
图5为本申请实施例提供的高速互联的场景示意图；
图6为本申请实施例提供的一种位置检测装置的结构示意图；
图7为本申请实施例提供的一种检测方法的示意图；
图8为本申请实施例提供的一种位置检测方法的流程示意图；
图9为本申请实施例提供的一种确定第二位置的方法的流程示意图；
图10为本申请实施例提供的又一种确定第二位置的方法的流程示意图；
图11为本申请实施例提供的又一种确定第二位置的方法的流程示意图；
图12为本申请实施例提供的一种确定第四位置方法的流程示意图；
图13为本申请实施例提供的一种确定第四位置方法的流程示意图；
图14为本申请实施例提供的一种确定第二候选位置方法的流程示意图；
图15为本申请实施例提供的一种性能比较图；
图16为本申请实施例提供的再一种性能比较图；
图17为本申请实施例提供的一种位置检测装置的结构示意图；
图18为本申请实施例提供的再一种位置检测装置的结构示意图。
具体实施方式
本申请的说明书以及附图中的术语“第一”和“第二”等是用于区别不同的对象，或者用于区别对同一对象的不同处理，而不是用于描述对象的特定顺序。此外，本申请的描述中所提到的术语“包括”和“具有”以及它们的任何变形，意图在于覆盖不排他的包含。例如包含了一系列步骤或单元的过程、方法、系统、产品或设备没有限定于已列出的步骤或单元，而是可选地还包括其他没有列出的步骤或单元，或可选地还包括对于这些过程、方法、产品或设备固有的其它步骤或单元。本申请实施例中，“多个”包括两个或两个以上，“系统”可以和“网络”相互替换。本申请实施例中，“示例性的”或者“例如”等词用于表示作例子、例证或说明。本申请实施例中被描述为“示例性的”或者“例如”的任何实施例或设计方案不应被解释为比其它实施例或设计方案更优选或更具优势。确切而言，使用“示例性的”或者“例如”等词旨在以具体方式呈现相关概念。
首先，介绍本申请实施例所涉及的技术术语：
1、调制、解调
在发送端，将比特序列映射成适合在信道中传输的信号的过程，称为“调制”。
在接收端，将接收到的信号映射成比特序列的过程，称为“解调”。
2、脉冲振幅调制(pulse amplitude modulation，PAM)
一种利用信号幅度来表示发送数据的信号调制技术。例如，常见的有PAM-2调制、PAM-4调制等。这里，PAM-2调制是用两个电平来表示一个比特信息。PAM-4调制是用四个电平来表示两个比特信息。
3、判决信号标识(identity，ID)
判决信号标识，也可以描述为“判决信号的信号位置”、或“判决信号的位置”，用于标识一个判决信号在判决信号序列中的位置。其中，判决信号序列是判决信号所属的序列。其中，“判决信号”和“判决信号序列”的介绍可以参见后续说明，此处不再赘述。
示例性的，参见表1，在一个判决信号序列包括18个判决信号的情况下，一个判决信号 标识对应一个信号位置。上述18个判决信号中第1个判决信号的位置可以记为判决信号标识1，上述18个判决信号中第2个判决信号的位置可以记为判决信号标识2，上述18个判决信号中其它判决信号的位置记法可以此类推，此处不再赘述。
4、预编码后的数据(PrecEncOut)
预编码后的数据，是指在发送端，采用预编码器对输入数据进行预编码得到的数据。其中，预编码器采用的预编码技术可以是1/(1+D)预编码技术。输入数据可以记为Din。
示例性的，1/(1+D)预编码技术的处理过程如下：当预编码器接收到一个信号位置上的原始输入数据时，预编码器使用“前一个信号位置的预编码后的数据”对“当前信号位置的原始输入数据”进行预编码处理(例如，将“当前信号位置的原始输入数据”减去“前一个信号位置的预编码后的数据”，然后进行取模运算)以得到“当前信号位置的预编码后的数据”。例如，仍以表1为例，在“判决信号标识1作为当前信号位置”的情况下，“当前信号位置的原始输入数据”为“1”，“当前信号位置的前一个信号位置的预编码后的数据”不存在，视为“0”，两者作差，然后对4进行取模运算，以得到“当前信号位置的预编码后的数据”，即“1”。再如，在“判决信号标识2作为当前信号位置”的情况下，“当前信号位置的原始输入数据”为“3”，“当前信号位置的前一个信号位置的预编码后的数据”为“1”，两者作差，然后对4进行取模运算，以得到“当前信号位置的预编码后的数据”，即“2”。其它判决信号标识的预编码后的数据，可以此类推。
5、信道(channel)、理论值
信道，是指发送端与接收端之间传输数据的信道。示例性的，信道中传输的数据为预编码后的数据。
示例性的，表1中的信道为(1+D)信道。对(1+D)信道传输后的数据的说明如下：判决信号标识1的“前一个信号位置的预编码后的数据”不存在，视为“0”。“判决信号标识1对应的预编码后的数据”为“1”。将“判决信号标识1的‘前一个信号位置的预编码后的数据’”与“判决信号标识1对应的预编码后的数据”加和，以得到经过(1+D)信道传输后的数据，即“1”。判决信号标识2的“前一个信号位置的预编码后的数据”为“1”。“判决信号标识2对应的预编码后的数据”为“2”。将“判决信号标识2的‘前一个信号位置的预编码后的数据’”与“判决信号标识2对应的预编码后的数据”加和，以得到经过(1+D)信道传输后的数据，即“3”。其它判决信号标识的预编码后的数据经过(1+D)信道传输后的取值状况，可以此类推。
理论值，是指在未考虑信道噪音的情况下，预编码后的数据从发送端经过信道传输至接收端的取值。
示例性的，以表1为例，在接收端，理论值可以是“信道”所在行的数值。
6、噪音
噪音，是指信道中存在的干扰。
示例性的，以表1为例，判决信号标识1对应的噪音为“-0.19”，是指判决信号标识1对应的预编码后的数据在信道传输过程中的干扰。判决信号标识2对应的噪音为“0.17”，是指判决信号标识2对应的预编码后的数据在信道传输过程中的干扰。其它判决信号标识的预编码后的数据在信道传输过程中的噪音取值状况可以参见表1或表2，此处不再赘述。
7、DFE的输入信号(dfe_input)、输入信号序列
DFE的输入信号是指，输入DFE的信号，可以记为dfe_input。
在本申请实施例中，DFE属于接收端的设备。DFE的输入信号是指，在考虑信道噪音的 情况下，预编码后的数据经过信道传输后，输入DFE的数值。
示例性的，以表1为例，判决信号标识1对应的输入信号的取值为“0.81”，是“信道”所在行的数值“1”与“噪音”所在行的数值“-0.19”叠加之后的结果。判决信号标识2对应的输入信号的取值为“3.17”，是“信道”所在行的数值“3”与“噪音”所在行的数值“0.17”叠加之后的结果。其它判决信号标识对应的输入信号的取值状况可以参见表1，此处不再赘述。
输入信号序列，包括至少两个输入信号，且所述至少两个输入信号按照一定的顺序排列。例如，仍以DFE的判决反馈结构为例，输入信号的排列顺序包括DFE接收上述输入信号的先后顺序。对于一个输入信号序列中两个相邻的输入信号而言，若第一个输入信号是DFE接收的当前输入信号，则第二个输入信号是DFE接收的当前输入信号的下一个输入信号。
8、均衡数值(dfe_output)、均衡数值序列
均衡数值，是指信号经过均衡处理后的数值。例如，在DFE的判决反馈结构中，均衡数值是DFE的输出信号，记为dfe_output。DFE中的加法器采用前一个输入信号的判决信号的符号值(dfe_sliced data)，对当前输入信号进行均衡处理，以得到当前输入信号对应的均衡数值(dfe_output)。
在本申请实施例中，一个信号位置对应的均衡数值，是指用于确定该信号位置上判决信号的均衡数值。示例性的，仍以上述表1中包括18个判决信号的判决信号序列为例，信号位置1对应的均衡数值记为均衡数值0.81，信号位置1上的判决信号是DFE中的判决器对均衡数值0.81进行判决处理后的信号。其中，“判决信号”、“判决信号序列”和“判决信号的符号值”的介绍可以参见后续说明，此处不再赘述。
均衡数值序列，包括至少两个均衡数值，且所述至少两个均衡数值按照一定的顺序排列。例如，仍以DFE的判决反馈结构为例，均衡数值的排列顺序包括DFE确定上述均衡数值的先后顺序。对于一个均衡数值序列中两个相邻的均衡数值而言，若第一个均衡数值是DFE确定的当前输入信号对应的均衡数值，则第二个均衡数值是DFE确定的当前输入信号的下一个输入信号对应的均衡数值。
9、判决信号、判决信号的符号值(dfe_sliced data)、判决信号序列
判决信号，是指均衡数值经过判决处理后的信号。
判决信号的符号值，是指判决信号的大小。例如，在DFE的判决反馈结构中，判决信号的符号值。示例性的，判决信号的符号值记为dfe_sliced data。DFE的判决器对当前的均衡数值进行判决处理，以得到该均衡数值对应的判决信号的符号值。
判决信号序列，包括至少两个判决信号，且所述至少两个判决信号按照一定的顺序排列。例如，仍以DFE的判决反馈结构为例，判决信号的排列顺序包括DFE确定上述判决信号的先后顺序。对于一个判决信号序列中两个相邻的判决信号而言，若第一个判决信号是DFE确定的当前均衡数值对应的判决信号，则第二个判决信号是DFE确定的当前均衡数值的下一个均衡数值对应的判决信号。其中，均衡数值的排列顺序可以参见“均衡数值序列”的相关介绍，此处不再赘述。
需要说明的是，一个判决信号的符号值与调制相关。以PAM-4调制为例，该判决信号的符号值为“0”、“1”、“2”和“3”中的一个数值，或者，该判决信号的符号值为“-3”、“-1”、“+1”和“+3”中的一个数值。在本申请实施例中，在PAM-4调制的情况下，以‘一个判决信号的符号值为“0”、“1”、“2”和“3”中的一个数值’为例，进行说明。
10、差值、差值序列
差值，是指一个信号位置上判决信号的符号值和该信号位置对应的均衡数值之间的差值。其中，差值可以是正值，也可以是负值。示例性的，差值记为err。
在本申请实施例中，一个信号位置对应的差值，是指该信号位置上判决信号的符号值和该信号位置对应的均衡数值之间的差值。例如，仍以上述表1中包括18个判决信号的判决信号序列为例，信号位置1对应的差值是信号位置1上判决信号的符号值与信号位置1对应的均衡数值之间的差值。
差值序列，包括至少两个差值，且所述至少两个差值按照一定的顺序排列。例如，仍以DFE的判决反馈结构为例，差值序列中差值的排列顺序即为判决信号的排列顺序。
11、判决噪音(dfe_sliced_noise)
判决噪音，又称为DFE判决误差值，是指在对均衡数值进行判决处理的过程中，确定的该均衡数值所在信号位置对应的噪音预估值。示例性的，判决噪音记为dfe_sliced_noise。
在本申请实施例中，一个信号位置对应的判决噪音，是指该信号位置上判决信号的符号值和该信号位置对应的均衡数值之间的差值。例如，仍以上述表1中包括18个判决信号的判决信号序列为例，信号位置1对应的判决噪音是信号位置1上判决信号的符号值与信号位置1对应的均衡数值之间的差值。也就是说，信号位置1对应的判决噪音是信号位置1对应的差值。或者，信号位置1对应的判决噪音是信号位置1对应的差值与某一系数的乘积。
12、错误图样(out Error)、错误估计图样(ErrorSIGNPredicted)
错误图样，是指发生错误的判决信号的符号值与理论值的差值。其中，上述判决信号发生的错误可以是随机错误，也可以是突发错误，本申请实施例对此不作限定。示例性的，错误图样可以记为out Error。错误图样可以是正值，也可以是负值。
错误估计图样，是利用错误图样进行估计后的数值。示例性的，错误估计图样可以记为ErrorSIGNPredicted。例如，利用错误图样和DFE的错误传递特性进行估计，以得到错误估计图样。以表1为例，判决信号标识16对应的错误图样为“-1”，利用DFE的错误传递特性，得到判决信号标识15对应的错误估计图样为“+1”，进而得到判决信号标识3对应的错误估计图样为“+1”。
在本申请实施例中，一个信号位置对应的错误估计图样，也可以描述为“一个判决信号对应的错误估计图样”。其中，一个信号位置对应的错误估计图样可以是正值，也可以是负值。
当一个信号位置对应的错误估计图样的取值为正值时，表示该信号位置对应的判决信号的符号值大于理论值。此种情况下，该判决信号的符号值减去错误估计图样的取值，即为理论值。当一个信号位置对应的错误估计图样的取值为负值时，表示该信号位置对应的判决信号的符号值小于理论值。此种情况下，该判决信号的符号值减去错误估计图样的负值，即为理论值。
需要说明的是，在判决信号序列发生突发错误的情况下，对于发生突发错误的至少两个相邻的判决信号而言，至少两个相邻的判决信号对应的错误图样是“+1”和“-1”交替分布的。此种分布特性，也可以描述为“DFE的错误传递特性”。
13、DFE校验值(dfe_sliced_data_Predicted)
DFE校验值，用于预估判决信号序列中判决信号的符号值。示例性的，DFE校验值记为dfe_sliced_data_Predicted。
在本申请实施例中，一个信号位置对应的DFE校验值，是基于该信号位置上判决信号的符号值和该信号位置对应的错误估计图样确定的数值。例如，仍以上述包括18个判决信号的判决信号序列的表1为例，信号位置1对应的DFE校验值是信号位置1上判决信号的符号值 与信号位置1对应的错误估计图样之间的差值。
需要说明的是，DFE校验值的取值范围与调制相关。例如，以PAM-4调制为例，一个判决信号的符号值为“0”、“1”、“2”和“3”中的一个数值。DFE校验值的取值范围即为[0，3]。若一个信号位置对应的DFE校验值超出[0，3]，则表明该信号位置是突发错误起始的判决信号的位置。
14、随机错误(random error)、突发错误(burst error)
随机错误是指信号传输过程中，出错的信号位置彼此之间完全没有关联，即前一个出错的信号位置对接下来的出错的信号位置没有任何影响。
突发错误是指信号传输过程中，出错的信号位置彼此之间有关联，错误的信号位置成串出现的现象。换言之，在突发错误中，若一个信号位置出错，则该信号位置之后的信号位置出错的概率很大。
在本申请实施例中，若信号传输过程中发生突发错误，则描述“出错的信号位置”的名称包括以下至少一项：
突发错误起始(start of burst error，SoB)的信号位置，是指突发错误中的第一个出错的信号位置。
最早的突发错误起始(earliest start of burst error，ESoB)的信号位置，是指突发错误中的第一个出错的信号最早可能出现的位置。
突发错误结束(end of burst error，EoB)的信号位置，是指突发错误中的最后一个出错的信号位置。
最晚的突发错误结束(latest end of burst error，LEoB)的信号位置，是指突发错误中的最后一个出错的信号最晚可能出现的位置。
进一步地，在信号为判决信号的情况下，“SoB的信号位置”也可以描述为“SoB的判决信号的位置”，即SoB的判决信号在判决信号序列中的位置。“ESoB的信号位置”也可以描述为“ESoB的判决信号的位置”，即SoB的判决信号在判决信号序列中最早可能出现的位置。“EoB的信号位置”也可以描述为“EoB的判决信号的位置”，即EoB的判决信号在判决信号序列中的位置。
15、解码后的数据(PrecDecOut)
解码后的数据，是指在接收端接收的数据是预编码后的数据的情况下，采用解码技术对接收的数据进行解码后的数据。
16、错误标识(ErrorPrecDec)
错误标识，用于信号位置上发生的错误状况。
示例性的，若某一判决信号标识对应的错误标识的取值为“0”，则表示该信号位置未发生错误。若某一判决信号标识对应的错误标识的取值为“1”，则表示该信号位置发生错误，且该信号位置对应的均衡数值大于理论值。例如，以“判决信号标识9”为例，由于“判决信号标识9”的“理论值”为“0”(即“判决信号标识9”在“信道”所在行的取值)，“判决信号标识9”的“均衡数值”为“0.51”。所以，“判决信号标识9”的错误标识的取值为“1”。若某一判决信号标识对应的错误标识的取值为“-1”，则表示该信号位置发生错误，且该信号位置的均衡数值小于理论值。例如，以“判决信号标识17”为例，由于“判决信号标识17”的“理论值”为“6”(即“判决信号标识17”在“信道”所在行的取值)，“判决信号标识17”的“均衡数值”为“4.07。所以，“判决信号标识9”的错误标识的取值为“-1”。
需要说明的是，表1的示例如下：
表1

表2的示例如下：
表2

参见表1和2，一个判决信号标识对应一个判决信号的位置，表1和表2中分别示出了18个判决信号标识，即18个信号位置。
在发送端，原始输入数据为输入预编码器的数据，各取值参见表1或表2中“原始输入数据”所在行的取值。预编码器输出预编码后的数据，各取值参见表1或表2中“预编码后的数据”所在行的取值。预编码后的数据经过信道传输。在未考虑噪音的情况下，经过信道传输之后，各个判决信号标识对应的理论值即为表1或表2中“信道”所在行的数值。进一步地，在考虑噪音的情况下，各个判决信号标识对应的噪音即为表1或表2中“噪音”所在行的数值。
在接收端，DFE的输入信号序列中的各个输入信号，即为相应信号位置上的“经过信道传输后的理论值与噪音叠加之后的数值”，各取值可以参见表1或表2中“DFE的输入信号”所在行的数值。DFE采用加法器对输入信号序列进行均衡处理，以得到均衡数值序列，各均衡数值的取值参见表1或表2中“DFE的均衡数值”所在行的取值。DFE采用判决器对均衡数值序列进行判决处理，以得到判决信号序列，各判决信号的符号值的取值参见表1或表2 中“DFE的判决信号的符号值”所在行的取值。在判决处理过程中，DFE预估的判决噪音如表1或表2中“DFE的判决噪音”所在行的取值。
在上述判决信号序列发生突发错误的情况下，错误估计图样的取值如表1或表2中“DFE的错误估计图样”所在行的取值。基于判决信号的符号值和错误估计图样确定的“DFE的校验值”如表1或表2中“DFE的校验值”所在行的取值。ESoB的判决信号的位置如表1中“SoB最早可能出现的位置”所在行的数值所示。在“SoB最早可能出现的位置”所在行的数值中，若一个判决信号标识对应的取值为“0”，表示该信号位置不是ESoB的判决信号的位置。若一个判决信号标识对应的取值为“-1”，表示该信号位置是ESoB的判决信号的位置。LEoB的判决信号的位置如表2中“LEBE最晚可能出现的位置”所在行的数值所示。在“LEoB最晚可能出现的位置”所在行的数值中，若一个判决信号标识对应的取值为“0”，表示该信号位置不是LEoB的判决信号的位置。若一个判决信号标识对应的取值为“1”，表示该信号位置是LEoB的判决信号的位置。
在接收端，接收端对接收的数据进行解码，以得到解码后的数据，如表1或表2中“解码后的数据”所在行中的数据所示。“错误标识”示出了上述判决信号序列中发生错误的信号位置。
17、信号均衡(equalizer)技术
信号均衡技术是一种信号处理技术。信号在信道传输中容易产生畸变，而信号均衡技术能够使信号产生与信道相反的特性，以“抵消”信道传输过程中的“畸变”，从而提升传输效果。信号均衡技术包括基于连续时间线性均衡器(continuous time linear equalization，CTLE)、前向均衡器(feed forward equalizer，FFE)、DFE等。
下面，对主要的链路均衡架构进行介绍：
第一种，基于CTLE、FFE和DFE的链路均衡架构
参见图1，图1示出了一种基于CTLE、FFE和DFE的链路均衡架构。该链路均衡架构包括发送端和接收端，如图1中的虚线框所示。
发送端包括FFE和差错控制编码(error control coding，ECC)器(可选的)。FFE输出的信号经过信道(channel)传输至接收端。
接收端包括CDR(clock and data recovery，时钟和数据恢复)模块、最小均方(least mean square，LMS)自适应(adaption)模块、CTLE、模数转换器(Analog toDigital Converter，ADC)、FFE、DFE、最大似然序列估计模块(maximum likelihood sequence estimation，MLSE)，其中MLSE作为纠错模块。
图1中所示的箭头表示各个模块之间的信号流向。其中，LMS自适应模块向DFE、FFE以及MLSE发送DFE的系数(c_dfe)。该系数(c_dfe)包括DFE的抽头系数α和PAM信号中相邻两个电平之间的间隔dlevel。FFE输出的信号为DFE的输入信号(dfe_input)，该输入信号(dfe_input)输入DFE以及MLSE。DFE将该输入信号(dfe_input)均衡后得到的均衡输出信号(dfe_output)输出至MLSE。DFE还将对均衡输出信号进行判决后得到的判决信号(sym)以及判决信号与均衡输出信号的差值(err)输出至LMS自适应模块和MLSE。MLSE根据接收到的信号对判决信号(sym)进行纠错，然后输出修正后的判决信号(sym_dly)。
上述链路均衡架构的DFE均衡器使得链路误码出现传递现象，从而使总误码率提高。经过Precoding技术后遗留的SoB和EoB成为链路误码的主要来源，影响了链路质量的进一步提升。MLSE虽然有着更好的均衡效果，但是该技术方案的存在高复杂度高延时高功耗等问题。
第二种，另一种基于CTLE、FFE和DFE的链路均衡架构
参见图2，图2示出了另一种基于CTLE、FFE和DFE的链路均衡架构。
图2所示的链路均衡架构与图1所示的链路均衡架构不同之处在于，图2的纠错模块为OD-MLSE。图2所示的链路均衡架构是基于OD-MLSE的均衡技术的一种按需启动的MLSE解决方案，该方案利用突发错误截止位置EoBD的检测技术，启动MLSE功能模块。
该方案的性能与图1所示的方案相似，但是图2的方案的复杂度和功耗较图1所示的方案有所降低。另外，图2所示的方案虽然为按需启动MLSE，但MLSE的启动会导致系统面积功耗上升、复杂度高、延迟增加等问题。
可以理解，上述图1及图2所示两种链路均衡架构能够消除ISI，且不放大噪声。但是，上述两种链路均衡架构包括DFE。
如图3所示，DFE具备判决反馈结构。具体地，DFE包括加法器(如图3中的“+”所在的圆圈)、寄存器(如图3中的字符“D”所在的方框)、乘法器(如图3中的“×”所在的圆圈)和判决器(如图3中的折线所在的方框)。
DFE的判决反馈结构原理为：当DFE接收到一个输入信号(dfe_input)时，DFE使用前一个输入信号的判决信号的符号值(dfe_sliced data)对当前输入信号进行均衡，以得到均衡数值(dfe_output)。然后，DFE采用判决器对该均衡数值(dfe_output)进行判决，以得到该均衡数值(dfe_output)对应的判决信号的符号值(dfe_sliced data)。
显然，当DFE出现一个错判的误码时，由于判决反馈结构的存在，使得误码影响下一个输入信号的判决，从而造成误码传递。
为了解决误码传递的问题，发送端通常采用1/(1+D)预编码技术对待发送的数据进行预编码，接收端采用(1+D)预编码的解码技术恢复出原始数据。虽然预编码(precoding)技术能够抑制误码传递。但是，预编码技术仍无法检测和消除突发错误起始(start of burst error，SoB)处的错误，限制了链路误码率的进一步降低。
请一并参阅图4，图4提供了一种链路均衡架构。该链路均衡架构提供一种基于EoBD(End of Burst-error Detection)错误截止位置的检测技术。
如图4所示，链路均衡架构的工作原理为：DFE接收到一个输入信号(dfe_input)，并向错误位置检测及纠错模块输出dfe_output、dfe_sliced_data，c_dfe等信息。错误位置检测及纠错模块依据DFE引入的错误传递，确定错误截止位置(EoB，End of Burst-error)，然后依据错误截止位置确定错误开始位置SoB。
然而图4所示的技术适用于在(1+αD)信道α值(又称抽头系数)较大情况，例如抽头系数接近1、或抽头系数大于0.5且小于1的场景。当α较小时，错误传递溢出概率较小，易导致错误位置检测及纠错模块无法识别EoB的位置，进而造成漏检，导致检错纠错性能损失。
有鉴于此，本申请实施例提供一种位置检测方法及相关装置，可以应用于需要高速互联的场景。这里，互联链路可以是以下类型中的一种：
第一种，芯片(chip)与芯片之间通过信道(channel)互联的互联链路，如图5中的(a)所示，芯片A和芯片B之间通过信道互联的互联链路。
第二种，芯片与光模块(module)之间，以及光模块与光模块之间的互联链路，如图5中的(b)所示，芯片A和光模块A之间、光模块A和光模块B之间，以及光模块B和芯片B之间互联链路。
第三种，单板(board)与单板之间通过信道互联的互联链路，如图5中的(c)所示，单板A和单板B之间通过信道互联的互联链路。
第四种，系统(system)与系统之间通过信道互联的互联链路，如图5中的(d)所示，系统A和系统B之间通过信道互联的互联链路。这里，系统可以为通用计算机、路由器、交换机甚至手机等终端设备。
在上述四种互联链路中，互联链路可以是电链路，如印刷电路板(printed circuit board，PCB)、同轴电缆等，也可以是光链路和无线链路。
参见图6，图6示出了本申请实施例提供的位置检测装置的结构示意图。
位置检测装置包括判断模块和错误位置检测模块。可以理解，图6仅为本申请提供的位置检测装置的示意，该位置检测装置可包括较图6更多或更少的模块，本申请对此不做限制。
其中，判断模块用于接收DFE输出的DFE系数，DFE系数包括抽头系数。判断模块比较抽头系数与预设阈值之间的关系，并依据该关系确定错误位置检测模块的检测方法。
错误位置检测模块依据确定的检测方法和DFE输出的相关数据(包括但不限于dfe_input，dfe_output，dfe_sliced_data，c_dfe)确定判决信号序列中发生错误的判决信号的位置。该位置包括突发错误开始位置SoB和突发错误结束位置EoB。
其中，错误位置检测模块包括两种检测方法：
检测方法一，错误位置检测模块检测突发错误开始位置SoB，并以SoB为触发，对DFE传递过来的判决信号序列进行后溯，检测突发错误结束位置EoB。
检测方法二，错误位置检测模块检测突发错误结束位置EoB，并以EoB为触发，对DFE传递过来的判决信号序列进行回溯，检测突发错误起始位置SoB。
进一步地，当抽头系数小于或等于预设阈值，判断模块确定错误位置检测模块的检测方法为检测方法一。当抽头系数大于预设阈值，判断模块确定错误位置检测模块的检测方法为检测方法二。
其中，预设阈值可依据信道实际的比特出错概率(Bit Error Ratio，BER)设置。示例性地，若预设阈值为0.6，信道实际的比特出错概率为0.12；预设阈值为0.7，信道实际的比特出错概率为0.14；预设阈值为0.8，信道实际的比特出错概率为0.13，则可将预设阈值设置为0.6，以使信道实际的比特出错概率最佳或满足预设的要求。
具体地，请参见图7，为本申请提供的一种基于图6所示架构的检测突发错误位置的方法，该方法如下：
步骤1.位置检测装置接收DFE传递过来的信息。
其中，该信息包括(但不限于)dfe_input，dfe_output，dfe_sliced_data，c_dfe。
其中，DFE可以位于位置检测装置的内部，也可以位于位置检测装置的外部，本申请实施例对此不作限定。
步骤2.位置检测装置对DFE传递过来的全部或部分信息进行“缓存”或“延迟”处理，缓存或延迟的数据深度为D。
其中，缓存或延迟的数据可用于后续纠错，或在位置检测装置没有检测到误码时，将改缓存输出。
其中，D可为位置检测装置预设的长度，也可为DFE传递的判决信号序列的长度。
步骤3.位置检测装置的判断模块检测α值大小是否大于预设阈值α_th。
其中，0<α_th<1，当然，也可依据具体的信道环境设定对应的预设阈值。
如果α>α_th，执行步骤4，如果α≤α_th，执行步骤5。
步骤4.如果α>α_th，判断模块确定位置检测模块的检测方法为检测方法二。
具体地，步骤4包括以下步骤：
位置检测模块确定EoB，并以EoB为触发，对DFE传递过来的判决信号序列进行回溯(回溯长度为L，L<＝D)。
若在回溯过程中检测到突发错误起始位置SoB，错误位置检测模块对SoB到EoB之间的传递的位置检测模块进行纠错，并输出纠错后的判决符号序列。
如位置检测模块没有检测侧到EoB，则表明该判决符号序列不存在突发错误，则错误位置检测模块输出原始的判决符号序列。错误位置检测及纠错流程结束。
步骤5.如果α≤α_th，判断模块确定位置检测模块的检测方法为检测方法二。
具体地，步骤5包括以下步骤：
错误位置检测模块确定SoB，并以SoB为触发，对DFE传递过来的判决信号序列进行后溯(后溯长度为L，L<＝D)。
若错误位置检测模块检测到突发错误起截止置EoB，对SoB到EoB之间的传递的判决信号序列进行纠错，输出纠错后的判决信号序列。如错误位置检测模块没有检测侧到SoB，则输出原始判决信号序列。错误位置检测及纠错流程结束。
步骤6.位置检测装置将EoB和SoB的错误位置、错误概率等信息传递给FEC，由FEC进行弹性译码。
需要说明的是，FEC是一种差错控制技术，即在发送信号中添加冗余信息，以使接收端的FEC译码模块利用冗余信息检测接收到的信号中可能出现的错误，并进行纠正。里德所罗门(reed-solomon，RS)码(code)常用于各种数据保护和校验，RS码可以表示为RS(N，K)。其中，N表示码字长度，K表示有效信息长度。
本申请实施例描述的位置检测装置以及适用场景是为了更加清楚的说明本申请实施例的技术方案，并不构成对于本申请实施例提供的技术方案的限定。本领域普通技术人员可知，随着技术架构的演变和新业务场景的出现，本申请实施例提供的技术方案对于类似的技术问题，同样适用。
下面对本申请实施例提供的位置检测方法进行具体阐述。
需要说明的是，本申请下述实施例中各个消息名字或消息中各参数的名字等只是一个示例，具体实现中也可以是其他的名字。在此统一说明，以下不再赘述。
本申请实施例提供一种位置检测方法，基于图6所示的架构的检测突发错误位置的方法，该位置检测方法应用在突发错误检测过程中。参见图8，该位置检测方法包括如下步骤：
S801、位置检测装置获取判决反馈均衡系数(c_dfe)，该判决反馈均衡系数(c_dfe)包括抽头系数。
其中，信道检测装置接收DFE输出的判决反馈均衡系数(c_dfe)。
在其他实施例中，判决反馈均衡系数(c_dfe)还可包括DFE均衡系数，DFE判决后的判决信号的两相邻电平之前的电平差。
S802、判断抽头系数是否大于第一预设阈值。
可以理解，本申请实施例中，可依据抽头系数与第一预设阈值的关系确定错误位置的检测方法。具体地，由于DFE属于反馈均衡器，当存在信号错判时易造成错误传递。若抽头系数大于第一预设阈值，当存在信号错判时，错误传递易导致溢出，便于识别EoB的位置。若抽头系数小于或等于第一预设阈值，当存在信号错判时，错误传递不易溢出，不便于识别EoB的位置，但是便于识别SoB的位置。如此，依据抽头系数与第一预设阈值的不同关系确定不同的检测方法，以减少漏检的概率和减少检错纠错性能损失。
示例的，在S802中，若抽头系数小于或等于第一预设阈值，执行S803。若抽头系数大 于第一预设阈值，执行S805。
S803、获取判决反馈均衡器的判决信号序列并确定判决信号序列中突发错误开始的判决信号的第一位置。
其中，判决信号序列是DFE输出的序列。示例性的，参见图6，位置检测装置包括错误位置检测模块。DFE向错误位置检测模块发送判决信号序列。相应的，错误位置检测模块接收来自DFE的判决信号序列。
示例性的，判决信号序列包括多个判决信号。以表2为例，一个判决信号的位置对应一个判决信号标识。表2中示出了18个判决信号的位置，即判决信号标识1至判决信号标识18。判决信号序列包括上述18个信号位置上的判决信号的符号值。
S804、依据第一位置确定判决信号序列中EoB的判决信号的第二位置。
具体地，可以以SoB为触发，对DFE传递过来的信息进行后溯，以确定突发错误结束位置EoB。
如此，当反馈均衡器的抽头系数小于第一预设阈值，且存在信号错判时，错误传递不易溢出，不便于识别EoB的位置，但是便于识别SoB的位置。如此依据抽头系数与第一预设阈值的关系确定检测方法，减少漏检的概率，减少检错纠错性能损失。
在一实施例中，S804的实现过程可以例如但不限于如下说明：
位置检测装置首先确定SOB可能出现的范围，然后在该范围内确定“判决信号序列中EoB的判决信号的位置”。
具体地，位置检测装置依据SoB位置对信息进行后溯，找到LEoB(Latest End of Burst-error)，其中SoB和LEoB之间的区域即为SoB可能出现的第一判决区域，然后在该第一判决区域内的误码传递图样范围内搜索SOB的位置。
其中，该第一判决区域包括LEoB所在的位置，还包括SoB和LEoB的判决信号对应的位置。
S805、获取判决反馈均衡器的判决信号序列并确定所述判决信号序列中突发错误结束的判决信号的第三位置。
S806、位置检测装置依据第三位置确定判决信号序列中SoB的判决信号的第四位置。
如此，当抽头系数大于或等于第一预设阈值，位置检测装置首先确定判决信号序列中突发错误结束的判决信号的第三位置，然后依据该第三位置确定判决信号序列中SoB的判决信号的第四位置。
可以理解，在本申请实施例中，S803的实现过程可以例如但不限于如下说明：
步骤1，位置检测装置获取判决信号序列中信号位置A对应的目标数值1。
其中，信号位置A是判决信号序列中一个或多个判决信号的位置。示例性的，以表2为例，信号位置A可以是判决信号标识1至判决信号标识18中的一个或多个判决信号标识。
其中，目标数值1包括以下至少一项：信号位置A上判决信号的符号值、信号位置A对应的均衡数值、或信号位置A对应的差值。信号位置A对应的差值为信号位置A上判决信号的符号值和信号位置A对应的均衡数值之间的差值。
示例性的，以信号位置A包括一个判决信号的位置为例，参见图6，在“目标数值1包括信号位置A对应的差值”的情况下，DFE向错误位置检测模块发送差值。相应的，错误位置检测模块接收来自DFE的差值。在“目标数值1包括信号位置A上判决信号的符号值和信号位置A对应的均衡数值”的情况下，DFE向错误位置检测模块发送判决信号的符号值和均衡数值。相应的，错误位置检测模块接收来自DFE的判决信号的符号值和均衡数值。在“目 标数值1包括信号位置A上判决信号的符号值、信号位置A对应的均衡数值和信号位置A对应的差值”的情况下，DFE向错误位置检测模块发送判决信号的符号值、均衡数值和差值。相应的，错误位置检测模块接收来自DFE的判决信号的符号值、均衡数值和差值。
需要说明的是，在信号位置A包括多个信号位置的情况下，DFE向错误位置检测模块传输以下中的至少一项：信号位置A对应的判决信号序列、均衡数值序列、或差值序列。
步骤2，位置检测装置根据目标数值1，确定判决信号序列中突发错误开始的判决信号的位置。
示例性的，错误位置检测模块根据信号位置A上判决信号的符号值和信号位置1对应的均衡数值，从信号位置A中确定一个信号位置为判决信号序列中SoB的判决信号的位置。或错误位置检测模块根据信号位置1对应的差值，从信号位置A中确定一个信号位置为判决信号序列中SoB的判决信号的位置。
在一实施例中，依据差值与第二预设阈值的关系确定判决信号序列中SoB的判决信号的位置，具体地，确定判决信号序列中每个判决信号对应的差值，若该差值大于第二预设阈值，则该判决信号即为SoB的判决信号的位置。
示例性地，在信号位置A包括一个判决信号的位置为例，以“信号位置A实现为表2中的判决信号标识9”为例，第二预设阈值为0.4，信号位置A上判决信号的符号值为“0”，信号位置A对应的均衡数值为“0.58”，信号位置A对应的差值为“-0.42”。错误位置检测模块根据差值(即0.42)大于预设阈值0.4，确定判决信号标识9标识的信号位置即为该判决信号序列中SoB的判决信号的位置。或者，错误位置检测模块根据信号位置A对应的均衡数值(即0.58)和信号位置A上判决信号的符号值(即1)，确定判决信号标识9标识的信号位置即为该判决信号序列中SoB的判决信号的位置。
需要说明的是，在“信号位置A包括多个判决信号的位置”的情况下，错误位置检测模块对信号位置A中的每个判决信号的位置进行判断，具体过程参见上一段的说明，此处不再赘述。
进一步地，若确定判决信号序列中至少两个判决信号对应的差值大于第二预设阈值，则将判决信号序列中首次出现差值大于第二预设阈值的判决信号设置为SoB的判决信号的位置。
其中，第二预设阈值可预先设置在位置检测装置中，第二预设阈值可为固定值，例如依据位置检测装置所处理的信道的参数预设。当然第二预设阈值还可依据信道参数实时变化。
在一实施例中，第二预设阈值可以为“ε·α·dlevel”，其中，ε表示预设的DFE的误差异常的系数。α·dlevel可以是位置检测装置在获取判决信号时同时获取的，其中，dlevel可为PAM-N信号相邻两个符号电平之间的间隔。当然，ε·α·dlevel也可以是在纠错装置中预设的固定值，对此，本申请不做限制。
如此，在位置检测装置获取信号位置A上的目标数值1的情况下，如位置检测装置获取信号位置A上判决信号的符号值、信号位置A对应的均衡数值和信号位置A对应的差值中的至少一个数值，进而依据目标数值1和第二预设阈值之间的关系确定判决信号序列中SoB的判决信号的位置，为确定EoB的判决信号的位置提供基础。
参见图9，图9为图8中S804的实现过程。在一些实施例中，S804包括：
S8041、位置检测装置依据第一位置确定第一候选位置。
其中，第一候选位置是突发错误结束的判决信号在判决信号序列中最晚出现的候选位置。换言之，第一候选位置是判决信号序列中可能出现的最晚的突发错误结束(Latest End of Burst-error，LEoB)的判决信号的位置。也就是说，SoB的判决信号可能出现的位置描述为“候选 位置”。
S8042、位置检测装置根据第一位置和第一候选位置确定第一判决区域。
其中，第一判决区域包括第一候选位置、第一位置和第一候选位置之间的判决信号对应的位置。
例如，仍以表2为例，第一判决区域包括“判决信号标识14”、“判决信号标识10”至“判决信号标识14”之间的信号位置。
示例性的，以表2为例，在第一候选位置为“判决信号标识14”且第一位置为“判决信号标识9”的情况下，第一判决区域包括“判决信号标识10”至“判决信号标识14”中的一个信号位置。在错误位置检测模块获取到“SoB的判决信号的位置”和目标数值2之后，以SoB的判决信号的位置为起始，对判决信号序列中“判决信号标识9”至“判决信号标识14”对应判决信号进行回溯，根据不同信号位置上的目标数值2，确定判决信号序列中EoB的判决信号的位置。
S8043、位置检测装置依据第一判决区域确定第二位置。
具体地，第二位置选自第一判决区域。位置检测装置中的错误位置检测模块从第一位置后溯到第一候选位置后截止。
如此，在位置检测装置确定判决信号序列中EoB的判决信号可能出现的最晚的位置的情况下，在一定程度上缩小了位置检测装置搜索EoB的判决信号的范围，进一步降低了位置检测装置的运算量。
需要说明的是，如图9所示，上述S8041的实现方式有多种，可以例如但不限于以下实施例所示的情况，S8041包括以下步骤：
步骤11、位置检测装置根据信号位置F上判决信号的符号值和信号位置F对应的错误估计图样，确定信号位置F对应的DFE校验值。
其中，信号位置F包括判决信号序列中位于SoB的判决信号之后的至少一个判决信号的位置。示例性的，仍以表2为例，信号位置D包括判决信号标识9之后的一个判决信号的位置，如信号位置D实现为“判决信号标识11”对应的信号位置，或信号位置D实现为“判决信号标识12”对应的信号位置。
其中，信号位置F对应的错误估计图样是基于DFE的错误传递特性确定的。例如，仍以表2为例，SoB的判决信号的位置(即判决信号标识9)对应的判决噪音为“-0.42”，即表示均衡数值小于判决信号的符号值。如此，错误位置检测模块确定SoB的判决信号的位置对应的错误估计图样为“+1”。结合DFE的错误传递特性，判决信号标识9之后的信号位置对应的错误估计图样如表2所示。例如，判决信号标识14对应的错误估计图样为“-1”，判决信号标识13对应的错误估计图样为“+1”。
示例性的，S8041的实现过程如下：位置检测装置中将“信号位置F对应的判决信号的符号值”和“信号位置F对应的错误估计图样”相减，以得到信号位置F对应的DFE校验值。例如，以“信号位置F实现为判决信号标识14”为例，“信号位置F上判决信号的符号值”为“3”，“信号位置D对应的错误估计图样”为“-1”，两者相减，即可得到“信号位置F对应的DFE校验值”为“4”。再如，以“信号位置F实现为判决信号标识15”为例，“信号位置F上判决信号的符号值”为“1”，“信号位置D对应的错误估计图样”为“+1”，两者相减，即可得到“信号位置F对应的DFE校验值”为“1”。
步骤12、位置检测装置将信号位置F对应的DFE校验值与预设范围A进行比较，以得到比较结果。
其中，预设范围A是基于DFE判决后的符号值确定的。例如，以表2为例，DFE判决后的符号值包括“0”、“1”、“2”和“3”中的至少一个数值。如此，预设范围2即为[0,3]。
其中，比较结果指示信号位置F中哪一信号位置的DFE校验值超出预设范围A。
示例性的，以“信号位置F实现为判决信号标识13”为例，位置检测装置中的SoBD模块将“判决信号标识13对应的DFE校验值”与预设范围A进行比较，以得到比较结果，如第二比较结果指示“判决信号标识13对应的DFE校验值”未超出预设范围A。
步骤13、位置检测装置根据比较结果，确定第一候选位置。
示例性的，若第二比较结果指示“信号位置F中一个信号位置对应的DFE校验值超出预设范围A”，则位置检测装置确定比较结果指示的信号位置(即DFE校验值超出预设范围A的信号位置)为第一候选位置。反之，若比较结果指示“信号位置F对应的DFE校验值未超出预设范围A”，则位置检测装置确定信号位置F不包括第一候选位置。这里，仍以表2为例，确定“判决信号标识12对应的DFE校验值”未超出预设范围A，此种情况下，“判决信号标识12”对应的信号位置不是第一候选位置。错误位置检测模块进而判断“判决信号标识13”对应的信号位置是否为第一候选位置。若“判决信号标识13”对应的信号位置不是信第一候选位置，则错误位置检测模块继续判断“判决信号标识14”的状况，如此循环，直至错误位置检测模块确定“判决信号标识14对应的DFE校验值(即4)”超出预设范围A，此种情况下，“判决信号标识14”对应的信号位置即为第一候选位置。
如此，在位置检测装置确定各个信号位置对应的DFE校验值的情况下，位置检测装置即可根据DFE校验值的取值状况，确定哪一信号位置为判决信号序列中EoB的判决信号可能出现最晚的信号位置，也即第一候选位置。
需要说明的是，如图9所示，上述S8043的实现方式有多种，下面以实施例一和实施例二分别进行说明。
实施例一：
如图10所示，在实施例一中，S8043包括：
S101、位置检测装置获取第一判决区域内判决信号对应的差值。
其中，该差值为判决信号的符号值和对应的均衡数值之间的差值。
示例性地，可通过如下公式计算该差值：
差值＝判决信号的符号值(dfe_output)-判决信号的均衡数值(dfe_sliced_data)。
S102、位置检测装置确定从第一位置至第一候选位置方向的判决符号对应的差值的正负符号与之前相邻判决符号对应的差值的正负符号相同的位置为第二位置。
示例性地，以表2为例，若判决信号标识9至判决信号标识14为第一判决区域内判决信号对应的位置，则以上位置的差值分别为：0.42、0.22、0.48、-0.03、0.26及0.01，差值的正负符号分别为：-、+、+、-、+、+；与之前位置的差值的正负符号相同的位置分别为判决信号标识11和判决信号标识14，由于判决信号标识11为判决信号标识10至判决信号标识14首次出现相邻位置的差值的正负符号值相同的位置，因此，将判决信号标识11的位置标识为EoB的位置，即该判决信号序列中突发错误结束的判决信号的第二位置。
进一步地，若第一位置至第一候选位置的判决信号序列中判决符号的差值的正负符号相同的位置的数量大于一个，则将首次出现差值的正负符号相同的位置设置为EoB。
如此，在位置检测装置确定判决信号序列中EoB的判决信号可能出现的最晚的位置的情况下，依据SoB和LEoB确定的第一判决区域内每个判决信号标识对应的差值的正负符号，将与之前相邻位置判决信号对应的差值的正负符号相同的位置设置为该判决信号序列中突发 错误结束的判决信号的第二位置。
实施例二：
如图11所示，在实施例二中，S8043包括：
S111、位置检测装置获取第一判决区域的判决符号对应的预测判决误差。
其中，预测判决误差又称为错误图像。
示例性地，以表2为例，SoB的判决阈值为0.4，判决信号标识9对应的差值为：判决信号的符号值(0.58)-判决信号的均衡数值(1)＝-0.42。该差值的绝对值大于0.4，则确定判决信号标识9的位置为SoB，由于该差值为负值，则判决信号标识9对应的预测判决误差为+1，由于突发错误的传递，导致判决信号标识10至判决信号标识14对应的预测判决误差依次为：-1，+1，-1，+1，-1。当然，在其他实施例中，若该差值为正值，则该判决信号标识对应的预测判决误差为-1，则该判决信号标识后面的判决信号标识对应的预测判决误差依次为：+1，-1，+1，-1等。
S112、位置检测装置依据差值和该预测判决误差的差值确定所述判决区域的判决符号对应的估计判决误差。
其中，估计判决误差，又称为错误估计图样。
其中，该差值为判决信号的符号值(dfe_sliced data)和对应的均衡数值(dfe_output)之间的差值；估计判决误差为差值与预测判决误差的差值。则估计判决误差的计算公式为：
估计判决误差＝符号值-均衡数值-预测判决误差。
S113、位置检测装置确定所述估计判决误差的绝对值最大的判决信号的位置为第二位置。
示例性地，以表2位例，判决信号标识10至判决信号标识14对应估计判决误差依次分别为：-0.58、0.68、-0.53、1.47、-1.08、0.84；则绝对值最大的估计判决误差为1.47。即判决信号标识14的判决信号对应的位置即为第二位置。
如此，在位置检测装置确定判决信号序列中EoB的判决信号可能出现的最晚的位置的情况下，依据SoB和LEoB确定的第一判决区域内确定每个判决信号标识对应的估计判决误差，确定估计判决误差的绝对值为最大的位置即为该判决信号序列中突发错误结束的判决信号的第二位置。
需要说明的是，请再次参阅图8所示，在本申请实施例中，上述S806的实现方式有多种。示例的，请一并参阅图12，在一些实施例中，S806包括：
S8061、位置检测装置确定突发错误开始的判决信号在判决信号序列中开始出现的第二候选位置。
其中，所述第二候选位置是突发错误结束的判决信号之前的至少一个判决信号的位置。
S8062、位置检测装置依据该第二候选位置和第三位置确定第二判决区域。
其中第二判决区域包括第二候选位置的判决信号，第二判决区域还包括位于第三位置之前，且位于第二候选位置之后的判决信号。
S8063、位置检测装置依据该第二判决区域确定所述判决信号序列中突发错误开始的判决信号的第四位置。
如此，在位置检测装置确定判决信号序列中SoB的判决信号可能出现的最早的位置的情况下，在一定程度上缩小了位置检测装置搜索SoB的判决信号的范围，进一步降低了位置检测装置的运算量。
需要说明的是，如图12所示，上述S8063的实现方式有多种。例如，如图13所示，在一些实施例中，S8063包括：
S131、位置检测装置获取该第二判决区域内判决信号的差值；
其中，该差值为判决信号的符号值(dfe_sliced data)和对应的均衡数值(dfe_output)之间的差值；
S132、位置检测装置确定该第二判决区域内判决信号的差值的绝对值最大对应的判决信号的位置为第四位置。
示例性的，以表1为例，第二判决区域包括“判决信号标识4”至“判决信号标识16”中的一个信号位置。判决信号标识4至判决信号标识16对应的差值(dfe_slicing_error)依次为0.13、-0.15、0.13、0.10、0.13、-0.49、0.02、-0.13、-0.03、0.11、-0.09、-0.04、-0.04。其中该差值的绝对值最大为0.49，即判决信号标识9对应的差值的绝对值为最大，则第四位置即为判决信号标识9对应的判决符号的位置。
如此，依据所述第二候选位置和所述判决信号序列中突发错误结束的判决信号的第三位置，确定所述判决信号序列中突发错误开始的判决信号所在的第二判决区域，并在该区域内确定差值的绝对值最大对应的判决信号的位置为第四位置。
需要说明的是，如图12所示，上述S8061的实现方式有多种。例如，如图14所示，在一些实施例中，S8061包括：
S141、位置检测装置根据信号位置D上判决信号的符号值和信号位置D对应的错误估计图样，确定信号位置D对应的DFE校验值。
其中，信号位置D包括判决信号序列中位于EoB的判决信号之前的至少一个判决信号的位置。示例性的，仍以表1为例，信号位置D包括判决信号标识17之前的一个判决信号的位置，如信号位置D实现为“判决信号标识16”对应的信号位置，或信号位置D实现为“判决信号标识15”对应的信号位置。
其中，信号位置D对应的错误估计图样是基于DFE的错误传递特性确定的。例如，仍以表1为例，EoB的判决信号的位置(即判决信号标识17)对应的判决噪音为“1.07”，即表示均衡数值大于判决信号的符号值。如此，位置检测模块确定EoB的判决信号的位置对应的错误估计图样为“+1”。结合DFE的错误传递特性，判决信号标识17之前的信号位置对应的错误估计图样如表1所示。例如，判决信号标识16对应的错误估计图样为“-1”，判决信号标识15对应的错误估计图样为“+1”。
示例性的，S141的实现过程如下：位置检测装置中的错误位置检测模块将“信号位置D对应的判决信号的符号值”和“信号位置D对应的错误估计图样”相减，以得到信号位置D对应的DFE校验值。例如，以“信号位置D实现为判决信号标识16”为例，“信号位置D上判决信号的符号值”为“0”，“信号位置D对应的错误估计图样”为“-1”，两者相减，即可得到“信号位置D对应的DFE校验值”为“1”。再如，以“信号位置D实现为判决信号标识15”为例，“信号位置D上判决信号的符号值”为“0”，“信号位置D对应的错误估计图样”为“+1”，两者相减，即可得到“信号位置D对应的DFE校验值”为“-1”。
S142、位置检测装置将信号位置D对应的DFE校验值与预设范围进行比较，以得到第一比较结果。
其中，预设范围是基于DFE判决后的符号值确定的。例如，以表1为例，DFE判决后的符号值包括“0”、“1”、“2”和“3”中的至少一个数值。如此，预设范围即为[0,3]。
其中，第一比较结果指示信号位置D中哪一信号位置的DFE校验值超出预设范围。
示例性的，以“信号位置D实现为判决信号标识16”为例，位置检测装置中的SoBD模块将“判决信号标识16对应的DFE校验值”与预设范围进行比较，以得到第一比较结果，如第 二比较结果指示“判决信号标识16对应的DFE校验值”未超出预设范围。
S143、位置检测装置根据第一比较结果，确定信号位置C。
其中，信号位置C是信号位置D中的一个信号位置。
示例性的，若第二比较结果指示“信号位置D中一个信号位置对应的DFE校验值超出预设范围”，则位置检测装置中的错误位置检测模块确定第一比较结果指示的信号位置(即DFE校验值超出预设范围的信号位置)为信号位置C。反之，若第一比较结果指示“信号位置D对应的DFE校验值未超出预设范围”，则位置检测装置中的错误位置检测模块确定信号位置D不包括信号位置C。这里，仍以表1为例，错误位置检测模块确定“判决信号标识16对应的DFE校验值”未超出预设范围，此种情况下，“判决信号标识16”对应的信号位置不是信号位置C。SoBD模块进而判断“判决信号标识15”对应的信号位置是否为信号位置C。若“判决信号标识15”对应的信号位置不是信号位置C，则错误位置检测模块继续判断“判决信号标识14”的状况，如此循环，直至错误位置检测模块确定“判决信号标识4对应的DFE校验值(即-1)”超出预设范围，此种情况下，“判决信号标识4”对应的信号位置即为信号位置C。
如此，在位置检测装置确定各个信号位置对应的DFE校验值的情况下，位置检测装置即可根据DFE校验值的取值状况，确定哪一信号位置为判决信号序列中SoB的判决信号可能出现最早的信号位置，也即信号位置C。
需要说明的是，若位置检测装置未获取到判决信号序列中EoB的判决信号的位置，则表明该判决信号序列不存在突发错误，位置检测装置输出原始的判决信号序列。
可以理解，本申请实施例提供的位置检测方法中，在位置检测装置确定判决信号序列中EoB的判决信号的位置的情况下，位置检测装置还能够获取EoB的判决信号之前的信号位置B上的目标数值，如信号位置B上判决信号的符号值、信号位置B对应的均衡数值和信号位置B对应的第一差值中的至少一项，进而依据目标数值确定判决信号序列中SoB的判决信号的位置，为消除SoB处的错误提供基础，有助于降低误码率。
进一步地，本申请提供的位置检测装置也还用于基于判决信号序列中的错误位置对应的判决信号进行纠正，本申请对于具体的纠正方法不作限制。
请一并参阅图15，图15示出了一种当抽头系数小于或等于第一预设阈值时的性能比较图。其中图15中，横轴为DFE的抽头系数(ALPHA)，即Es/No。纵轴为误码率(BER),也可称为比特出错概率。
其中，曲线FFE+DFE是基于(1+D)信道，DFE在预编码关闭条件下的均衡性能曲线。曲线FULL MLSE是基于(1+D)信道，MLSE在预编码开启条件下的性能曲线。曲线SOB_USEC errsigh是基于(1+D)信道，均采用方法模式一的均衡性能曲线。曲线EoB_USEC是基于(1+D)信道，采用方法模式二的均衡性能曲线。
显然，当抽头系数小于0.825左右时，采用方法模式一的性能优于采用方法模式二的均衡性能，当抽头系数大于0.825左右时，采用方法模式二的性能优于采用方法模式一的均衡性能。不同抽头系数下采用方法模式一和采用方法模式二的均衡性能与MLSE相近，但本申请的功耗和计算复杂度均小于MLSE。
请一并参阅图16，图16示出了一种当抽头系数大于第一预设阈值时的性能比较图。其中图16中，横轴为信噪比，采用每个符号所携带的能量除以噪声功率谱密度来表示，即Es/No。纵轴为误码率(BER)，也可称为比特出错概率。
图16中，曲线Un-Coded表示现有技术中，基于(1+D)信道，DFE在预编码关闭条件下的均衡性能曲线。曲线(1+D)DFE PrecOff表示现有技术中，基于(1+D)信道，DFE在预编码关 闭条件下的性能曲线。曲线(1+D)DFE PrecOn表示现有技术中，基于(1+D)信道，DFE在预编码开启条件下的性能曲线。曲线(1+D)EoBD USEC PrecOff表示基于(1+D)信道，错误位置检测模块在预编码关闭条件下的性能曲线。曲线(1+D)EoBD USEC PrecON表示基于(1+D)信道，错误位置检测模块在预编码开启条件下的性能曲线。曲线(1+D)Full MSLSE PrecOff表示基于(1+D)信道，错误位置检测模块在MSLSE关闭条件下的性能曲线。曲线(1+D)Full MSLSE PrecOn表示基于(1+D)信道，错误位置检测模块在预编码开启条件下的性能曲线。
显然，通过开启错误位置检测模块，本申请的提供的错误检测与开启MLSE的性能相当，但是本申请提供的方法的功耗和计算复杂度远远小于MLSE。
可以理解，上述主要从方法的角度对本申请实施例提供的方案进行了介绍。相应的，本申请实施例还提供了位置检测装置，该位置检测装置可以为上述方法实施例中的装置，或者为可用于上述装置的部件。可以理解的是，该位置检测装置为了实现上述功能，其包含了执行各个功能相应的硬件结构和/或软件模块。本领域技术人员应该很容易意识到，结合本文中所公开的实施例描述的各示例的单元及算法步骤，本申请能够以硬件或硬件和计算机软件的结合形式来实现。某个功能究竟以硬件还是计算机软件驱动硬件的方式来执行，取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能，但是这种实现不应认为超出本申请的范围。
作为一种可能的实施例，图17示出了一种位置检测装置1000的结构示意图。该位置检测装置1000包括通信单元1003和处理单元1002。
比如，以位置检测装置1000为上述方法实施例中图6的位置检测装置为例，通信单元1003执行位置检测装置的S801-S807，和/或通信单元1003还用于执行本申请实施例中位置检测装置的其他收发步骤。处理单元1002用于执行本申请实施例中位置检测装置的S801-S807，和/或处理单元1002用于执行本申请实施例中位置检测装置的其他处理步骤。
其中，上述方法实施例涉及的各步骤的所有相关内容均可以援引到对应功能模块的功能描述，在此不再赘述。
应理解，本申请实施例中的处理单元1002可以由处理器或处理器相关电路组件实现，通信单元1003可以由收发器或收发器相关电路组件实现。
可选的，位置检测装置1000还可以包括存储单元1001，用于存储位置检测装置1000的程序代码和数据，数据可以包括不限于原始数据或者中间数据等。
其中，处理单元1002可以是处理器或控制器，例如可以是中央处理器(central processing unit，CPU)，通用处理器，数字信号处理器(digital signal processor，DSP)，专用集成电路(application specific integrated circuit，ASIC)，现成可编程门阵列(field programmable gate array，FPGA)或者其他可编程逻辑器件、晶体管逻辑器件、硬件部件或者其任意组合。其可以实现或执行结合本申请公开内容所描述的各种示例性的逻辑方框，模块和电路。处理器也可以是实现计算功能的组合，例如包含一个或多个微处理器组合，DSP和微处理器的组合等等。
通信单元1003可以是通信接口、收发器或收发电路等，其中，该通信接口是统称，在具体实现中，该通信接口可以包括多个接口。
存储单元1001可以是存储器。
当处理单元1002为处理器，通信单元1003为通信接口，存储单元1001为存储器时，本申请实施例所涉及的位置检测装置1100可以为图17所示。
又示例的，请参阅图18所示，作为另一种可能的实施例，该位置检测装置1100包括： 处理器1102、收发器1103、存储器1101。
其中，收发器1103可以为独立设置的发送器，该发送器可用于向其他设备发送信息，该收发器也可以为独立设置的接收器，用于从其他设备接收信息。该收发器也可以是将发送、接收信息功能集成在一起的部件，本申请实施例对收发器的具体实现不做限制。
可选的，位置检测装置1100还可以包括总线1104。其中，收发器1103、处理器1102以及存储器1101可以通过总线1104相互连接；总线1104可以是外设部件互连标准(peripheral component interconnect，PCI)总线或扩展工业标准结构(extended industry standard architecture，EISA)总线等。所述总线1104可以分为地址总线、数据总线、控制总线等。为便于表示，图11中仅用一条粗线表示，但并不表示仅有一根总线或一种类型的总线。
作为一种可能的实施例，本申请实施例提供一种芯片，该芯片包括逻辑电路和输入输出接口。其中，输入输出接口用于与芯片之外的模块通信，逻辑电路用于执行上述方法实施例中位置检测装置上除了收发操作之外的其他操作。
比如，以芯片实现为上述方法实施例中图8的位置检测装置的功能为例，输入输出接口执行位置检测装置的S801-S807，和/或输入输出接口还用于执行本申请实施例中位置检测装置的其他收发步骤。逻辑电路用于执行本申请实施例中位置检测装置的S801-S807，和/或逻辑电路还用于执行本申请实施例中其他处理步骤。
本领域普通技术人员可以理解：在上述实施例中，可以全部或部分地通过软件、硬件、固件或者其任意组合来实现。当使用软件实现时，可以全部或部分地以计算机程序产品的形式实现。所述计算机程序产品包括一个或多个计算机指令。在计算机上加载和执行所述计算机程序指令时，全部或部分地产生按照本申请实施例所述的流程或功能。所述计算机可以是通用计算机、专用计算机、计算机网络、或者其他可编程装置。所述计算机指令可以存储在计算机可读存储介质中，或者从一个计算机可读存储介质向另一个计算机可读存储介质传输，例如，所述计算机指令可以从一个网站站点、计算机、服务器或数据中心通过有线(例如同轴电缆、光纤、数字用户线(digital subscriber line，DSL))或无线(例如红外、无线、微波等)方式向另一个网站站点、计算机、服务器或数据中心进行传输。所述计算机可读存储介质可以是计算机能够存取的任何可用介质或者是包括一个或多个可用介质集成的服务器、数据中心等数据存储设备。所述可用介质可以是磁性介质，(例如，软盘、硬盘、磁带)、光介质(例如，数字视频光盘(digital video disc，DVD)、或者半导体介质(例如固态硬盘(solid state disk，SSD))等。
可以理解，在本申请所提供的几个实施例中，应该理解到，所揭露的系统，装置和方法，可以通过其它的方式实现。例如，以上所描述的装置实施例仅仅是示意性的，例如，所述单元的划分，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，例如多个单元或组件可以结合或者可以集成到另一个系统，或一些特征可以忽略，或不执行。另一点，所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口，装置或单元的间接耦合或通信连接，可以是电性或其它的形式。
所述作为分离部件说明的单元可以是或者也可以不是物理上分开的，作为单元显示的部件可以是或者也可以不是物理单元，即可以位于一个地方，或者也可以分布到多个网络设备上。可以根据实际的需要选择其中的部分或者全部单元来实现本实施例方案的目的。
另外，在本申请各个实施例中的各功能单元可以集成在一个处理单元中，也可以是各个功能单元独立存在，也可以两个或两个以上单元集成在一个单元中。上述集成的单元既可以采用硬件的形式实现，也可以采用硬件加软件功能单元的形式实现。
通过以上的实施方式的描述，所属领域的技术人员可以清楚地了解到本申请可借助软件加必需的通用硬件的方式来实现，当然也可以通过硬件，但很多情况下前者是更佳的实施方式。基于这样的理解，本申请的技术方案本质上或者说对现有技术做出贡献的部分可以以软件产品的形式体现出来，该计算机软件产品存储在可读取的存储介质中，如计算机的软盘，硬盘或光盘等，包括若干指令用以使得一台计算机设备(可以是个人计算机，服务器，或者网络设备等)执行本申请各个实施例所述的方法。
以上所述，仅为本申请的具体实施方式，但本申请的保护范围并不局限于此，在本申请揭露的技术范围内的变化或替换，都应涵盖在本申请的保护范围之内。因此，本申请的保护范围应以所述权利要求的保护范围为准。

Claims (19)

  1. 一种位置检测方法，其特征在于，包括：
    获取判决反馈均衡器系数，所述判决反馈均衡器系数包括抽头系数；
    获取判决反馈均衡器的判决信号序列；
    若所述抽头系数小于或等于第一预设阈值，则确定所述判决信号序列中突发错误开始的判决信号的第一位置；
    依据所述第一位置确定所述判决信号序列中突发错误结束的判决信号的第二位置。
  2. 如权利要求1所述的位置检测方法，其特征在于，所述依据所述第一位置确定所述判决信号序列中突发错误结束的判决信号的第二位置包括：
    确定突发错误结束的判决信号在判决信号序列中最晚出现的第一候选位置，所述第一候选位置是突发错误开始的判决信号之后的至少一个判决信号的位置；
    依据所述第一候选位置和所述第一位置确定第一判决区域，所述第一判决区域包括第一候选位置、所述第一位置和所述第一候选位置之间的判决信号对应的位置；
    依据所述第一判决区域确定所述第二位置。
  3. 如权利要求2所述的位置检测方法，其特征在于，所述依据所述第一判决区域确定所述第二位置，包括：
    获取所述第一判决区域内的判决信号对应的差值，其中，所述差值为所述判决信号的符号值和对应的均衡数值之间的差值；
    确定所述判决区域内中从所述第一位置至所述第一候选位置的判决符号对应的差值的正负符号与之前相邻的判决符号的差值的正负符号首次相同的位置为所述第二位置。
  4. 如权利要求2所述的位置检测方法，其特征在于，所述依据所述第一判决区域确定所述第二位置，包括：
    获取所述第一判决区域内的判决信号对应的错误图像；
    依据差值和所述错误图像确定错误估计图像，其中所述差值为所述判决信号的符号值和对应的均衡数值之间的差值，所述错误估计图像为所述差值与所述错误图像之间的差值；
    确定所述错误估计图像的绝对值最大的判决信号的位置为所述第二位置。
  5. 如权利要求2所述的位置检测方法，其特征在于，所述确定突发错误结束的判决信号在判决信号序列中最晚出现的第一候选位置，包括：
    获取所述判决信号序列中判决信号对应的DFE校验值，其中，所述DFE校验值是基于判决信号的符号值和对应的错误估计图样确定的；
    确定所述判决信号的DFE校验值超出预设范围的位置为所述第一候选位置。
  6. 如权利要求2所述的位置检测方法，其特征在于，所述方法还包括：
    若所述抽头系数大于所述第一预设阈值，确定所述判决信号序列中突发错误结束的判决信号的第三位置；
    确定突发错误开始的判决信号在判决信号序列中开始出现的第二候选位置，所述第二候选位置是突发错误结束的判决信号之前的至少一个判决信号的位置；
    依据所述第二候选位置和所述第三位置确定所述判决信号序列中突发错误开始的判决信号的第四位置。
  7. 如权利要求6所述的位置检测方法，其特征在于，所述依据所述第二候选位置和所述 第三位置确定所述判决信号序列中突发错误开始的判决信号的第四位置，包括：
    依据所述第三位置和所述第二候选位置确定第二判决区域，所述第二判决区域包括第二候选位置、所述第二候选位置和所述第三位置之间的判决信号对应的位置；
    获取所述第二判决区域内判决信号的差值；所述差值为判决信号的符号值和对应的均衡数值之间的差值；
    确定所述第二判决区域内判决信号的差值的绝对值最大对应的判决信号的位置为所述第四位置。
  8. 如权利要求1至7任一项所述的位置检测方法，其特征在于，所述方法还包括：
    纠正所述第一位置至所述第二位置对应的判决信号。
  9. 一种位置检测装置，其特征在于，包括：通信单元和处理单元，其中，
    所述通信单元，用于获取判决反馈均衡器系数，所述判决反馈均衡器系数包括抽头系数；
    所述通信单元，还用于获取判决反馈均衡器的判决信号序列；
    所述处理单元，用于当所述抽头系数小于或等于第一预设阈值时，确定所述判决信号序列中突发错误开始的判决信号的第一位置；
    所述处理单元，还用于依据所述第一位置确定所述判决信号序列中突发错误结束的判决信号的第二位置。
  10. 如权利要求9所述的装置，其特征在于，
    所述处理单元进一步用于：确定突发错误结束的判决信号在判决信号序列中最晚出现的第一候选位置，所述第一候选位置是突发错误开始的判决信号之后的至少一个判决信号的位置；
    依据所述第一候选位置和所述第一位置确定第一判决区域，所述第一判决区域包括第一候选位置、所述第一位置和所述第一候选位置之间的判决信号对应的位置；
    依据所述第一判决区域确定所述判决信号序列中突发错误结束的判决信号的第二位置。
  11. 如权利要求10所述的装置，其特征在于，
    所述处理单元进一步用于：获取所述第一判决区域内的判决信号对应的差值，其中，所述差值为判决信号的符号值和对应的均衡数值之间的差值；
    确定所述第一判决区域内中从所述第一位置至所述第一候选位置的判决符号对应的差值的正负符号与之前相邻的判决符号的差值的正负符号首次相同的位置为所述判决信号序列中突发错误结束的判决信号的第二位置。
  12. 如权利要求10所述的装置，其特征在于，
    所述处理单元进一步用于：
    获取所述第一判决区域内的判决信号对应的错误图像；
    依据差值和所述错误图像确定错误估计图像，其中所述差值为所述判决信号的符号值和对应的均衡数值之间的差值，所述错误估计图像为所述差值与所述错误图像之间的差值；
    确定所述错误估计图像的绝对值最大的判决信号的位置为第二位置。
  13. 如权利要求10所述的装置，其特征在于，所述处理单元进一步用于：
    获取判决信号序列中判决信号对应的DFE校验值，其中，所述DFE校验值是基于判决信号的符号值和对应的错误估计图样确定的；
    确定所述判决信号的DFE校验值超出预设范围的位置为第一候选位置。
  14. 如权利要求9所述的装置，其特征在于，所述处理单元进一步用于：
    若所述抽头系数大于第一预设阈值，确定所述判决信号序列中突发错误结束的判决信号 的第三位置；
    确定突发错误开始的判决信号在判决信号序列中开始出现的第二候选位置，所述第二候选位置是突发错误结束的判决信号之前的至少一个判决信号的位置；
    依据所述第二候选位置和所述第三位置确定所述判决信号序列中突发错误开始的判决信号的第四位置。
  15. 如权利要求14所述的装置，其特征在于，所述处理单元进一步用于：
    依据所述第三位置和所述第二候选位置确定第二判决区域，所述第二判决区域包括第二候选位置、所述第二候选位置和所述第三位置之间的判决信号对应的位置；
    获取所述第二判决区域内判决信号的差值；所述差值为判决信号的符号值和对应的均衡数值之间的差值；
    确定所述第二判决区域内判决信号的差值的绝对值最大对应的判决信号的位置为第四位置。
  16. 如权利要求9至15任一项所述的装置，其特征在于，所述处理单元还用于：
    纠正所述第一位置至所述第二位置对应的判决信号。
  17. 一种位置检测装置，其特征在于，包括：处理器和存储器，所述处理器和所述存储器耦合，所述存储器存储有程序指令，当所述存储器存储的程序指令被所述处理器执行时，如权利要求1至8中任一项所述的位置检测方法被执行。
  18. 一种芯片，其特征在于，所述芯片包括逻辑电路和输入输出接口，所述输入输出接口用于与所述芯片之外的模块通信，所述逻辑电路用于运行计算机程序或指令，以执行如权利要求1至8中任一项所述的位置检测方法。
  19. 一种计算机可读存储介质，其特征在于，所述计算机可读存储介质存储程序，所述程序被处理器调用时，权利要求1至8任一项所述的位置检测方法被执行。
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